JP6350967B2 - Semiconductor device and manufacturing method thereof - Google Patents
Semiconductor device and manufacturing method thereof Download PDFInfo
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- JP6350967B2 JP6350967B2 JP2014141236A JP2014141236A JP6350967B2 JP 6350967 B2 JP6350967 B2 JP 6350967B2 JP 2014141236 A JP2014141236 A JP 2014141236A JP 2014141236 A JP2014141236 A JP 2014141236A JP 6350967 B2 JP6350967 B2 JP 6350967B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/115—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
- H01L2224/11505—Sintering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
Description
本発明は、半導体装置とその製造方法に係り、特に、高密度実装化を図った半導体装置及びその製造方法に関する。 The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and more particularly, to a semiconductor device and a method for manufacturing the semiconductor device with high density mounting.
近年、半導体の高密度実装のために、はんだバンプを用いた接合が一般に用いられているが、より一層の高密度化を図るためには、はんだバンプ形成のファインピッチ化が求められており、この要請に応えるべく、ファインピッチ化を実現するためのはんだバンプあるいはその製造法について、従来からいくつかの提案がなされている。 In recent years, bonding using solder bumps is generally used for high-density mounting of semiconductors, but in order to achieve higher density, a fine pitch of solder bump formation is required, In order to meet this demand, several proposals have conventionally been made for solder bumps for realizing a fine pitch or a manufacturing method thereof.
例えば、特許文献１には、半導体基板表面の導体パッド上に、ピラー金属、ピラー金属上面を覆うアンダーバンプ金属層及び導体パッドとほぼ等径のはんだ金属層を順次形成してはんだ金属のリフロー処理を行うことによってはんだバンプを形成することが提案されており、また、特許文献２には、特許文献１記載のものと同様に導体パッドとほぼ等径のはんだ金属層を順次形成した後、ピラー金属層の直径を減少させ、次いで、はんだ金属のリフロー処理を行い、図１に示すようなはんだバンプを形成することによって、ファインピッチ化を図ることが提案されている。 For example, in Patent Document 1, a solder metal reflow process is performed by sequentially forming a pillar metal, an under bump metal layer covering the top surface of the pillar metal, and a solder metal layer having substantially the same diameter as the conductor pad on the conductor pad on the surface of the semiconductor substrate. It has been proposed to form solder bumps by performing the steps described above, and in Patent Document 2, a solder metal layer having substantially the same diameter as that of the conductor pad is sequentially formed in the same manner as described in Patent Document 1, and then pillars are formed. It has been proposed to achieve a fine pitch by reducing the diameter of the metal layer and then performing a solder metal reflow process to form solder bumps as shown in FIG.
また、例えば、特許文献３には、半導体チップ上のパット電極を下向きにして溶融はんだの噴流面に接触させることにより当該パッド電極上に一次はんだバンプを形成し、この一次はんだバンプが形成されたパッド電極を上向きにし、これにスクリーン印刷の手法によってはんだペーストを載置し、このはんだペーストを下向きにし、この下向きにされ重力が加えられた状態で前記はんだペーストをリフローして二次はんだバンプを形成することによって、パット電極のファインピッチ化を可能としたはんだバンプの製造も提案されている。 Further, for example, in Patent Document 3, a primary solder bump is formed on a pad electrode by making a pad electrode on a semiconductor chip face down and contacting a jet surface of molten solder, and the primary solder bump is formed. With the pad electrode facing upward, solder paste is placed on this by screen printing, this solder paste is facing downward, and the solder paste is reflowed in the state where it is directed downward and gravity is applied to form secondary solder bumps. It has also been proposed to produce solder bumps that enable the pad electrodes to have a fine pitch.
上記従来技術に示されるように、半導体の高密度実装に向けて、はんだバンプのファインピッチ化が図られているところであり、はんだバンプの密着性、導電性を確保した上でのファインピッチ化技術につき、様々な手法が検討されている。
例えば、特許文献１、２記載の技術においては、ウエハや有機基板の電極上に、電気メッキ法を用いて、小径のピラーを形成し、その上にメッキ法を用いてはんだ金属を形成し、リフロー処理を施すことではんだバンプを形成し、バンプの高さをある程度にまで高く形成している。しかし、メッキ法にてピラー形成、はんだ金属形成しているために、プロセススループットが悪く、また、溶融時のはんだ金属の自重および表面張力によって、バンプが扁平になりバンプ高さが制限されるため、はんだバンプ径に比して、それほど高いアスペクト比のものを得ることはできず、仮に、はんだ金属の載置量を増やしたとしても、隣接する他のはんだバンプに接触してショートを引き起こすおそれが生じるという問題があるため、半導体装置の高密度実装が十分に実現されているとはいえない。
また、特許文献３記載の技術においても、一次はんだバンプ表面のはんだペーストに対して、下向きにしてリフローすることによって、比較的、アスペクト比の高いバンプは形成されるが、アッセンブリ時など、再溶融時に、はんだ金属の自重および表面張力によって自ずとアスペクト比は制約を受け、隣接する溶融はんだ金属バンプと接触することで、電気的導通不良の原因となる恐れがあるため、この技術においても、半導体装置の高密度実装は十分ではない。
したがって、高密度実装を実現する半導体装置およびその製造法が望まれる。
As shown in the above-mentioned prior art, fine pitch of solder bumps is being made for high-density mounting of semiconductors, and fine pitch formation technology after ensuring solder bump adhesion and conductivity Various methods are being studied.
For example, in the techniques described in Patent Documents 1 and 2, a small-diameter pillar is formed on an electrode of a wafer or an organic substrate using an electroplating method, and a solder metal is formed thereon using a plating method. A solder bump is formed by performing a reflow process, and the bump height is increased to some extent. However, because pillar formation and solder metal are formed by plating, the process throughput is poor, and the bumps become flat and the bump height is limited by the weight and surface tension of the solder metal during melting. It is not possible to obtain an aspect ratio as high as the solder bump diameter, and even if the amount of solder metal is increased, there is a risk of causing a short circuit by contacting other adjacent solder bumps. Therefore, it cannot be said that high-density mounting of semiconductor devices has been sufficiently realized.
Also, in the technique described in Patent Document 3, bumps having a relatively high aspect ratio are formed by reflowing the solder paste on the surface of the primary solder bumps downward, but remelting at the time of assembly or the like. At times, the aspect ratio is naturally limited by the weight and surface tension of the solder metal, and contact with adjacent molten solder metal bumps can cause electrical continuity failure. High-density mounting is not enough.
Therefore, a semiconductor device that realizes high-density mounting and a manufacturing method thereof are desired.
本発明者らは、はんだバンプのファインピッチ化により高密度実装を可能とした半導体装置及びその製造方法について鋭意検討した結果、以下の知見を得た。 As a result of intensive studies on a semiconductor device and a method for manufacturing the same that enable high-density mounting by making the solder bumps finer, the present inventors have obtained the following knowledge.
従来から、相対向する半導体基板の所定位置（例えば、半導体パッケージ用有機基板上に形成されたパッド電極表面あるいは半導体パッケージ用ウエハ上に形成されたＵＢＭ(アンダーバンプメタル)）に形成したはんだバンプにより、半導体基板を接続・導通することによる半導体装置の高密度実装化技術はよく知られている。 Conventionally, by a solder bump formed on a predetermined position of an opposing semiconductor substrate (for example, a pad electrode surface formed on an organic substrate for a semiconductor package or an UBM (under bump metal) formed on a wafer for a semiconductor package). A high-density mounting technology for semiconductor devices by connecting and conducting semiconductor substrates is well known.
本発明者らは、上下に相対向する半導体基板（以下、下方に位置する半導体基板を「半導体基板Ａ」、また、上方に位置する半導体基板を「半導体基板Ｂ」という）を接続・導通するに際し、半導体基板Ｂの所定位置に、予め、所定の材料からなる液相焼結接合部を形成し、他方の液相焼結接合部を形成していない半導体基板Ａを、半導体基板Ｂの下方で、半導体基板Ａが前記液相焼結接合部に向き合いかつ近接するように位置決めした状態で、接合熱処理により液相焼結処理時に化合物化しなかった低融点金属により拡散接合すると、液相焼結接合部の形を維持したままで半導体基板Ａと半導体基板Ｂの両者は、低融点金属によって相互に接続・導通され、そして、このように接続された半導体基板Ａと半導体基板Ｂは、ファインピッチにおいて隣接する溶融はんだ金属バンプと接触することなく、また十分な液相焼結接合部の高さが得られるため、導通不良発生率が低いことから、液相焼結接合部を、小径のものとして形成することにより、ファインピッチ化による高密度実装が可能となることを見出した。 The present inventors connect and conduct semiconductor substrates facing each other vertically (hereinafter, the semiconductor substrate located below is referred to as “semiconductor substrate A” and the semiconductor substrate located above is referred to as “semiconductor substrate B”). At this time, a liquid phase sintered joint portion made of a predetermined material is formed in advance at a predetermined position of the semiconductor substrate B, and the semiconductor substrate A not formed with the other liquid phase sintered joint portion is placed below the semiconductor substrate B. Then, in a state where the semiconductor substrate A is positioned so as to face and be close to the liquid phase sintered joint, when diffusion bonding is performed with a low melting point metal that has not been compounded during the liquid phase sintering process by the bonding heat treatment, Both the semiconductor substrate A and the semiconductor substrate B are connected and conducted with each other by a low melting point metal while maintaining the shape of the bonding portion, and the semiconductor substrate A and the semiconductor substrate B thus connected have a fine pitch. In In addition, the liquid phase sintered joint has a small diameter because it does not come into contact with the adjacent molten solder metal bumps and a sufficient height of the liquid phase sintered joint is obtained. As a result, it has been found that high-density mounting by fine pitching becomes possible.
さらに、本発明者らは、半導体基板Ｂに液相焼結接合部を形成すると同時に、半導体基板Ａにも液相焼結接合部を形成し、半導体基板Ａと半導体基板Ｂのそれぞれの液相焼結接合部を相互に向かい合わせかつ近接するように位置決めした状態で、接合熱処理により液相焼結接合部の液相焼結処理時に化合物化しなかった低融点金属により拡散接合すると、液相焼結接合部の形を維持したままで溶融した低融点金属が液相焼結接合部全体を取り囲むと同時に、溶融したはんだ金属が半導体基板Ａと半導体基板Ｂの液相焼結接合部に密着凝固し、半導体基板Ａと半導体基板Ｂの両者は、液相焼結接合部とはんだ金属によって相互に接続・導通され、そして、このように接続された半導体基板Ａと半導体基板Ｂは、半導体基板Ａと半導体基板Ｂに形成した液相焼結接合部の合計高さに応じた液相焼結接合部を、従来のはんだバンプに比べて小径のものとして形成することにより、より一段とファインピッチ化による高密度実装が可能となることを見出した。 Furthermore, the inventors of the present invention form a liquid phase sintered joint on the semiconductor substrate B, and simultaneously form a liquid phase sintered joint on the semiconductor substrate A, so that the respective liquid phases of the semiconductor substrate A and the semiconductor substrate B are formed. When diffusion bonding is performed with a low-melting point metal that has not been compounded during the liquid phase sintering process of the liquid phase sintered joint by the bonding heat treatment with the sintered joints positioned so as to face each other and close to each other, The melted low melting point metal while maintaining the shape of the bonded joint surrounds the entire liquid phase sintered joint, and at the same time, the molten solder metal adheres closely to the liquid phase sintered joint of the semiconductor substrate A and the semiconductor substrate B. Then, both the semiconductor substrate A and the semiconductor substrate B are connected and conducted to each other by the liquid phase sintered joint and the solder metal, and the semiconductor substrate A and the semiconductor substrate B connected in this way are connected to the semiconductor substrate A. And shape to semiconductor substrate B By forming the liquid phase sintered joint corresponding to the total height of the liquid phase sintered joint with a smaller diameter than conventional solder bumps, it is possible to achieve higher density mounting by further finer pitch I found out that
そして、本発明者らは、前記液相焼結接合部は、通常のスクリーン印刷法で簡易に作製し得ることを見出した。
即ち、半導体基板の所定位置に、パッド電極あるいはＵＢＭが僅かに露出する程度の開口を有するマスクを取付け、液相焼結接合部となる接合用ペーストをパッド電極あるいはＵＢＭの中央部分に印刷し、次いで、マスクを取り外し、パッド電極あるいはＵＢＭに塗布された接合用ペーストを液相焼結することにより、パッド電極あるいはＵＢＭのほぼ中央部分に所定の高さを有する液相焼結接合部を作製し得るのである。
Then, the present inventors have found that the liquid phase sintered joint can be easily produced by a normal screen printing method.
That is, a mask having an opening that exposes the pad electrode or UBM slightly at a predetermined position of the semiconductor substrate is attached, and a bonding paste to be a liquid phase sintered joint is printed on the center portion of the pad electrode or UBM. Next, by removing the mask and liquid phase sintering the bonding paste applied to the pad electrode or UBM, a liquid phase sintered bonding portion having a predetermined height is formed at a substantially central portion of the pad electrode or UBM. To get.
本発明は、前記知見に基づいてなされたものであって、
（１）相対向する半導体基板をはんだバンプにより相互に接続・導通してなる半導体装置であって、一方の半導体基板のパッド電極あるいはアンダーバンプメタル上に、前記パッド電極の径あるいはアンダーバンプメタルの径よりも小径で、かつ、前記一方の半導体基板に対して垂直な方向に延びる芯柱状の液相焼結接合部が形成され、一方の半導体基板と他方の半導体基板は、前記液相焼結接合部の構成成分である低融点金属によって接合されて接続・導通していることを特徴とする半導体装置、
（２）相対向する半導体基板をはんだバンプにより相互に接続・導通してなる半導体装置であって、一方の半導体基板及び他方の半導体基板のそれぞれ向かい合う位置のパッド電極あるいはアンダーバンプメタル上に、前記それぞれのパッド電極の径あるいはアンダーバンプメタルの径よりも小径で、かつ、前記それぞれの半導体基板に対して垂直な方向に延びる芯柱状の液相焼結接合部が形成され、一方の半導体基板と他方の半導体基板は、前記それぞれの液相焼結接合部の構成成分である低融点金属によって接合されて接続・導通していることを特徴とする半導体装置、
（３）前記液相焼結接合部は、液相焼結処理時に全ての低融点金属が化合物形成することなく、熱分析により1つ以上の低融点金属に由来するピークを示す材料から構成されていることを特徴とする（１）または（２）に記載の半導体装置、
に特徴を有するものである。
The present invention has been made based on the above findings,
(1) A semiconductor device in which semiconductor substrates facing each other are connected to and connected to each other by solder bumps , on the pad electrode or under bump metal of one semiconductor substrate , the diameter of the pad electrode or the under bump metal A core column-shaped liquid phase sintered joint having a diameter smaller than the diameter and extending in a direction perpendicular to the one semiconductor substrate is formed, and the one semiconductor substrate and the other semiconductor substrate are formed by the liquid phase sintering. A semiconductor device characterized by being joined and connected by a low-melting-point metal that is a constituent component of the joint;
(2) In the semiconductor device formed by connecting, electrically connected to each other by opposing solder bumps of the semiconductor substrate, on one of the semiconductor substrate and the other of each opposed position of the semiconductor substrate pad electrode or under-bump on the metal, the A core column-shaped liquid phase sintered joint is formed that is smaller than the diameter of each pad electrode or the diameter of the under bump metal and extends in a direction perpendicular to the respective semiconductor substrate. The other semiconductor substrate is joined and connected by a low melting point metal that is a constituent component of each of the liquid phase sintered joints, and is a semiconductor device,
(3) The liquid phase sintered joint is composed of a material that shows a peak derived from one or more low melting point metals by thermal analysis without forming a compound of all the low melting point metals during the liquid phase sintering process. The semiconductor device according to (1) or (2), wherein
It has the characteristics.
さらに、本発明は、
（４）相対向する半導体基板をはんだバンプにより相互に接続・導通してなる半導体装置の製造方法において、一方の半導体基板上のパッド電極あるいはアンダーバンプメタルの表面に接合用ペーストを印刷塗布し、これを液相焼結処理して、パッド電極あるいはアンダーバンプメタルの表面のほぼ中央部分に小径の液相焼結接合部を形成し、一方の半導体基板と他方の半導体基板との間にスペーサーを挟んだ状態で前記液相焼結接合部を、他方の半導体基板上のパッド電極あるいはアンダーバンプメタルに近接して対向配置し、液相焼結接合部を液相焼結処理温度より高い温度で接合熱処理し、液相焼結処理時に化合物化しなかった低融点金属が溶融、凝固することにより、相対向する半導体基板を接合することを特徴とする（１）に記載の半導体装置の製造方法、
（５）相対向する半導体基板をはんだバンプにより相互に接続・導通してなる半導体装置の製造方法において、一方の半導体基板上のパッド電極あるいはアンダーバンプメタルの表面及び他方の半導体基板上のパッド電極あるいはアンダーバンプメタルの表面に、それぞれ接合用ペーストを印刷塗布し、これを液相焼結処理して、パッド電極あるいはアンダーバンプメタルの表面のほぼ中央部分にそれぞれ小径の液相焼結接合部を形成し、一方の半導体基板と他方の半導体基板との間にスペーサーを挟んだ状態で前記一方の半導体基板の液相焼結接合部と他方の半導体基板の液相焼結接合部とを近接して対向配置し、液相焼結接合部を液相焼結処理温度より高い温度で接合熱処理し、液相焼結処理時に化合物化しなかった低融点金属が溶融、凝固することにより、相対向する半導体基板を接合することを特徴とする（２）に記載の半導体装置の製造方法、
（６）前記液相焼結接合部は、液相焼結処理時に全ての低融点金属が化合物形成することなく、熱分析により1つ以上の低融点金属に由来するピークを示す材料から構成されていることを特徴とする（４）または（５）に記載の半導体装置の製造方法、
に特徴を有するものである。
ここで、「液相焼結」とは、例えば、後記する第一群粉末（相対的に高融点）と第二群粉末（相対的に低融点）の混合粉を含有するペースト材料を焼結して焼結体を形成するに際し、焼結温度にて、形成される焼結体（液相焼結接合部）の形が維持されると同時に、第二群の低融点金属成分のすべてが、第一群粉末の金属成分と化合物を形成してしまうことのないような焼結の形態、言い換えれば、第二群の低融点金属成分の少なくとも一部は、焼結体中で化合物化せずそのまま残っている焼結の形態、をいう。
Furthermore, the present invention provides
(4) In a manufacturing method of a semiconductor device in which semiconductor substrates facing each other are connected and conducted with solder bumps, a bonding paste is printed on the surface of a pad electrode or under bump metal on one semiconductor substrate, This is liquid-phase sintered to form a small-diameter liquid-phase sintered joint at approximately the center of the surface of the pad electrode or underbump metal, and a spacer is provided between one semiconductor substrate and the other semiconductor substrate. In a state of being sandwiched, the liquid phase sintered joint portion is disposed in close proximity to the pad electrode or the under bump metal on the other semiconductor substrate, and the liquid phase sintered joint portion is set at a temperature higher than the liquid phase sintering treatment temperature. (1) characterized in that the semiconductor substrates facing each other are bonded by melting and solidifying the low melting point metal that has been subjected to bonding heat treatment and not compounded during the liquid phase sintering process. Method of manufacturing a semiconductor device,
(5) In a manufacturing method of a semiconductor device in which semiconductor substrates facing each other are connected and conducted with solder bumps, a pad electrode on one semiconductor substrate or a surface of an under bump metal and a pad electrode on the other semiconductor substrate Alternatively, a bonding paste is printed on the surface of the under bump metal, and this is subjected to liquid phase sintering treatment, and a small diameter liquid phase sintered joint is formed at the approximate center of the surface of the pad electrode or under bump metal. The liquid phase sintered joint part of the one semiconductor substrate and the liquid phase sintered joint part of the other semiconductor substrate are brought close to each other with a spacer interposed between the one semiconductor substrate and the other semiconductor substrate. opposite placed, joined heat-treated liquid phase sintering junction at a temperature above the liquid phase sintering process temperature, the low melting point metal were not compounding during liquid phase sintering process is melted Te, Method of manufacturing a semiconductor device according to by solid, characterized by bonding the semiconductor substrate which faces (2),
(6) The liquid phase sintered joint is composed of a material that shows a peak derived from one or more low melting point metals by thermal analysis without forming a compound of all the low melting point metals during the liquid phase sintering process. (4) or (5) a method of manufacturing a semiconductor device,
It has the characteristics.
Here, “liquid phase sintering” refers to, for example, sintering a paste material containing a mixed powder of first group powder (relatively high melting point) and second group powder (relatively low melting point) described later. When forming the sintered body, the shape of the formed sintered body (liquid phase sintered joint) is maintained at the sintering temperature, and at the same time, all of the second group of low melting point metal components are The sintered form that does not form a compound with the metal component of the first group powder, in other words, at least a part of the low melting point metal component of the second group is compounded in the sintered body. It refers to the form of sintering that remains as it is.
以下、図面とともに本発明を詳細に説明する。
図２に、本発明の第一の実施の態様における半導体基板Ｂへの液相焼結接合部の作製工程の概略説明図を示し、図３に、本発明の第一の実施の態様における半導体基板Ｂに形成される液相焼結接合部の概略模式図を示す。
Hereinafter, the present invention will be described in detail with reference to the drawings.
FIG. 2 shows a schematic explanatory view of a production process of a liquid phase sintered joint to the semiconductor substrate B in the first embodiment of the present invention, and FIG. 3 shows the semiconductor in the first embodiment of the present invention. The schematic schematic diagram of the liquid phase sintering joining part formed in the board | substrate B is shown.
図２に示すように、本発明の液相焼結接合部は、（ａ）〜（ｄ）の工程により作製することができる。
まず、パッド電極が形成されている半導体基板Ｂの表面（半導体パッケージ用ウエハ上にＵＢＭが設けられている場合も当然に含むが、以下、ＵＢＭについての説明は省略する。）に、パッド電極のほぼ中央部の表面が露出する程度の小さな開口を有するメタルマスクを取付け（図２（ａ）参照）、メタルマスクの小さな開口からパッド電極のほぼ中央部の表面にスキージを用いて接合用ペーストを印刷する（図２（ｂ）参照）。
次いで、メタルマスクを取り外し（図２（ｃ）参照）、接合用ペーストの種類に応じた温度（例えば、はんだペーストのリフロー温度近傍またはそれ以下の温度）で焼結し、パッド電極のほぼ中央部に、半導体基板Ｂに垂直な方向に延び、かつ、小径の液相焼結接合部（図２（ｄ）参照）を形成する。
図８に、液相焼結接合部の一例として、第一群粉末であるＣｕが３９質量％、第二群粉末であるＳｎが６１質量％からなる液相焼結接合部のＳＥＭ画像を示す。
なお、図２では、パッド電極表面に形成されるＵＢＭの図示を省略しているが、パッド電極上にＵＢＭが設けられている場合も、本発明の範囲に含まれることは勿論である。
As shown in FIG. 2, the liquid phase sintered joint of the present invention can be produced by the steps (a) to (d).
First, the surface of the semiconductor substrate B on which the pad electrode is formed (including the case where the UBM is provided on the semiconductor package wafer, but the description of the UBM will be omitted below). A metal mask having an opening that is small enough to expose the surface of the central portion is attached (see FIG. 2A), and a bonding paste is applied from the small opening of the metal mask to the surface of the central portion of the pad electrode using a squeegee. Printing is performed (see FIG. 2B).
Next, the metal mask is removed (see FIG. 2 (c)), and sintered at a temperature corresponding to the type of bonding paste (for example, near or below the reflow temperature of the solder paste), and approximately at the center of the pad electrode. In addition, a liquid phase sintered joint portion (see FIG. 2D) extending in a direction perpendicular to the semiconductor substrate B and having a small diameter is formed.
FIG. 8 shows an SEM image of a liquid phase sintered joint composed of 39% by mass of Cu as the first group powder and 61% by mass of Sn as the second group powder as an example of the liquid phase sintered joint. .
In FIG. 2, the UBM formed on the surface of the pad electrode is not shown, but the case where the UBM is provided on the pad electrode is also included in the scope of the present invention.
次いで、図４に示すように、前記液相焼結接合部が形成された半導体基板Ｂと、液相焼結接合部を形成していない半導体基板Ａを、半導体基板Ｂが上方に位置するように配置し、かつ、液相焼結接合部と半導体基板Ａが近接するように配置し、半導体基板Ｂの液相焼結接合部を接合熱処理し、液相焼結処理時に化合物化しなかった低融点金属を溶融、凝固させることにより、半導体基板Ｂと半導体基板Ａを接合させる。
図５に示すように低融点金属により半導体基板Ｂと半導体基板Ａが接合されることから、半導体基板相互の付着強度は高く、さらに、液相焼結接合部を小径のものとして形成することによって、ファインピッチ化が可能な半導体装置を作製することができる。
Next, as shown in FIG. 4, the semiconductor substrate B on which the liquid phase sintered joint is formed and the semiconductor substrate A on which the liquid phase sintered joint is not formed are positioned above the semiconductor substrate B. The liquid phase sintered joint and the semiconductor substrate A are disposed close to each other, and the liquid phase sintered joint of the semiconductor substrate B is heat-bonded and not compounded during the liquid phase sintering process. The semiconductor substrate B and the semiconductor substrate A are joined by melting and solidifying the melting point metal.
As shown in FIG. 5, since the semiconductor substrate B and the semiconductor substrate A are joined by a low melting point metal, the adhesion strength between the semiconductor substrates is high, and furthermore, the liquid phase sintered joint is formed with a small diameter. Thus, a semiconductor device capable of achieving a fine pitch can be manufactured.
本発明では、半導体基板Ａと半導体基板Ｂの接続時に、液相焼結接合部がその形を維持する必要があることから、液相焼結接合部の構成材料は、液相焼結接合部の接合熱処理温度で軟化せず、その形を維持し得る材料であることが必要であると同時に、接合熱処理温度において、液相焼結処理時に化合物形成されなかった低融点金属を溶融させることによって接合され得る材料であることが必要とされる。 In the present invention, when the semiconductor substrate A and the semiconductor substrate B are connected, the liquid phase sintered joint portion needs to maintain its shape. Therefore, the constituent material of the liquid phase sintered joint portion is the liquid phase sintered joint portion. It is necessary to be a material that does not soften at the bonding heat treatment temperature and can maintain its shape, and at the same time, by melting the low melting point metal that was not compounded during the liquid phase sintering treatment at the bonding heat treatment temperature. It needs to be a material that can be joined.
このような特性を備え、本発明の液相焼結接合部を形成するために好適なペースト材料としては、例えば、以下にあげる第一群粉末と第二群粉末の混合粉を含有するペースト材料があげられる。
例えば、第一群粉末としては、Ｃｕ、Ａｇ、Ａｕ、Ｐｔ、Ｐｄ、Ｔｉ、Ｎｉ、Ｆｅ、Ｃｏの内から選ばれた一種又は二種以上の金属粉末、また、液相温度が４５０℃以上のろう合金粉末及び液相温度が２８０℃以上の高温はんだ合金粉末の内から選ばれた一種又は二種以上の合金粉末を用いることができるが、特に、Ｃｕ，Ａｇ，Ａｕの内から選ばれた一種又は二種以上の金属粉末を用いることが望ましい。
また、第二群粉末としては、Ｓｎ，Ｉｎ，Ｂｉ，Ｇａの内から選ばれた一種又は二種以上の金属粉末、また、液相温度が２４０℃以下のはんだ合金の合金粉末を用いることができるが、特に、Ｓｎ，Ｉｎ，Ｂｉの内から選ばれた一種又は二種以上の金属粉末を用いることが望ましい。
上記第一群粉末と第二群粉末の混合粉末を含有するペーストを用い、これを印刷法で半導体基板Ａに印刷塗布し、液相焼結することによって、焼結温度があまり高くなく、液相焼結接合部の接合熱処理温度で、化合物形成されなかった低融点金属により、相対する電極パッドまたは液相焼結接合部と接続することができる。
ただし、接合熱処理温度において、全ての低融点金属が化合物形成されないためには、第一群粉末に対する第二群粉末の配合割合を高くすることが必要である。
As a paste material having such characteristics and suitable for forming the liquid phase sintered joint of the present invention, for example, a paste material containing a mixed powder of the following first group powder and second group powder: Can be given.
For example, as the first group powder, one or more metal powders selected from Cu, Ag, Au, Pt, Pd, Ti, Ni, Fe, and Co, and the liquidus temperature is 450 ° C. or higher. One or two or more alloy powders selected from brazing alloy powders and high-temperature solder alloy powders having a liquidus temperature of 280 ° C. or higher can be used, and particularly selected from Cu, Ag, and Au. It is desirable to use one or more metal powders.
Further, as the second group powder, one or two or more metal powders selected from Sn, In, Bi, and Ga, and an alloy powder of a solder alloy having a liquidus temperature of 240 ° C. or lower are used. In particular, it is desirable to use one or more metal powders selected from Sn, In and Bi.
The paste containing the mixed powder of the first group powder and the second group powder is used, and this is printed and applied to the semiconductor substrate A by a printing method, followed by liquid phase sintering, so that the sintering temperature is not so high. The low melting point metal that is not formed with a compound at the bonding heat treatment temperature of the phase sintered joint can be connected to the opposing electrode pad or liquid phase sintered joint.
However, it is necessary to increase the blending ratio of the second group powder with respect to the first group powder so that all the low melting point metals are not compounded at the bonding heat treatment temperature.
具体的には、液相焼結接合部を形成するためのペースト材料の選定にあたり、上記第一群粉末の含有量が２５質量％未満であると、第二群粉末が多すぎて、液相焼結処理時に液相焼結接合部の形が崩れてしまい、芯柱状にならず、一方、上記第一群粉末の含有量が５０質量％を超えると、第二群粉末が少なすぎて、半焼結処理時に第二群粉末すべてが第一群粉末と金属間化合物を形成してしまい、液相焼結接合部の融点が上昇するため接合することができない。
したがって、本発明では、混合粉末中における第一群粉末の含有量を２５〜５０質量％とすることが望ましく、３５〜５０質量％とすることがより望ましい。
Specifically, in selecting the paste material for forming the liquid phase sintered joint, if the content of the first group powder is less than 25% by mass, the second group powder is too much, and the liquid phase During the sintering process, the shape of the liquid phase sintered joint is broken and does not become a core column.On the other hand, if the content of the first group powder exceeds 50% by mass, the second group powder is too little, During the semi-sintering process, all the second group powders form an intermetallic compound with the first group powders, and the melting point of the liquid phase sintered joint is increased, so that they cannot be joined.
Therefore, in the present invention, the content of the first group powder in the mixed powder is preferably 25 to 50% by mass, and more preferably 35 to 50% by mass.
前記液相焼結接合部を形成するために使用される接合用ペーストは、例えば、以下の手順で調製することができる。
接合用ペースト用原料粉末として、第一群粉末と第二群粉末を用意する。
これらの粉末を、接合用ペースト用粉末の総重量を１００質量％とした場合に、第二群粉末が５０〜７０質量％であり、また、残部は第一群粉末となるように配合して混合粉末を作製する。
この混合粉末を、Ｖ型混合機等の通常用いられる粉末混合機中で混合する。
次に、接合用ペーストの総重量を１００質量％とした時に、好ましくは、フラックスを５〜４０質量％、残りは前記混合粉末となるように配合し、この接合用ペーストを、機械混練機等の通常用いられる混練機中で混合することにより、本発明の液相焼結接合部を形成するために使用される接合用ペーストが作製される。
The joining paste used to form the liquid phase sintered joint can be prepared, for example, by the following procedure.
First group powder and second group powder are prepared as raw material powders for bonding paste.
These powders are blended so that the second group powder is 50 to 70% by mass when the total weight of the bonding paste powder is 100% by mass, and the remainder is the first group powder. A mixed powder is prepared.
This mixed powder is mixed in a commonly used powder mixer such as a V-type mixer.
Next, when the total weight of the bonding paste is 100% by mass, the flux is preferably blended so as to be 5 to 40% by mass, and the remainder is the mixed powder. Are mixed in a commonly used kneader to produce a joining paste used to form the liquid phase sintered joint of the present invention.
接合用ペーストのフラックスとしては、通常用いられる一般的なフラックスを用いることが可能であり、特に制限するものではないが、ペーストの濡れ性の観点等から、ＲＡやＲＭＡフラックスを用いることが好ましい。また、このフラックス中には、通常用いられるロジン、活性剤、溶剤およびチキソ剤等が含まれていても構わない。
また、接合用ペーストにおけるフラックス含有量が５質量％未満であると、ペースト状にならない。一方、フラックス含有量が４０質量％を超えると接合用ペーストの粘度が低すぎて、印刷の際にダレが生じたり、液相焼結処理時に形状が崩れてしまい柱状の液相焼結接合部としての十分な高さが確保できないことから、接合用ペースト中のフラックス含有量を５〜４０質量％とすることが望ましく、フラックス含有量を６〜１５質量％とすることがさらに望ましい。
As the flux of the bonding paste, a commonly used general flux can be used, and is not particularly limited, but RA or RMA flux is preferably used from the viewpoint of the wettability of the paste. The flux may contain rosin, activator, solvent, thixotropic agent and the like that are usually used.
Further, when the flux content in the bonding paste is less than 5% by mass, it does not become a paste. On the other hand, if the flux content exceeds 40% by mass, the viscosity of the bonding paste is too low, and sagging occurs during printing, or the shape collapses during the liquid phase sintering process, and the columnar liquid phase sintered joint Therefore, the flux content in the bonding paste is preferably 5 to 40% by mass, more preferably 6 to 15% by mass.
次に、図２〜図５にもとづいて、本発明の第一の実施の態様における半導体装置の製造工程を説明する。 Next, based on FIGS. 2-5, the manufacturing process of the semiconductor device in the 1st embodiment of this invention is demonstrated.
まず、半導体基板Ｂに対する液相焼結接合部の形成は、図２の（ａ）〜（ｄ）として示す工程により行われる。
まず、半導体基板Ｂの表面（半導体パッケージ用ウエハ上にＵＢＭが設けられている場合も当然に含む）に、パッド電極のほぼ中央部の表面が露出する程度の小さな開口を有するメタルマスクを取付け（図２（ａ）参照）、メタルマスクの小さな開口からパッド電極のほぼ中央部の表面にスキージを用いて接合用ペーストを印刷する（図２（ｂ）参照）。
次いで、メタルマスクを取り外し（図２（ｃ）参照）、接合用ペーストの種類に応じた温度で液相焼結処理し、パッド電極のほぼ中央部に、半導体基板Ｂに垂直な方向に延び、かつ、小径の液相焼結接合部を形成する（図２（ｄ）参照）。
First, the formation of the liquid phase sintered joint with respect to the semiconductor substrate B is performed by the steps shown as (a) to (d) in FIG.
First, a metal mask having a small opening so that the surface of the substantially central portion of the pad electrode is exposed is attached to the surface of the semiconductor substrate B (including the case where the UBM is provided on the semiconductor package wafer) ( The bonding paste is printed using a squeegee from the small opening of the metal mask to the surface of the substantially central portion of the pad electrode (see FIG. 2B).
Next, the metal mask is removed (see FIG. 2C), liquid phase sintering is performed at a temperature corresponding to the type of bonding paste, and the pad electrode is extended in a direction perpendicular to the semiconductor substrate B at a substantially central portion. And a small diameter liquid phase sintering joining part is formed (refer FIG.2 (d)).
次に、図２（ａ）〜（ｄ）の工程で形成された図３に示す液相焼結接合部を備えた半導体基板Ｂを、図４に示すように、液相焼結接合部を形成していない半導体基板Ａの上方に位置させ、かつ、それぞれが近接するように配置し、半導体基板Ｂの液相焼結接合部を接合熱処理温度に加熱して、半焼結処理時に化合物形成されなかった低融点金属が溶融することで、半導体基板Ｂと半導体基板Ａを接着し、そして、その後これを冷却することにより、図５に示すように、液相焼結接合部により半導体基板Ａと半導体基板Ｂが密着接合した半導体装置を作製することができる。 Next, as shown in FIG. 4, the semiconductor substrate B provided with the liquid phase sintered joint shown in FIG. 3 formed in the steps of FIGS. Positioned above the semiconductor substrate A that is not formed, and arranged so as to be close to each other, the liquid phase sintered joint portion of the semiconductor substrate B is heated to the bonding heat treatment temperature, and a compound is formed during the semi-sintering process. As the low melting point metal that has not melted melts, the semiconductor substrate B and the semiconductor substrate A are bonded together, and then cooled, as shown in FIG. A semiconductor device in which the semiconductor substrate B is closely bonded can be manufactured.
次に、図６、図７に基づいて、本発明の第二の実施の態様における半導体装置の製造工程を説明する。 Next, based on FIGS. 6 and 7, the manufacturing process of the semiconductor device in the second embodiment of the present invention will be described.
まず、半導体基板Ｂに対する液相焼結接合部の形成は、前記第一の実施の態様の場合と同様に、図２の（ａ）〜（ｄ）として示す工程により行われる。
また、半導体基板Ａに対しても、同様にして、液相焼結接合部を形成する。
ついで、図２（ａ）〜（ｄ）の工程で形成された図３に示す液相焼結接合部を備えた半導体基板Ｂ及び半導体基板Ａを、図６に示すように、それぞれの液相焼結接合部が近接するように対向して配置し、半導体基板Ａ、Ｂの液相焼結接合部を接合熱処理温度に加熱して、半焼結処理時に化合物形成されなかった低融点金属が溶融することで、半導体基板Ｂと半導体基板Ａを接着し、そして、その後これを冷却することにより、図７に示すように、それぞれの液相焼結接合部同士が接合された状態で半導体基板Ａと半導体基板Ｂが密着接合した半導体装置を作製することができる。
First, the formation of the liquid phase sintered joint portion with respect to the semiconductor substrate B is performed by the steps shown as (a) to (d) in FIG. 2 as in the case of the first embodiment.
Similarly, a liquid phase sintered joint is formed on the semiconductor substrate A as well.
Next, the semiconductor substrate B and the semiconductor substrate A provided with the liquid phase sintered joint shown in FIG. 3 formed in the steps of FIGS. Arranged facing each other so that the sintered joints are close to each other, the liquid phase sintered joints of the semiconductor substrates A and B are heated to the bonding heat treatment temperature, and the low melting point metal that was not formed with the compound during the semi-sintering process is melted By bonding the semiconductor substrate B and the semiconductor substrate A, and then cooling the semiconductor substrate A, the semiconductor substrate A with the respective liquid phase sintered joints joined together as shown in FIG. And the semiconductor substrate B can be manufactured.
本発明の半導体装置およびその製造方法によれば、半導体基板Ａ、半導体基板Ｂの少なくとも一方に、小径の焼結芯柱を形成することによって、導電性の低下を招くことなく十分な密着強度が得られるばかりか、ファインピッチ化が可能となるバンプ接続が行える。
したがって、本発明によれば、より一層の高密度実装化が図られる半導体装置を提供することができる。
According to the semiconductor device of the present invention and the method for manufacturing the same, by forming a small-diameter sintered core column on at least one of the semiconductor substrate A and the semiconductor substrate B, sufficient adhesion strength can be obtained without causing a decrease in conductivity. In addition to being obtained, it is possible to perform bump connection that enables a fine pitch.
Therefore, according to the present invention, it is possible to provide a semiconductor device that can achieve higher density mounting.
以下、本発明の半導体装置およびその製造方法について、実施例を用いて説明する。 Hereinafter, a semiconductor device and a manufacturing method thereof according to the present invention will be described with reference to examples.
［実施例１］
表１に、本実施例１で液相焼結接合部を形成するために使用した接合用ペーストＡ〜Ｍに含有される粉末の種類、組合せ、配合割合、さらに、フラックスの種類とその含有割合を示す。
なお、接合用ペーストに含有される粉末については、その粒径は１〜５μｍであり、平均粒径は、２．５μｍである。
[Example 1]
Table 1 shows the types, combinations, and blending ratios of powders contained in the bonding pastes A to M used for forming the liquid phase sintered joints in Example 1, and the types of fluxes and their content ratios. Indicates.
In addition, about the powder contained in the paste for joining, the particle size is 1-5 micrometers, and an average particle diameter is 2.5 micrometers.
次に、図２（ａ）〜（ｄ）に示す工程で、パッド電極（直径：６０μｍ）が形成されている半導体基板Ｂの表面に、パッド電極径より小径の開口（開口直径：４３μｍ、開口ピッチ：１００μｍ）が設けられた厚さ２０μｍのメタルマスクを載置し、表１に示す焼結用ペーストＡ〜Ｍをスキージによりパッド電極表面に印刷塗布し、メタルマスクを取り外した後、印刷塗布した焼結用ペーストを、窒素雰囲気のベルト炉で、表２に示す温度で液相焼結して、半導体基板Ｂのパッド電極の中央部にほぼメタルマスクの厚さに相当する高さを有する図３に示す４０００個の液相焼結接合部を作製した。 Next, in the steps shown in FIGS. 2A to 2D, an opening (opening diameter: 43 μm, opening smaller than the pad electrode diameter) is formed on the surface of the semiconductor substrate B on which the pad electrode (diameter: 60 μm) is formed. A metal mask having a thickness of 20 μm provided with a pitch of 100 μm is placed, and printing pastes A to M shown in Table 1 are printed on the pad electrode surface with a squeegee, the metal mask is removed, and then printed. The sintered paste is subjected to liquid phase sintering at a temperature shown in Table 2 in a belt furnace in a nitrogen atmosphere, and has a height substantially corresponding to the thickness of the metal mask at the center of the pad electrode of the semiconductor substrate B. 4000 liquid phase sintered joints shown in FIG. 3 were produced.
ついで、上記で作製した液相焼結接合部を形成した半導体基板Ｂと、液相焼結接合部を形成していない半導体基板Ａを、図４に示すように、半導体基板Ｂが上方に位置し、しかも、液相焼結接合部が半導体基板Ａに近接するように配置し、厚み３０μｍのスペーサーを基板間に挟み、液相焼結接合部を表３に示される温度で接合熱処理することにより、表３及び図５に示す液相焼結接合部で接続された本発明半導体装置１〜１６を２００個製造した。 Next, as shown in FIG. 4, the semiconductor substrate B on which the liquid phase sintered joint portion produced above is formed and the semiconductor substrate A on which the liquid phase sintered joint portion is not formed are positioned above the semiconductor substrate B. In addition, the liquid phase sintered joint is arranged so as to be close to the semiconductor substrate A, a spacer having a thickness of 30 μm is sandwiched between the substrates, and the liquid phase sintered joint is subjected to bonding heat treatment at a temperature shown in Table 3. Thus, 200 semiconductor devices 1 to 16 of the present invention connected by the liquid phase sintered joint shown in Table 3 and FIG. 5 were manufactured.
ついで、上記本発明半導体装置１〜１６について、半導体基板Ａと半導体基板Ｂの導通不良発生率について電気測定を行った。
プローブピンを用いて半導体パッケージ（ユニット）を無作為に抽出した５０個測定した際の導通不良ユニット発生個数を評価した。 なお、本実施例では、プロセスによって異なる一定のスペーサ―を用いて測定するため、十分な高さのない液相焼結接合部ができた場合、短絡しやすくなることから、本試験の結果から不良率の少ないものはファインピッチ化、高密度実装化が可能であるといえる。 表３には、本発明半導体装置１〜１６について求めた導通不良発生個数を示す。
Next, electrical measurement was performed on the occurrence rate of continuity failure between the semiconductor substrate A and the semiconductor substrate B for the semiconductor devices 1 to 16 of the present invention.
The number of defective units generated when 50 semiconductor packages (units) randomly extracted using probe pins were measured was evaluated. In this example, since measurement is performed using a certain spacer that varies depending on the process, if a liquid phase sintered joint having a sufficient height is formed, it is easy to short-circuit. It can be said that those with a low defect rate can be fine pitched and mounted with high density. Table 3 shows the number of occurrences of conduction failures obtained for the semiconductor devices 1 to 16 of the present invention.
［実施例２］
実施例２として、第一群粉末あるいは第二群粉末の少なくとも一方を合金粉末とした表４に示す本発明焼結用ペーストＮ〜Ｒを用いて、実施例１と同様にして、半導体基板Ｂに表４に示す液相焼結接合部を作製し、この半導体基板Ｂと、液相焼結接合部を形成していない半導体基板Ａを図４に示すように、半導体基板Ｂが上方に位置するように、液相焼結接合部が半導体基板Ａに近接するように配置し、液相焼結接合部を表５に示される温度で接合熱処理することにより、表５及び図５に示す液相焼結接合部で接続された半導体装置２１〜２５を製造した。
実施例１と同様にして、本発明半導体装置２１〜２５について半導体基板Ａと半導体基板Ｂの導通不良発生個数を測定した。
表５に、本発明半導体装置２１〜２５について求めた導通不良発生個数を示す。
[Example 2]
As Example 2, the semiconductor substrate B was prepared in the same manner as in Example 1 by using the inventive sintering pastes N to R shown in Table 4 in which at least one of the first group powder or the second group powder was an alloy powder. 4 is prepared, and the semiconductor substrate B and the semiconductor substrate A on which the liquid phase sintered joint is not formed are positioned upward as shown in FIG. As shown in FIG. 5, the liquid phase sintered joint is disposed so as to be close to the semiconductor substrate A, and the liquid phase sintered joint is subjected to bonding heat treatment at the temperature shown in Table 5 to obtain the liquid shown in Table 5 and FIG. 5. Semiconductor devices 21 to 25 connected by the phase sintered joint were manufactured.
In the same manner as in Example 1, the number of occurrences of poor conduction between the semiconductor substrate A and the semiconductor substrate B was measured for the semiconductor devices 21 to 25 of the present invention.
Table 5 shows the number of occurrences of conduction failures obtained for the semiconductor devices 21 to 25 of the present invention.
［実施例３］
図２（ａ）〜（ｄ）に示す工程で、パッド電極（直径：６０μｍ）が形成されている半導体基板Ａの表面に、パッド電極径より小径の開口（開口直径：４３μｍ、開口ピッチ：１００μｍ）が設けられた厚さ２０μｍのメタルマスクを載置し、表１に示す接合用ペーストをスキージによりパッド電極表面に印刷塗布し、メタルマスクを取り外した後、印刷塗布した接合用ペーストを、窒素雰囲気のベルト炉で、表２に示す温度で液相焼結処理して、半導体基板Ａのパッド電極の中央部にほぼメタルマスクの厚さに相当する高さを有する図６に示す４０００個の液相焼結接合部を作製した。
次いで、半導体基板Ａに形成した上記液相焼結接合部と、実施例１で作製した半導体基板Ｂの液相焼結接合部を図６に示すように近接させて対向させ、厚み６０μｍのスペーサーを基板間に挟み、表６に示される温度で接合熱処理して、表６及び図７に示す半導体装置３１〜４７を作製した。
実施例１と同様にして、本発明半導体装置３１〜４７について半導体基板Ａと半導体基板Ｂの導通不良発生個数を測定した。
表６に、本発明半導体装置３１〜４７について求めた導通不良発生個数を示す。
[Example 3]
In the steps shown in FIGS. 2A to 2D, openings (opening diameter: 43 μm, opening pitch: 100 μm) smaller than the pad electrode diameter are formed on the surface of the semiconductor substrate A on which the pad electrodes (diameter: 60 μm) are formed. A metal mask having a thickness of 20 μm is placed, and the bonding paste shown in Table 1 is printed on the surface of the pad electrode with a squeegee, and after removing the metal mask, the printed bonding paste is replaced with nitrogen. In a belt furnace in the atmosphere, the liquid phase sintering process is performed at the temperatures shown in Table 2, and the 4000 pieces shown in FIG. 6 have a height substantially corresponding to the thickness of the metal mask at the center of the pad electrode of the semiconductor substrate A. A liquid phase sintered joint was prepared.
Next, the liquid phase sintered joint formed on the semiconductor substrate A and the liquid phase sintered joint of the semiconductor substrate B produced in Example 1 are placed close to each other as shown in FIG. Were sandwiched between the substrates and subjected to bonding heat treatment at the temperature shown in Table 6 to fabricate semiconductor devices 31 to 47 shown in Table 6 and FIG.
In the same manner as in Example 1, the number of occurrences of poor conduction between the semiconductor substrate A and the semiconductor substrate B was measured for the semiconductor devices 31 to 47 of the present invention.
Table 6 shows the number of occurrences of conduction failures obtained for the semiconductor devices 31 to 47 of the present invention.
［比較例］
比較のために、パッド電極（直径：６０μｍ）が形成されている半導体基板Ａおよび半導体基板Ｂのいずれか一方の表面に、メタルマスク（開口直径：７２μｍ、開口ピッチ：１００μｍ、厚さ：３０μｍ）を載置し、メタルマスクの開口からスキージを用いて、表７に示すはんだペーストを印刷塗布し、メタルマスクを取り外した後、窒素雰囲気のベルト炉で、はんだペーストの種類に応じて表７に示す温度でリフロー処理し、パッド電極の表面に、表８に示す比較例のはんだバンプを４０００個作製し、次いで、半導体基板Ａおよび半導体基板Ｂのいずれか一方のパッド電極と他方のはんだバンプを対向させ、厚み６０μｍ，３０μｍのスペーサーを基板間に挟み、はんだバンプを表８に示す温度で再リフローさせることにより、バンプで接続された比較例半導体装置１〜５を作製した。
[Comparative example]
For comparison, a metal mask (opening diameter: 72 μm, opening pitch: 100 μm, thickness: 30 μm) is formed on the surface of one of the semiconductor substrate A and the semiconductor substrate B on which pad electrodes (diameter: 60 μm) are formed. After applying the solder paste shown in Table 7 using a squeegee from the opening of the metal mask and removing the metal mask, in a belt furnace in a nitrogen atmosphere, the solder paste shown in Table 7 Reflow treatment is performed at the indicated temperature to produce 4000 solder bumps of the comparative example shown in Table 8 on the surface of the pad electrode, and then either the pad electrode of the semiconductor substrate A or the semiconductor substrate B and the other solder bump are formed. Face each other, sandwich a spacer of 60 μm and 30 μm in thickness between the substrates, and reflow the solder bumps at the temperatures shown in Table 8. Comparative Example semiconductor device 1-5 which is was produced.
比較例半導体装置１〜５について、本発明半導体装置１〜１６、２１〜２５、３１〜４７と同様にして、導通不良発生個数を測定した。半導体基板Ａと半導体基板Ｂの導通不良発生個数を測定した。
表８に、比較例半導体装置１〜５について求めた導通不良発生個数を示す。
Comparative Example semiconductor device 1-5, the present invention a semiconductor device 1-16, as in 21～25,31～47 was measured conduction failure number. The number of occurrences of conduction failure between the semiconductor substrate A and the semiconductor substrate B was measured.
Table 8 shows the number of occurrences of poor conduction obtained for the comparative semiconductor devices 1 to 5.
表３、表５、表６、表８に示す結果から、比較例半導体装置は、バンプ自重による扁平化が生じるため、隣接する溶融はんだ金属バンプとの接触や、バンプ高さ不足による導通不良が生じるのに対して、本発明半導体装置は、対向する半導体基板の一方に液相焼結接合部を形成し、あるいは、対向する半導体基板の両者に液相焼結接合部を形成していることから、十分な距離の基板間距離を保ち、さらに、半導体基板ＡとＢの密着強度にもすぐれ、また、導電性を低下させる恐れもないことから、はんだバンプのファインピッチ化が可能であり、その結果として、半導体の高密度実装を実現することが可能である。
From the results shown in Table 3, Table 5, Table 6, and Table 8, since the comparative example semiconductor device is flattened by the bump's own weight, the contact with the adjacent molten solder metal bump or the conduction failure due to the insufficient bump height is caused. In contrast, in the semiconductor device of the present invention, the liquid phase sintered joint is formed on one of the opposing semiconductor substrates, or the liquid phase sintered joint is formed on both of the opposing semiconductor substrates. Therefore, a sufficient distance between the substrates can be maintained, the adhesion strength between the semiconductor substrates A and B is excellent, and there is no risk of lowering the conductivity, so a fine pitch of the solder bumps is possible. As a result, it is possible to realize high-density mounting of semiconductors.
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