JP6316086B2 - 樹脂封止型電力用半導体装置及びその製造方法 - Google Patents
樹脂封止型電力用半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP6316086B2 JP6316086B2 JP2014098061A JP2014098061A JP6316086B2 JP 6316086 B2 JP6316086 B2 JP 6316086B2 JP 2014098061 A JP2014098061 A JP 2014098061A JP 2014098061 A JP2014098061 A JP 2014098061A JP 6316086 B2 JP6316086 B2 JP 6316086B2
- Authority
- JP
- Japan
- Prior art keywords
- wire
- resin
- wires
- mold
- power semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 62
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 229920005989 resin Polymers 0.000 claims description 63
- 239000011347 resin Substances 0.000 claims description 63
- 238000011144 upstream manufacturing Methods 0.000 claims description 12
- 239000011248 coating agent Substances 0.000 claims description 11
- 238000000576 coating method Methods 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 10
- 238000010586 diagram Methods 0.000 description 11
- 238000009413 insulation Methods 0.000 description 10
- 238000000034 method Methods 0.000 description 10
- 238000002347 injection Methods 0.000 description 8
- 239000007924 injection Substances 0.000 description 8
- 238000000465 moulding Methods 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 239000004033 plastic Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005489 elastic deformation Effects 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000012795 verification Methods 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 1
- 238000002679 ablation Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000009835 boiling Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
図1は、本発明に係る樹脂封止型電力用半導体装置の実施の形態1の断面図である。図2は、実施の形態1に係る樹脂封止型電力用半導体装置の上面図である。樹脂封止型電力用半導体装置20において、半導体素子3を支持固定し、外部配線と接続するためのリードフレーム2は、基板1とは立体的に干渉しないように配置されている。リードフレーム2には半導体素子3が配置されている。リードフレーム2の半導体素子3が配置される部位の反対面は、絶縁シート16及び金属ベース17が配置され、半導体素子3の発熱は、金属ベース17を介して放熱される。半導体素子3に設けられた電極4や基板1の電極5、リードフレーム2に設けられた電極6との間は、複数のワイヤ7で接続されている。ワイヤ7の材質としては、標準的には常温で接合できるアルミニウムが作業性に優れているが、銅や銅とアルミとの複合材などもワイヤ7の材料として用いることができるほか、他の金属や金属の組み合わせたものをワイヤ7の材料としても構わない。
図6は、本発明に係る電力用半導体装置の実施の形態2のワイヤを示す図である。本実施の形態では、隣接するワイヤ7に関して、一次接続側7aと二次接続側7bの並び方、すなわちワイヤループを引く方向を揃えている。すなわち、一次接続側7aから二次接続側7bへの向きは、複数のワイヤ7で揃えられている。
実施の形態3においては、隣接するワイヤに関して、ワイヤループ高さをモールド樹脂の流れの下流側となるワイヤほど高く設定した。ワイヤループ高さをワイヤごとに変更することは、NC制御による一次接続後の上昇高さ設定により容易に実現可能である。下流側のワイヤほど大きく倒れるため、ワイヤが倒れても下流側のワイヤが上流側のワイヤから遠ざかることになる。したがって、隣接するワイヤ間の配置を詰めてもワイヤ間の接触が起こりにくくなるため、樹脂封止型電力用半導体装置を小型化できる。
図8は、実施の形態4に係る電力半導体装置を製造するためのモールド金型の断面図である。金型10は、上型11と下型12との間にキャビティ13が形成される構造であり、上型11からキャビティ13内に可動ピン8を出没させる可動ピン駆動機構14を備えている。
本発明の実施の形態5に係る電力用半導体装置に適用されるワイヤ7は、絶縁被覆9を備える。図12は、ワイヤの断面図である。またワイヤボンド装置には絶縁被覆9を剥がす機構を備える。絶縁被覆9を剥がせるようにするために、モールド樹脂15の成形温度よりも融点及び沸点が高く、かつレーザ光の吸収率が高い絶縁性の材料で絶縁被覆9を構成する。ワイヤボンダのツールのワイヤ接続部に対してレーザ光を照射しアブレーション加工により被覆樹脂を除去する。このような絶縁被覆9を有するワイヤ7と絶縁被覆除去機構つきのワイヤボンダにより、絶縁被覆9を有するワイヤ7を用いての配線が可能となる。これによってワイヤ7同士が接触しても、ワイヤループの途中には絶縁被覆9が残っているのでワイヤ7同士の短絡は起こりえない。したがって、隣接するワイヤ間の配置を詰めてもワイヤ7間の接触が起こりにくくなるため、樹脂封止型電力用半導体装置を小型化できる。
Claims (5)
- 半導体素子と、該半導体素子への通電用のリードフレームと、前記半導体素子と前記リードフレームとを接続する複数のワイヤとを有し、前記半導体素子、前記リードフレーム及び前記複数のワイヤがモールド樹脂によって封止され、前記複数のワイヤは、前記モールド樹脂の流動方向と交差する方向に延在するように並列に配列されている樹脂封止型電力用半導体装置であって、
前記流動方向の下流側のワイヤの配線長は、前記流動方向の上流側のワイヤの配線長よりも長いことを特徴とする樹脂封止型電力用半導体装置。 - 前記複数のワイヤは、ワイヤループの頂部の位置が揃えられていることを特徴とする請求項1に記載の樹脂封止型電力用半導体装置。
- 前記複数のワイヤは、絶縁被覆を備えることを特徴とする請求項1又は2に記載の樹脂封止型電力用半導体装置。
- 前記流動方向の下流側のワイヤほどワイヤループ高さが高いことを特徴とする請求項1から3のいずれか1項に記載の樹脂封止型電力用半導体装置。
- 可動ピンを備えた上型と、該上型と係合した際に該上型との間にキャビティが形成される下型とを用いて、並列に配置された複数のワイヤで基板と接続された半導体素子をモールド樹脂で封止した樹脂封止型電力用半導体装置を製造する方法であって、
前記可動ピンの先端が前記複数のワイヤの間に位置するように、前記半導体素子を配置済みの前記キャビティ内に、前記上型から前記可動ピンを突出させる工程と、
前記モールド樹脂が、前記複数のワイヤの並列方向に沿って流動するように前記キャビティ内に前記モールド樹脂を注入し、前記可動ピンに、前記モールド樹脂の流動方向の下流側のワイヤを支持させる工程と、
前記モールド樹脂の硬化が完了する前に、前記可動ピンを前記上型に収容して前記キャビティから抜き取る工程とを有することを特徴とする樹脂封止型電力用半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014098061A JP6316086B2 (ja) | 2014-05-09 | 2014-05-09 | 樹脂封止型電力用半導体装置及びその製造方法 |
CN201410647851.5A CN105097754B (zh) | 2014-05-09 | 2014-11-14 | 树脂封装型功率用半导体装置以及其制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014098061A JP6316086B2 (ja) | 2014-05-09 | 2014-05-09 | 樹脂封止型電力用半導体装置及びその製造方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2015216228A JP2015216228A (ja) | 2015-12-03 |
JP2015216228A5 JP2015216228A5 (ja) | 2016-08-04 |
JP6316086B2 true JP6316086B2 (ja) | 2018-04-25 |
Family
ID=54577854
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014098061A Active JP6316086B2 (ja) | 2014-05-09 | 2014-05-09 | 樹脂封止型電力用半導体装置及びその製造方法 |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP6316086B2 (ja) |
CN (1) | CN105097754B (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2018110169A (ja) * | 2016-12-28 | 2018-07-12 | 富士電機株式会社 | 半導体装置および半導体装置製造方法 |
US11710802B2 (en) | 2019-08-13 | 2023-07-25 | Lite-On Opto Technology (Changzhou) Co., Ltd. | Sensing device |
CN112397630A (zh) * | 2019-08-13 | 2021-02-23 | 光宝光电(常州)有限公司 | 发光装置 |
JP7334655B2 (ja) * | 2020-03-06 | 2023-08-29 | 三菱電機株式会社 | 半導体装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0691118B2 (ja) * | 1986-11-28 | 1994-11-14 | 富士通株式会社 | 半導体装置およびその製造方法 |
JPH1167808A (ja) * | 1997-08-21 | 1999-03-09 | Hitachi Ltd | 半導体装置の製造方法および半導体装置 |
KR100265461B1 (ko) * | 1997-11-21 | 2000-09-15 | 윤종용 | 더미본딩와이어를포함하는반도체집적회로소자 |
JP4744320B2 (ja) * | 2005-04-04 | 2011-08-10 | パナソニック株式会社 | リードフレーム |
US20100320592A1 (en) * | 2006-12-29 | 2010-12-23 | Sanyo Electric Co., Ltd. | Semiconductor device and method for manufacturing the same |
JP5542853B2 (ja) * | 2012-02-27 | 2014-07-09 | 三菱電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP5932555B2 (ja) * | 2012-08-03 | 2016-06-08 | 三菱電機株式会社 | 電力半導体装置 |
EP4293714A3 (en) * | 2012-09-20 | 2024-02-28 | Rohm Co., Ltd. | Power semiconductor device module |
JP6021695B2 (ja) * | 2013-03-06 | 2016-11-09 | 三菱電機株式会社 | 半導体装置の製造方法および半導体装置の製造装置 |
-
2014
- 2014-05-09 JP JP2014098061A patent/JP6316086B2/ja active Active
- 2014-11-14 CN CN201410647851.5A patent/CN105097754B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
CN105097754A (zh) | 2015-11-25 |
CN105097754B (zh) | 2019-03-15 |
JP2015216228A (ja) | 2015-12-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6316086B2 (ja) | 樹脂封止型電力用半導体装置及びその製造方法 | |
US8063318B2 (en) | Electronic component with wire bonds in low modulus fill encapsulant | |
US7851347B2 (en) | Wire bonding method and semiconductor device | |
US20100071456A1 (en) | Tack adhesion testing device | |
US8017450B2 (en) | Method of forming assymetrical encapsulant bead | |
US7915091B2 (en) | Method of controlling satellite drops from an encapsulant jetter | |
JP2015216228A5 (ja) | ||
JP5317548B2 (ja) | 半導体装置、及びその製造方法 | |
US20090079097A1 (en) | Electronic component with wire bonds in low modulus fill encapsulant | |
JP5720514B2 (ja) | 半導体装置の製造方法 | |
JP6021695B2 (ja) | 半導体装置の製造方法および半導体装置の製造装置 | |
JP5343939B2 (ja) | 半導体装置の製造方法 | |
JP5693956B2 (ja) | リードフレームおよびその製造方法 | |
JP5332211B2 (ja) | 半導体装置およびその製造方法 | |
JP6537242B2 (ja) | 液体吐出ヘッドの製造方法 | |
US8322207B2 (en) | Tack adhesion testing device | |
JP5847390B2 (ja) | 実装装置および実装方法 | |
US20100075465A1 (en) | Method of reducing voids in encapsulant | |
JP4825521B2 (ja) | 圧縮成形による樹脂封止装置及び樹脂封止方法 | |
US20100075464A1 (en) | Method of reducing voids in encapsulant | |
US11948850B2 (en) | Semiconductor module and method for manufacturing semiconductor module | |
JP2010219334A (ja) | 電子部品製造装置、方法及びプログラム | |
JPWO2015099088A1 (ja) | 磁気センサ、これを用いた磁気エンコーダ、レンズ鏡筒、及びカメラ、並びに磁気センサの製造方法 | |
JP6462609B2 (ja) | 半導体装置 | |
JP2008135578A (ja) | ワイヤボンディング方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160616 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20160616 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20161222 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20170104 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20170216 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20170808 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20170929 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20180227 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20180327 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6316086 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |