JP6303358B2 - Thin film transistor - Google Patents

Thin film transistor Download PDF

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JP6303358B2
JP6303358B2 JP2013198561A JP2013198561A JP6303358B2 JP 6303358 B2 JP6303358 B2 JP 6303358B2 JP 2013198561 A JP2013198561 A JP 2013198561A JP 2013198561 A JP2013198561 A JP 2013198561A JP 6303358 B2 JP6303358 B2 JP 6303358B2
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organic semiconductor
electrode
semiconductor layer
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JP2015065317A (en
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ちひろ 今村
ちひろ 今村
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/484—Insulated gate field-effect transistors [IGFETs] characterised by the channel regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
    • H10K10/471—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics the gate dielectric comprising only organic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/15—Deposition of organic active material using liquid deposition, e.g. spin coating characterised by the solvent used
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/60—Organic compounds having low molecular weight
    • H10K85/649—Aromatic compounds comprising a hetero atom
    • H10K85/657—Polycyclic condensed heteroaromatic hydrocarbons
    • H10K85/6572—Polycyclic condensed heteroaromatic hydrocarbons comprising only nitrogen in the heteroaromatic polycondensed ring system, e.g. phenanthroline or carbazole

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  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)

Description

本発明は、薄膜トランジスタに関する。   The present invention relates to a thin film transistor.

現在、一般的な平面薄型画像表示装置は非晶質シリコンや多結晶シリコンを半導体層に用いた薄膜トランジスタのアクティブマトリックスにより駆動されている。   At present, a general flat and thin image display device is driven by an active matrix of a thin film transistor using amorphous silicon or polycrystalline silicon as a semiconductor layer.

一方、平面薄型画像表示装置のさらなる薄型化、軽量化、耐破損性の向上を求めて、ガラス基板の替わりに樹脂基板を用いる試みが近年なされている。   On the other hand, in recent years, attempts have been made to use a resin substrate instead of a glass substrate in order to further reduce the thickness, weight, and damage resistance of a flat and thin image display device.

しかし、上述のシリコンを用いる薄膜トランジスタの製造は、比較的高温の熱工程を要し、一般的に耐熱性の低い樹脂基板上に直接形成することは困難である。   However, the manufacture of the above-described thin film transistor using silicon requires a relatively high temperature thermal process and is generally difficult to form directly on a resin substrate having low heat resistance.

そこで、低温形成が可能な有機半導体を用いた薄膜トランジスタの開発が活発に行われている。   Therefore, development of a thin film transistor using an organic semiconductor that can be formed at a low temperature has been actively conducted.

また、有機半導体は印刷法によってパターニングが可能であるという長所を有する。さらに、有機半導体を用いた薄膜トランジスタは半導体層だけでなく、電極やゲート絶縁層も印刷法によって形成可能な材料を選択することにより、薄膜トランジスタを構成する層を全て印刷により形成することも可能である。   In addition, the organic semiconductor has an advantage that it can be patterned by a printing method. Furthermore, a thin film transistor using an organic semiconductor can be formed by printing not only the semiconductor layer but also the electrodes and the gate insulating layer by selecting materials that can be formed by a printing method, so that all layers constituting the thin film transistor can be formed by printing. .

印刷法を用いることにより、真空成膜・フォトリソグラフィーにより製造されるシリコン系薄膜とトランジスタと比較して製造コストの大幅な削減が期待される。   By using the printing method, a significant reduction in manufacturing cost is expected as compared with a silicon-based thin film and a transistor manufactured by vacuum film formation / photolithography.

薄膜トランジスタの電極材料としては銀が用いられることが最も一般的である（非特許文献１、２）。しかし、有機半導体材料を銀電極上へ塗布した際に、有機半導体材料と銀電極との濡れ性が悪く、有機半導体材料と銀電極が十分に接触していないことが問題となっている。   The most common electrode material for thin film transistors is silver (Non-Patent Documents 1 and 2). However, when the organic semiconductor material is applied onto the silver electrode, the wettability between the organic semiconductor material and the silver electrode is poor, and the organic semiconductor material and the silver electrode are not sufficiently in contact.

Ｐｒｏｃｅｅｄｉｎｇｓ ｏｆ ｔｈｅ Ｎａｔｉｏｎａｌ Ａｃａｄｅｍｙ ｏｆ Ｓｃｉｅｎｃｅｓ ｏｆ ｔｈｅ Ｕｎｉｔｅｄ Ｓｔａｔｅｓ ｏｆ Ａｍｅｒｉｃａ Ｖｏｌ．１５ Ｎｏ．１３、４９７６（２００８）Proceedings of the National Academy of Sciences of the United States of America, Vol. 15 No. 13, 4976 (2008) Ａｐｐｌｉｅｄ Ｐｈｙｓｉｃｓ Ｌｅｔｔｅｒｓ ９５、２５３３０２（２００９）Applied Physics Letters 95, 253302 (2009)

有機半導体材料と銀電極が十分に接触しなければ、薄膜トランジスタのオン電流が減少し、デバイスを動作させる上で所望の特性が得られないこととなる。   If the organic semiconductor material and the silver electrode are not in sufficient contact with each other, the on-current of the thin film transistor is reduced, and desired characteristics cannot be obtained in operating the device.

本発明は、有機半導体層とソース電極及びドレイン電極との接触面積が広く、高いオン電流が得られる薄膜トランジスタを提供することを目的とする。   An object of the present invention is to provide a thin film transistor in which a contact area between an organic semiconductor layer and a source electrode and a drain electrode is wide and a high on-current can be obtained.

そこで本発明は、絶縁基板上に少なくともゲート電極と、ゲート絶縁層と、ソース電極及びドレイン電極と、有機半導体層とを有する薄膜トランジスタであって、該ソース電極及びドレイン電極は少なくとも一種以上の金属から構成され、該有機半導体層に該ソース電極及びドレイン電極を構成する金属のイオンと結合する化合物を含有させることで、有機半導体層とソース電極及びドレイン電極の接触面積を増加させ、高いオン電流が得られるトランジスタを提供する。   Therefore, the present invention provides a thin film transistor having at least a gate electrode, a gate insulating layer, a source electrode and a drain electrode, and an organic semiconductor layer on an insulating substrate, and the source electrode and the drain electrode are made of at least one kind of metal. By including a compound that binds to ions of the metal constituting the source electrode and the drain electrode in the organic semiconductor layer, the contact area between the organic semiconductor layer and the source electrode and the drain electrode is increased, and a high on-current is obtained. The resulting transistor is provided.

有機半導体層中に含まれる化合物がソース電極及びドレイン電極と結合した際に、隣接して存在する有機半導体材料を電極表面近傍に引き寄せ、物理的に接触させることが可能となる。   When the compound contained in the organic semiconductor layer is combined with the source electrode and the drain electrode, the adjacent organic semiconductor material can be drawn near the electrode surface and physically contacted.

また、ソース電極及びドレイン電極を構成する金属の一種を銀とすることで、金、銅と比較し高導電性かつ低コストの電極を形成することができる。   In addition, by using silver as a metal constituting the source electrode and the drain electrode, it is possible to form an electrode having higher conductivity and lower cost than gold and copper.

特に、有機半導体層に含有させる金属イオンと結合する化合物をベンゾトリアゾール系またはトリアジン系化合物とすることで、化合物と銀電極の結合が強固となり、半導体層と電極が十分に接触する薄膜トランジスタを形成することが可能となる。   In particular, by using a benzotriazole-based or triazine-based compound as a compound that binds to metal ions contained in the organic semiconductor layer, the bond between the compound and the silver electrode becomes strong, and a thin film transistor in which the semiconductor layer and the electrode are in sufficient contact is formed. It becomes possible.

本発明によれば、有機半導体層とソース電極及びドレイン電極の接触面積を増加させるので、高いオン電流が得られる。   According to the present invention, since the contact area between the organic semiconductor layer and the source and drain electrodes is increased, a high on-current can be obtained.

本発明の一実施形態を示す実施例１及び比較例１の薄膜トランジスタの断面構造を表す概略図である。It is the schematic showing the cross-section of the thin-film transistor of Example 1 and Comparative Example 1 which shows one Embodiment of this invention. 図１の薄膜トランジスタの表面側を示す概略図である。It is the schematic which shows the surface side of the thin-film transistor of FIG.

以下、本発明の実施の形態を、図面を参照しつつ説明する。実施の形態において、同一構成要素には同一符号を付け、実施の形態の間において重複する説明は省略する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the embodiments, the same components are denoted by the same reference numerals, and redundant description among the embodiments is omitted.

図１及び図２に本発明の薄膜トランジスタの一例を示す。絶縁基板１０上にゲート電極１１、ゲート絶縁層１２、ソース電極１３およびドレイン電極１４、半導体層１５を備えたボトムゲート−ボトムコンタクト構造の薄膜トランジスタである。   1 and 2 show an example of the thin film transistor of the present invention. This is a bottom gate-bottom contact thin film transistor including a gate electrode 11, a gate insulating layer 12, a source electrode 13 and a drain electrode 14, and a semiconductor layer 15 on an insulating substrate 10.

本発明の絶縁基板１０としてガラス基板または樹脂基板を用いることができる。樹脂基板の場合、例えば、ポリイミド、ポリメチルメタクリレート、ポリアクリレート、ポリカーボネート、ポリスチレン、ポリエチレンサルファイド、ポリエーテルスルホン（ＰＥＳ）、ポリオレフィン、ポリエチレンテレフタレート、ポリエチレンナフタレート（ＰＥＮ）、シクロオレフィンポリマー、ポリエーテルサルフェン、トリアセチルセルロース、ポリビニルフルオライドフィルム、エチレン−テトラフルオロエチレン共重合樹脂、ガラス繊維強化アクリル樹脂フィルム、ガラス繊維強化ポリカーボネート、フッ素系樹脂、環状ポリオレフィン系樹脂等を使用することができる。これらの基板は単独で使用することもでき、二種以上を積層した複合基板を使用することもできる。   A glass substrate or a resin substrate can be used as the insulating substrate 10 of the present invention. In the case of a resin substrate, for example, polyimide, polymethyl methacrylate, polyacrylate, polycarbonate, polystyrene, polyethylene sulfide, polyethersulfone (PES), polyolefin, polyethylene terephthalate, polyethylene naphthalate (PEN), cycloolefin polymer, polyethersulfene Triacetyl cellulose, polyvinyl fluoride film, ethylene-tetrafluoroethylene copolymer resin, glass fiber reinforced acrylic resin film, glass fiber reinforced polycarbonate, fluorine resin, cyclic polyolefin resin and the like can be used. These substrates can be used alone, or a composite substrate in which two or more kinds are laminated can be used.

本発明のゲート電極１１には、Ａｇ、Ｃｕ、Ａｕなどの低抵抗金属材料をインキ状、ペースト状にしたものをスクリーン印刷、転写印刷、凸版印刷、インクジェット法等で塗布し、焼成することにより形成することができる。ＰＥＤＯＴ（ポリエチレンジオキシチフェン）等の導電性有機材料を用いることもできる。また、Ｍｏ、Ａｌ、Ｃｕなどの低抵抗金属材料を真空成膜し、フォトリソグラフィーを用いてパターニングすることにより形成することもできるが、これらに限定されるものではない。   The gate electrode 11 of the present invention is formed by applying a low resistance metal material such as Ag, Cu, Au or the like in the form of an ink or paste by screen printing, transfer printing, letterpress printing, an ink jet method, or the like, and baking it. Can be formed. A conductive organic material such as PEDOT (polyethylenedioxythiophene) can also be used. Further, it can be formed by depositing a low resistance metal material such as Mo, Al, Cu or the like in vacuum and patterning using photolithography, but is not limited thereto.

本発明のゲート絶縁層１２としては、例えば、ポリビニルフェノール、ポリメタクリル酸メチル、ポリイミド、ポリビニルアルコール、パリレン、フッ素樹脂、エポキシ樹脂などの高分子溶液、アルミナやシリカゲル等の粒子を分散させた溶液、または酸化シリコン、窒化シリコン、シリコンオキシナイトライド、酸化アルミニウム、酸化タンタル、酸化イットリウム、酸化ハフニウム、酸化ジルコニウム、酸化チタン等の無機材料の前駆体溶液を、スピンコート法やスリットダイコート法等を用いて塗布し、焼成することにより形成することができる。また、上記無機材料を真空成膜法を用いて形成し、フォトリソグラフィー法でパターニングすることにより形成することもできるが、これらに限定されるものではない。   As the gate insulating layer 12 of the present invention, for example, a polymer solution such as polyvinylphenol, polymethyl methacrylate, polyimide, polyvinyl alcohol, parylene, fluororesin, epoxy resin, a solution in which particles such as alumina and silica gel are dispersed, Alternatively, a precursor solution of an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, yttrium oxide, hafnium oxide, zirconium oxide, titanium oxide, or the like is applied using a spin coating method, a slit die coating method, or the like. It can be formed by coating and baking. In addition, the inorganic material can be formed by using a vacuum film forming method and patterned by a photolithography method, but is not limited thereto.

本発明のソース電極１３及びドレイン電極１４としては、Ａｇ、Ｃｕ、Ａｕなどの低抵抗金属材料をインキ状、ペースト状にしたものをスクリーン印刷、転写印刷、凸版印刷、インクジェット法等で塗布し、焼成することにより形成することができるが、特にＡｇをインキ状またはペースト状にしたものが、低抵抗および低コストという観点から好ましい。またＭｏ、Ａｌ、Ｃｕなどの低抵抗金属材料を真空成膜し、フォトリソグラフィーを用いてパターニングすることにより形成することもできるが、これらに限定されるものではない。   As the source electrode 13 and the drain electrode 14 of the present invention, a low resistance metal material such as Ag, Cu, Au or the like formed in an ink form or a paste form is applied by screen printing, transfer printing, letterpress printing, an inkjet method or the like, Although it can be formed by firing, it is particularly preferable that Ag is formed into an ink or paste from the viewpoint of low resistance and low cost. Further, it can be formed by depositing a low resistance metal material such as Mo, Al, Cu or the like in vacuum and patterning using photolithography, but is not limited thereto.

本発明の有機半導体層１５の材料としては、ポリチオフェン、フルオレンビチオフェン共重合体、およびそれらの誘導体のような高分子有機半導体材料、およびペンタセン、テトラセン、銅フタロシアニン、およびそれらの誘導体のような低分子有機半導体材料を用いることができる。また、カーボンナノチューブあるいはフラーレンなどの炭素化合物や半導体ナノ粒子分散液なども半導体層の材料として用いることができるがこれらに限定されるものではない。これらの有機半導体材料はトルエンなどの芳香族系の溶媒に溶解又は分散させてインキ状の溶液又は分散液として用いることができる。溶媒に適当な分散剤や安定剤等の添加剤を加えてもよい。   Examples of the material of the organic semiconductor layer 15 of the present invention include high-molecular organic semiconductor materials such as polythiophene, fluorenebithiophene copolymers, and derivatives thereof, and low molecular weights such as pentacene, tetracene, copper phthalocyanine, and derivatives thereof. Molecular organic semiconductor materials can be used. Carbon compounds such as carbon nanotubes or fullerenes, semiconductor nanoparticle dispersions, and the like can also be used as the material for the semiconductor layer, but are not limited thereto. These organic semiconductor materials can be dissolved or dispersed in an aromatic solvent such as toluene and used as an ink-like solution or dispersion. You may add additives, such as a suitable dispersing agent and a stabilizer, to a solvent.

本発明の有機半導体層１５には金属イオンと結合する化合物を含有する。例えばベンゾトリアゾール系またはトリアジン系の化合物が挙げられる。 The organic semiconductor layer 15 of the present invention contains a compound that binds to metal ions. For example Benzotoria zone Lumpur based or triazine-based compounds and the like.

ベンゾトリアゾール系は化学式１に示されるベンゾトリアゾールが基本形であり、他にメタノールの付加物である１Ｈ−ベンゾトリアゾール−１−メタノール（化学式２）や、トリアゾール側にアルキル基を付加したもの（化学式３）や、ベンゼン側にアルキル基を付加したものが挙げられる（化学式４）。 Benzotriazole is Benzotoria zone Lumpur represented by Formula 1 Basic, other adducts of methanol 1H- benzotriazol-1-methanol (Formula 2) and those obtained by adding an alkyl group to the triazole side ( And those obtained by adding an alkyl group to the benzene side (Chemical Formula 4).

トリアジンの基本骨格は化学式５に示されるものであり、例えば化学式６に示される２、４−ジアミノ−６−ビニル−Ｓ−トリアジン等が挙げられる。   The basic skeleton of triazine is shown in Chemical Formula 5, and examples thereof include 2,4-diamino-6-vinyl-S-triazine shown in Chemical Formula 6.

Figure 0006303358
Figure 0006303358

有機半導体層１５の形成方法としては、グラビア印刷、オフセット印刷、スクリーン印刷およびインクジェット法など、公知の方法を用いることができる。一般に、上記の有機半導体に関しては、溶剤に対する溶解度が低いため、低粘度溶液の印刷に適したフレキソ印刷、転写印刷、インクジェット法、ディスペンサを用いることが望ましい。   As a method for forming the organic semiconductor layer 15, known methods such as gravure printing, offset printing, screen printing, and an inkjet method can be used. In general, since the organic semiconductor has a low solubility in a solvent, it is desirable to use flexographic printing, transfer printing, an inkjet method, and a dispenser suitable for printing a low viscosity solution.

以下、本発明に係る薄膜トランジスタの具体的な実施例について説明する。なお、本発明は各実施例に限るものではない。   Specific examples of the thin film transistor according to the present invention will be described below. Note that the present invention is not limited to each embodiment.

以下本発明に関わる薄膜トランジスタの具体的な実施例及び比較例について説明する。   Hereinafter, specific examples and comparative examples of the thin film transistor according to the present invention will be described.

（実施例１）
実施例１では以下に示すような薄膜トランジスタ素子を作製した。
絶縁基板１０となるポリエチレンナフタレート（ＰＥＮ）フィルム上に、Ｍｏをスパッタリングにて１００ｎｍ成膜し、フォトリソグラフィー法を用いてゲート電極１１を作製した。次に、ゲート絶縁層１２となるポリビニルフェノールを、ゲート電極１１を含む絶縁基板１０上にスピンコート法により成膜し、１８０℃で１時間ベーク後、膜厚１μｍのゲート絶縁層１２を得た。続いて、ゲート絶縁膜１２上にソース電極１３及びドレイン電極１４として、ナノ銀インキを転写法を用いて形成し、１８０℃で１時間ベーク後、膜厚１００ｎｍのソース電極１３及びドレイン電極１４を得た。さらにソース電極１３及びドレイン電極１４上にペンタフルオロチオフェノールをイソプロピルアルコールで１重量％に希釈した溶液に３０分浸漬させ、自己組織化単分子膜を形成した。最後に有機半導体材料である６，１３−ビス（トリイソプロピルシリルエチニル）ペンタセンをテトラリンで２重量％になるように溶解させた溶液に、ベンゾトリアゾール系化合物を半導体材料（固形分）と重量比１．５：１として添加し、凸版印刷法を用いて、ソース電極１３及びドレイン電極１４上の一部を覆うようにしてソース・ドレイン電極間に印刷し、１００℃で６０分乾燥させて、膜厚５０ｎｍの有機半導体層１５を形成した。作製したトランジスタのチャネル長は２０μｍ、チャネル幅は２５０μｍである。 Example 1
In Example 1, a thin film transistor element as shown below was produced.
On the polyethylene naphthalate (PEN) film used as the insulating substrate 10, Mo was formed into a film with a thickness of 100 nm by sputtering, and the gate electrode 11 was produced using a photolithography method. Next, polyvinyl phenol to be the gate insulating layer 12 was formed on the insulating substrate 10 including the gate electrode 11 by spin coating, and baked at 180 ° C. for 1 hour to obtain a gate insulating layer 12 having a thickness of 1 μm. . Subsequently, nano silver ink is formed on the gate insulating film 12 as a source electrode 13 and a drain electrode 14 using a transfer method, and after baking at 180 ° C. for 1 hour, the source electrode 13 and the drain electrode 14 having a thickness of 100 nm are formed. Obtained. Further, a self-assembled monolayer was formed on the source electrode 13 and the drain electrode 14 by immersing in a solution of pentafluorothiophenol diluted to 1% by weight with isopropyl alcohol for 30 minutes. Finally, in a solution in which 6,13-bis (triisopropylsilylethynyl) pentacene, which is an organic semiconductor material, is dissolved in tetralin to 2% by weight, the benzotriazole compound is mixed with the semiconductor material (solid content) in a weight ratio of 1 .5: 1, and printing is performed between the source electrode and the drain electrode so as to cover a part of the source electrode 13 and the drain electrode 14 using a relief printing method, and dried at 100 ° C. for 60 minutes to form a film. An organic semiconductor layer 15 having a thickness of 50 nm was formed. The manufactured transistor has a channel length of 20 μm and a channel width of 250 μm.

以上のようにして作製した薄膜トランジスタの素子特性はオフ電流１．１×１０−１２Ａ、オン電流２．６×１０−６Ａであり、高いオン電流を有する薄膜トランジスタが得られた。また有機半導体材料のチャネル近傍のソース電極及びドレイン電極表面の被覆率は８５％であった。 The device characteristics of the thin film transistor manufactured as described above were an off current of 1.1 × 10 −12 A and an on current of 2.6 × 10 −6 A, and a thin film transistor having a high on current was obtained. The coverage of the surface of the source and drain electrodes in the vicinity of the channel of the organic semiconductor material was 85%.

（実施例２）
実施例２では以下に示すような薄膜トランジスタ素子を作製した。
絶縁基板１０となるポリエチレンナフタレート（ＰＥＮ）フィルム上に、Ｍｏをスパッタリングにて１００ｎｍ成膜し、フォトリソグラフィー法を用いてゲート電極１１を作製した。次に、ゲート絶縁層１２となるポリビニルフェノールを、ゲート電極１１を含む絶縁基板１０上にスピンコート法により成膜し、１８０℃で１時間ベーク後、膜厚１μｍのゲート絶縁層１２を得た。続いて、ゲート絶縁膜１２上にソース電極１３及びドレイン電極１４として、ナノ銀インキを転写法を用いて形成し、１８０℃で１時間ベーク後、膜厚１００ｎｍのソース電極１３及びドレイン電極１４を得た。さらにソース電極１３及びドレイン電極１４上にペンタフルオロチオフェノールをイソプロピルアルコールで１重量％に希釈した溶液に３０分浸漬させ、自己組織化単分子膜を形成した。最後に有機半導体材料である６，１３−ビス（トリイソプロピルシリルエチニル）ペンタセンをテトラリンで２重量％になるように溶解させた溶液に、トリアジン系化合物を半導体材料（固形分）と重量比１：１として添加し、凸版印刷法を用いて、ソース電極１３及びドレイン電極１４上の一部を覆うようにしてソース・ドレイン電極間に印刷し、１００℃で６０分乾燥させて、膜厚５０ｎｍの有機半導体層１５を形成した。作製したトランジスタのチャネル長は２０μｍ、チャネル幅は２５０μｍである。 (Example 2)
In Example 2, a thin film transistor element as shown below was produced.
On the polyethylene naphthalate (PEN) film used as the insulating substrate 10, Mo was formed into a film with a thickness of 100 nm by sputtering, and the gate electrode 11 was produced using a photolithography method. Next, polyvinyl phenol to be the gate insulating layer 12 was formed on the insulating substrate 10 including the gate electrode 11 by spin coating, and baked at 180 ° C. for 1 hour to obtain a gate insulating layer 12 having a thickness of 1 μm. . Subsequently, nano silver ink is formed on the gate insulating film 12 as a source electrode 13 and a drain electrode 14 using a transfer method, and after baking at 180 ° C. for 1 hour, the source electrode 13 and the drain electrode 14 having a thickness of 100 nm are formed. Obtained. Further, a self-assembled monolayer was formed on the source electrode 13 and the drain electrode 14 by immersing in a solution of pentafluorothiophenol diluted to 1% by weight with isopropyl alcohol for 30 minutes. Finally, a triazine compound and a semiconductor material (solid content) are mixed with a semiconductor material (solid content) in a weight ratio of 6,13-bis (triisopropylsilylethynyl) pentacene, which is an organic semiconductor material, to 2 wt% with tetralin. 1 and using a relief printing method, printing is performed between the source and drain electrodes so as to cover a part of the source electrode 13 and the drain electrode 14, and dried at 100 ° C. for 60 minutes. An organic semiconductor layer 15 was formed. The manufactured transistor has a channel length of 20 μm and a channel width of 250 μm.

以上のようにして作製した薄膜トランジスタの素子特性はオフ電流１．３×１０−１２Ａ、オン電流２．２×１０−６Ａであり、高いオン電流を有する薄膜トランジスタが得られた。また有機半導体材料のチャネル近傍のソース電極及びドレイン電極表面の被覆率は８０％であった。 The device characteristics of the thin film transistor manufactured as described above were an off current of 1.3 × 10 −12 A and an on current of 2.2 × 10 −6 A, and a thin film transistor having a high on current was obtained. The coverage of the surface of the source and drain electrodes in the vicinity of the channel of the organic semiconductor material was 80%.

（比較例１）
比較例では以下に示すような薄膜トランジスタ素子を作製した。
絶縁基板１０となるポリエチレンナフタレート（ＰＥＮ）フィルム上に、Ｍｏをスパッタリングにて１００ｎｍ成膜し、フォトリソグラフィー法を用いてゲート電極１１を作製した。次に、ゲート絶縁層１２となるポリビニルフェノールを、ゲート電極１１を含む絶縁基板１０上にスピンコート法により成膜し、１８０℃で１時間ベーク後、膜厚１μｍのゲート絶縁層１２を得た。続いて、ゲート絶縁膜１２上にソース電極１３及びドレイン電極１４として、ナノ銀インキを転写法を用いて形成し、１８０℃で１時間ベーク後、膜厚１００ｎｍのソース電極１３及びドレイン電極１４を得た。さらにソース電極１３及びドレイン電極１４上にペンタフルオロチオフェノールをイソプロピルアルコールで１重量％に希釈した溶液に３０分浸漬させ、自己組織化単分子膜を形成した。最後に有機半導体材料である６，１３−ビス（トリイソプロピルシリルエチニル）ペンタセンをテトラリンで２重量％になるように溶解させた溶液を、凸版印刷法を用いて、ソース電極１３及びドレイン電極１４上の一部を覆うようにしてソース・ドレイン電極間に印刷し、１００℃で６０分乾燥させて、膜厚５０ｎｍの有機半導体層１５を形成した。作製したトランジスタのチャネル長は２０μｍ、チャネル幅は２５０μｍである。 (Comparative Example 1)
In the comparative example, a thin film transistor element as shown below was produced.
On the polyethylene naphthalate (PEN) film used as the insulating substrate 10, Mo was formed into a film with a thickness of 100 nm by sputtering, and the gate electrode 11 was produced using a photolithography method. Next, polyvinyl phenol to be the gate insulating layer 12 was formed on the insulating substrate 10 including the gate electrode 11 by spin coating, and baked at 180 ° C. for 1 hour to obtain a gate insulating layer 12 having a thickness of 1 μm. . Subsequently, nano silver ink is formed on the gate insulating film 12 as a source electrode 13 and a drain electrode 14 using a transfer method, and after baking at 180 ° C. for 1 hour, the source electrode 13 and the drain electrode 14 having a thickness of 100 nm are formed. Obtained. Further, a self-assembled monolayer was formed on the source electrode 13 and the drain electrode 14 by immersing in a solution of pentafluorothiophenol diluted to 1% by weight with isopropyl alcohol for 30 minutes. Finally, a solution in which 6,13-bis (triisopropylsilylethynyl) pentacene, which is an organic semiconductor material, is dissolved in tetralin to 2% by weight is formed on the source electrode 13 and the drain electrode 14 using a relief printing method. The organic semiconductor layer 15 having a film thickness of 50 nm was formed by printing between the source and drain electrodes so as to cover a part of the film and drying at 100 ° C. for 60 minutes. The manufactured transistor has a channel length of 20 μm and a channel width of 250 μm.

以上のようにして有機半導体層に、金属イオンと結合する化合物を添加せずに作製した薄膜トランジスタの素子特性はオフ電流１．３×１０−１２Ａ、オン電流７．０×１０−７Ａであり、実施例１と比較するとオン電流の値は１／３以下であった。また有機半導体材料のチャネル近傍のソース電極及びドレイン電極表面の被覆率は３０％であった。 The element characteristics of the thin film transistor manufactured without adding a compound that binds to metal ions to the organic semiconductor layer as described above are an off-current of 1.3 × 10 −12 A and an on-current of 7.0 × 10 −7 A. In comparison with Example 1, the on-current value was 1/3 or less. Further, the coverage of the surface of the source and drain electrodes in the vicinity of the channel of the organic semiconductor material was 30%.

絶縁基板上に少なくともゲート電極、ゲート絶縁層、ソース電極及びドレイン電極、有機半導体層を有する薄膜トランジスタであって、該ソース電極及びドレイン電極は少なくとも一種以上の金属から構成され、該有機半導体層は該ソース電極及びドレイン電極を構成する金属イオンと結合する化合物を含有することで、半導体層とソース電極及びドレイン電極の接触面積が広く、オン電流の高い薄膜トランジスタを提供することができる。このような薄膜トランジスタは、フレキシブル電子ペーパー、圧力センサ等のスイッチング素子として利用できる。   A thin film transistor having at least a gate electrode, a gate insulating layer, a source electrode and a drain electrode, and an organic semiconductor layer on an insulating substrate, wherein the source electrode and the drain electrode are composed of at least one metal, and the organic semiconductor layer includes the organic semiconductor layer By containing a compound that binds to metal ions constituting the source electrode and the drain electrode, a thin film transistor with a large contact area between the semiconductor layer and the source electrode and the drain electrode can be provided. Such a thin film transistor can be used as a switching element such as flexible electronic paper and a pressure sensor.

１０ 絶縁基板
１１ ゲート電極
１２ ゲート絶縁層
１３ ソース電極
１４ ドレイン電極
１５ 半導体層 DESCRIPTION OF SYMBOLS 10 Insulating substrate 11 Gate electrode 12 Gate insulating layer 13 Source electrode 14 Drain electrode 15 Semiconductor layer

Claims (1)

絶縁基板上に少なくともゲート電極と、ゲート絶縁層と、ソース電極及びドレイン電極と、有機半導体層とを有する薄膜トランジスタであって、
前記ソース電極と前記ドレイン電極との間、並びに、前記ソース電極及び前記ドレイン電極上に前記有機半導体層が積層されてなり、
前記ソース電極及び前記ドレイン電極は少なくとも一種以上の金属から構成され、
前記ソース電極及び前記ドレイン電極を構成する金属の一種が銀であり、
前記有機半導体層は前記ソース電極及び前記ドレイン電極を構成する金属イオンと結合する化合物を含有し、
前記有機半導体層に含有される金属イオンと結合する化合物はベンゾトリアゾール系またはトリアジン系であり、
前記ソース電極と前記有機半導体層との間及び前記ドレイン電極と前記有機半導体層との間にはペンタフルオロチオフェノール由来の構成単位を有する自己組織化単分子膜が形成されてなり、
前記有機半導体層の前記ソース電極表面及び前記ドレイン電極表面の被覆率が８０％以上であることを特徴とする薄膜トランジスタ。 A thin film transistor having at least a gate electrode, a gate insulating layer, a source electrode and a drain electrode, and an organic semiconductor layer on an insulating substrate,
The organic semiconductor layer is laminated between the source electrode and the drain electrode, and on the source electrode and the drain electrode.
The source electrode and the drain electrode are composed of at least one metal.
One type of metal constituting the source electrode and the drain electrode is silver,
The organic semiconductor layer contains a compound that binds to metal ions constituting the source electrode and the drain electrode,
The compound that binds to the metal ion contained in the organic semiconductor layer is a benzotriazole or triazine,
A self-assembled monolayer having a structural unit derived from pentafluorothiophenol is formed between the source electrode and the organic semiconductor layer and between the drain electrode and the organic semiconductor layer,
A thin film transistor, wherein a coverage of the organic semiconductor layer on the surface of the source electrode and the surface of the drain electrode is 80% or more.
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