JP6135758B2 - Multilayer ceramic capacitor - Google Patents

Multilayer ceramic capacitor Download PDF

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JP6135758B2
JP6135758B2 JP2015518170A JP2015518170A JP6135758B2 JP 6135758 B2 JP6135758 B2 JP 6135758B2 JP 2015518170 A JP2015518170 A JP 2015518170A JP 2015518170 A JP2015518170 A JP 2015518170A JP 6135758 B2 JP6135758 B2 JP 6135758B2
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dielectric ceramic
multilayer ceramic
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JPWO2014188846A1 (en
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祥一郎 鈴木
祥一郎 鈴木
和田　博之
博之 和田
徳之 井上
徳之 井上
聡史 横溝
聡史 横溝
伴野　晃一
晃一 伴野
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Murata Manufacturing Co Ltd
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Description

この発明は、例えば車載用のような高温環境下で使用される積層セラミックコンデンサに関するものである。   The present invention relates to a multilayer ceramic capacitor that is used in a high temperature environment such as that used in a vehicle.

積層セラミックコンデンサの高温側の保証温度は、絶縁性および高温負荷信頼性（高温負荷試験における寿命）に基づいて決められる。この保証温度は、一般民生用では８５℃、高信頼性が必要とされる産業機器用では１２５℃とするのが一般的である。   The guaranteed temperature on the high temperature side of the multilayer ceramic capacitor is determined based on insulation and high temperature load reliability (lifetime in a high temperature load test). The guaranteed temperature is generally 85 ° C. for consumer use and 125 ° C. for industrial equipment that requires high reliability.

一方、近年では、産業機器用の中でも、車載用などの高温環境下で使用される積層セラミックコンデンサにおいて、１５０〜１７５℃という、より高い温度における高温負荷信頼性が求められてきている。   On the other hand, in recent years, high-temperature load reliability at a higher temperature of 150 to 175 ° C. has been demanded in multilayer ceramic capacitors used in high-temperature environments such as in-vehicle use among industrial equipment.

そのような要求を満たす積層セラミックコンデンサに用いるのに適した誘電体セラミック組成物は、例えば特開２０１１−２０７６３０号公報（特許文献１）に記載されている。特許文献１に記載されている誘電体セラミック組成物は、組成式：１００（Ｂａ１−ｘＣａｘ）ＴｉＯ３＋ａＲ２Ｏ３＋ｂＶ２Ｏ５＋ｃＺｒＯ２＋ｄＭｎＯ（ただし、ＲはＹ、Ｌａ、Ｓｍ、Ｅｕ、Ｇｄ、Ｔｂ、Ｄｙ、Ｈｏ、Ｅｒ、ＴｍおよびＹｂの中から選ばれる少なくとも１種の金属元素であり、ａ、ｂ、ｃおよびｄはモル比を表わす。）で表わされ、かつ、０．０３≦ｘ≦０．２０、０．０５≦ａ≦３．５０、０．２２≦ｂ≦２．５０、０．０５≦ｃ≦３．０、および０．０１≦ｄ≦０．３０の各条件を満たす。A dielectric ceramic composition suitable for use in a multilayer ceramic capacitor that satisfies such requirements is described in, for example, Japanese Patent Application Laid-Open No. 2011-207630 (Patent Document 1). The dielectric ceramic composition described in Patent Document 1 has a composition formula: 100 (Ba 1-x Ca x ) TiO 3 + aR 2 O 3 + bV 2 O 5 + cZrO 2 + dMnO (where R is Y, La, Sm) , Eu, Gd, Tb, Dy, Ho, Er, Tm and Yb, and a, b, c and d represent a molar ratio. 0.03 ≦ x ≦ 0.20, 0.05 ≦ a ≦ 3.50, 0.22 ≦ b ≦ 2.50, 0.05 ≦ c ≦ 3.0, and 0.01 ≦ d ≦ 0. Each of the 30 conditions is satisfied.

上記の誘電体セラミック組成物を用いた積層セラミックコンデンサは、温度１７５℃で電界強度２０Ｖ／μｍの直流電圧を印加した高温負荷試験において、ＭＴＴＦ（ＭｅａｎＴｉｍｅ Ｔｏ Ｆａｉｌｕｒｅ：平均故障時間）が５０時間以上という優れた高温負荷信頼性を有することが確認されている。   The multilayer ceramic capacitor using the above dielectric ceramic composition has an MTTF (Mean Time To Failure) of 50 hours or more in a high-temperature load test in which a DC voltage having an electric field strength of 20 V / μm is applied at a temperature of 175 ° C. It has been confirmed that it has excellent high temperature load reliability.

特開２０１１−２０７６３０号公報JP 2011-207630 A

車載用の積層セラミックコンデンサは、常に高温環境となるエンジンルーム内に搭載される電装機器の部品として用いられることが想定される。例えば、エンジンのシリンダーヘッド付近に搭載されるＥＣＵ（Ｅｌｅｃｔｒｏｎｉｃ Ｃｏｎｔｒｏｌ Ｕｎｉｔ：電子制御装置）などに用いられる積層セラミックコンデンサは、特に高温にさらされる可能性がある。そのような積層セラミックコンデンサについては、２００℃以上というさらに高い保証温度が求められる場合がある。   The in-vehicle multilayer ceramic capacitor is assumed to be used as a component of electrical equipment mounted in an engine room that is always in a high temperature environment. For example, a multilayer ceramic capacitor used in an ECU (Electronic Control Unit) mounted near the cylinder head of an engine may be exposed to a particularly high temperature. For such a multilayer ceramic capacitor, a higher guaranteed temperature of 200 ° C. or higher may be required.

しかしながら、特許文献１に記載の誘電体セラミック組成物を用いた積層セラミックコンデンサは、そのような高い温度での高温負荷信頼性が実証されていない。   However, the multilayer ceramic capacitor using the dielectric ceramic composition described in Patent Document 1 has not been proven to have high temperature load reliability at such a high temperature.

そこで、この発明の目的は、例えば車載用のような高温環境下で使用される場合においても、高温負荷信頼性に優れる積層セラミックコンデンサを提供しようとすることである。   Accordingly, an object of the present invention is to provide a multilayer ceramic capacitor having excellent high temperature load reliability even when used in a high temperature environment such as in-vehicle use.

上記の課題を解決するため、この発明に係る積層セラミックコンデンサでは、誘電体セラミック層に用いられる誘電体セラミック組成物についての改良が図られる。   In order to solve the above problems, in the multilayer ceramic capacitor according to the present invention, the dielectric ceramic composition used for the dielectric ceramic layer is improved.

この発明に係る積層セラミックコンデンサは、コンデンサ本体と、複数の外部電極とを備える。コンデンサ本体は、積層された複数の誘電体セラミック層と、誘電体セラミック層間の界面に沿って形成された複数の内部電極とをもって構成される。複数の外部電極は、コンデンサ本体の外表面上の互いに異なる位置に形成され、かつ内部電極に電気的に接続される。   A multilayer ceramic capacitor according to the present invention includes a capacitor body and a plurality of external electrodes. The capacitor body includes a plurality of laminated dielectric ceramic layers and a plurality of internal electrodes formed along the interface between the dielectric ceramic layers. The plurality of external electrodes are formed at different positions on the outer surface of the capacitor body and are electrically connected to the internal electrodes.

そして、誘電体セラミック層が、元素として、Ｂａと、Ｓｒと、Ｌａと、Ｔｉと、Ｚｒと、Ｍ（ただし、ＭはＭｇ、Ａｌ、ＭｎおよびＶから選ばれる少なくとも１種類の元素）と、Ｓｉとを含む。   The dielectric ceramic layer has Ba, Sr, La, Ti, Zr, and M (wherein M is at least one element selected from Mg, Al, Mn, and V) as elements, Si is included.

かつ、誘電体セラミック層が、化合物として、Ｂａと、Ｓｒと、Ｌａと、Ｔｉと、Ｚｒとを含んで構成される、ペロブスカイト型化合物を含む。   In addition, the dielectric ceramic layer includes a perovskite type compound including Ba, Sr, La, Ti, and Zr as compounds.

さらに、誘電体セラミック層に含まれる元素の量をモル部で表した場合、Ｔｉの量とＺｒの量との合計を１００としたときに、Ｓｒの量ａが５．０≦ａ≦２０．０、Ｌａの量ｂが０．５≦ｂ≦１．９、Ｚｒの量ｃが３０≦ｃ≦４０、Ｍの量ｄが０．５≦ｄ≦３．０、Ｓｉの量ｅが０．５≦ｅ≦３．０、およびＢａの量とＳｒの量とＬａの量との合計の、Ｔｉの量とＺｒの量との合計に対する比ｍが０．９９０≦ｍ≦１．０５０の各条件を満たす。   Further, when the amount of elements contained in the dielectric ceramic layer is expressed in mole parts, when the sum of the amount of Ti and the amount of Zr is 100, the amount of Sr is 5.0 ≦ a ≦ 20. 0, La amount b is 0.5 ≦ b ≦ 1.9, Zr amount c is 30 ≦ c ≦ 40, M amount d is 0.5 ≦ d ≦ 3.0, Si amount e is 0. 5 ≦ e ≦ 3.0, and the ratio m of the sum of Ba, Sr and La to the sum of Ti and Zr is 0.990 ≦ m ≦ 1.050 Meet the conditions.

この発明に係る積層セラミックコンデンサは、温度２００℃で電界強度１５Ｖ／μｍの直流電圧を印加した高温負荷試験を行なった場合、ＭＴＴＦが８０時間以上になるという優れた高温負荷信頼性を有する。また、誘電体セラミックの比誘電率（εｒ）が６００以上である。The multilayer ceramic capacitor according to the present invention has excellent high-temperature load reliability that MTTF is 80 hours or more when a high-temperature load test is performed at a temperature of 200 ° C. and a DC voltage of an electric field strength of 15 V / μm is applied. The dielectric ceramic has a relative dielectric constant (ε r ) of 600 or more.

この発明の実施形態に係る積層セラミックコンデンサ１の外観を示す斜視図である。1 is a perspective view showing an appearance of a multilayer ceramic capacitor 1 according to an embodiment of the present invention. 図１に示した積層セラミックコンデンサ１の正面断面図である。FIG. 2 is a front sectional view of the multilayer ceramic capacitor 1 shown in FIG. 1. 図１に示した積層セラミックコンデンサ１の誘電体セラミック層３の厚みの測定方法を説明するための図である。It is a figure for demonstrating the measuring method of the thickness of the dielectric ceramic layer 3 of the multilayer ceramic capacitor 1 shown in FIG.

−実施の形態−
以下に本発明の実施形態を示して、本発明の特徴とするところをさらに詳しく説明する。-Embodiment-
Embodiments of the present invention will be described below to describe the features of the present invention in more detail.

＜積層セラミックコンデンサの構造＞
積層セラミックコンデンサ１は、コンデンサ本体２を備えている。コンデンサ本体２は、積層される複数の誘電体セラミック層３と、複数の誘電体セラミック層３の間の複数の界面に沿ってそれぞれ形成される複数の内部電極４および５とをもって構成される。<Structure of multilayer ceramic capacitor>
The multilayer ceramic capacitor 1 includes a capacitor body 2. The capacitor body 2 includes a plurality of dielectric ceramic layers 3 that are stacked, and a plurality of internal electrodes 4 and 5 that are formed along a plurality of interfaces between the plurality of dielectric ceramic layers 3, respectively.

内部電極４および５は、コンデンサ本体２の外表面にまで到達するように形成される。本発明の実施形態では、内部電極４は、コンデンサ本体２の一方の端面６にまで到達するように形成され、内部電極５は、他方の端面７にまで到達するよう形成されている。また、内部電極４と内部電極５とは、コンデンサ本体２の内部において交互に配置されている。   The internal electrodes 4 and 5 are formed so as to reach the outer surface of the capacitor body 2. In the embodiment of the present invention, the internal electrode 4 is formed so as to reach one end face 6 of the capacitor body 2, and the internal electrode 5 is formed so as to reach the other end face 7. The internal electrodes 4 and the internal electrodes 5 are alternately arranged inside the capacitor body 2.

コンデンサ本体２の外表面上であって、端面６および７上には、外部電極８および９がそれぞれ形成されている。必要に応じて、外部電極８および９上には、Ｎｉ、Ｃｕなどからなる第１のめっき層がそれぞれ形成されていてもよい。さらにその上に、はんだ、Ｓｎなどからなる第２のめっき層がそれぞれ形成されていてもよい。   External electrodes 8 and 9 are formed on the outer surface of the capacitor body 2 and on the end faces 6 and 7, respectively. If necessary, a first plating layer made of Ni, Cu, or the like may be formed on the external electrodes 8 and 9, respectively. Furthermore, a second plating layer made of solder, Sn or the like may be formed thereon.

このような積層セラミックコンデンサ１において、誘電体セラミック層３に含まれる元素の種類および化合物と、元素の量とは、この発明で規定される各条件を満たす。   In such a multilayer ceramic capacitor 1, the kind and compound of the element contained in the dielectric ceramic layer 3 and the amount of the element satisfy each condition defined in the present invention.

＜積層セラミックコンデンサの製造＞
次に、上記の積層セラミックコンデンサ１の製造方法について、製造工程順に説明する。<Manufacture of multilayer ceramic capacitors>
Next, the manufacturing method of said multilayer ceramic capacitor 1 is demonstrated in order of a manufacturing process.

誘電体セラミック組成物のための原料粉末を用意し、これをスラリー化し、このスラリーをシート状に成形して、誘電体セラミック層３のためのグリーンシートを得る。ここで、誘電体セラミック原料粉末として、後に詳細に説明するように、この発明に係る誘電体セラミック組成物のための原料粉末が用いられる。   A raw material powder for the dielectric ceramic composition is prepared, this is slurried, and this slurry is formed into a sheet shape to obtain a green sheet for the dielectric ceramic layer 3. Here, as the dielectric ceramic raw material powder, the raw material powder for the dielectric ceramic composition according to the present invention is used as will be described in detail later.

この誘電体セラミックの原料粉末の製造方法は、誘電体セラミック層３に含まれる元素の種類および化合物と、元素の量とが、この発明で規定される各条件を満たすものであれば、どのような方法を用いてもよい。用いる素材も、炭酸塩、酸化物、水酸化物、塩化物など種々の形態のものを用いることができる。   The dielectric ceramic raw material powder manufacturing method is not limited as long as the type and compound of the element contained in the dielectric ceramic layer 3 and the amount of the element satisfy each condition defined in the present invention. Various methods may be used. As the material to be used, various forms such as carbonates, oxides, hydroxides, and chlorides can be used.

例えば、ペロブスカイト型化合物粉末の製造方法（合成方法）としては、炭酸塩や酸化物からなる素材を混合し、仮焼して合成する固相法の他、水熱法など種々の公知の方法を用いてもよい。また、所望のペロブスカイト型化合物の組成となるように、水熱法などで作製されたＢａＴｉＯ３またはＢａＺｒＯ３と、種々の素材とを混合した後、仮焼してペロブスカイト型化合物粉末を製造してもよい。For example, as a manufacturing method (synthesis method) of the perovskite type compound powder, various known methods such as a hydrothermal method as well as a solid phase method in which materials made of carbonates and oxides are mixed and calcined are synthesized. It may be used. Also, BaTiO 3 or BaZrO 3 prepared by a hydrothermal method or the like and a variety of materials are mixed so as to obtain a desired perovskite type compound composition, and calcined to produce a perovskite type compound powder. Also good.

また、誘電体セラミックの原料粉末としては、水熱法などで作製されたＢａＴｉＯ３またはＢａＺｒＯ３と、種々の素材とを混合したものとしてもよい。そして、コンデンサ本体の焼成時にそれらが反応して、Ｂａと、Ｓｒと、Ｌａと、Ｔｉと、Ｚｒとを含んで構成される、ペロブスカイト型化合物が合成されるようにしてもよい。The dielectric ceramic raw material powder may be a mixture of BaTiO 3 or BaZrO 3 produced by a hydrothermal method and various materials. Then, when the capacitor body is fired, they react to synthesize a perovskite type compound including Ba, Sr, La, Ti, and Zr.

得られたグリーンシートの特定のものの各一方主面に、内部電極４および５を形成する。内部電極４および５を構成する導電性材料は、Ｎｉ、Ｎｉ合金、Ｃｕ、およびＣｕ合金などを用いることができる。通常は、ＮｉまたはＮｉ合金が用いられる。これら内部電極４および５は、通常、上記の導電性材料粉末を含む導電性ペーストを用いて、スクリーン印刷法や転写法により形成される。内部電極４および５は、これらに限らず、どのような方法によって形成されてもよい。   Internal electrodes 4 and 5 are formed on each main surface of a specific one of the obtained green sheets. As the conductive material constituting the internal electrodes 4 and 5, Ni, Ni alloy, Cu, Cu alloy, or the like can be used. Usually, Ni or Ni alloy is used. These internal electrodes 4 and 5 are usually formed by a screen printing method or a transfer method using a conductive paste containing the above conductive material powder. The internal electrodes 4 and 5 are not limited to these, and may be formed by any method.

内部電極４または５を形成した、誘電体セラミック層３のためのグリーンシートを必要数積層するとともに、これらグリーンシートを、内部電極が形成されない適当数のグリーンシートによって挟んだ状態とする。これを熱圧着することによって、生のコンデンサ本体が得られる。   A necessary number of green sheets for the dielectric ceramic layer 3 on which the internal electrodes 4 or 5 are formed are stacked, and the green sheets are sandwiched between an appropriate number of green sheets on which the internal electrodes are not formed. A raw capacitor body is obtained by thermocompression bonding.

この生のコンデンサ本体を、所定の還元性雰囲気中で所定の温度にて焼成し、焼結後のコンデンサ本体２を得る。   This raw capacitor body is fired at a predetermined temperature in a predetermined reducing atmosphere to obtain a sintered capacitor body 2.

焼結後のコンデンサ本体２の両方の端面６および７上に、内部電極４および５とそれぞれ電気的に接続されるように、外部電極８および９を形成する。これら外部電極８および９を構成する導電性材料は、Ｎｉ、Ｎｉ合金、Ｃｕ、Ｃｕ合金、ＡｇまたはＡｇ合金などを用いることができる。通常は、ＣｕまたはＣｕ合金が用いられる。外部電極８および９は、通常、導電性材料粉末にガラスフリットを添加して得られた導電性ペーストを、コンデンサ本体２の両方の端面６および７上に塗布し、これを焼き付けることによって形成される。   External electrodes 8 and 9 are formed on both end surfaces 6 and 7 of sintered capacitor body 2 so as to be electrically connected to internal electrodes 4 and 5, respectively. As the conductive material constituting these external electrodes 8 and 9, Ni, Ni alloy, Cu, Cu alloy, Ag, Ag alloy, or the like can be used. Usually, Cu or Cu alloy is used. The external electrodes 8 and 9 are usually formed by applying a conductive paste obtained by adding glass frit to a conductive material powder on both end faces 6 and 7 of the capacitor body 2 and baking the conductive paste. The

なお、外部電極８および９となるべき導電性ペーストは、焼成前の生のコンデンサ本体に塗布しておき、コンデンサ本体２を得るための焼成と同時に焼き付けられてもよい。   The conductive paste to be the external electrodes 8 and 9 may be applied to the raw capacitor body before firing and baked simultaneously with firing for obtaining the capacitor body 2.

次に、外部電極８および９上に、必要に応じてＮｉ、Ｃｕなどのめっきを施し、第１のめっき層を形成する。また、これら第１のめっき層上に、Ｓｎ、はんだなどのめっきを施し、第２のめっき層を形成する。以上のようにして、積層セラミックコンデンサ１を完成させる。   Next, Ni, Cu or the like is plated on the external electrodes 8 and 9 as necessary to form a first plating layer. Moreover, Sn, solder, etc. are plated on these 1st plating layers, and a 2nd plating layer is formed. The multilayer ceramic capacitor 1 is completed as described above.

−実験例−
次に、この発明を実験例に基づいてより具体的に説明する。これらの実験例は、この発明に係る積層セラミックコンデンサの誘電体セラミック層に含まれる元素の量の条件、または元素の量の好ましい条件を規定する根拠を与えるためのものでもある。実験例では、試料として、図１および図２に示すような積層セラミックコンデンサを作製した。-Experimental example-
Next, the present invention will be described more specifically based on experimental examples. These experimental examples are also provided to provide a basis for defining conditions for the amount of elements contained in the dielectric ceramic layer of the multilayer ceramic capacitor according to the present invention or preferable conditions for the amounts of elements. In the experimental example, a multilayer ceramic capacitor as shown in FIGS. 1 and 2 was produced as a sample.

＜誘電体セラミック原料粉末の製造＞
誘電体セラミック層に含まれるペロブスカイト型化合物を構成するＢａの素材としてＢａＣＯ３、Ｓｒの素材としてＳｒＣＯ３、Ｌａの素材としてＬａ２Ｏ３、比較例であるＬａ以外の希土類の素材としてＮｄ２Ｏ３およびＧｄ２Ｏ３、Ｔｉの素材としてＴｉＯ２、およびＺｒの素材としてＺｒＯ２の各粉末を準備した。各粉末は、純度９９重量％以上のものを用いた。<Manufacture of dielectric ceramic raw material powder>
BaCO 3 as the material of the Ba constituting the perovskite type compound contained in the dielectric ceramic layer, SrCO 3 as the material of Sr, La 2 O 3 as the material of La, and Nd 2 O as a material of rare earth other than La as a comparative example 3 and Gd 2 O 3 , TiO 2 as a Ti material, and ZrO 2 as a Zr material were prepared. Each powder had a purity of 99% by weight or more.

これらの各粉末を、各元素の量をモル部で表した場合、Ｂａの量とＳｒの量と希土類の量との合計の、Ｔｉの量とＺｒの量との合計に対する比ｍ、Ｓｒの量ａ、希土類の量ｂ、Ｚｒの量ｃ、Ｂａの量、およびＴｉの量が、表１に示す値となるように秤量、調合した。調合時には、各粉末の純度に応じた調合量の補正を行なった。   When each of these powders is expressed in mol parts, the ratio of the sum of the amount of Ba, the amount of Sr, and the amount of rare earth to the sum of the amount of Ti and the amount of Zr, m and Sr The amount a, the amount b of rare earth, the amount c of Zr, the amount of Ba, and the amount of Ti were weighed and prepared so as to have the values shown in Table 1. At the time of blending, the blending amount was corrected according to the purity of each powder.

これらの調合原料粉末を、ボールミルを用いて湿式混合し、均一に分散させた後、乾燥し、解砕処理を施して調整粉末を得た。得られた調整粉末を１０５０℃で仮焼し、ペロブスカイト型化合物粉末を得た。   These blended raw material powders were wet-mixed using a ball mill, uniformly dispersed, then dried and crushed to obtain adjusted powders. The obtained adjusted powder was calcined at 1050 ° C. to obtain a perovskite type compound powder.

他方、誘電体セラミック層に含まれるＭの素材として、ＭｇＣＯ３、Ａｌ２Ｏ３、ＭｎＣＯ３、およびＶ２Ｏ５の各粉末を準備した。またＳｉの素材として、ＳｉＯ２の粉末を準備した。各粉末は、純度９９重量％以上のものを用いた。On the other hand, powders of MgCO 3 , Al 2 O 3 , MnCO 3 , and V 2 O 5 were prepared as M materials contained in the dielectric ceramic layer. Also, a SiO 2 powder was prepared as a Si material. Each powder had a purity of 99% by weight or more.

次に、これらの各粉末と上記のペロブスカイト型化合物粉末とを、各元素の量をモル部で表した場合、Ｔｉの量とＺｒの量との合計を１００としたときに、Ｍの量ｄ、およびＳｉの量ｅが、表１に示す値となるように秤量、調合した。調合時には、各粉末の純度に応じた調合量の補正を行なった。   Next, when each of these powders and the above-mentioned perovskite type compound powder is expressed in terms of moles, the amount of M is d, where the sum of the amount of Ti and the amount of Zr is 100. , And the amount e of Si were weighed and prepared so as to have the values shown in Table 1. At the time of blending, the blending amount was corrected according to the purity of each powder.

なお、ペロブスカイト型化合物中のＢａの量とＳｒの量と希土類の量との合計の、Ｔｉの量とＺｒの量との合計に対する比ｍの調整のため、ＢａＣＯ３、ＳｒＣＯ３、ＴｉＯ２、およびＺｒＯ２などの素材を、ペロブスカイト型化合物粉末とＭの素材とＳｉの素材とを混合する段階で添加してもよい。In order to adjust the ratio m of the total amount of Ba, Sr, and rare earth in the perovskite compound to the total amount of Ti and Zr, BaCO 3 , SrCO 3 , TiO 2 , Alternatively, a material such as ZrO 2 may be added at the stage of mixing the perovskite type compound powder, the M material, and the Si material.

これらの調合原料粉末を、ボールミルを用いて湿式混合し、均一に分散させた後、乾燥し、解砕処理を施して誘電体セラミックの原料粉末を得た。   These blended raw material powders were wet-mixed using a ball mill, uniformly dispersed, dried, and crushed to obtain dielectric ceramic raw material powders.

また、上記湿式混合の過程においてＹＳＺ（Ｙｔｔｒｉａ Ｓｔａｂｉｌｉｚｅｄ Ｚｉｒｃｏｎｉａ：イットリア安定化ジルコニア）ボールをメディアとして用いる場合など、秤量した素材以外からＺｒＯ２が混入することがある。その場合には、混入量を含めて表１の組成となるように、ＺｒＯ２粉末の調合量を調整した。Further, ZrO 2 may be mixed from materials other than the weighed material, such as when YSZ (Ytria Stabilized Zirconia) balls are used as media in the wet mixing process. In that case, the blending amount of the ZrO 2 powder was adjusted so that the composition shown in Table 1 including the mixing amount was obtained.

これらの誘電体セラミックの原料粉末中には、不可避の不純物としてＣａおよびＨｆが含まれる可能性があるが、この発明の効果に影響を与えないことを別途確認してある。   These dielectric ceramic raw material powders may contain Ca and Hf as unavoidable impurities, but it has been separately confirmed that they do not affect the effects of the present invention.

得られた誘電体セラミックの原料粉末を酸により溶解し、ＩＣＰ発光分光分析を行なった。「ＩＣＰ発光分光分析」とは、Ｉｎｄｕｃｔｉｖｅｌｙ Ｃｏｕｐｌｅｄ Ｐｌａｓｍａ（高周波誘導結合プラズマ）発光分光分析の略称である。   The obtained dielectric ceramic raw material powder was dissolved with an acid and subjected to ICP emission spectroscopic analysis. “ICP emission spectroscopy” is an abbreviation for Inductively Coupled Plasma (radio frequency inductively coupled plasma) emission spectroscopy.

その結果、誘電体セラミックの原料粉末は、表１に示した調合組成と実質的に同じ組成を有していることが確認された。   As a result, it was confirmed that the raw material powder of the dielectric ceramic had substantially the same composition as the preparation composition shown in Table 1.

＜積層セラミックコンデンサの製造＞
これらの誘電体セラミック原料粉末に、ポリビニルブチラール系のバインダー、可塑剤およびエタノールなどの有機溶剤を加え、ボールミルにより湿式混合して、誘電体セラミック組成物を含むスラリーを得た。これらのスラリーを、ポリエチレンテレフタレートからなるキャリアフィルム上にシート状に成形して、誘電体セラミック組成物を含むグリーンシートを得た。<Manufacture of multilayer ceramic capacitors>
To these dielectric ceramic raw material powders, a polyvinyl butyral binder, a plasticizer and an organic solvent such as ethanol were added and wet mixed by a ball mill to obtain a slurry containing the dielectric ceramic composition. These slurries were formed into a sheet shape on a carrier film made of polyethylene terephthalate to obtain a green sheet containing a dielectric ceramic composition.

得られたグリーンシート上に、Ｎｉを導電性材料とする導電性ペーストを用いて内部電極パターンを印刷した。それらを互いに対向して複数の静電容量を構成するように積み重ね、さらにその上下面に内部電極パターンが形成されないセラミックグリーンシートを適当数積み重ねて熱圧着し、生のコンデンサ本体を得た。   On the obtained green sheet, an internal electrode pattern was printed using a conductive paste containing Ni as a conductive material. They were stacked so as to constitute a plurality of capacitances facing each other, and an appropriate number of ceramic green sheets having no internal electrode pattern formed on their upper and lower surfaces were stacked and thermocompression bonded to obtain a raw capacitor body.

得られた生のコンデンサ本体を、大気中において、温度２９０℃で３時間保持して、バインダーを燃焼させた。バインダーを燃焼させた後のコンデンサ本体を、還元性雰囲気中において、温度１１５０〜１２５０℃で２時間保持して焼成し、焼結したコンデンサ本体を得た。還元性雰囲気には、Ｎ２−Ｈ２−Ｈ２Ｏの混合ガスが用いられた。酸素分圧ＰＯ２は、上記の温度で内部電極に含まれるＮｉが酸化しない１０−１２〜１０−９ＭＰａに設定された。The obtained raw capacitor body was held in the atmosphere at a temperature of 290 ° C. for 3 hours to burn the binder. The capacitor body after burning the binder was fired by holding at a temperature of 1150 to 1250 ° C. for 2 hours in a reducing atmosphere to obtain a sintered capacitor body. As the reducing atmosphere, a mixed gas of N 2 —H 2 —H 2 O was used. The oxygen partial pressure PO 2 was set to 10 −12 to 10 −9 MPa at which Ni contained in the internal electrode was not oxidized at the above temperature.

焼結したコンデンサ本体の両方の端面に、Ｃｕを導電性材料とし、Ｂ２Ｏ３−ＳｉＯ２−ＢａＯ系のガラスフリットを含有する導電性ペーストを塗布し、Ｎ２雰囲気中において、温度８００℃で焼き付けることにより、内部電極と電気的に接続された外部電極を形成した。On both end faces of the sintered capacitor body, a conductive paste containing Cu as a conductive material and containing a B 2 O 3 —SiO 2 —BaO-based glass frit was applied, and the temperature was 800 ° C. in an N 2 atmosphere. The external electrode electrically connected to the internal electrode was formed by baking.

その後、バレルめっきにより、外部電極の表面にＮｉめっき層（第１のめっき層）を形成し、さらにＮｉめっき層上にＳｎめっき層（第２のめっき層）を形成した。   Thereafter, an Ni plating layer (first plating layer) was formed on the surface of the external electrode by barrel plating, and an Sn plating layer (second plating layer) was further formed on the Ni plating layer.

以上の工程により、試料番号１〜３２の試料に係る積層セラミックコンデンサを得た。
このようにして得られた各試料に係る積層セラミックコンデンサの外形寸法は、幅が１．０ｍｍ、長さが２．０ｍｍ、および厚さが１．０ｍｍであった。また、静電容量の取得に係る誘電体セラミック層の数は８５であり、１層当たりの対向電極面積は１．６ｍｍ２であった。Through the above steps, multilayer ceramic capacitors according to the samples Nos. 1 to 32 were obtained.
The outer dimensions of the multilayer ceramic capacitor according to each sample thus obtained were 1.0 mm in width, 2.0 mm in length, and 1.0 mm in thickness. Further, the number of dielectric ceramic layers for obtaining the capacitance was 85, and the counter electrode area per layer was 1.6 mm 2 .

また、得られた各試料に係る積層セラミックコンデンサの外部電極を除去した後のコンデンサ本体を酸により溶解し、ＩＣＰ発光分光分析を行なった。なお、コンデンサ本体を溶解処理して溶液とする方法に特別の制約はない。   In addition, the capacitor body after the external electrode of the multilayer ceramic capacitor according to each obtained sample was removed was dissolved with acid, and ICP emission spectroscopic analysis was performed. There are no particular restrictions on the method of dissolving the capacitor body to obtain a solution.

上記の方法では、誘電体セラミック層および内部電極を同時に溶解するため、分析時には、誘電体セラミック層に含まれる元素以外に、内部電極に含まれる元素も検出されることになる。そのため、上記のＩＣＰ発光分光分析の結果から、既知である内部電極に含まれる元素を除いたものを、誘電体セラミック層を溶解処理した溶液をＩＣＰ発光分光分析した結果と見なした。また、その結果として検出された元素をモル部で表したものを、誘電体セラミック層に含まれる元素の量と見なした。   In the above method, since the dielectric ceramic layer and the internal electrode are dissolved simultaneously, at the time of analysis, in addition to the elements contained in the dielectric ceramic layer, elements contained in the internal electrode are also detected. Therefore, from the result of the ICP emission spectroscopic analysis described above, a solution obtained by removing a known element contained in the internal electrode was regarded as the result of ICP emission spectroscopic analysis of the solution obtained by dissolving the dielectric ceramic layer. Moreover, what represented the element detected as a result by the molar part was considered as the quantity of the element contained in a dielectric ceramic layer.

その結果、誘電体セラミック層は、表１に示した調合組成と実質的に同じ組成を有していることが確認された。   As a result, it was confirmed that the dielectric ceramic layer had substantially the same composition as the composition shown in Table 1.

したがって、この発明に係る積層セラミックコンデンサの誘電体セラミック層に含まれる元素の種類と、元素の量の条件または元素の量の好ましい条件とは、表１に示した組成に基づいて規定するものとする。   Therefore, the kind of element contained in the dielectric ceramic layer of the multilayer ceramic capacitor according to the present invention and the condition of the element amount or the preferable condition of the element amount are defined based on the composition shown in Table 1. To do.

＜誘電体セラミック層の厚みの測定＞
上記のようにして作製した試料番号１〜３２の試料に係る積層セラミックコンデンサを、各試料で３個ずつ準備した。<Measurement of thickness of dielectric ceramic layer>
Three multilayer ceramic capacitors according to the samples Nos. 1 to 32 prepared as described above were prepared for each sample.

各試料に係る３個の積層セラミックコンデンサを、幅（Ｗ）方向が垂直方向に沿うような姿勢で保持し、試料の周りを樹脂で固め、試料の長さ（Ｌ）と、厚さ（Ｔ）により規定されるＬＴ面を樹脂から露出させた。その後、研磨機により、各試料のＬＴ面を研磨し、各試料の幅（Ｗ）方向の１／２程度の深さまで研磨を行った。そして、研磨による内部電極の延びをなくすために、イオンミリングにより、研磨表面を加工した。   Three multilayer ceramic capacitors related to each sample are held in such a posture that the width (W) direction is along the vertical direction, and the periphery of the sample is hardened with resin, and the length (L) and thickness (T) of the sample are fixed. The LT surface defined by (1) was exposed from the resin. Thereafter, the LT surface of each sample was polished by a polishing machine and polished to a depth of about ½ of the width (W) direction of each sample. In order to eliminate the extension of the internal electrode due to polishing, the polished surface was processed by ion milling.

得られた研磨後の試料について、図３に示すように、ＬＴ断面のＬ方向の１／２程度の位置において、誘電体セラミック層３と直交する線（直交線）ＯＬを引いた。静電容量の取得に係る誘電体セラミック層３が積層されている領域を厚さ（Ｔ）方向に３等分に分割し、上部領域、中央領域、下部領域の３つの領域に分けた。   With respect to the obtained sample after polishing, a line (orthogonal line) OL perpendicular to the dielectric ceramic layer 3 was drawn at a position about 1/2 of the L direction of the LT cross section as shown in FIG. The region where the dielectric ceramic layer 3 relating to the acquisition of the capacitance was laminated was divided into three equal parts in the thickness (T) direction, and was divided into three regions: an upper region, a central region, and a lower region.

そして、各領域において最外の誘電体セラミック層３、および内部電極が欠損していることにより２層以上の誘電体セラミック層３が繋がって観察される部分を除き、各領域中央部で、上記の直交線ＯＬ上の誘電体セラミック層の厚みをそれぞれ１０層ずつ測定して平均値を求めた。すなわち、３つの試料の３つの領域の１０層について測定を行なったため、平均値を求めるためのデータ数は９０となる。その結果、試料番号１〜３２の各試料において、誘電体セラミック層の厚さは１０．０μｍであった。なお、誘電体セラミック層の厚みは、走査型電子顕微鏡を用いて測定した。   Then, except for the outermost dielectric ceramic layer 3 in each region and the portion observed by connecting two or more dielectric ceramic layers 3 due to the lack of the internal electrode, The thickness of each dielectric ceramic layer on the orthogonal line OL was measured for 10 layers, and the average value was obtained. That is, since measurement was performed on 10 layers in three regions of three samples, the number of data for obtaining an average value is 90. As a result, in each sample of sample numbers 1 to 32, the thickness of the dielectric ceramic layer was 10.0 μm. The thickness of the dielectric ceramic layer was measured using a scanning electron microscope.

＜誘電体セラミックのεｒの測定＞
上記のようにして作製した試料番号１〜３２の試料に係る積層セラミックコンデンサを、各試料で２０個ずつ準備した。<Measurement of ε r of dielectric ceramic>
20 multilayer ceramic capacitors according to the samples Nos. 1 to 32 prepared as described above were prepared for each sample.

各試料に係る２０個の積層セラミックコンデンサの静電容量（Ｃ）を、インピーダンスアナライザ（アジレント・テクノロジー社製：ＨＰ４１９４Ａ）を用い、温度２５±２℃で、電圧が１Ｖｒｍｓ、周波数が１ｋＨｚの交流電圧を印加して測定し、平均値を求めた。得られたＣの平均値と、内部電極面積と、上記で得られた誘電体セラミック層の厚さとから、誘電体セラミックのεｒを算出した。The capacitance (C) of 20 multilayer ceramic capacitors for each sample was measured using an impedance analyzer (manufactured by Agilent Technologies: HP4194A) at a temperature of 25 ± 2 ° C., a voltage of 1 V rms , and a frequency of 1 kHz. The voltage was applied and measured, and the average value was obtained. Ε r of the dielectric ceramic was calculated from the obtained average value of C, the area of the internal electrode, and the thickness of the dielectric ceramic layer obtained above.

＜積層セラミックコンデンサの高温負荷信頼性の測定＞
上記のようにして作製した試料番号１〜３２の試料に係る積層セラミックコンデンサを、各試料で１００個ずつ準備した。<Measurement of high temperature load reliability of multilayer ceramic capacitors>
100 multilayer ceramic capacitors according to the samples Nos. 1 to 32 prepared as described above were prepared for each sample.

各試料に係る１００個の積層セラミックコンデンサについて、エンジンのシリンダーヘッド付近に搭載されるＥＣＵに用いられることを想定し、温度２００℃で、電圧が１５０Ｖの直流電圧を印加した高温負荷試験を行ない、それらの抵抗値の経時変化を測定した。誘電体セラミック層に印加された電界強度は、上記で得られた誘電体セラミック層の厚さと印加電圧とから計算すると、１５ｋＶ／ｍｍとなる。各試料に係る１００個の積層セラミックコンデンサについて、抵抗値が１ＭΩ以下になった時間を故障時間とし、故障時間のワイブル解析から、各試料のＭＴＴＦを求めた。   Assuming that 100 multilayer ceramic capacitors related to each sample are used in an ECU mounted near the cylinder head of an engine, a high temperature load test is performed by applying a DC voltage of 150 V at a temperature of 200 ° C., The change over time in the resistance values was measured. The electric field strength applied to the dielectric ceramic layer is 15 kV / mm when calculated from the thickness of the dielectric ceramic layer obtained above and the applied voltage. With respect to 100 multilayer ceramic capacitors according to each sample, the time when the resistance value became 1 MΩ or less was defined as a failure time, and the MTTF of each sample was obtained from the Weibull analysis of the failure time.

焼成後の誘電体セラミック層に含まれる元素の種類および元素の量と、εｒと、高温負荷試験におけるＭＴＴＦの測定結果とを、表１にまとめて示す。The amount of types and elements of elements contained in the dielectric ceramic layer after firing, and epsilon r, and the measurement results of the MTTF in high-temperature load test, are summarized in Table 1.

Figure 0006135758
表１において、試料番号に＊を付したものは、この発明に係る積層セラミックコンデンサの誘電体セラミック層に含まれる元素の種類または元素の量の条件から外れた試料である。
Figure 0006135758
 In Table 1, the sample number marked with * is a sample that deviates from the condition of the type of element or the amount of element contained in the dielectric ceramic layer of the multilayer ceramic capacitor according to the present invention.

表１に示すように、誘電体セラミック層に含まれる元素の種類および元素の量が、この発明の条件を満たす各試料においては、上記の条件で高温負荷試験を行なった場合、ＭＴＴＦが８０時間以上になるという優れた高温負荷信頼性を有し、誘電体セラミックのεｒが６００以上であることが確認された。As shown in Table 1, when the high temperature load test was performed under the above conditions for each sample in which the kind of element and the amount of the element contained in the dielectric ceramic layer satisfy the conditions of the present invention, the MTTF was 80 hours. It was confirmed that the dielectric ceramic had ε r of 600 or more with excellent high-temperature load reliability.

これに対し、誘電体セラミック層に含まれる元素の種類または元素の量が、この発明の条件を満たさない試料においては、高温負荷信頼性またはεｒの、少なくともいずれかにおいて好ましくない結果となることが確認された。On the other hand, in the sample in which the kind or amount of the element contained in the dielectric ceramic layer does not satisfy the conditions of the present invention, an unfavorable result is obtained in at least one of high temperature load reliability and ε r. Was confirmed.

ここで、この発明において、誘電体セラミック層に含まれる希土類元素としてＬａが選択される理由を以下に説明する。   Here, the reason why La is selected as the rare earth element contained in the dielectric ceramic layer in the present invention will be described below.

この発明におけるペロブスカイト型化合物において、Ｂａ２＋およびＳｒ２＋は、いわゆるＡサイト（Ｏ２−の配位数が１２となる箇所）に位置する。この場合の各イオンのイオン半径は、Ｂａ２＋が１６１ｐｍ、Ｓｒ２＋が１４４ｐｍであり、Ａサイトに位置するＳｒ２＋の割合が大きくなるにつれ、Ａサイトの平均イオン半径は小さくなる。In the perovskite type compound according to the present invention, Ba 2+ and Sr 2+ are located at the so-called A site (where the coordination number of O 2− is 12). In this case, the ion radius of each ion is 161 pm for Ba 2+ and 144 pm for Sr 2+ , and the average ionic radius at the A site decreases as the ratio of Sr 2+ located at the A site increases.

ところで、Ｏ２−の配位数が１２である場合、Ｌａ３＋のイオン半径は１３６ｐｍである。ペロブスカイト化合物が純粋なＢａＴｉＯ３である場合には、Ｌａ３＋とＢａ２＋とのイオン半径の差が大きいため、Ｌａ３＋はＡサイトに入りにくい。By the way, when the coordination number of O 2− is 12, the ionic radius of La 3+ is 136 pm. When the perovskite compound is pure BaTiO 3 , the difference in ionic radius between La 3+ and Ba 2+ is large, so that La 3+ hardly enters the A site.

しかしながら、Ｓｒの量をこの発明の範囲内とした場合には、Ａサイトの平均イオン半径がＬａ３＋のイオン半径に近づき、Ｌａ３＋はＡサイトに入りやすくなる。However, when the amount of Sr in the range of this invention, the average ionic radius of A site closer to the ionic radius of La 3+, La 3+ can easily enter the A-site.

Ｌａ３＋がＢａ２＋またはＳｒ２＋を置換してＡサイトに位置した場合、電気的中性条件を満足させるため、負の電荷を有する陽イオン空孔が生成する。この陽イオン空孔は、高温負荷試験において絶縁性を劣化させる酸素イオンの移動を抑制する。その結果、高温負荷信頼性が向上すると推測される。When La 3+ replaces Ba 2+ or Sr 2+ and is located at the A site, a positive cation vacancy having a negative charge is generated in order to satisfy the electrical neutral condition. The cation vacancies suppress the movement of oxygen ions that degrade the insulation in a high temperature load test. As a result, it is estimated that the high temperature load reliability is improved.

一方、例えばＮｄ３＋のイオン半径は１２７ｐｍであり、Ｓｒの量をこの発明の範囲内とした場合では、Ａサイトの平均イオン半径とＮｄ３＋のイオン半径との差がまだ大きい。On the other hand, for example, the ionic radius of Nd 3+ is 127 pm, and when the amount of Sr is within the range of the present invention, the difference between the average ionic radius of the A site and the ionic radius of Nd 3+ is still large.

すなわち、Ｌａ３＋の場合とは異なり、Ｎｄ３＋がＡサイトに入りやすい状態とはなっていないため、上記のメカニズムが働かず、試料番号２４に示すように、高温負荷試験における絶縁性の劣化が著しいと推測される。That is, unlike the case of La 3+ , Nd 3+ is not in a state where it easily enters the A site. Therefore, the above mechanism does not work, and as shown in sample number 24, the insulation deterioration in the high temperature load test is not achieved. Presumed to be remarkable.

この高温負荷試験における絶縁性の劣化は、Ｎｄ３＋よりイオン半径が小さく、さらにＡサイトに入りにくいＧｄ３＋では、試料番号２５に示すように、さらに顕著となる。As shown in sample number 25, the deterioration of the insulation in this high-temperature load test becomes more prominent with Gd 3+ having an ion radius smaller than that of Nd 3+ and less likely to enter the A site.

Ｎｄ３＋をＡサイトに位置させるためには、Ｓｒの量を増加させることにより、Ａサイトの平均イオン半径をさらに小さくすればよいが、試料番号１０に示すように、誘電体セラミックのεｒが小さくなるため好ましくない。In order to position Nd 3+ at the A site, the average ionic radius of the A site may be further reduced by increasing the amount of Sr. However, as shown in sample number 10, the ε r of the dielectric ceramic is Since it becomes small, it is not preferable.

したがって、高温負荷信頼性と誘電体セラミックのεｒとを両立させるため、誘電体セラミック層に含まれる希土類元素としてＬａが選択される。Therefore, La is selected as the rare earth element contained in the dielectric ceramic layer in order to achieve both high temperature load reliability and ε r of the dielectric ceramic.

上記の実験例では、誘電体セラミック層に含まれる元素の量の分析を行なうため、各試料に係る積層セラミックコンデンサの外部電極を除去した後のコンデンサ本体を酸により溶解し、既知である内部電極に含まれる元素を除いたものを、誘電体セラミック層を溶解処理した溶液をＩＣＰ発光分光分析した結果と見なした。   In the above experimental example, in order to analyze the amount of elements contained in the dielectric ceramic layer, the capacitor body after removing the external electrode of the multilayer ceramic capacitor according to each sample is dissolved with an acid, and the known internal electrode The element excluding the element contained in the sample was regarded as the result of ICP emission spectroscopic analysis of the solution obtained by dissolving the dielectric ceramic layer.

これに替えて、例えばコンデンサ本体から誘電体セラミック層を剥離するなどの方法により、誘電体セラミック層を内部電極と分離して取り出した後、酸により溶解し、ＩＣＰ発光分光分析を行なうようにしてもよい。   Instead, the dielectric ceramic layer is separated from the internal electrode by, for example, a method such as peeling the dielectric ceramic layer from the capacitor body, and then dissolved with an acid to perform ICP emission spectroscopic analysis. Also good.

なお、この発明は上記実施形態に限定されるものではなく、コンデンサ本体を構成する誘電体セラミック層や内部電極の層数、誘電体セラミックの組成などに関し、この発明の範囲内において種々の応用、変形を加えることが可能である。   The present invention is not limited to the above-described embodiment, and various applications within the scope of the present invention relate to the number of dielectric ceramic layers and internal electrodes constituting the capacitor body, the composition of the dielectric ceramic, etc. It is possible to add deformation.

１ 積層セラミックコンデンサ、２ コンデンサ本体、３ 誘電体セラミック層、４，５ 内部電極、６，７ コンデンサ本体の端面、８，９ 外部電極。   DESCRIPTION OF SYMBOLS 1 Multilayer ceramic capacitor, 2 capacitor | condenser main body, 3 dielectric ceramic layers, 4,5 internal electrode, 6,7 End surface of a capacitor | condenser main body, 8,9 external electrode

Claims (1)

積層された複数の誘電体セラミック層と、前記誘電体セラミック層間の界面に沿って形成された複数の内部電極とをもって構成される、コンデンサ本体と、
前記コンデンサ本体の外表面上の互いに異なる位置に形成され、かつ前記内部電極に電気的に接続される、複数の外部電極と
を備える積層セラミックコンデンサであって、
前記誘電体セラミック層が、元素として、Ｂａと、Ｓｒと、Ｌａと、Ｔｉと、Ｚｒと、Ｍ（ただし、ＭはＭｇ、Ａｌ、ＭｎおよびＶから選ばれる少なくとも１種類の元素）と、Ｓｉとを含み、かつ、化合物として、Ｂａと、Ｓｒと、Ｌａと、Ｔｉと、Ｚｒとを含んで構成される、ペロブスカイト型化合物を含み、
前記誘電体セラミック層に含まれる元素の量をモル部で表した場合、Ｔｉの量とＺｒの量との合計を１００としたときに、
Ｓｒの量ａが５．０≦ａ≦２０．０、
Ｌａの量ｂが０．５≦ｂ≦１．９、
Ｚｒの量ｃが３０≦ｃ≦４０、
Ｍの量ｄが０．５≦ｄ≦３．０、
Ｓｉの量ｅが０．５≦ｅ≦３．０、および
Ｂａの量とＳｒの量とＬａの量との合計の、Ｔｉの量とＺｒの量との合計に対する比ｍが０．９９０≦ｍ≦１．０５０の各条件を満たす、積層セラミックコンデンサ。 A capacitor body comprising a plurality of laminated dielectric ceramic layers and a plurality of internal electrodes formed along an interface between the dielectric ceramic layers;
A multilayer ceramic capacitor comprising a plurality of external electrodes formed at different positions on the outer surface of the capacitor body and electrically connected to the internal electrodes,
The dielectric ceramic layer includes, as elements, Ba, Sr, La, Ti, Zr, M (where M is at least one element selected from Mg, Al, Mn and V), Si And a perovskite type compound composed of Ba, Sr, La, Ti, and Zr as a compound,
When the amount of elements contained in the dielectric ceramic layer is expressed in mole parts, when the sum of the amount of Ti and the amount of Zr is 100,
The amount a of Sr is 5.0 ≦ a ≦ 20.0,
The amount b of La is 0.5 ≦ b ≦ 1.9,
The amount c of Zr is 30 ≦ c ≦ 40,
The amount d of M is 0.5 ≦ d ≦ 3.0,
Si amount e is 0.5 ≦ e ≦ 3.0, and the ratio m of the sum of Ba amount, Sr amount and La amount to the sum of Ti amount and Zr amount is 0.990 ≦ A multilayer ceramic capacitor satisfying each condition of m ≦ 1.050.
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