JP6104093B2 - Signal correction device - Google Patents
Signal correction device Download PDFInfo
- Publication number
- JP6104093B2 JP6104093B2 JP2013164243A JP2013164243A JP6104093B2 JP 6104093 B2 JP6104093 B2 JP 6104093B2 JP 2013164243 A JP2013164243 A JP 2013164243A JP 2013164243 A JP2013164243 A JP 2013164243A JP 6104093 B2 JP6104093 B2 JP 6104093B2
- Authority
- JP
- Japan
- Prior art keywords
- value
- voltage
- conversion
- converting
- reference value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Description
本発明は、モータの制御に係るデジタル信号を補正する信号補正装置に関する。 The present invention relates to a signal correction apparatus that corrects a digital signal related to motor control.
ＤＣブラシレスモータ（以下、「モータ」と略記）の制御装置に含まれるマイコンには、例えば、電源であるバッテリの電圧値及びモータの巻線に印加する電圧を生成する駆動回路を流れる電流の電流値等のアナログ信号が入力される。マイコンはデジタル信号に基づいて制御を行うので、上記のアナログ信号はＡＤ変換器によってデジタル信号に変換される。 For example, a microcomputer included in a control device of a DC brushless motor (hereinafter abbreviated as “motor”) includes a current value of a current flowing through a drive circuit that generates a voltage value of a battery as a power source and a voltage applied to a winding of the motor. An analog signal such as a value is input. Since the microcomputer performs control based on the digital signal, the analog signal is converted into a digital signal by the AD converter.
バッテリの電圧値は、例えば図８示した分圧回路による電圧検出回路、又は図１０に示した分圧回路に逆接防止のダイオードＤ１が接続された電圧検出回路によって検出される。また、駆動回路の電流値は、例えば図１１に示した差動増幅回路による電流検出回路によって検出される。これら電圧検出回路及び電流検出回路には抵抗等の素子が複数実装されているが、これらの素子の特性に誤差があると電圧検出回路及び電流検出回路の各々の検出結果に影響が生じる。 The voltage value of the battery is detected by, for example, a voltage detection circuit using a voltage dividing circuit shown in FIG. 8 or a voltage detection circuit in which a diode D1 for preventing reverse connection is connected to the voltage dividing circuit shown in FIG. Further, the current value of the drive circuit is detected by a current detection circuit using a differential amplifier circuit shown in FIG. 11, for example. A plurality of elements such as resistors are mounted on the voltage detection circuit and the current detection circuit. If there is an error in the characteristics of these elements, the detection results of the voltage detection circuit and the current detection circuit are affected.
図９は、図８に示した電圧検出回路の各抵抗の誤差の影響を示した図である。抵抗Ｒ１の抵抗値を７Ｒ、抵抗Ｒ２の抵抗値をＲとし、各抵抗値の誤差が各々±５％の場合、ゲインは誤差なしの場合の中心値が０．１２５なのに対して、最小値は０．１１４、最大値は０．１３６になる。また、図１０に示した分圧回路に逆接防止のダイオードＤ１を接続した場合は、ダイオードＤ１の順方向電圧分、電圧が降下して図９に示したゲインに対してさらに影響を与える。 FIG. 9 is a diagram showing the influence of the error of each resistor of the voltage detection circuit shown in FIG. When the resistance value of the resistor R1 is 7R, the resistance value of the resistor R2 is R, and the error of each resistance value is ± 5% respectively, the center value when there is no error is 0.125, whereas the minimum value is 0.114 and the maximum value is 0.136. When the diode D1 for preventing reverse connection is connected to the voltage dividing circuit shown in FIG. 10, the voltage drops by the forward voltage of the diode D1 and further affects the gain shown in FIG.
図１２は、図１１に示した電流検出回路の各抵抗の誤差の影響を示した図である。図１２は、シャント抵抗Ｒ１０の抵抗値をｒ、抵抗Ｒ１１の抵抗値をＲ１、抵抗Ｒ１２の抵抗値をＲ２、抵抗Ｒ１３の抵抗値をＲ３、抵抗Ｒ１４の抵抗値をＲ４とし、各抵抗値の誤差が各々±５％で、かつ差動増幅のゲインが１０倍の場合を示している。その結果、誤差なしの場合であるゲインの中心値が１０なのに対して、最小値は７．８５、最大値は１２．７になる。 FIG. 12 is a diagram showing the influence of the error of each resistor of the current detection circuit shown in FIG. In FIG. 12, the resistance value of the shunt resistor R10 is r, the resistance value of the resistor R11 is R1, the resistance value of the resistor R12 is R2, the resistance value of the resistor R13 is R3, and the resistance value of the resistor R14 is R4. It shows a case where the error is ± 5% and the differential amplification gain is 10 times. As a result, the center value of the gain in the case of no error is 10, whereas the minimum value is 7.85 and the maximum value is 12.7.
上記の電圧検出回路又は電流検出回路の誤差に加えて、ＡＤ変換器の誤差も変換結果であるデジタル信号に影響する。特許文献１には、所定のチャンネルに校正用電圧を印加してＡＤ変換器のデジタル変換特性の補正処理をする電子制御装置が開示されている。 In addition to the error of the voltage detection circuit or the current detection circuit, the error of the AD converter also affects the digital signal that is the conversion result. Patent Document 1 discloses an electronic control device that corrects digital conversion characteristics of an AD converter by applying a calibration voltage to a predetermined channel.
しかしながら、特許文献１に記載の電子制御装置は、動作時とは異なるチャンネルを使用して上記の補正処理を行うため、電圧検出回路又は電流検出回路等の動作時に使用するアナログセンサ類の誤差は補正されないという問題点があった。 However, since the electronic control device described in Patent Document 1 performs the above correction process using a channel different from that at the time of operation, the error of the analog sensors used during the operation of the voltage detection circuit or the current detection circuit is not. There was a problem that it was not corrected.
本発明は上記に鑑みてなされたもので、ＡＤ変換器の誤差及び当該ＡＤ変換器に接続された回路の素子に起因する誤差を補正する信号補正装置を提供することを目的とする。 The present invention has been made in view of the above, and an object of the present invention is to provide a signal correction apparatus that corrects an error of an AD converter and an error caused by an element of a circuit connected to the AD converter.
前記課題を解決するために、請求項１に記載の信号補正装置は、電源の電圧値又は前記電源と回路との間の電流値を検知する検知手段と、前記検知手段が検知した電圧値又は電流値をデジタル信号に変換するＡＤ変換手段と、前記ＡＤ変換手段に前記検知手段が接続された状態でかつ前記検知手段が複数の所定の状態で安定した時に検知した電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した複数の基準値として予め記憶した記憶手段と、前記複数の所定の状態での電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した複数の実測値と前記複数の基準値との対応関係から算出した線形式の変数項に前記ＡＤ変換手段が変換した電流値又は電圧値の実測値のデジタル信号を代入して前記ＡＤ変換手段が変換した電流値又は電圧値の実測値のデジタル信号を前記基準値に基づいて補正する補正手段と、を備えている。
In order to solve the above-mentioned problem, the signal correction device according to claim 1, a detection unit that detects a voltage value of a power supply or a current value between the power supply and the circuit, and a voltage value detected by the detection unit or AD conversion means for converting a current value into a digital signal, and a voltage value or a current value detected when the detection means is connected to the AD conversion means and the detection means is stabilized in a plurality of predetermined states. Storage means stored in advance as a plurality of reference values converted into digital signals by the AD conversion means, and a plurality of actually measured values obtained by converting the voltage values or current values in the plurality of predetermined states into digital signals. current value the AD conversion unit has converted by substituting the digital signal of the measured value of the corresponding current said AD conversion means to the variable term of the calculated linear equation is converted from the relationship or the voltage value of said plurality of reference values also And a, a correction means for correcting, based digital signal of the measured value of the voltage value to the reference value.
この信号補正装置は、ＡＤ変換手段に検知手段が接続された状態で予め決定した基準値に基づいて信号を補正するので、ＡＤ変換手段の誤差及び当該ＡＤ変換手段に接続された回路の素子に起因する誤差を補正できる。 Since this signal correction apparatus corrects a signal based on a reference value determined in advance with the detection means connected to the AD conversion means, the error of the AD conversion means and the circuit elements connected to the AD conversion means are corrected. The resulting error can be corrected.
請求項２に記載の発明は、請求項１に記載の信号補正装置において、前記記憶手段に予め記憶されている前記基準値は、前記検知手段が第１の所定の状態で安定した時に検知した電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した第１の基準値と、前記検知手段が第１の所定の状態とは異なった第２の所定の状態で安定した時に検知した電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した第２の基準値と、を含み、前記補正手段は、前記第１の所定の状態での電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した実測値と、前記第１の基準値と、前記第２の所定の状態での電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した実測値と、前記第２の基準値とから前記線形式を算出する。
According to a second aspect of the present invention, in the signal correction device according to the first aspect, the reference value stored in advance in the storage unit is detected when the detection unit is stabilized in the first predetermined state. A first reference value obtained by converting the voltage value or the current value into a digital signal by the AD conversion unit, and a voltage detected when the detection unit is stabilized in a second predetermined state different from the first predetermined state. seen containing a second reference value the value or current value AD conversion means is converted into a digital signal, wherein the correction means, the first of said AD converting means a voltage value or a current value in a predetermined state Measured value converted into a digital signal, the first reference value, the voltage value or current value in the second predetermined state converted into a digital signal by the AD converter, and the second The linear form is calculated from the reference value .
この信号補正装置によれば、第１の基準及び第２の基準値の異なる２つの基準値に係る線形の関係を導出でき、かかる線形の関係に基づいてＡＤ変換手段が出力したデジタル信号を補正できる。 According to this signal correction apparatus, it is possible to derive a linear relationship between two reference values different in the first reference value and the second reference value, and correct the digital signal output from the AD conversion unit based on the linear relationship. it can.
請求項３の発明は、請求項２に記載の信号補正装置において、前記第２の所定の状態は、前記第１の所定の状態に対して２倍の状態である。 According to a third aspect of the present invention, in the signal correction apparatus according to the second aspect, the second predetermined state is twice as large as the first predetermined state.
この信号補正装置によれば、第２の基準値に係る第２の所定の状態は、第１の基準値に係る第１の所定の状態に対して２倍であることから、前述の線形の関係を簡略化でき、ＡＤ変換手段が出力したデジタル信号の補正を簡易迅速に行うことができる。 According to this signal correction apparatus, since the second predetermined state related to the second reference value is twice the first predetermined state related to the first reference value, The relationship can be simplified, and the digital signal output from the AD conversion means can be corrected easily and quickly.
請求項４の発明は、請求項１〜３のいずれか１項に記載の信号補正装置において、前記基準値が所定の公差以内の場合に前記基準値を前記記憶手段に記憶させる制御手段をさらに備える。 According to a fourth aspect of the present invention, there is provided the signal correction apparatus according to any one of the first to third aspects, further comprising a control unit that causes the storage unit to store the reference value when the reference value is within a predetermined tolerance. Prepare.
この信号補正装置によれば、公差内の基準値のみを記憶し使用することで、ＡＤ変換手段が出力したデジタル信号の補正を的確に行うことができる。 According to this signal correction apparatus, it is possible to accurately correct the digital signal output from the AD conversion means by storing and using only the reference value within the tolerance.
請求項５の発明は、請求項１〜４のいずれか１項に記載の信号補正装置において、前記記憶手段は、前記複数の所定の状態での前記ＡＤ変換手段の仕様に基づく複数のデジタル信号を理想値としてさらに記憶し、前記補正手段は、前記基準値が前記記憶手段に記憶されていない場合又は前記基準値が所定の公差の範囲を超える場合に前記複数の所定の状態での電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した複数の実測値と前記複数の理想値との対応関係から算出した線形式の変数項に前記ＡＤ変換手段が変換した電流値又は電圧値の実測値のデジタル信号を代入して前記ＡＤ変換手段が変換した電流値又は電圧値の実測値のデジタル信号を前記理想値に基づいて補正する。 According to a fifth aspect of the present invention, in the signal correction device according to any one of the first to fourth aspects, the storage means is a plurality of digital signals based on specifications of the AD conversion means in the plurality of predetermined states. the further stores as an ideal value, the correction means, the voltage value when not stored or the reference value to the reference value said storage means in the plurality of predetermined state when exceeding the range of the predetermined tolerance Alternatively, the current value or voltage value converted by the AD conversion means into a linear variable term calculated from a correspondence relationship between a plurality of actual values converted into digital signals by the AD conversion means and the plurality of ideal values. the AD converting means by substituting the digital signal of the measured value is corrected based on a digital signal of the measured value of the converted current value or voltage value to the ideal value.
この信号補正装置によれば、基準値が記憶されていない場合又は基準値が適切でない場合であっても、ＡＤ変換手段の仕様に基づく理想値を用いてデジタル信号を補正することができる。 According to this signal correction apparatus, even if the reference value is not stored or the reference value is not appropriate, the digital signal can be corrected using the ideal value based on the specification of the AD conversion means.
請求項６の発明は、請求項１〜５のいずれか１項に記載の信号補正装置において、前記記憶手段は、前記基準値を記憶する領域の他に、前記基準値が記憶されたことを示すフラグを記憶する領域を有する。 The invention of claim 6 is the signal correction apparatus according to any one of claims 1 to 5, wherein the storage means stores the reference value in addition to the area for storing the reference value. It has an area for storing a flag to indicate.
この信号補正装置によれば、フラグがオン状態か否かを確認して記憶手段に基準値が記憶されているか否かを判定した上でその後の処理を実行するので、記憶手段に基準値を書き込む処理及び記憶手段から基準値を読み込む処理を迅速に行うことができる。 According to this signal correction apparatus, since it is determined whether or not the flag is turned on and whether or not the reference value is stored in the storage means and the subsequent processing is executed, the reference value is stored in the storage means. The writing process and the process for reading the reference value from the storage means can be performed quickly.
図１は、本実施の形態に係る信号補正装置を備えたモータ制御装置１０と電源８０とモータ５４と検査装置９０の概略図である。図１の本実施の形態に係る信号補正装置を備えたモータ制御装置１０は、電源８０の電力からモータのコイルに印加する電圧を制御するためのものであり、モータ５４に印加する電圧を生成する駆動回路２０と、駆動回路２０を制御制御するマイコン３０と、駆動回路２０と電源８０との間の電流を検知する電流検出回路５０と、電源８０の電圧を検知する電源電圧検出回路５２とを含む。電源８０は、通常は車両のバッテリ等であるが、検査時には、検査装置９０からの制御により電圧が可変の電源を使用する。 FIG. 1 is a schematic diagram of a motor control device 10, a power supply 80, a motor 54, and an inspection device 90 that include a signal correction device according to the present embodiment. The motor control device 10 provided with the signal correction device according to the present embodiment of FIG. 1 is for controlling the voltage applied to the motor coil from the power of the power supply 80, and generates the voltage applied to the motor 54. A drive circuit 20 that controls the drive circuit 20, a current detection circuit 50 that detects a current between the drive circuit 20 and the power supply 80, and a power supply voltage detection circuit 52 that detects the voltage of the power supply 80. including. The power source 80 is usually a vehicle battery or the like, but at the time of inspection, a power source having a variable voltage is used under the control of the inspection device 90.
駆動回路２０は、ＦＥＴ（Field Effect Transistor）等の素子のスイッチングによりモータ５４のコイルに印加する電圧を生成するインバータ回路であり、マイコン３０からの指示に基づいて動作する。 The drive circuit 20 is an inverter circuit that generates a voltage to be applied to the coil of the motor 54 by switching an element such as an FET (Field Effect Transistor), and operates based on an instruction from the microcomputer 30.
マイコン３０は、駆動回路２０を制御する集積回路の一種であり、電流検出回路５０及び電源電圧検出回路５２と共に本実施の形態に係る信号補正装置を構成する。マイコン３０は、電流検出回路５０が検知した電流値及び電源電圧検出回路５２が検知した電圧値をデジタル信号に変換するＡＤ変換器３２と、動作を司るＣＰＵ（Central Processing Unit）と、駆動回路２０に駆動波形及び印加する電圧に係る指示を出力する出力Ｉ／Ｆ４０とを含む。 The microcomputer 30 is a kind of integrated circuit that controls the drive circuit 20 and constitutes the signal correction apparatus according to the present embodiment together with the current detection circuit 50 and the power supply voltage detection circuit 52. The microcomputer 30 includes an AD converter 32 that converts the current value detected by the current detection circuit 50 and the voltage value detected by the power supply voltage detection circuit 52 into a digital signal, a CPU (Central Processing Unit) that controls the operation, and the drive circuit 20. Includes an output I / F 40 that outputs an instruction relating to a drive waveform and an applied voltage.
本実施の形態では、電流検出回路５０が検知した電流値はマイコン３０のチャンネルＣｈ１を、電源電圧検出回路５２が検知した電圧値はマイコン３０のチャンネルＣｈ０を、各々介してＡＤ変換器３２に入力される。このほかにも、モータ５４のロータの回転を検知してモータ５４の回転速度及びロータの位置を検出する構成、及びモータ５４の回転速度を変更するのに必要な電圧を決定する構成等の公知の技術を含むが、それらの説明は省略する。 In the present embodiment, the current value detected by the current detection circuit 50 is input to the AD converter 32 via the channel Ch1 of the microcomputer 30 and the voltage value detected by the power supply voltage detection circuit 52 is input via the channel Ch0 of the microcomputer 30. Is done. In addition, a configuration for detecting the rotation of the rotor of the motor 54 to detect the rotation speed of the motor 54 and the position of the rotor, and a configuration for determining a voltage necessary for changing the rotation speed of the motor 54 are known. However, the description thereof is omitted.
また、マイコン３０は、製品出荷時に接続される検査装置９０からの指令が入力される入力Ｉ／Ｆ３４と不揮発メモリ３８とをさらに備える。検査装置９０は、電源電圧調整指令によって電源８０の電圧を第１の所定の状態である低電圧と第２の所定の状態である高電圧とに変更する。後述するように、本実施の形態では、検査装置９０が変更した電圧での電流検出回路５０及び電源電圧検出回路５２の各々の検知結果をＡＤ変換器３２がデジタル信号化した出力結果を基準値とする。 The microcomputer 30 further includes an input I / F 34 and a nonvolatile memory 38 to which a command from an inspection device 90 connected at the time of product shipment is input. The inspection device 90 changes the voltage of the power supply 80 to a low voltage that is a first predetermined state and a high voltage that is a second predetermined state in accordance with a power supply voltage adjustment command. As will be described later, in this embodiment, the output result obtained by converting the detection results of each of the current detection circuit 50 and the power supply voltage detection circuit 52 at the voltage changed by the inspection device 90 into a digital signal is a reference value. And
本実施の形態では、検査装置９０から入力Ｉ／Ｆ３４に入力された不揮発性メモリ書き込み指令に基づいてＣＰＵ３６が当該基準値を不揮発メモリ３８に記憶し、当該基準値に基づいて、モータ制御装置１０の動作時におけるＡＤ変換器３２の出力を補正する。 In the present embodiment, the CPU 36 stores the reference value in the nonvolatile memory 38 based on the nonvolatile memory write command input from the inspection device 90 to the input I / F 34, and the motor control device 10 based on the reference value. The output of the AD converter 32 during the operation is corrected.
不揮発メモリ３８は、一例としてＰＲＯＭ（Programmable Read Only Memory）、ＥＰＲＯＭ（Erasable Programmable Read Only Memory）、ＥＥＰＲＯＭ（Electrically Erasable Programmable Read-Only Memory）又はフラッシュメモリ等である。不揮発メモリ３８は、基準値を記憶する領域の他に、当該基準値が記憶されたことをオン状態で示すフラグを記憶する領域を有している。後述するように、ＣＰＵ３６は、当該フラグがオン状態の場合に不揮発メモリ３８に基準値が記憶されていると判定する。 The nonvolatile memory 38 is, for example, a PROM (Programmable Read Only Memory), an EPROM (Erasable Programmable Read Only Memory), an EEPROM (Electrically Erasable Programmable Read-Only Memory), or a flash memory. In addition to the area for storing the reference value, the nonvolatile memory 38 has an area for storing a flag indicating that the reference value is stored in an ON state. As will be described later, the CPU 36 determines that the reference value is stored in the nonvolatile memory 38 when the flag is on.
なお、電流検出回路５０は、一例として、図１１に示した差動増幅回路が用いられ、電源電圧検出回路５２は、一例として、図８又は図１０に示した分圧回路が用いられる。 As an example, the current detection circuit 50 uses the differential amplifier circuit shown in FIG. 11, and the power supply voltage detection circuit 52 uses the voltage dividing circuit shown in FIG. 8 or FIG. 10 as an example.
図２は、本実施の形態に係る信号補正装置の電源電圧値のＡＤ変換器３２の変換結果の実測値と理想値とを対比したグラフの一例である。図２は、横軸にＡＤ変換器３２の変換結果の実測値であるＡＤ＿ｌｏ及びＡＤ＿ｈｉをとり、縦軸にＡＤ変換結果の実測値であるＡＤ＿ｌｏ及びＡＤ＿ｈｉ並びに理想値としてＡＤ変換器の計算値であるＣａｌ＿ｌｏ及びＣａｌ＿ｈｉをとったものである。 FIG. 2 is an example of a graph comparing the measured value of the conversion result of the AD converter 32 of the power supply voltage value of the signal correction apparatus according to the present embodiment with the ideal value. FIG. 2 shows AD_lo and AD_hi which are actual measurement values of the AD converter 32 on the horizontal axis, and AD_lo and AD_hi which are actual measurement values of the AD conversion result on the vertical axis, and calculated values of the AD converter as ideal values. A certain Cal_lo and Cal_hi are taken.
ＡＤ＿ｌｏ及びＣａｌ＿ｌｏは電源電圧が低い状態でのＡＤ変換器３２の変換結果であり、ＡＤ＿ｈｉ及びＣａｌ＿ｈｉは電源電圧が高い状態でのＡＤ変換器３２の変換結果である。実測値と理想値とが一致するのであれば、ＡＤ＿ｌｏ＝Ｃａｌ＿ｌｏ、ＡＤ＿ｈｉ＝Ｃａｌ＿ｈｉとなり、図２のグラフは実線で示した理想状態となる。すなわち、オフセット（切片）がなく、傾きａ＝１の直線となる。 AD_lo and Cal_lo are the conversion results of the AD converter 32 when the power supply voltage is low, and AD_hi and Cal_hi are the conversion results of the AD converter 32 when the power supply voltage is high. If the measured value and the ideal value match, AD_lo = Cal_lo, AD_hi = Cal_hi, and the graph of FIG. 2 is in an ideal state indicated by a solid line. That is, there is no offset (intercept), and the straight line has an inclination a = 1.
しかしながら、実際には、ＡＤ＿ｌｏ≠Ｃａｌ＿ｌｏ、ＡＤ＿ｈｉ≠Ｃａｌ＿ｈｉなので、ＡＤ＿ｌｏとＣａｌ＿ｌｏとの対応及びＡＤ＿ｈｉとＣａｌ＿ｈｉとの対応は、点線で示した実際の状態となる。実際の状態では傾きは１ではなく、オフセットｂが生じる。本実施の形態では、実測値であるＡＤ＿ｌｏ及びＡＤ＿ｈｉを、図２の実際のグラフを示す線形式を用いて補正する。 However, in reality, AD_lo ≠ Cal_lo and AD_hi ≠ Cal_hi, so the correspondence between AD_lo and Cal_lo and the correspondence between AD_hi and Cal_hi are the actual states indicated by dotted lines. In an actual state, the inclination is not 1 and an offset b occurs. In the present embodiment, the measured values AD_lo and AD_hi are corrected using a line format indicating the actual graph of FIG.
図２の実際のグラフを示す線形式は以下のように誘導する。傾きａは式（１）、オフセットｂは式（２）で各々表される。 The line format showing the actual graph of FIG. 2 is derived as follows. The slope a is expressed by equation (1), and the offset b is expressed by equation (2).
式（１）、（２）を用いて図２の実際のグラフを示す線形式は、補正前のＡＤ変換結果（実測値）をＡＤ＿ｉｎ、補正後のＡＤ変換結果をＡＤ＿ｏｕｔとすると、下記の式（３）として表される。 2 using the equations (1) and (2), an AD conversion result (actually measured value) before correction is AD_in, and an AD conversion result after correction is AD_out. It is expressed as (3).
第２の所定の状態は、第１の所定の状態に対して２倍の状態であるとし、例えば、高電圧の場合は低電圧の２倍の電圧値であるとすると、Ｃａｌ＿ｈｉはＣａｌ＿ｌｏの２倍になり、Ｃａｌ＿ｈｉ−Ｃａｌ＿ｌｏ＝Ｃａｌ＿ｌｏとなる。したがって、式（３）は下記の式（４）に簡略化できる。 Assume that the second predetermined state is a state twice as large as the first predetermined state. For example, when the voltage is high, the voltage value is twice that of the low voltage. Double, Cal_hi-Cal_lo = Cal_lo. Therefore, equation (3) can be simplified to equation (4) below.
以下に補正に係る計算の一例を示す。以下の計算例は、図８に示した分圧回路を用いた電源電圧検出回路５２によって電圧を１／８に分圧し、０〜５Ｖの範囲で１２ビット（４０９６段階）の分解能を有するＡＤ変換器３２を使用して測定する場合とする。基準となる状態を、低電圧で８Ｖ、高電圧で１６Ｖとすると、上記のＡＤ変換器３２の仕様に基づく８Ｖの時のＡＤ変換計算値はＣａｌ＿ｌｏ＝８１９、１６Ｖの時のＡＤ変換計算値はＣａｌ＿ｈｉ＝１６８３になる。また、上記のＡＤ変換器３２の仕様に基づく１２Ｖの時のＡＤ変換計算値は１２２９である。これらのＡＤ変換計算値を理想値をとし、実測値であるＡＤ＿ｉｎが、８Ｖの時でＡＤ＿ｌｏ＝７９９、１６Ｖの時でＡＤ＿ｈｉ＝１２０９であるとする。また、１２Ｖの時の実測値をＡＤ＿ｉｎ＝１２０９とする。 An example of calculation related to correction is shown below. In the following calculation example, the voltage is divided into 1/8 by the power supply voltage detection circuit 52 using the voltage dividing circuit shown in FIG. 8, and AD conversion having a resolution of 12 bits (4096 steps) in the range of 0 to 5V. It is assumed that measurement is performed using the instrument 32. Assuming that the reference state is 8V for the low voltage and 16V for the high voltage, the AD conversion calculation value at 8V based on the specification of the AD converter 32 is Cal_lo = 819, and the AD conversion calculation value at 16V is Cal_hi = 1683. The AD conversion calculation value at 12 V based on the specification of the AD converter 32 is 1229. Assume that these AD conversion calculation values are ideal values, and AD_in, which is an actual measurement value, is 8V, AD_lo = 799, and 16V, AD_hi = 1209. Also, the measured value at 12V is AD_in = 1209.
上記のＡＤ＿ｉｎ、Ｃａｌ＿ｌｏ、Ｃａｌ＿ｈｉ、ＡＤ＿ｌｏ、ＡＤ＿ｈｉを式（４）に代入すると、計算結果は下記の通りになり、１２Ｖ時の実測値ＡＤ＿ｉｎは１２Ｖ時のＡＤ変換計算値に補正される。 When the above AD_in, Cal_lo, Cal_hi, AD_lo, and AD_hi are substituted into Equation (4), the calculation result is as follows, and the actually measured value AD_in at 12V is corrected to the AD conversion calculated value at 12V.
上記の一連の説明は電源電圧検出回路５２が検知した電源電圧値をＡＤ変換器３２で変換した実測値を補正した場合であるが、図１１に示した電流検出回路５０が検知した電流値を補正する場合も同様に式（３）又は式（４）を用いて補正できる。 The series of explanations above is a case where the actual value obtained by converting the power supply voltage value detected by the power supply voltage detection circuit 52 by the AD converter 32 is corrected. The current value detected by the current detection circuit 50 shown in FIG. Similarly, correction can be performed using equation (3) or equation (4).
図３は、本実施の形態に係る信号補正装置の検査時におけるＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉの不揮発メモリ３８への書き込み処理の一例を示すフローチャートである。ステップ３００では、不揮発メモリ３８から記憶フラグを読み出し、ステップ３０２で記憶フラグがＯＮか否かを判定し、肯定判定の場合には処理をリターンする。 FIG. 3 is a flowchart showing an example of a process of writing Cal_lo and Cal_hi to the nonvolatile memory 38 at the time of inspection of the signal correction apparatus according to the present embodiment. In step 300, the storage flag is read from the nonvolatile memory 38. In step 302, it is determined whether or not the storage flag is ON. If the determination is affirmative, the process returns.
ステップ３０２で否定判定の場合には、ステップ３０４でＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉとなるＡＤ変換結果を取得する。図５は、本実施の形態における信号補正装置の検査時におけるＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉの取得のタイミングを示す概略図である。図５では、検査装置９０の電源電圧調整指令によって第１の所定の状態である電源電圧が低い状態（８Ｖ）と第２の所定の状態である電源電圧が高い状態（１６Ｖ）とに各々調整される。そして、第１の所定の状態と第２の所定の状態との各々で電圧が安定した時に電源電圧検出回路５２が検知した電圧値のＡＤ変換結果をＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉとして各々取得する。図５は、電圧値のＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉを取得に係るものだが、電流値のＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉを取得する場合も同様である。具体的には、検査装置９０が電源８０の電圧を第１の所定の状態と第２の所定の状態とに各々調整した場合に、電源電圧又は電源８０と回路とを流れる電流が安定した時の電流値のＡＤ変換結果を電流値のＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉとして取得する。 In the case of negative determination in step 302, AD conversion results that are Cal_lo and Cal_hi are acquired in step 304. FIG. 5 is a schematic diagram showing the acquisition timing of Cal_lo and Cal_hi when the signal correction apparatus according to the present embodiment is inspected. In FIG. 5, the power supply voltage adjustment command of the inspection apparatus 90 is adjusted to a state where the power supply voltage in the first predetermined state is low (8V) and a power supply voltage which is the second predetermined state is high (16V). Is done. Then, the AD conversion results of the voltage values detected by the power supply voltage detection circuit 52 when the voltage is stabilized in each of the first predetermined state and the second predetermined state are acquired as Cal_lo and Cal_hi, respectively. FIG. 5 relates to obtaining the voltage values Cal_lo and Cal_hi, but the same applies to obtaining the current values Cal_lo and Cal_hi. Specifically, when the inspection device 90 adjusts the voltage of the power supply 80 to the first predetermined state and the second predetermined state, respectively, the power supply voltage or the current flowing through the power supply 80 and the circuit is stabilized. The AD conversion result of the current value is acquired as Cal_lo and Cal_hi of the current value.
なお、電流値のＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉを取得する場合に、Ｃａｌ＿ｈｉがＣａｌ＿ｌｏの２倍になるようにすれば、式（３）ではなく、簡略化された式（４）を用いて実測値を補正することができる。 In addition, when obtaining Cal_lo and Cal_hi of current values, if Cal_hi is set to be twice that of Cal_lo, the actual measurement value is corrected using simplified formula (4) instead of formula (3). be able to.
本実施の形態では、上記の８Ｖ時のＡＤ変換計算値及び１６Ｖ時のＡＤ変換計算値をデフォルトのＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉとして不揮発メモリ３８に予め保有している。かかるデフォルト値でも上記のように補正は可能であるが、各製品固有の誤差を吸収して補正するために、実際に補正で使用するＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉは、図５に示したように電源電圧が安定した時に取得したＡＤ変換結果を用いる。 In the present embodiment, the AD conversion calculation value at 8V and the AD conversion calculation value at 16V are stored in advance in the nonvolatile memory 38 as default Cal_lo and Cal_hi. Such default values can be corrected as described above. However, in order to absorb and correct the errors inherent in each product, Cal_lo and Cal_hi that are actually used for correction have the power supply voltage as shown in FIG. The AD conversion result acquired when it becomes stable is used.
ステップ３０６では取得したＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉをデフォルトのＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉと比較して公差範囲内か否かを判定する。公差は、一例としてデフォルト値に対して±５％とする。ステップ３０６で肯定判定の場合には、ステップ３０８で、取得したＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉを不揮発メモリ３８に記憶して処理をリターンする。ステップ３０６で否定判定の場合も処理をリターンする。 In step 306, the acquired Cal_lo and Cal_hi are compared with the default Cal_lo and Cal_hi to determine whether they are within the tolerance range. As an example, the tolerance is ± 5% of the default value. If the determination in step 306 is affirmative, the acquired Cal_lo and Cal_hi are stored in the nonvolatile memory 38 in step 308, and the process returns. If the determination in step 306 is negative, the process is also returned.
図４は、本実施の形態に係る信号補正装置の検査時における不揮発メモリ３８への記憶フラグの書き込み処理の一例を示すフローチャートである。ステップ４００では、不揮発メモリ３８から記憶フラグを読み出し、ステップ４０２で記憶フラグがＯＮか否かを判定し、肯定判定の場合には処理をリターンする。 FIG. 4 is a flowchart showing an example of a process of writing a storage flag to the nonvolatile memory 38 at the time of inspection of the signal correction apparatus according to the present embodiment. In step 400, the storage flag is read from the nonvolatile memory 38. In step 402, it is determined whether or not the storage flag is ON. If the determination is affirmative, the process returns.
ステップ４０２で否定判定の場合には、ステップ４０４でＣａｌ＿ｌｏが公差範囲内で書き込み済みか否かを判定し、肯定判定の場合には、ステップ４０６でＣａｌ＿ｈｉが公差範囲内で書き込み済みか否かを判定する。ステップ４０６で肯定判定の場合には、ステップ４０８で不揮発メモリ３８に記憶フラグＯＮを書き込んで処理をリターンする。ステップ４０４及びステップ４０６で否定判定の場合にも処理をリターンする。 If the determination in step 402 is negative, it is determined in step 404 whether or not Cal_lo has been written within the tolerance range. If the determination is affirmative, in step 406 whether or not Cal_hi has been written within the tolerance range. judge. If the determination in step 406 is affirmative, the storage flag ON is written in the nonvolatile memory 38 in step 408, and the process returns. The processing is also returned in the case of negative determination in step 404 and step 406.
以上のように、本実施の形態では、図３及び図４に示した処理によって、式（４）で使用するＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉを不揮発メモリ３８に記憶する。 As described above, in the present embodiment, Cal_lo and Cal_hi used in Expression (4) are stored in the nonvolatile memory 38 by the processing shown in FIGS.
図６は、本実施の形態に係る信号補正装置の実際の動作におけるＡＤ変換結果の補正処理の一例を示すフローチャートである。ステップ６００では、電流検出回路５０又は電源電圧検出回路５２が検知した結果をＡＤ変換器３２がデジタル信号に変換した変換結果をＡＤ＿ｉｎ、ＡＤ＿ｌｏ、ＡＤ＿ｈｉとして取得する。ステップ６００では、電源電圧が低い時、例えば８Ｖの時に取得した変換結果をＡＤ＿ｌｏ、電源電圧が高い時、例えば１６Ｖの時に取得した変換結果をＡＤ＿ｈｉ、電源電圧が中庸の電圧値の時、例えば１２Ｖの時に取得した変換結果をＡＤ＿ｉｎとする。 FIG. 6 is a flowchart showing an example of AD conversion result correction processing in the actual operation of the signal correction apparatus according to the present embodiment. In step 600, AD_in, AD_lo, and AD_hi are obtained as AD_in, AD_lo, and AD_hi obtained by converting the result detected by the current detection circuit 50 or the power supply voltage detection circuit 52 into a digital signal by the AD converter 32. In step 600, the conversion result acquired when the power supply voltage is low, for example, 8V is AD_lo, the conversion result acquired when the power supply voltage is high, for example, 16V, AD_hi, and the conversion result acquired when the power supply voltage is medium voltage value, for example, 12V Let AD_in be the conversion result obtained at the time.
ステップ６０２では、不揮発メモリ３８から基準値であるＣａｌ＿ｌｏの読出し処理を行い、ステップ６０４ではＣａｌ＿ｈｉの読出し処理を行う。図７は、本実施の形態に係る信号補正装置の不揮発メモリ３８からのＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉの読出し処理の一例を示すフローチャートである。ステップ７００では、不揮発メモリ３８から記憶フラグを読み出し、ステップ７０２で記憶フラグがＯＮか否かを判定し、肯定判定の場合にはステップ７０４で不揮発メモリ３８からＣａｌ＿ｌｏ、Ｃａｌ＿ｈｉの値を読み出す。 In step 602, the reference value Cal_lo is read from the nonvolatile memory 38, and in step 604, Cal_hi is read. FIG. 7 is a flowchart showing an example of a process for reading out Cal_lo and Cal_hi from the nonvolatile memory 38 of the signal correction apparatus according to the present embodiment. In step 700, the storage flag is read from the nonvolatile memory 38. In step 702, it is determined whether or not the storage flag is ON. In the case of an affirmative determination, the values of Cal_lo and Cal_hi are read from the nonvolatile memory 38 in step 704.
ステップ７０６では、読み出した値が公差範囲内か否かを判定する。公差は一例として上述のようにデフォルト値に対して±５％である。ステップ７０６で肯定判定の場合には、処理をリターンする。 In step 706, it is determined whether or not the read value is within a tolerance range. As an example, the tolerance is ± 5% with respect to the default value as described above. If the determination in step 706 is affirmative, the process returns.
ステップ７０２又はステップ７０６で否定判定の場合には、ステップ７０８でデフォルト値を読み出して処理をリターンする。 If the determination in step 702 or 706 is negative, the default value is read in step 708 and the process returns.
図６のステップ６０６では、図７に示したフローチャートで読み出したＣａｌ＿ｌｏ及びＣａｌ＿ｈｉ並びにステップ６００で取得したＡＤ＿ｉｎ、ＡＤ＿ｌｏ、ＡＤ＿ｈｉを式（３）又は式（４）に代入して補正値ＡＤ＿ｏｕｔを計算して処理をリターンする。 In step 606 of FIG. 6, the correction value AD_out is calculated by substituting Cal_lo and Cal_hi read out in the flowchart shown in FIG. 7 and AD_in, AD_lo, and AD_hi acquired in step 600 into Equation (3) or Equation (4). To return the processing.
以上説明したように、本実施の形態は、検査時に電流検出回路及び電源電圧検出回路５２がＡＤ変換器に接続された状態で決定した基準値に基づいて実際の作動時の電流検出回路及び電源電圧検出回路５２の各々の検知結果のＡＤ変換結果を補正する。かかる補正により、本実施の形態では、ＡＤ変換器の誤差及び当該ＡＤ変換器に接続された回路の素子に起因する誤差を補正することができる。 As described above, according to the present embodiment, the current detection circuit and power supply during actual operation are based on the reference value determined in a state where the current detection circuit and power supply voltage detection circuit 52 are connected to the AD converter at the time of inspection. The AD conversion result of each detection result of the voltage detection circuit 52 is corrected. With this correction, in this embodiment, an error of the AD converter and an error caused by an element of a circuit connected to the AD converter can be corrected.
１０・・・モータ制御装置、２０・・・駆動回路、３０・・・マイコン、３２・・・ＡＤ変換器、３４・・・入力Ｉ／Ｆ、３６・・・ＣＰＵ、３８・・・不揮発メモリ、４０・・・出力Ｉ／Ｆ、５０・・・電流検出回路、５２・・・電源電圧検出回路、５４・・・モータ、８０・・・電源、９０・・・検査装置、Ｃｈ０，Ｃｈ１・・・チャンネル、Ｄ１・・・ダイオード、Ｒ１，Ｒ２，Ｒ１１，Ｒ１２，Ｒ１３，Ｒ１４・・・抵抗、Ｒ１０・・・シャント抵抗 DESCRIPTION OF SYMBOLS 10 ... Motor control apparatus, 20 ... Drive circuit, 30 ... Microcomputer, 32 ... AD converter, 34 ... Input I / F, 36 ... CPU, 38 ... Nonvolatile memory 40 ... Output I / F, 50 ... Current detection circuit, 52 ... Power supply voltage detection circuit, 54 ... Motor, 80 ... Power supply, 90 ... Inspection device, Ch0, Ch1,. ..Channel, D1... Diode, R1, R2, R11, R12, R13, R14... Resistor, R10.
Claims (6)
前記検知手段が検知した電圧値又は電流値をデジタル信号に変換するＡＤ変換手段と、
前記ＡＤ変換手段に前記検知手段が接続された状態でかつ前記検知手段が複数の所定の状態で安定した時に検知した電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した複数の基準値として予め記憶した記憶手段と、
前記複数の所定の状態での電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した複数の実測値と前記複数の基準値との対応関係から算出した線形式の変数項に前記ＡＤ変換手段が変換した電流値又は電圧値の実測値のデジタル信号を代入して前記ＡＤ変換手段が変換した電流値又は電圧値の実測値のデジタル信号を前記基準値に基づいて補正する補正手段と、
を備えた信号補正装置。 Detecting means for detecting a voltage value of a power source or a current value between the power source and the circuit;
AD conversion means for converting the voltage value or current value detected by the detection means into a digital signal;
A plurality of reference values obtained by converting the voltage value or current value detected when the detection unit is connected to the AD conversion unit and the detection unit is stabilized in a plurality of predetermined states into digital signals by the AD conversion unit. Storage means stored in advance as
The AD conversion into a linear variable term calculated from a correspondence relationship between a plurality of actual values obtained by converting the voltage values or current values in the plurality of predetermined states into digital signals by the AD conversion means and the plurality of reference values Correction means for substituting the digital signal of the actual value of the current value or voltage value converted by the means and correcting the digital signal of the actual value of the current value or voltage value converted by the AD conversion means , based on the reference value ;
A signal correction apparatus comprising:
前記検知手段が第１の所定の状態で安定した時に検知した電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した第１の基準値と、
前記検知手段が第１の所定の状態とは異なった第２の所定の状態で安定した時に検知した電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した第２の基準値と、
を含み、
前記補正手段は、前記第１の所定の状態での電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した実測値と、前記第１の基準値と、前記第２の所定の状態での電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した実測値と、前記第２の基準値とから前記線形式を算出する請求項１に記載の信号補正装置。 The reference value stored in advance in the storage means is
A first reference value obtained by converting the voltage value or current value detected when the detection means is stabilized in the first predetermined state into a digital signal by the AD conversion means;
A second reference value obtained by converting the voltage value or the current value detected when the detection unit is stabilized in a second predetermined state different from the first predetermined state into a digital signal by the AD conversion unit;
Only including,
The correction means includes an actual measurement value obtained by converting the voltage value or current value in the first predetermined state into a digital signal by the AD conversion means, the first reference value, and the second predetermined state. The signal correction apparatus according to claim 1, wherein the linear form is calculated from an actual measurement value obtained by converting the voltage value or current value of the signal into a digital signal by the AD conversion unit and the second reference value .
前記補正手段は、前記基準値が前記記憶手段に記憶されていない場合又は前記基準値が所定の公差の範囲を超える場合に前記複数の所定の状態での電圧値又は電流値を前記ＡＤ変換手段がデジタル信号に変換した複数の実測値と前記複数の理想値との対応関係から算出した線形式の変数項に前記ＡＤ変換手段が変換した電流値又は電圧値の実測値のデジタル信号を代入して前記ＡＤ変換手段が変換した電流値又は電圧値の実測値のデジタル信号を前記理想値に基づいて補正する請求項１〜４のいずれか１項に記載の信号補正装置。 It said storage means further stores a plurality of digital signals based on the specifications of the AD converter in said plurality of predetermined state as the ideal value,
The correcting means converts the voltage value or current value in the plurality of predetermined states when the reference value is not stored in the storage means or when the reference value exceeds a predetermined tolerance range to the AD converting means. The digital signal of the actual value of the current value or voltage value converted by the AD conversion means is substituted into a linear variable term calculated from the correspondence between the plurality of actual values converted into digital signals and the plurality of ideal values. signal correction apparatus according to any one of claims 1 to 4, wherein the AD converting means is corrected based on a digital signal of the measured value of the converted current value or voltage value to the ideal value each.
6. The signal correction apparatus according to claim 1, wherein the storage unit includes an area for storing a flag indicating that the reference value is stored, in addition to the area for storing the reference value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013164243A JP6104093B2 (en) | 2013-08-07 | 2013-08-07 | Signal correction device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013164243A JP6104093B2 (en) | 2013-08-07 | 2013-08-07 | Signal correction device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2015035649A JP2015035649A (en) | 2015-02-19 |
| JP6104093B2 true JP6104093B2 (en) | 2017-03-29 |
Family
ID=52543904
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013164243A Expired - Fee Related JP6104093B2 (en) | 2013-08-07 | 2013-08-07 | Signal correction device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP6104093B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102074998B1 (en) * | 2019-01-29 | 2020-02-07 | 와이즈 브라더스 주식회사 | Automatic cooking apparatus of circulation type |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6589836B2 (en) * | 2016-11-25 | 2019-10-16 | 株式会社デンソー | Motor control device and motor drive system |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3371968B2 (en) * | 1992-01-21 | 2003-01-27 | セイコーエプソン株式会社 | Printer and printer control method |
| JP4074823B2 (en) * | 2003-03-05 | 2008-04-16 | 株式会社デンソー | A / D conversion output data non-linearity correction method and non-linearity correction apparatus |
| JP2006165737A (en) * | 2004-12-03 | 2006-06-22 | Keyence Corp | Analog signal processing apparatus |
| JP2006236207A (en) * | 2005-02-28 | 2006-09-07 | Denso Corp | Electronic controller for vehicle, and manufacturing method therefor |
| JP2006340042A (en) * | 2005-06-02 | 2006-12-14 | Mitsubishi Electric Corp | Calibration device and calibration method |
| JP2009089360A (en) * | 2007-09-13 | 2009-04-23 | Ricoh Co Ltd | A/d conversion controlling device, and image forming apparatus |
| JP4592796B2 (en) * | 2008-12-15 | 2010-12-08 | 三菱電機株式会社 | Electronic control unit with analog input signal |
| JP2010192973A (en) * | 2009-02-16 | 2010-09-02 | Hitachi High-Technologies Corp | Analog input and output circuit and vacuum processing apparatus |
| JP2011044920A (en) * | 2009-08-21 | 2011-03-03 | Denso Corp | A/d converting device |
-
2013
- 2013-08-07 JP JP2013164243A patent/JP6104093B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102074998B1 (en) * | 2019-01-29 | 2020-02-07 | 와이즈 브라더스 주식회사 | Automatic cooking apparatus of circulation type |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2015035649A (en) | 2015-02-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9991792B2 (en) | Current sensing with RDSON correction | |
| US9939469B2 (en) | Current measuring apparatus, image forming apparatus, conveyance apparatus and method for measuring current | |
| KR20170042747A (en) | Calibration of current sensors by means of a reference current during the current measurement | |
| JP4131393B2 (en) | Control device for electric power steering | |
| JP2010141807A (en) | Electronic control apparatus with analog input signal | |
| JP2009281881A (en) | Temperature correction method for current sensor device, power conversion device and power sensor device | |
| US20080284364A1 (en) | Electronically commutated asynchronous motor | |
| JP6104093B2 (en) | Signal correction device | |
| JP2016161276A (en) | Current sensor circuit | |
| US9170587B2 (en) | Current control semiconductor element and control device using the same | |
| JP2005106822A (en) | Method and arrangement for correction of evaluation of switching threshold of magnetic sensor | |
| JPWO2007055092A1 (en) | Encoder signal processing device | |
| KR101961224B1 (en) | Method for detecting current of variable load using a temperature coefficient of shunt registor | |
| JP6313150B2 (en) | Semiconductor device, battery monitoring system, and battery monitoring method | |
| JPS6255735B2 (en) | ||
| JP5999550B2 (en) | Adjustment circuit using nonvolatile memory and physical quantity sensor provided with the same | |
| JP2005326313A (en) | Circuit for detecting voltage fluctuations | |
| JP2001053608A (en) | A/d and d/a conversion circuit | |
| JPH0820075B2 (en) | Control device for combustion equipment | |
| US20140062539A1 (en) | Current controlled actuator driver with improved accuracy at low current | |
| JP2005263202A (en) | Electric power steering device | |
| JPH11118617A (en) | Temperature controller | |
| JP6394488B2 (en) | Sensor device | |
| WO2023181582A1 (en) | Sensor system | |
| JP4816656B2 (en) | Sensor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20151221 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20160728 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160809 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20161007 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20170221 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20170228 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 6104093 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
| R360 | Written notification for declining of transfer of rights |
Free format text: JAPANESE INTERMEDIATE CODE: R360 |
|
| R360 | Written notification for declining of transfer of rights |
Free format text: JAPANESE INTERMEDIATE CODE: R360 |
|
| R371 | Transfer withdrawn |
Free format text: JAPANESE INTERMEDIATE CODE: R371 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| LAPS | Cancellation because of no payment of annual fees |