JP6100750B2 - メモリおよびコントローラを備える装置およびデータ記憶装置を備える装置 - Google Patents
メモリおよびコントローラを備える装置およびデータ記憶装置を備える装置 Download PDFInfo
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- JP6100750B2 JP6100750B2 JP2014257314A JP2014257314A JP6100750B2 JP 6100750 B2 JP6100750 B2 JP 6100750B2 JP 2014257314 A JP2014257314 A JP 2014257314A JP 2014257314 A JP2014257314 A JP 2014257314A JP 6100750 B2 JP6100750 B2 JP 6100750B2
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Classifications
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Computer Security & Cryptography (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Memory System (AREA)
Description
いくつかの実施の形態において、装置は、第1のメモリと、第2のメモリと、第1のメモリおよび第2のメモリに結合されたコントローラとを備えることができる。コントローラは、第1のメモリの第1のデータ記憶領域に記憶されるべき第1のデータを受けるように構成されることができ、第1のデータは、第1のメモリから第2のメモリへと転送されるべき他のデータのインジケータを含み、コントローラは、第1のデータに基づいて第2のメモリに他のデータを保存するように構成されることができる。
以下の詳細な説明において、この詳細な説明の一部を形成し、図示によって示される添付の図面が参照される。この開示の範囲を逸脱することなく、さまざまな記述された実施の形態の特徴が組合せ可能であり、他の実施の形態が利用可能であり、構造的な変更がなされてもよい、ということが理解されるべきである。この開示の範囲を逸脱することなく、本明細書でのさまざまな実施の形態および実施例が組合わせ可能であり、交換可能であり、取除くことが可能である、ということが理解されるべきである。たとえば、以下の詳細な説明は、主にディスクドライブとフラッシュメモリとを参照するであろう。しかしながら、本明細書において記述される実施の形態は、如何なる種類のデータ記憶装置またはメモリ、または異なる種類のメモリの如何なる組合せにも適用可能である。いくつかの実施例において、1以上の異なる記憶特性を有する第1のメモリおよび第2のメモリを、たとえば第2のメモリタイプが第1のメモリタイプよりも高速のデータアクセス能力を有するように利用することができる。いくつかの実施形態において、たとえば単一レベルセル不揮発性ソリッドステートメモリおよびマルチレベルセル不揮発性ソリッドステートメモリ、または不揮発性ソリッドステートメモリおよび磁気ディスクメモリのように、異なるメモリ特性は、異なる構造の種類のメモリであってもよい。さまざまな構成において、メモリは、不揮発性ソリッドステートメモリ、揮発性ソリッドステートメモリ、磁気ディスクメモリ、他の種類のメモリ、またはそれらの如何なる組合せであってもよい。
Claims (3)
- 第1のメモリと、
第2のメモリと、
前記第1のメモリおよび前記第2のメモリに結合されるコントローラとを備え、
前記コントローラは、前記第1のメモリの第1のデータ記憶領域に記憶されるべき第1のデータを受取るように構成され、前記第1のデータは、前記第1のメモリから前記第2のメモリへと転送されるべき他のデータのインジケータを含み、
前記コントローラは、前記第1のデータに基づいて、前記第2のメモリに、前記他のデータを保存するように構成され、
前記第1のデータは、ヘッダを含み、
前記インジケータは、1以上の論理ブロックアドレス(LBA)であり、
前記ヘッダは、前記1以上のLBAに関連付けられた前記他のデータが、前記第2のメモリに記憶されるべきであることを示す第2のインジケータを含む、装置。 - 前記第1のデータ記憶領域は、前記第1のデータを保存するために予約されたパーティションである、ダイレクトヒントパーティションである、請求項1に記載の装置。
- 前記コントローラは、さらに、前記ダイレクトヒントパーティションの一意識別子を検索することによって、前記第1のデータ記憶領域を決定するように構成される、請求項2に記載の装置。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/136,483 US9436408B2 (en) | 2013-12-20 | 2013-12-20 | Direct hinting for a memory device |
US14/136,483 | 2013-12-20 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2015158902A JP2015158902A (ja) | 2015-09-03 |
JP6100750B2 true JP6100750B2 (ja) | 2017-03-22 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2014257314A Expired - Fee Related JP6100750B2 (ja) | 2013-12-20 | 2014-12-19 | メモリおよびコントローラを備える装置およびデータ記憶装置を備える装置 |
Country Status (2)
Country | Link |
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US (2) | US9436408B2 (ja) |
JP (1) | JP6100750B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9436408B2 (en) * | 2013-12-20 | 2016-09-06 | Seagate Technology Llc | Direct hinting for a memory device |
US11074004B2 (en) * | 2019-01-15 | 2021-07-27 | Intel Corporation | Tenant-based telemetry for persistent storage media |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002369147A (ja) * | 2001-06-11 | 2002-12-20 | Toshiba Corp | データ処理装置、データ処理方法 |
US7644239B2 (en) * | 2004-05-03 | 2010-01-05 | Microsoft Corporation | Non-volatile memory cache performance improvement |
JP2008027383A (ja) * | 2006-07-25 | 2008-02-07 | Toshiba Corp | 情報記録装置及びその制御方法 |
US8103844B2 (en) | 2008-02-01 | 2012-01-24 | Donald Rozinak Beaver | Secure direct platter access |
US9354857B2 (en) * | 2008-03-19 | 2016-05-31 | Lenovo (Singapore) Pte. Ltd. | System and method to update firmware on a hybrid drive |
US8060719B2 (en) * | 2008-05-28 | 2011-11-15 | Micron Technology, Inc. | Hybrid memory management |
US7916528B2 (en) * | 2009-03-30 | 2011-03-29 | Seagate Technology Llc | Predictive thermal preconditioning and timing control for non-volatile memory cells |
JP5631750B2 (ja) * | 2010-03-19 | 2014-11-26 | 株式会社東芝 | 複合メモリ |
US9417794B2 (en) * | 2011-07-26 | 2016-08-16 | Apple Inc. | Including performance-related hints in requests to composite memory |
US10528116B2 (en) * | 2013-03-14 | 2020-01-07 | Seagate Technology Llc | Fast resume from hibernate |
US9436408B2 (en) * | 2013-12-20 | 2016-09-06 | Seagate Technology Llc | Direct hinting for a memory device |
-
2013
- 2013-12-20 US US14/136,483 patent/US9436408B2/en active Active
-
2014
- 2014-12-19 JP JP2014257314A patent/JP6100750B2/ja not_active Expired - Fee Related
-
2016
- 2016-09-05 US US15/256,714 patent/US9946479B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20170060456A1 (en) | 2017-03-02 |
US9946479B2 (en) | 2018-04-17 |
US9436408B2 (en) | 2016-09-06 |
JP2015158902A (ja) | 2015-09-03 |
US20160011783A1 (en) | 2016-01-14 |
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