JP5923742B2 - IC peripheral circuit - Google Patents

IC peripheral circuit Download PDF

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JP5923742B2
JP5923742B2 JP2012096488A JP2012096488A JP5923742B2 JP 5923742 B2 JP5923742 B2 JP 5923742B2 JP 2012096488 A JP2012096488 A JP 2012096488A JP 2012096488 A JP2012096488 A JP 2012096488A JP 5923742 B2 JP5923742 B2 JP 5923742B2
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power supply
peripheral circuit
bypass capacitor
resistor
terminal
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JP2013224842A (en
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那由多 南
那由多 南
利明 吉安
利明 吉安
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Panasonic Intellectual Property Management Co Ltd
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Description

本発明は、ICに接続されるIC周辺回路に関する。   The present invention relates to an IC peripheral circuit connected to an IC.

加速度センサ等の物理量センサの基板回路には、物理量センサを制御する制御用IC(Integrated Circuit)が設けられる。ICは、一般的に、電源端子と接地端子との間に、電源ラインに生じるノイズを接地ラインに逃がすバイパスコンデンサ(パスコン)が接続される(特許文献1参照)。   A substrate circuit of a physical quantity sensor such as an acceleration sensor is provided with a control IC (Integrated Circuit) for controlling the physical quantity sensor. In general, an IC is connected between a power supply terminal and a ground terminal by a bypass capacitor that bypasses noise generated in the power supply line to the ground line (see Patent Document 1).

実公平3−5994号公報No. 3-5994

しかしながら、ICの接地端子と接地電位部との間に、トランジスタやダイオード等のノイズに対してインピーダンスが高い高インピーダンス素子が接続されると、ICから発生するクロックノイズ等がパスコンを経由してICに回帰してしまう。これにより、ICとパスコンとが発振回路を構成し、ICの誤動作を引き起こしてしまう問題がある。   However, if a high-impedance element with a high impedance against noise such as a transistor or a diode is connected between the ground terminal of the IC and the ground potential portion, clock noise generated from the IC passes through the bypass capacitor to the IC. It will return to. As a result, there is a problem that the IC and the bypass capacitor constitute an oscillation circuit and cause malfunction of the IC.

本発明は、上記問題点を鑑み、ICの誤作動を低減するIC周辺回路を提供することを目的とする。   In view of the above problems, an object of the present invention is to provide an IC peripheral circuit that reduces malfunction of an IC.

上記目的を達成するために、本発明の第1の態様は、物理量センサを制御するICの接地端子と、接地電位部との間に接続され、前記ICが発生するノイズに対してインピーダンスが高い高インピーダンス素子と、前記ICの電源端子と接地端子との間に接続され、前記ICの電源端子に発生するノイズを前記接地電位部に逃がすバイパスコンデンサと、前記ICの電源端子と接地端子との間に、前記バイパスコンデンサと直列に接続された抵抗とを備える回路であることを要旨とする。   In order to achieve the above object, the first aspect of the present invention is connected between a ground terminal of an IC that controls a physical quantity sensor and a ground potential unit, and has a high impedance against noise generated by the IC. A high-impedance element, a bypass capacitor connected between the power supply terminal and the ground terminal of the IC, and releasing noise generated at the power supply terminal of the IC to the ground potential portion; and the power supply terminal and the ground terminal of the IC The gist of the present invention is a circuit including a bypass capacitor and a resistor connected in series.

また、本発明の第1の態様に係るIC周辺回路においては、前記抵抗の一端は、前記ICの接地端子に接続されることができる。   In the IC peripheral circuit according to the first aspect of the present invention, one end of the resistor can be connected to a ground terminal of the IC.

また、本発明の第1の態様に係るIC周辺回路においては、前記抵抗の一端は、前記ICの電源端子に接続されることができる。   In the IC peripheral circuit according to the first aspect of the present invention, one end of the resistor can be connected to a power supply terminal of the IC.

本発明によれば、ICの誤作動を低減するIC周辺回路を提供することができる。   According to the present invention, it is possible to provide an IC peripheral circuit that reduces IC malfunctions.

本発明の実施の形態に係るIC周辺回路の基本的な構成を説明する回路図である。It is a circuit diagram explaining the basic composition of the IC peripheral circuit concerning an embodiment of the invention. 本発明の実施の形態に係るIC周辺回路の変形例を説明する回路図である。It is a circuit diagram explaining the modification of IC peripheral circuit which concerns on embodiment of this invention. 本発明の実施の形態に係るIC周辺回路の変形例を説明する回路図である。It is a circuit diagram explaining the modification of IC peripheral circuit which concerns on embodiment of this invention. 本発明の実施の形態に係るIC周辺回路の変形例を説明する回路図である。It is a circuit diagram explaining the modification of IC peripheral circuit which concerns on embodiment of this invention.

次に、図面を参照して、本発明の実施の形態を説明する。以下の図面の記載において、同一又は類似の部分には同一又は類似の符号を付している。また、以下に示す実施の形態は、本発明の技術的思想を具体化するための装置や方法を例示するものであって、本発明の技術的思想は、回路素子や構成部品の種類、構造、配置等を下記のものに特定するものでなく、本発明の技術的思想は、特許請求の範囲に記載された技術的範囲内において、種々の変更を加えることができる。   Next, embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. Further, the embodiments described below exemplify apparatuses and methods for embodying the technical idea of the present invention, and the technical idea of the present invention is the type and structure of circuit elements and components. However, the technical idea of the present invention can be variously modified within the technical scope described in the claims.

本発明の実施の形態に係るIC周辺回路は、図1に示すように、例えばIC(Integrated Circuit)10の接地端子13と接地電位部GNDとの間に接続された高インピーダンス素子と、バイパスコンデンサ(パスコン)Cと、抵抗Rとを備える。パスコンCと抵抗Rとは、ICの電源端子11と接地端子13との間に、互いに直列に接続される。   As shown in FIG. 1, an IC peripheral circuit according to an embodiment of the present invention includes, for example, a high impedance element connected between a ground terminal 13 of an IC (Integrated Circuit) 10 and a ground potential portion GND, and a bypass capacitor. (Pass capacitor) C and resistor R are provided. The bypass capacitor C and the resistor R are connected in series between the power supply terminal 11 and the ground terminal 13 of the IC.

本発明の実施の形態に係るIC周辺回路は、例えば加速度センサ等の物理量センサの基板回路を構成する。IC10は、例えば、物理量センサの動作を制御する制御用ICである。IC10の電源端子11は、電源電位部Vddに接続される。IC10の出力端子12は、出力電位部Voutに接続される。   The IC peripheral circuit according to the embodiment of the present invention constitutes a substrate circuit of a physical quantity sensor such as an acceleration sensor. The IC 10 is, for example, a control IC that controls the operation of the physical quantity sensor. The power supply terminal 11 of the IC 10 is connected to the power supply potential unit Vdd. The output terminal 12 of the IC 10 is connected to the output potential unit Vout.

抵抗Rの一端は、IC10の電源端子11と電源電位部Vddとの間のノードN1に接続され、他端は、パスコンCの一端に接続される。パスコンCの他端は、IC10の接地端子13と高インピーダンス20素子との間のノードN2に接続される。   One end of the resistor R is connected to a node N1 between the power supply terminal 11 of the IC 10 and the power supply potential unit Vdd, and the other end is connected to one end of the bypass capacitor C. The other end of the bypass capacitor C is connected to a node N2 between the ground terminal 13 of the IC 10 and the high impedance 20 element.

図1において、IC10の電源端子11側のノードN1に抵抗Rが接続される例を示したが、抵抗RとパスコンCとは、図2に示すように、パスコンCがノードN1に接続され、抵抗RがノードN2に接続されるようにしてもよい。   In FIG. 1, the example in which the resistor R is connected to the node N1 on the power supply terminal 11 side of the IC 10 is shown. However, the resistor R and the bypass capacitor C are connected to the node N1, as shown in FIG. The resistor R may be connected to the node N2.

高インピーダンス素子20は、IC10が発生するクロックノイズ等のノイズに対してインピーダンスが高い素子である。本発明において、「ノイズに対してインピーダンスが高い」とは、IC10が発生するノイズが接地電位部GNDに逃げず、パスコンCを介してIC10に回帰する程度のインピーダンスであることを意味する。   The high impedance element 20 is an element having a high impedance against noise such as clock noise generated by the IC 10. In the present invention, “impedance is high with respect to noise” means that the noise generated by the IC 10 does not escape to the ground potential portion GND and returns to the IC 10 via the bypass capacitor C.

高インピーダンス素子20は、例えばトランジスタTR等である。トランジスタTRのコレクタ電極はIC10の接地端子13に接続され、トランジスタTRのエミッタ電極は、接地電位部GNDに接続される。トランジスタTRのベース電極は、抵抗R1を介して、ノードN1と電源電位部Vddとの間のノードN3に接続される。   The high impedance element 20 is, for example, a transistor TR. The collector electrode of the transistor TR is connected to the ground terminal 13 of the IC 10, and the emitter electrode of the transistor TR is connected to the ground potential portion GND. The base electrode of the transistor TR is connected to the node N3 between the node N1 and the power supply potential unit Vdd via the resistor R1.

図1において、高インピーダンス素子20として、トランジスタTRが接続される例を示したが、図3に示すように、高インピーダンス素子20aは、ダイオードDであってもよい。また、図4に示すように、高インピーダンス素子20bは、コイルLであってもよい。   Although FIG. 1 shows an example in which the transistor TR is connected as the high impedance element 20, the high impedance element 20a may be a diode D as shown in FIG. In addition, as shown in FIG. 4, the high impedance element 20 b may be a coil L.

パスコンCは、IC10が発生するクロックノイズ等のノイズを、接地電位部GNDに逃がす。しかし、パスコンCと接地電位部GNDとの間に、高インピーダンス素子20が接続されている場合、IC10が発生するノイズが、パスコンCを経由してIC10に回帰してしまう。   The bypass capacitor C releases noise such as clock noise generated by the IC 10 to the ground potential portion GND. However, when the high impedance element 20 is connected between the bypass capacitor C and the ground potential portion GND, noise generated by the IC 10 returns to the IC 10 via the bypass capacitor C.

本発明の実施の形態に係るIC周辺回路によれば、パスコンCに直列に接続された抵抗Rは、IC10とパスコンCとの間でノイズが通過しにくいようにして、IC10とパスコンCとの間で発振することを防止することができる。よって、本発明の実施の形態に係るIC周辺回路は、回路の発振を防ぎ、ICの誤作動を低減できる。   According to the IC peripheral circuit according to the embodiment of the present invention, the resistor R connected in series to the bypass capacitor C prevents noise from passing between the IC 10 and the bypass capacitor C, so that the IC 10 and the bypass capacitor C are connected to each other. It is possible to prevent oscillation between the two. Therefore, the IC peripheral circuit according to the embodiment of the present invention can prevent circuit oscillation and reduce malfunction of the IC.

上記のように、本発明は上記の実施の形態によって記載したが、この開示の一部をなす論述及び図面は本発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施の形態、実施例及び運用技術が明らかとなろう。   As described above, the present invention has been described according to the above-described embodiments. However, it should not be understood that the description and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

このように、本発明はここでは記載していない様々な実施の形態等を含むことは勿論である。したがって、本発明の技術的範囲は上記の説明から妥当な特許請求の範囲に係る発明特定事項によってのみ定められるものである。   As described above, the present invention naturally includes various embodiments not described herein. Therefore, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

C バイパスコンデンサ(パスコン)
GND 接地電位部
R 抵抗
10 IC
11 電源端子
12 出力端子
13 接地端子
20,20a,20b 高インピーダンス素子
C Bypass capacitor (pass capacitor)
GND Ground potential part R Resistance 10 IC
11 power supply terminal 12 output terminal 13 ground terminal 20, 20a, 20b high impedance element

Claims (3)

物理量センサを制御するICの接地端子と、接地電位部との間に接続され、前記ICが発生するノイズに対してインピーダンスが高い高インピーダンス素子と、
前記ICの電源端子と接地端子との間に接続され、前記ICの電源端子に発生するノイズを前記接地電位部に逃がすバイパスコンデンサと、
前記ICの電源端子と接地端子との間に、前記バイパスコンデンサと直列に接続された抵抗と
を備えることを特徴とするIC周辺回路。
A high-impedance element connected between a ground terminal of an IC that controls the physical quantity sensor and a ground potential unit and having a high impedance against noise generated by the IC;
A bypass capacitor connected between a power supply terminal and a ground terminal of the IC, and releasing noise generated at the power supply terminal of the IC to the ground potential portion;
An IC peripheral circuit comprising: a resistor connected in series with the bypass capacitor between a power supply terminal and a ground terminal of the IC.
前記抵抗の一端は、前記ICの接地端子に接続されることを特徴とする請求項1に記載のIC周辺回路。   The IC peripheral circuit according to claim 1, wherein one end of the resistor is connected to a ground terminal of the IC. 前記抵抗の一端は、前記ICの電源端子に接続されることを特徴とする請求項1に記載のIC周辺回路。   The IC peripheral circuit according to claim 1, wherein one end of the resistor is connected to a power supply terminal of the IC.
JP2012096488A 2012-04-20 2012-04-20 IC peripheral circuit Active JP5923742B2 (en)

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JP3427594B2 (en) * 1994-11-04 2003-07-22 株式会社デンソー Sensor device
JP2003180070A (en) * 2001-12-07 2003-06-27 Toyota Industries Corp Ic malfunction preventive method and ic voltage fluctuation preventive circuit
JP2006238315A (en) * 2005-02-28 2006-09-07 Canon Inc Method of measures and circuit against emi for electronic circuit device
JP2007303978A (en) * 2006-05-11 2007-11-22 Denso Corp Sensor device
JP5281369B2 (en) * 2008-11-21 2013-09-04 パナソニック株式会社 Physical quantity sensor

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