JP5824339B2 - Three-phase rectifier - Google Patents

Three-phase rectifier Download PDF

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JP5824339B2
JP5824339B2 JP2011251576A JP2011251576A JP5824339B2 JP 5824339 B2 JP5824339 B2 JP 5824339B2 JP 2011251576 A JP2011251576 A JP 2011251576A JP 2011251576 A JP2011251576 A JP 2011251576A JP 5824339 B2 JP5824339 B2 JP 5824339B2
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edge side
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JP2013110785A (en
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通可 植杉
通可 植杉
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Toshiba Carrier Corp
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00—Climate change mitigation technologies for sector-wide applications
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Description

本発明の実施形態は、三相交流電源の電圧を整流して直流電圧に変換する三相整流装置に関する。   Embodiments described herein relate generally to a three-phase rectifier that rectifies a voltage of a three-phase AC power source and converts the voltage into a DC voltage.

一般的な三相交流電源の電圧を整流して直流電圧に変換する整流回路は、一対のダイオードを直列接続してなる３つの直列回路を有し、これら直列回路の各ダイオードの相互接続点が三相交流電源の各相に接続される。そして、この整流回路の出力端に平滑コンデンサが接続され、その平滑コンデンサに負荷が接続される。   A rectifier circuit that rectifies the voltage of a general three-phase AC power source and converts it into a DC voltage has three series circuits formed by connecting a pair of diodes in series, and the interconnection point of each diode of these series circuits is Connected to each phase of the three-phase AC power supply. A smoothing capacitor is connected to the output terminal of the rectifier circuit, and a load is connected to the smoothing capacitor.

三相交流電圧は位相が互いに１２０°異なる３つの相電圧からなり、これら相電圧により、各直列回路のそれぞれ正側ダイオードを通って平滑コンデンサに電流が流れ、その平滑コンデンサから各直列回路のそれぞれ負側ダイオードを通って電流が流れる。   The three-phase AC voltage is composed of three phase voltages whose phases are different from each other by 120 °. With these phase voltages, a current flows through the positive diode of each series circuit to the smoothing capacitor, and each of the series circuits is supplied from the smoothing capacitor. Current flows through the negative diode.

このような整流回路では、力率を改善するため、また入力電流に含まれる高調波成分を抑制するため、入力側にリアクトルを設けるとともに、これらリアクトルに対する短絡路形成用の複数のスイッチを接続し、これらスイッチの高周波スイッチングにより、入力電流波形を正弦波に追従させる三相アクティブフィルタが採用される（例えば特許文献１）。   In such a rectifier circuit, in order to improve the power factor and to suppress harmonic components contained in the input current, a reactor is provided on the input side, and a plurality of switches for forming a short circuit for these reactors are connected. A three-phase active filter is employed in which the input current waveform follows a sine wave by high-frequency switching of these switches (for example, Patent Document 1).

特許第３６７５３３６号公報Japanese Patent No. 3675336

しかしながら、上記の高周波スイッチングにより入力電流波形を正弦波に追従させることができても、高周波スイッチングに伴うノイズが入力電流に重畳してしまうという問題が生じる。   However, even if the input current waveform can be made to follow a sine wave by the above-described high frequency switching, there arises a problem that noise accompanying the high frequency switching is superimposed on the input current.

本発明の実施形態の目的は、力率を向上させつつ、入力電流に重畳する高周波スイッチングノイズを低減できる三相整流装置を提供することである。   The objective of embodiment of this invention is providing the three-phase rectifier which can reduce the high frequency switching noise superimposed on an input current, improving a power factor.

請求項１の三相整流装置は、一対のダイオードを直列接続し、その両ダイオードの相互接続点が三相交流電源のＵ相に接続されるＵ相用直列回路、一対のダイオードを直列接続しその両ダイオードの相互接続点が上記三相交流電源のＶ相に接続されるＶ相用直列回路、一対のダイオードを直列接続しその両ダイオードの相互接続点が上記三相交流電源のＷ相に接続されるＷ相用直列回路を有し、上記三相交流電源の電圧を直流電圧に変換して出力する整流回路と、この整流回路の各ダイオードを短絡する複数のスイッチング素子と、上記三相交流電源の各相と上記整流回路の各直列回路との接続間にそれぞれ設けた複数のリアクトルと、上記三相交流電源からの入力電力を検出する検出手段と、上記各直列回路の両ダイオードの相互接続点と上記整流回路の負側出力端との間を前記スイッチング素子を制御して、上記三相交流電源からの入力電流が正レベルとなる位相の前縁側で回数Ｎ１だけ断続的に短絡し、同位相の後縁側で回数Ｎ２だけ断続的に短絡し、上記各直列回路の両ダイオードの相互接続点と上記整流回路の正側出力端との間を前記スイッチング素子を制御して、上記三相交流電源からの入力電流が負レベルとなる位相の前縁側で上記回数Ｎ１だけ断続的に短絡し、同位相の後縁側で上記回数Ｎ２だけ断続的に短絡するとともに、上記回数Ｎ１，Ｎ２をＮ１＞Ｎ２とし、その比率Ｎ１／Ｎ２を上記検出手段の検出結果に応じて切換える制御手段と、を備える。   The three-phase rectifier of claim 1 includes a pair of diodes connected in series, a U-phase series circuit in which an interconnection point between the two diodes is connected to the U-phase of a three-phase AC power supply, and a pair of diodes connected in series. A series circuit for V phase in which the connection point of the two diodes is connected to the V phase of the three-phase AC power supply, a pair of diodes are connected in series, and the connection point of the two diodes is the W phase of the three-phase AC power supply. A rectifier circuit that has a W-phase series circuit connected thereto, converts the voltage of the three-phase AC power source into a DC voltage and outputs the DC voltage, a plurality of switching elements that short-circuit each diode of the rectifier circuit, and the three-phase circuit A plurality of reactors provided between each phase of the AC power supply and each series circuit of the rectifier circuit, detection means for detecting input power from the three-phase AC power supply, and both diodes of each series circuit With interconnection points The switching element is controlled between the negative-side output terminal of the rectifier circuit, and the input current from the three-phase AC power supply is intermittently short-circuited N1 times on the leading edge side of the phase where the input current becomes a positive level. The three-phase AC power supply by intermittently short-circuiting N2 times on the trailing edge side and controlling the switching element between the interconnection point of both diodes of each series circuit and the positive output terminal of the rectifier circuit. Is intermittently shorted by the number N1 on the leading edge side of the phase where the input current from the negative phase is negative, and is intermittently shorted by the number N2 on the trailing edge side of the same phase, and the times N1 and N2 are set to N1> N2 And control means for switching the ratio N1 / N2 according to the detection result of the detection means.

一実施形態の構成を示すブロック図。The block diagram which shows the structure of one Embodiment. 一実施形態の制御部の制御を示すフローチャート。The flowchart which shows control of the control part of one Embodiment. 一実施形態のスイッチングデータ切換え条件を示す図。The figure which shows the switching data switching condition of one Embodiment. 一実施形態の低入力用の前縁側スイッチングデータを示す図。The figure which shows the front edge side switching data for low input of one Embodiment. 一実施形態の低入力用の後縁側スイッチングデータを示す図。The figure which shows the trailing edge side switching data for low input of one Embodiment. 一実施形態の低入力時の入力電流波形およびＭＯＳＦＥＴの断続的なオンを示す図。The figure which shows the input current waveform at the time of the low input of one Embodiment, and intermittent ON of MOSFET. 低入力時に高入力用のスイッチングデータを用いた場合の入力電流波形およびＭＯＳＦＥＴの断続的なオンを参考として示す図。The figure which shows the input current waveform at the time of using the switching data for high inputs at the time of low input, and intermittent ON of MOSFET as reference. 一実施形態の高入力用の前縁側スイッチングデータを示す図。The figure which shows the leading edge side switching data for high input of one Embodiment. 一実施形態の高入力用の後縁側スイッチングデータを示す図。The figure which shows the trailing edge side switching data for high input of one Embodiment. 一実施形態の高入力時の入力電流波形およびＭＯＳＦＥＴの断続的なオンを示す図。The figure which shows the input current waveform at the time of high input of one Embodiment, and intermittent ON of MOSFET. 高入力時に低入力用のスイッチングデータを用いた場合の入力電流波形およびＭＯＳＦＥＴの断続的なオンを参考として示す図。The figure which shows the input current waveform at the time of using the switching data for low inputs at the time of high input, and intermittent ON of MOSFET as reference.

以下、この発明の一実施形態について図面を参照して説明する。
図１に示すように、三相交流電源１のＵ，Ｖ，Ｗ相に三相整流装置１０を接続し、その三相整流装置１０の出力電圧（後述の平滑コンデンサ１４に生じ電圧）を負荷２に供給する。負荷２は、例えば、モータ駆動用のインバータ装置が用いられ、その消費電力が変動する。三相整流装置１０は、三相交流電源１との接続ラインに設けた高調波低減用のリアクトル２１，２２，２３、これらリアクトル２１，２２，２３を介して三相交流電源１につながる整流回路３０、三相交流電源１とリアクトル２１，２２，２３との間の接続ラインに設けた電流センサ４１，４２，４３、これら電流センサ４１，４２，４３を介して三相交流電源１からの入力電流（以下、相電流という）Ｉｕ，Ｉｖ，Ｉｗを検出する電流検出回路５０を有する。 Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
As shown in FIG. 1, a three-phase rectifier 10 is connected to the U, V, and W phases of a three-phase AC power supply 1, and the output voltage of the three-phase rectifier 10 (voltage generated in a smoothing capacitor 14 described later) is loaded. 2 is supplied. As the load 2, for example, an inverter device for driving a motor is used, and its power consumption varies. The three-phase rectifier 10 includes a reactor 21, 22, 23 for reducing harmonics provided in a connection line with the three-phase AC power source 1, and a rectifier circuit connected to the three-phase AC power source 1 through the reactors 21, 22, 23. 30, input from the three-phase AC power source 1 via the current sensors 41, 42, 43 provided on the connection lines between the three-phase AC power source 1 and the reactors 21, 22, 23 A current detection circuit 50 that detects currents (hereinafter referred to as phase currents) Iu, Iv, and Iw is included.

整流回路３０は、一対のダイオード３１ａ，３２ａを直列接続しその両ダイオードの相互接続点が三相交流電源１のＵ相に接続されるＵ相用直列回路、一対のダイオード３３ａ，３４ａを直列接続しその両ダイオードの相互接続点が三相交流電源１のＶ相に接続されるＶ相用直列回路、一対のダイオード３５ａ，３６ａを直列接続しその両ダイオードの相互接続点が三相交流電源１のＷ相に接続されるＷ相用直列回路を有し、三相交流電源１の三相交流電圧を直流電圧に変換して正側出力端子（＋）および負側出力端子（−）から出力する。各ダイオードには、それぞれ各ダイオードを短絡する複数のスイッチング素子が並列接続されている。具体的には、スイッチング素子は、半導体スイッチたとえばＭＯＳＦＥＴ３１，３２，３３，３４，３５，３６であり、上記ダイオード３１ａ，３２ａ，３３ａ，３４ａ，３５ａ，３６ａは、これらのＭＯＳＦＥＴ３１〜３６の寄生ダイオードである。すなわち、各ダイオード３１ａ〜３６ａに対し、１つのＭＯＳＦＥＴ３１〜３６がそれぞれ逆並列接続された状態にある。これらのＭＯＳＦＥＴ３１〜３６がオンすれば、その素子に対して逆並列接続されているダイオード３１ａ〜３６ａが短絡されることになる。   The rectifier circuit 30 includes a pair of diodes 31a and 32a connected in series, and a connection circuit between the two diodes connected to the U-phase of the three-phase AC power supply 1, and a pair of diodes 33a and 34a connected in series. A series circuit for V phase in which the mutual connection point of the two diodes is connected to the V phase of the three-phase AC power source 1, and a pair of diodes 35a and 36a are connected in series. It has a W-phase series circuit connected to the W-phase, converts the three-phase AC voltage of the three-phase AC power source 1 into a DC voltage, and outputs it from the positive output terminal (+) and negative output terminal (-) To do. A plurality of switching elements that short-circuit each diode are connected in parallel to each diode. Specifically, the switching elements are semiconductor switches such as MOSFETs 31, 32, 33, 34, 35, 36, and the diodes 31a, 32a, 33a, 34a, 35a, 36a are parasitic diodes of these MOSFETs 31-36. is there. That is, one of the MOSFETs 31 to 36 is connected in reverse parallel to each of the diodes 31a to 36a. When these MOSFETs 31 to 36 are turned on, the diodes 31a to 36a connected in antiparallel to the element are short-circuited.

また、三相整流装置１０は、三相交流電源１からの入力電力を電流検出回路５０で検出される相電流Ｉｕ，Ｉｖ，Ｉｗに基づいて検出する入力電力検出部５１、電流検出回路５０で検出される相電流Ｉｕ，Ｉｖ，Ｉｗの零クロス点をそれぞれ検出する零クロス点検出部５２、ＭＯＳＦＥＴ３１，３２，３３，３４，３５，３６に対し、零クロス点からの時間に基づき短絡（オン）及び短絡終了（オフ）動作を指示する各種スイッチングデータを記憶したメモリ５３、電流検出回路５０で検出される相電流Ｉｕ，Ｉｖ，Ｉｗ、入力電力検出部５１で検出される入力電力、零クロス点検出部５２で検出される零クロス点およびメモリ５３内のスイッチングデータに基づいてＭＯＳＦＥＴ３１〜３６に対する駆動信号（短絡信号）を生成し出力する制御部６０、この制御部６０から出力される駆動信号に応じてＭＯＳＦＥＴ３１〜３６をオン，オフ駆動する駆動部５４を有する。   Further, the three-phase rectifier 10 includes an input power detection unit 51 that detects input power from the three-phase AC power supply 1 based on phase currents Iu, Iv, and Iw detected by the current detection circuit 50, and a current detection circuit 50. The zero cross point detector 52 and the MOSFETs 31, 32, 33, 34, 35, and 36 that detect the zero cross points of the detected phase currents Iu, Iv, and Iw are short-circuited (ON) based on the time from the zero cross point. ) And a memory 53 storing various switching data for instructing a short circuit termination (off) operation, phase currents Iu, Iv, Iw detected by the current detection circuit 50, input power detected by the input power detection unit 51, and zero crossing Based on the zero cross point detected by the point detector 52 and the switching data in the memory 53, a drive signal (short circuit signal) for the MOSFETs 31 to 36 is generated and output. Control unit 60, on the MOSFET31~36 in response to a drive signal outputted from the control unit 60 has a drive unit 54 to turn off the drive.

制御部６０は、主要な機能として次の（１）〜（７）の手段を有する。
（１）Ｕ相用直列回路のダイオード３１ａ，３２ａの相互接続点と整流回路３０の負側出力端（−）との間を、ＭＯＳＦＥＴ３２により、三相交流電源１からの相電流Ｉｕが正レベルとなる位相の前縁側で回数Ｎ１だけ断続的に短絡し、同位相の後縁側で回数Ｎ２だけ断続的に短絡する手段。 The control unit 60 has the following means (1) to (7) as main functions.
(1) The phase current Iu from the three-phase AC power supply 1 is at a positive level by the MOSFET 32 between the connection point of the diodes 31a and 32a of the U-phase series circuit and the negative output terminal (−) of the rectifier circuit 30. Means to intermittently short-circuit the number of times N1 on the leading edge side of the phase, and intermittently short-circuit the number of times N2 on the trailing edge side of the phase.

（２）Ｕ相用直列回路のダイオード３１ａ，３２ａの相互接続点と整流回路３０の正側出力端（＋）との間を、ＭＯＳＦＥＴ３１により、三相交流電源１からの相電流Ｉｕが負レベルとなる位相の前縁側で回数Ｎ１だけ断続的に短絡し、同位相の後縁側で回数Ｎ２だけ断続的に短絡する手段。   (2) The phase current Iu from the three-phase AC power supply 1 is at a negative level by the MOSFET 31 between the interconnection point of the diodes 31a and 32a of the U-phase series circuit and the positive output terminal (+) of the rectifier circuit 30. Means to intermittently short-circuit the number of times N1 on the leading edge side of the phase, and intermittently short-circuit the number of times N2 on the trailing edge side of the phase.

（３）Ｖ相用直列回路のダイオード３３ａ，３４ａの相互接続点と整流回路３０の負側出力端（−）との間を、ＭＯＳＦＥＴ３４により、三相交流電源１からの相電流Ｉｖが正レベルとなる位相の前縁側で回数Ｎ１だけ断続的に短絡し、同位相の後縁側で回数Ｎ２だけ断続的に短絡する手段。   (3) The phase current Iv from the three-phase AC power supply 1 is at a positive level by the MOSFET 34 between the interconnection point of the diodes 33a and 34a of the V-phase series circuit and the negative output terminal (−) of the rectifier circuit 30. Means to intermittently short-circuit the number of times N1 on the leading edge side of the phase, and intermittently short-circuit the number of times N2 on the trailing edge side of the phase.

（４）Ｖ相用直列回路のダイオード３３ａ，３４ａの相互接続点と整流回路３０の正側出力端（＋）との間を、ＭＯＳＦＥＴ３３により、三相交流電源１からの相電流Ｉｖが負レベルとなる位相の前縁側で回数Ｎ１だけ断続的に短絡し、同位相の後縁側で回数Ｎ２だけ断続的に短絡する手段。   (4) The phase current Iv from the three-phase AC power supply 1 is at a negative level by the MOSFET 33 between the connection point of the diodes 33a and 34a of the V-phase series circuit and the positive output terminal (+) of the rectifier circuit 30. Means to intermittently short-circuit the number of times N1 on the leading edge side of the phase, and intermittently short-circuit the number of times N2 on the trailing edge side of the phase.

（５）Ｗ相用直列回路のダイオード３５ａ，３６ａの相互接続点と整流回路３０の負側出力端（−）との間を、ＭＯＳＦＥＴ３６により、三相交流電源１からの相電流Ｉｗが正レベルとなる位相の前縁側で回数Ｎ１だけ断続的に短絡し、同位相の後縁側で回数Ｎ２だけ断続的に短絡する手段。   (5) The phase current Iw from the three-phase AC power supply 1 is at a positive level by the MOSFET 36 between the connection point of the diodes 35a and 36a of the W-phase series circuit and the negative output terminal (−) of the rectifier circuit 30. Means to intermittently short-circuit the number of times N1 on the leading edge side of the phase, and intermittently short-circuit the number of times N2 on the trailing edge side of the phase.

（６）Ｗ相用直列回路のダイオード３５ａ，３６ａの相互接続点と整流回路３０の正側出力端（＋）との間を、ＭＯＳＦＥＴ３５により、三相交流電源１からの相電流Ｉｗが負レベルとなる位相の前縁側で回数Ｎ１だけ断続的に短絡し、同位相の後縁側で回数Ｎ２だけ断続的に短絡する手段。   (6) The phase current Iw from the three-phase AC power supply 1 is at a negative level by the MOSFET 35 between the interconnection point of the diodes 35a and 36a of the W-phase series circuit and the positive output terminal (+) of the rectifier circuit 30. Means to intermittently short-circuit the number of times N1 on the leading edge side of the phase, and intermittently short-circuit the number of times N2 on the trailing edge side of the phase.

（７）回数Ｎ１，Ｎ２をＮ１＞Ｎ２とし、その回数比率Ｎ１／Ｎ２を入力電力検出部５１の検出結果に応じて切換えるとともに、その切換え点を入力電力検出部５１の検出結果の上昇時と下降時で異ならせ、かつその切換えを零クロス点検出部５２で検出される零クロス点を基準に行う手段。   (7) The number of times N1 and N2 is set to N1> N2, and the number ratio N1 / N2 is switched according to the detection result of the input power detection unit 51, and the switching point is set when the detection result of the input power detection unit 51 rises. Means for making it different at the time of descending and performing the switching based on the zero cross point detected by the zero cross point detector 52.

なお、相電流の正・負の状態において前縁側は、相電流の零クロス点から零クロス点までの期間における前側、後縁側は、相電流の零クロス点から零０クロス点までの期間における後ろ側を意味する。以下の実施形態の説明においては、前縁側を、０クロスを基準とした電気角で表し、相電流の正・負のいずれの状態においても電気角で０°〜６０°とし、後縁側を１２０°〜１８０°としている。ちなみに、これは、一般的な正弦波の１周期を基準にすると、相電流が正の状態においては、前縁側が電気角で０°〜６０°、後縁側は１２０°〜１８０°で同じになるが、相電流が負の状態では、前縁側が電気角で１８０°〜２４０°、後縁側が３００°〜３６０°で表されることになる。   In the positive / negative state of the phase current, the leading edge side is the front side in the period from the zero cross point of the phase current to the zero cross point, and the trailing edge side is in the period from the zero cross point of the phase current to the zero cross point. It means the back side. In the following description of the embodiments, the leading edge side is represented by an electrical angle with reference to 0 cross, the electrical angle is 0 ° to 60 ° in both positive and negative phase current states, and the trailing edge side is 120 °. The angle is set to ° to 180 °. By the way, this is based on one period of a general sine wave, and when the phase current is positive, the leading edge side is the same as an electrical angle of 0 ° to 60 °, and the trailing edge side is the same at 120 ° to 180 °. However, when the phase current is negative, the leading edge side is represented by an electrical angle of 180 ° to 240 °, and the trailing edge side is represented by 300 ° to 360 °.

回数Ｎ１，Ｎ２の一例として、Ｎ１＋Ｎ２の合計を、高入力時及び低入力時ともに同じ数である１５回とし、回数Ｎ１，Ｎ２を入力電力が低い場合はＮ１＝８，Ｎ２＝７、入力電力が高い場合はＮ１＝１０，Ｎ２＝５とする。さらに、回数Ｎ１，Ｎ２の比率Ｎ１／Ｎ２は、低入力時を“８／７、高入力時を“１０／５”として、低入力時より高入力時のほうを大きくする。言い換えると、比率Ｎ２／Ｎ１は、低入力時を“７／８”、高入力時を“５／１０”として、低入力時より高入力時のほうを小さくする。   As an example of the number of times N1 and N2, the sum of N1 + N2 is set to 15 times that is the same for both high input and low input, and when the input power is low, N1 = 8, N2 = 7, input power If N is high, N1 = 10 and N2 = 5. Further, the ratio N1 / N2 of the times N1 and N2 is “8/7” at low input and “10/5” at high input, and is larger at high input than at low input. N2 / N1 is “7/8” when the input is low and “5/10” when the input is high, and is smaller at the high input than at the low input.

なお、高入力時、低入力時のＮ１，Ｎ２のスイッチング回数、零クロス点からの短絡動作するまでのタイミング(期間)は、すべてメモリ５３に記憶され、これらのデータが適宜、制御部６０から読み出され、駆動部５４に所定のタイミングで各ＭＯＳＦＥＴ３１〜３６に駆動／停止信号を供給するよう指示が出される。また、合計短絡回数Ｎ１＋Ｎ２を、多くすると入力電流の正弦波への追従性が向上し、高調波を低減できるが、短絡するためのスイッチング回数が増加し、MOSFET３１〜３６のスイッチングによる高周波スイッチングノイズが増加するため、１０回以上、３０回以下が望ましい。   Note that the switching times of N1 and N2 at the time of high input and low input, and the timing (period) until the short circuit operation from the zero cross point are all stored in the memory 53, and these data are appropriately stored from the control unit 60. The readout is instructed to supply a drive / stop signal to each of the MOSFETs 31 to 36 at a predetermined timing. Further, if the total number of short-circuits N1 + N2 is increased, the followability of the input current to the sine wave can be improved and harmonics can be reduced. However, the number of switching for short-circuiting increases, and high-frequency switching noise due to switching of the MOSFETs 31 to 36 occurs. In order to increase, 10 times or more and 30 times or less are desirable.

つぎに、作用を説明する。
図２のフローチャートに示すように、三相交流電源１からの相電流Ｉｕ，Ｉｖ，Ｉｗを検出する（ステップ１０１）。この相電流Ｉｕ，Ｉｖ，Ｉｗに基づき、三相交流電源１からの入力電力を検出する（ステップ１０２）。そして、相電流Ｉｕ，Ｉｖ，Ｉｗの零クロス点をそれぞれ検出する（ステップ１０３）。 Next, the operation will be described.
As shown in the flowchart of FIG. 2, phase currents Iu, Iv, and Iw from the three-phase AC power source 1 are detected (step 101). Based on the phase currents Iu, Iv, and Iw, input power from the three-phase AC power source 1 is detected (step 102). Then, zero cross points of the phase currents Iu, Iv, and Iw are detected (step 103).

相電流Ｉｕの零クロス点が到来したとき（ステップ１０４）、入力電力(入力電流)が図３のスイッチングデータ切換え条件における設定値８０％より低い状態にあれば（ステップ１０５のＹＥＳ）、メモリ５３内の低入力用の前縁側スイッチングデータおよび後縁側スイッチングデータを選択する（ステップ１０６）。そして、選択した低入力用のスイッチングデータに基づき、ＭＯＳＦＥＴ３１，３２をオン，オフ駆動（高周波スイッチング）する。ここで、入力電力の基準として、負荷２の最大消費電力を１００％としている。また、図３のスイッチングデータ切換え条件は、ヒステリシスを有している。すなわち、前回の入力電流が低入力であれば、設定値８０％を超える検出を行なうまでは低入力と判断し、設定値８０％を超えた場合には高入力と判断する。一方、前回の入力電流が高入力であれば、設定値６０％未満に低下したことを検出するまでは高入力と判断し、設定値６０％未満を検出した場合には低入力と判断する。   When the zero cross point of the phase current Iu has arrived (step 104), if the input power (input current) is lower than the set value 80% in the switching data switching condition of FIG. 3 (YES in step 105), the memory 53 The leading edge side switching data and the trailing edge side switching data for the low input are selected (step 106). Based on the selected low-input switching data, the MOSFETs 31 and 32 are turned on and off (high-frequency switching). Here, the maximum power consumption of the load 2 is set to 100% as a reference for the input power. Further, the switching data switching condition of FIG. 3 has hysteresis. That is, if the previous input current is a low input, it is determined that the input is low until detection exceeding the set value 80% is performed, and if the input current exceeds the set value 80%, it is determined that the input is high. On the other hand, if the previous input current is a high input, it is determined that the input is high until it is detected that the set value has decreased to less than 60%, and if it is detected that the set value is less than 60%, it is determined that the input is low.

低入力用の前縁側スイッチングデータは、図４に示すように、零クロス点を基準とした時間経過に沿って順に並ぶ個数Ｎ１たとえば８個のオンデータＰ１，Ｐ２…Ｐ８からなる。これらオンデータＰ１，Ｐ２…Ｐ８は、それぞれオン期間ｔ１，ｔ２…ｔ８を有する。低入力用の後縁側スイッチングデータは、図５に示すように、零クロス点を基準とした時間経過に沿って順に並ぶ個数Ｎ２たとえば７個のオンデータＰ９，Ｐ１０…Ｐ１５からなる。これらオンデータＰ９，Ｐ１０…Ｐ１５は、それぞれオン期間ｔ９，ｔ１０…ｔ１５を有する。図４、５及び後述する図８、９では、三相交流電源の周波数が、５０Hzの場合の例を示しており、これらのオンデータ（オンタイミングとオン期間）Ｐ９，Ｐ１０…Ｐ１５は、時間を基準としているため、当然ながら電源周波数が異なれば、異なるタイミング、異なるオン期間が、メモリ５３から読み出される。   As shown in FIG. 4, the low-input leading edge side switching data includes a number N1, for example, eight pieces of on data P1, P2,... P8 arranged in order along the passage of time with reference to the zero cross point. These on data P1, P2,... P8 have on periods t1, t2,. As shown in FIG. 5, the low-input trailing edge side switching data includes a number N2, for example, seven pieces of on-data P9, P10,... P15 arranged in order along the passage of time with the zero cross point as a reference. These on data P9, P10... P15 have on periods t9, t10. 4 and 5 and FIGS. 8 and 9 to be described later show examples in which the frequency of the three-phase AC power supply is 50 Hz, and these on data (on timing and on period) P9, P10. Therefore, if the power supply frequency is different, of course, different timings and different ON periods are read from the memory 53.

すなわち、図６に示すように、入力電力が３０％と低く、相電流Ｉｕが正レベルとなる半サイクルの位相では、Ｕ相用直列回路の負側に位置するＭＯＳＦＥＴ３２を、前縁側の０°〜６０°期間において回数Ｎ１である８回だけ断続的にオンし、後縁側の１２０°〜１８０°期間において回数Ｎ２である７回だけ断続的にオンする。ＭＯＳＦＥＴ３２がオンすると、Ｕ相用直列回路のダイオード３１ａ，３２ａの相互接続点と整流回路３０の負側出力端（−）との間が短絡する。これにより、相電流Ｉｕの正側の半サイクルを実線のような正弦波に追従させることができる。実際の相電流Ｉｕは鋸歯状となるが、これはＭＯＳＦＥＴ３２のオン，オフに伴って発生する電流変化を示している。この鋸歯状の電流変化が高周波スイッチングノイズの原因となるため、短絡回数を増加させると発生する高周波スイッチングノイズが増加することになる。なお、前縁側および後縁側を除く中間期間（６０°〜１２０°区間）においても鋸歯状の短絡による電流変化が現れているが、これは相電流Ｉｖ，Ｉｗを正弦波に追従させるための他の相のＭＯＳＦＥＴのオン，オフによって生じるものである。ここで、本実施形態では、短絡回数を少なく設定しているため、高周波スイッチングノイズの発生を抑えることができる。   That is, as shown in FIG. 6, in the half cycle phase where the input power is as low as 30% and the phase current Iu is at a positive level, the MOSFET 32 positioned on the negative side of the U-phase series circuit is connected to 0 ° on the leading edge side. It is intermittently turned on 8 times, which is the number N1 in the period of -60 °, and is intermittently turned on 7 times, which is the number of times N2, in the period of 120 ° to 180 ° on the trailing edge side. When the MOSFET 32 is turned on, a short circuit is established between the interconnection point of the diodes 31 a and 32 a of the U-phase series circuit and the negative output terminal (−) of the rectifier circuit 30. Thereby, the positive half cycle of the phase current Iu can be made to follow a sine wave like a solid line. The actual phase current Iu has a sawtooth shape, which indicates a change in current that occurs when the MOSFET 32 is turned on and off. This sawtooth-shaped current change causes high-frequency switching noise. Therefore, when the number of short-circuits is increased, the generated high-frequency switching noise increases. Note that a current change due to a sawtooth-like short circuit also appears in an intermediate period (60 ° to 120 ° interval) excluding the leading edge side and the trailing edge side. This is other than for causing the phase currents Iv and Iw to follow a sine wave. This is caused by turning on and off the MOSFET of the first phase. Here, in the present embodiment, since the number of short circuits is set to be small, generation of high frequency switching noise can be suppressed.

仮に、前縁側のオン回数Ｎ１をたとえば１０回に設定し、後縁側のオン回数Ｎ２をたとえば５回に設定した場合に、相電流Ｉｕがどうなるかを確かめたのが図７である。この図７と図６において、電流波形の正弦波への追従性を比較すると、前縁側の電流と正弦波との差の大きさはあまり変わらないが、後縁側の電流と正弦波との差の大きさについては図６の方が小さくなっており、図６の方が正弦波への追従性が高く、力率が高いことが分かる。   FIG. 7 shows what happens to the phase current Iu when the number of ON times N1 on the front edge side is set to 10 times and the number of ON times N2 on the rear edge side is set to 5 times, for example. In FIG. 7 and FIG. 6, when the followability of the current waveform to the sine wave is compared, the magnitude of the difference between the current on the leading edge side and the sine wave does not change much, but the difference between the current on the trailing edge side and the sine wave. 6 is smaller in FIG. 6, and it can be seen that FIG. 6 has higher followability to a sine wave and higher power factor.

同じく入力電力が低く、相電流Ｉｕが負レベルとなる半サイクルの位相では、Ｕ相用直列回路の正側に位置するＭＯＳＦＥＴ３１が、前縁側の０°〜６０°期間において８回だけ断続的にオンし、後縁側の１２０°〜１８０°期間において７回だけ断続的にオンする。ＭＯＳＦＥＴ３１がオンすると、Ｕ相用直列回路のダイオード３１ａ，３２ａの相互接続点と整流回路３０の正側出力端（＋）との間が短絡する。これにより、相電流Ｉｕの負側の半サイクルを正弦波に追従させることができる。   Similarly, in the half cycle phase in which the input power is low and the phase current Iu is at a negative level, the MOSFET 31 located on the positive side of the U-phase series circuit intermittently only 8 times in the period of 0 ° to 60 ° on the leading edge side. It is turned on and intermittently turned on only 7 times during the period of 120 ° to 180 ° on the trailing edge side. When the MOSFET 31 is turned on, a short circuit is established between the connection point of the diodes 31 a and 32 a of the U-phase series circuit and the positive output terminal (+) of the rectifier circuit 30. Thereby, the negative half cycle of the phase current Iu can be made to follow a sine wave.

一方、相電流Ｉｕの零クロス点が到来したとき（ステップ１０４）、入力電力が図３のスイッチングデータ切換え条件における設定値８０％以上の状態にあれば（ステップ１０５のＮＯ）、メモリ５３内の高入力用の前縁側スイッチングデータおよび後縁側スイッチングデータを選択する（ステップ１０８）。そして、選択した高入力用のスイッチングデータに基づき、ＭＯＳＦＥＴ３１，３２をオン，オフ駆動（高周波スイッチング）する。   On the other hand, when the zero crossing point of the phase current Iu has arrived (step 104), if the input power is in a state of 80% or more of the set value in the switching data switching condition of FIG. The leading edge side switching data and trailing edge side switching data for high input are selected (step 108). Then, the MOSFETs 31 and 32 are turned on and off (high-frequency switching) based on the selected high-input switching data.

高入力用の前縁側スイッチングデータは、図８に示すように、零クロス点を基準とした時間経過に沿って順に並ぶ個数Ｎ１たとえば１０個のオンデータＰ１，Ｐ２…Ｐ１０からなる。これらオンデータＰ１，Ｐ２…Ｐ１０は、それぞれオン期間ｔ１，ｔ２…ｔ１０を有する。高入力用の後縁側スイッチングデータは、図９に示すように、零クロス点を基準とした時間経過に沿って順に並ぶ個数Ｎ２たとえば５個のオンデータＰ１１，Ｐ１２…Ｐ１５からなる。これらオンデータＰ１１，Ｐ１２…Ｐ１５は、それぞれオン期間ｔ１１，ｔ１２…ｔ１５を有する。   As shown in FIG. 8, the leading edge side switching data for high input is composed of a number N1, for example, 10 pieces of on data P1, P2,... P10 arranged in order along the passage of time with reference to the zero cross point. These on data P1, P2,... P10 have on periods t1, t2,. As shown in FIG. 9, the high-input trailing edge side switching data is composed of a number N2, for example, five ON data P11, P12,... P15, which are sequentially arranged with the passage of time with reference to the zero cross point. These on data P11, P12... P15 have on periods t11, t12.

すなわち、図１０に示すように、入力電力が１００％と高く、相電流Ｉｕが正レベルとなる位相の半サイクルでは、Ｕ相用直列回路の負側に位置するＭＯＳＦＥＴ３２を、前縁側の０°〜６０°期間において回数Ｎ１である１０回だけ断続的にオンし、後縁側の１２０°〜１８０°期間において回数Ｎ２である５回だけ断続的にオンする。ＭＯＳＦＥＴ３２がオンすると、Ｕ相用直列回路のダイオード３１ａ，３２ａの相互接続点と整流回路３０の負側出力端（−）とが短絡する。これにより、相電流Ｉｕの正側の半サイクルを実線のような正弦波に追従させることができ、力率が向上できる。   That is, as shown in FIG. 10, in the half cycle of the phase where the input power is as high as 100% and the phase current Iu is at a positive level, the MOSFET 32 positioned on the negative side of the U-phase series circuit is connected to 0 ° on the leading edge side. It is intermittently turned on only 10 times that is the number N1 in the period of ˜60 °, and is intermittently turned on only 5 times that is the number of times N2 in the period of 120 ° to 180 ° on the trailing edge side. When the MOSFET 32 is turned on, the interconnection point of the diodes 31a and 32a of the U-phase series circuit and the negative output terminal (−) of the rectifier circuit 30 are short-circuited. Thereby, the positive half cycle of the phase current Iu can be made to follow a sine wave as shown by a solid line, and the power factor can be improved.

仮に、前縁側のオン回数Ｎ１を低入力時と同じ８回に設定し、後縁側のオン回数Ｎ２を低入力時と同じ７回に設定した場合に、相電流Ｉｕがどうなるかを確かめたのが図１１である。この図１１と図１０において、電流波形の正弦波への追従性を比較すると、前縁側の電流と正弦波との差の大きさはあまり変わらないが、後縁側の電流と正弦波との差の大きさは図１０の方が小さくなり、図１０の方が正弦波への追従性が高く、力率を向上させ、高調波の抑制効果が高いことが分かる。   Assuming that the number of on-time N1 on the leading edge side is set to the same 8 times as at the time of low input, and that the number of on-time N2 on the trailing edge side is set to the same 7 times as at the time of low input, the phase current Iu has been confirmed. Is FIG. In FIG. 11 and FIG. 10, when the followability of the current waveform to the sine wave is compared, the difference between the current on the leading edge side and the sine wave does not change much, but the difference between the current on the trailing edge side and the sine wave. 10 is smaller in FIG. 10, and FIG. 10 has higher followability to a sine wave, improves the power factor, and has a higher harmonic suppression effect.

すなわち、回数Ｎ１，Ｎ２の比率Ｎ１／Ｎ２の設定を、低入力時より高入力時のほうを大きくすることで、それぞれの入力状態に対して、正弦波への追従性が良くなり、力率を向上させ、高調波を低減することができる。   That is, by setting the ratio N1 / N2 of the number of times N1 and N2 to be larger at the time of high input than at the time of low input, the followability to a sine wave is improved for each input state, and the power factor Can be improved and harmonics can be reduced.

同じく入力電力が高く、相電流Ｉｕが負レベルとなる半サイクルの位相では、Ｕ相用直列回路の正側に位置するＭＯＳＦＥＴ３１が、前縁側の０°〜６０°期間において１０回だけ断続的にオンし、後縁側の１２０°〜１８０°期間において５回だけ断続的にオンする。ＭＯＳＦＥＴ３１がオンすると、Ｕ相用直列回路のダイオード３１ａ，３２ａの相互接続点と整流回路３０の正側出力端（＋）との間が短絡する。これにより、相電流Ｉｕの負側の半サイクルを正弦波に追従させることができる。   Similarly, in the half-cycle phase where the input power is high and the phase current Iu is at a negative level, the MOSFET 31 positioned on the positive side of the U-phase series circuit is intermittently only 10 times in the period of 0 ° to 60 ° on the leading edge side. It is turned on and intermittently turned on only 5 times in the 120 ° to 180 ° period on the trailing edge side. When the MOSFET 31 is turned on, a short circuit is established between the connection point of the diodes 31 a and 32 a of the U-phase series circuit and the positive output terminal (+) of the rectifier circuit 30. Thereby, the negative half cycle of the phase current Iu can be made to follow a sine wave.

ここまで相電流Ｉｕについて述べたが、相電流Ｉｖ，Ｉｗについても同様の制御を行う。
すなわち、相電流Ｉｖについては、入力電力が低く、正レベルとなる半サイクルの位相では、Ｖ相用直列回路の負側に位置するＭＯＳＦＥＴ３４を、前縁側の０°〜６０°期間で８回だけ断続的にオンし、後縁側の１２０°〜１８０°期間で７回だけ断続的にオンする。同じく入力電力が低く、負レベルとなる半サイクルの位相では、Ｖ相用直列回路の正側に位置するＭＯＳＦＥＴ３３を、前縁側の０°〜６０°期間で８回だけ断続的にオンし、後縁側の１２０°〜１８０°期間で７回だけ断続的にオンする。入力電力が高く、正レベルとなる半サイクルの位相では、Ｖ相用直列回路の負側に位置するＭＯＳＦＥＴ３４を、前縁側の０°〜６０°期間で１０回だけ断続的にオンし、後縁側の１２０°〜１８０°期間で５回だけ断続的にオンする。同じく入力電力が高く、負レベルとなる半サイクルの位相では、Ｖ相用直列回路の正側に位置するＭＯＳＦＥＴ３３を、前縁側の０°〜６０°期間で１０回だけ断続的にオンし、後縁側の１２０°〜１８０°期間で５回だけ断続的にオンする。 Although the phase current Iu has been described so far, the same control is performed for the phase currents Iv and Iw.
That is, with respect to the phase current Iv, in the half cycle phase where the input power is low and becomes a positive level, the MOSFET 34 located on the negative side of the V-phase series circuit is moved only eight times in the period of 0 ° to 60 ° on the leading edge side. It is turned on intermittently and is turned on only seven times in the 120 ° to 180 ° period on the trailing edge side. Similarly, in the half-cycle phase where the input power is low and becomes a negative level, the MOSFET 33 located on the positive side of the V-phase series circuit is intermittently turned on only 8 times in the period of 0 ° to 60 ° on the leading edge side, and It turns on intermittently only 7 times in the 120 ° -180 ° period on the edge side. In the half-cycle phase where the input power is high and becomes a positive level, the MOSFET 34 located on the negative side of the V-phase series circuit is intermittently turned on 10 times in the period of 0 ° to 60 ° on the leading edge side, and the trailing edge side Is intermittently turned on only 5 times in the period of 120 ° to 180 °. Similarly, in the half cycle phase where the input power is high and becomes a negative level, the MOSFET 33 located on the positive side of the V-phase series circuit is intermittently turned on 10 times in the period of 0 ° to 60 ° on the leading edge side, and It turns on intermittently only 5 times in the 120 ° -180 ° period on the edge side.

相電流Ｉｗについては、入力電力が低く、正レベルとなる半サイクルの位相において、Ｗ相用直列回路の負側に位置するＭＯＳＦＥＴ３６を、前縁側の０°〜６０°期間で８回だけ断続的にオンし、後縁側の１２０°〜１８０°期間で７回だけ断続的にオンする。同じく入力電力が低く、負レベルとなる半サイクルの位相において、Ｗ相用直列回路の正側に位置するＭＯＳＦＥＴ３５を、前縁側の０°〜６０°期間で８回だけ断続的にオンし、後縁側の１２０°〜１８０°期間で７回だけ断続的にオンする。入力電力が高く、正レベルとなる半サイクルの位相では、Ｗ相用直列回路の負側に位置するＭＯＳＦＥＴ３６を、前縁側の０°〜６０°期間で１０回だけ断続的にオンし、後縁側の１２０°〜１８０°期間で５回だけ断続的にオンする。同じく入力電力が高く、負レベルとなる半サイクルの位相では、Ｗ相用直列回路の正側に位置するＭＯＳＦＥＴ３５を、前縁側の０°〜６０°期間で１０回だけ断続的にオンし、後縁側の１２０°〜１８０°期間で５回だけ断続的にオンする。   Regarding the phase current Iw, in the half cycle phase where the input power is low and becomes a positive level, the MOSFET 36 positioned on the negative side of the W-phase series circuit is intermittently only 8 times in the period of 0 ° to 60 ° on the leading edge side. And is intermittently turned on only seven times in the period of 120 ° to 180 ° on the trailing edge side. Similarly, in the half cycle phase in which the input power is low and becomes a negative level, the MOSFET 35 positioned on the positive side of the W-phase series circuit is intermittently turned on only 8 times in the period of 0 ° to 60 ° on the leading edge side, It turns on intermittently only 7 times in the 120 ° -180 ° period on the edge side. In the half-cycle phase where the input power is high and becomes a positive level, the MOSFET 36 located on the negative side of the W-phase series circuit is intermittently turned on only 10 times in the period of 0 ° to 60 ° on the leading edge side, and the trailing edge side Is intermittently turned on only 5 times in the period of 120 ° to 180 °. Similarly, in the half cycle phase where the input power is high and becomes a negative level, the MOSFET 35 positioned on the positive side of the W-phase series circuit is intermittently turned on 10 times in the period of 0 ° to 60 ° on the leading edge side, and It turns on intermittently only 5 times in the 120 ° -180 ° period on the edge side.

以上のように、相電流の半サイクルにおける前縁側および後縁側の短絡回数Ｎ１，Ｎ２をＮ１＞Ｎ２とし、その回数比率Ｎ１／Ｎ２を、低入力時よりも高入力時のほうが小さくなるように切換えることにより、リアクトル２１，２２，２３を設けていることによる高調波低減効果を得ながら、低入力時および高入力時のいずれにおいても力率を向上させて、相電流Ｉｕ，Ｉｖ，Ｉｗにおける高周波スイッチングノイズを低減できる。ひいては、リアクトル２１，２２，２３として小形で電流・インダクタンス容量が大きいリアクトルを採用した三相アクティブフィルタを構成できる。リアクトル２１，２２，２３が小形になれば、三相整流装置１０が搭載される機器の小型化が図れる。   As described above, the number of short circuits N1 and N2 on the leading edge side and the trailing edge side in the half cycle of the phase current is set to N1> N2, and the number ratio N1 / N2 is smaller at high input than at low input. By switching, the power factor is improved at both the low input and the high input while obtaining the harmonic reduction effect by providing the reactors 21, 22, 23, and the phase currents Iu, Iv, Iw High frequency switching noise can be reduced. As a result, a three-phase active filter that employs a small reactor having a large current / inductance capacity as the reactors 21, 22, and 23 can be configured. If the reactors 21, 22, and 23 are reduced in size, it is possible to reduce the size of the device on which the three-phase rectifier 10 is mounted.

しかも、図３のスイッチングデータ切換え条件は、回数比率Ｎ１／Ｎ２の切換え点を、入力電力の上昇時は設定値８０％とし、入力電力の下降時は設定値６０％として異ならせるヒステリシス特性を有する。このヒステリシス特性の採用により、回数比率Ｎ１／Ｎ２が入力電力の変化に伴って頻繁に切換わる不具合を防ぐことができる。なお、図４、５は、低入力時のデータであり、入力電力８０％以上の領域は、過渡的な状態で発生する可能性があるため、図示しているが、現実的にこの領域のデータが制御に用いられることはほとんどない。同様に図８、９は、高入力時のデータであり、入力電力６０％未満の領域のデータが制御に用いられることはほとんどない。   Moreover, the switching data switching condition of FIG. 3 has a hysteresis characteristic that makes the switching point of the frequency ratio N1 / N2 different as a set value of 80% when the input power increases and as a set value of 60% when the input power decreases. . By adopting this hysteresis characteristic, it is possible to prevent the frequency ratio N1 / N2 from being frequently switched as the input power changes. 4 and 5 are data at the time of low input, and an area where the input power is 80% or more is illustrated because it may occur in a transient state. Data is rarely used for control. Similarly, FIGS. 8 and 9 show data at the time of high input, and data in an area where the input power is less than 60% is rarely used for control.

ＭＯＳＦＥＴがオン，オフする０°〜６０°期間および１２０°〜１８０°期間は、１つの相のオン，オフ制御が他の２つの相の電流波形に及ぼす影響が少ない期間である。この期間を選定していることにより、高周波スイッチングノイズの低減効果および高調波の低減効果が大きくなる。   The 0 ° to 60 ° period and the 120 ° to 180 ° period during which the MOSFET is turned on and off are periods in which the ON / OFF control of one phase has little influence on the current waveforms of the other two phases. By selecting this period, the effect of reducing high-frequency switching noise and the effect of reducing harmonics are increased.

また、本実施形態においては、入力電力検出部５１は、三相交流電源１の電圧が安定していることを前提として、その入力電力を電流検出回路５０で検出される相電流Ｉｕ，Ｉｖ，Ｉｗにて検出したが、さらに正確電力を検出する必要があれば、三相交流電源１の各相の電圧を検出して、この電圧と電流によって入力電力を算出しても良い。   Further, in the present embodiment, the input power detection unit 51 assumes that the voltage of the three-phase AC power supply 1 is stable, and the phase power Iu, Iv, Although it is detected by Iw, if it is necessary to detect the power more accurately, the voltage of each phase of the three-phase AC power supply 1 may be detected, and the input power may be calculated from this voltage and current.

さらに、本実施形態においては、各相の零クロス点を、電流検出回路５０で検出した相電流Ｉｕ，Ｉｖ，Ｉｗの零クロス点で検出したが、相電流と相電圧の位相はほぼ一致するため、各相の電圧を検出する電圧検出手段を設け、この電圧検出手段によって検出される相電圧の零クロス点としても良い。   Furthermore, in the present embodiment, the zero cross point of each phase is detected by the zero cross point of the phase currents Iu, Iv, Iw detected by the current detection circuit 50, but the phase of the phase current and the phase voltage are almost the same. Therefore, voltage detection means for detecting the voltage of each phase may be provided, and the zero cross point of the phase voltage detected by the voltage detection means may be used.

なお、上記実施形態では、整流用のダイオードとしてＭＯＳＦＥＴの寄生ダイオードを用い、そのＭＯＳＦＥＴをそのまま短絡用のスイッチとして用いたが、その構成に限定はなく、種々変形可能である。その他、上記実施形態およびその変形例は、例として提示したものであり、発明の範囲を限定することは意図していない。この新規な実施形態および変形例は、その他の様々な形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、書き換え、変更を行うことができる。これら実施形態や変形は、発明の範囲は要旨に含まれるとともに、特許請求の範囲に記載された発明とその均等の範囲に含まれる。   In the above embodiment, a parasitic diode of a MOSFET is used as a rectifying diode and the MOSFET is used as it is as a short-circuit switch. However, the configuration is not limited and various modifications can be made. In addition, the said embodiment and its modification are shown as an example, and are not intending limiting the range of invention. The novel embodiments and modifications can be implemented in various other forms, and various omissions, rewrites, and changes can be made without departing from the spirit of the invention. In these embodiments and modifications, the scope of the invention is included in the gist, and is included in the invention described in the claims and the equivalents thereof.

１…三相交流電源、２…負荷、１０…三相整流装置、２１，２２，２３…リアクトル、２４…平滑コンデンサ、３０…整流回路、３１，３２，３３，３４，３５，３６…ＭＯＳＦＥＴ（スイッチ）、３１ａ，３２ａ，３３ａ，３４ａ，３５ａ，３６ａ…ダイオード、４１，４２，４３…電流センサ、５０…電流検出回路、５１…入力電力検出部、５２…零クロス点検出部、５３…メモリ、５４…駆動部、６０…制御部   DESCRIPTION OF SYMBOLS 1 ... Three-phase alternating current power supply, 2 ... Load, 10 ... Three-phase rectifier, 21, 22, 23 ... Reactor, 24 ... Smoothing capacitor, 30 ... Rectifier circuit, 31, 32, 33, 34, 35, 36 ... MOSFET ( Switch), 31a, 32a, 33a, 34a, 35a, 36a ... diode, 41, 42, 43 ... current sensor, 50 ... current detection circuit, 51 ... input power detection unit, 52 ... zero cross point detection unit, 53 ... memory 54 ... Drive unit, 60 ... Control unit

Claims (4)

一対のダイオードを直列接続しその両ダイオードの相互接続点が三相交流電源のＵ相に接続されるＵ相用直列回路、一対のダイオードを直列接続しその両ダイオードの相互接続点が前記三相交流電源のＶ相に接続されるＶ相用直列回路、一対のダイオードを直列接続しその両ダイオードの相互接続点が前記三相交流電源のＷ相に接続されるＷ相用直列回路を有し、前記三相交流電源の電圧を直流電圧に変換して出力する整流回路と、
この整流回路の各ダイオードを短絡する複数のスイッチング素子と、
前記三相交流電源の各相と前記整流回路の各直列回路との接続間にそれぞれ設けた複数のリアクトルと、
前記三相交流電源からの入力電力を検出する検出手段と、
前記各直列回路の両ダイオードの相互接続点と前記整流回路の負側出力端との間を前記スイッチング素子を制御して、前記三相交流電源からの入力電流が正レベルとなる位相の前縁側で回数Ｎ１だけ断続的に短絡し同位相の後縁側で回数Ｎ２だけ断続的に短絡し、前記各直列回路の両ダイオードの相互接続点と前記整流回路の正側出力端との間を前記スイッチング素子を制御して、前記三相交流電源からの入力電流が負レベルとなる位相の前縁側で前記回数Ｎ１だけ断続的に短絡し同位相の後縁側で前記回数Ｎ２だけ断続的に短絡するとともに、前記回数Ｎ１，Ｎ２の比率Ｎ１／Ｎ２を前記検出手段の検出結果に応じて切換える制御手段と、
を備えることを特徴とする三相整流装置。 A series circuit for U phase in which a pair of diodes are connected in series and the interconnection point of both diodes is connected to the U phase of a three-phase AC power supply, and a pair of diodes are connected in series and the interconnection point of both diodes is the three-phase A series circuit for V phase connected to the V phase of the AC power supply, a series circuit for W phase in which a pair of diodes are connected in series, and an interconnection point between the two diodes is connected to the W phase of the three-phase AC power supply. A rectifier circuit that converts the voltage of the three-phase AC power source into a DC voltage and outputs the DC voltage;
A plurality of switching elements that short-circuit each diode of the rectifier circuit;
A plurality of reactors provided between each phase of the three-phase AC power supply and each series circuit of the rectifier circuit;
Detection means for detecting input power from the three-phase AC power source;
The leading edge side of the phase where the input current from the three-phase AC power source becomes a positive level by controlling the switching element between the interconnection point of both diodes of each series circuit and the negative side output terminal of the rectifier circuit In this case, the switching is intermittently shorted by the number of times N1 and intermittently shorted by the number of times N2 on the trailing edge side of the same phase, and the switching between the interconnection point of both diodes of each series circuit and the positive side output terminal of the rectifier circuit is performed. By controlling the element, the input current from the three-phase AC power source is intermittently shorted by the number N1 on the leading edge side of the phase where the input current becomes a negative level and intermittently shorted by the number N2 on the trailing edge side of the same phase. Control means for switching the ratio N1 / N2 of the times N1, N2 according to the detection result of the detection means;
A three-phase rectifier comprising: 前記制御手段は、前記検出手段の検出結果に応じた前記比率Ｎ１／Ｎ２の切換え点を前記検出手段の検出結果の上昇時と下降時で異ならせる、
ことを特徴とする請求項１記載の三相整流装置。 The control means makes the switching point of the ratio N1 / N2 corresponding to the detection result of the detection means different between when the detection result of the detection means rises and when it falls.
The three-phase rectifier according to claim 1. さらに、三相電源の各相の零クロス点を検出する零クロス点検出手段を設け、
前記制御手段は、前記検出手段の検出結果に応じた前記比率Ｎ１／Ｎ２の切換えを前記零クロス点検出手段の検出した零クロス点を基準に行う、
ことを特徴とする請求項１または請求項２記載の三相整流装置。 Furthermore, a zero cross point detecting means for detecting a zero cross point of each phase of the three-phase power source is provided,
The control means switches the ratio N1 / N2 according to the detection result of the detection means with reference to the zero cross point detected by the zero cross point detection means.
The three-phase rectifier according to claim 1 or 2, characterized by the above. 前記前縁は前記各相の零クロス点を基準として、０°〜６０°の期間、前記後縁は前記零クロス点を基準として、１２０°〜１８０°の期間とした、
ことを特徴とする請求項１乃至請求項３のいずれか記載の三相整流装置。 The leading edge has a period of 0 ° to 60 ° with reference to the zero cross point of each phase, and the trailing edge has a period of 120 ° to 180 ° with reference to the zero cross point.
The three-phase rectifier according to any one of claims 1 to 3, wherein
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