JP5790196B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP5790196B2 JP5790196B2 JP2011139018A JP2011139018A JP5790196B2 JP 5790196 B2 JP5790196 B2 JP 5790196B2 JP 2011139018 A JP2011139018 A JP 2011139018A JP 2011139018 A JP2011139018 A JP 2011139018A JP 5790196 B2 JP5790196 B2 JP 5790196B2
- Authority
- JP
- Japan
- Prior art keywords
- wire
- semiconductor device
- bonding
- surface electrode
- aluminum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/06181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/78313—Wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7855—Mechanical means, e.g. for severing, pressing, stamping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
- H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
- H01L2224/8518—Translational movements
- H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12032—Schottky diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
Landscapes
- Wire Bonding (AREA)
Description
この要求を満足するための一つの接合方法であるワイヤボンディング技術にも高い信頼性が求められる。
図11は、超音波ボンディング装置300の概略図である。この超音波ボンディング装置300は超音波ワイヤボンダとも言われる。
しかし、半導体チップ55の表面電極57上にワイヤ60をボンディングする構造の故障にいたる箇所に着目すると、このワイヤ60に起因する場合が少なくない。したがって、半導体チップ55の表面電極57とワイヤ60との接合部60aの信頼性を上げることは半導体装置200の信頼性を向上させる上から重要である。
また、前記の特許文献1〜4には、ワイヤボンディングした後、熱時効処理を行い、その後の冷却において、冷却速度を小さくすることで、熱ひずみの導入を抑制し、半導体チップの表面電極とワイヤの接合部の信頼性を高めることについては記載されていない。
また、特許請求の範囲の請求項3記載の発明によれば、請求項1または2に記載の発明において、前記アルミニウムワイヤの素材が、0.03質量%以下のNi元素が添加されたアルミニウムもしくは純アルミニウムであるとよい。
<実施例>
図1〜図6は、この発明の一実施例の半導体装置の製造方法であり、工程順に示した要部製造工程断面図である。この半導体装置は、例えば、IGBTチップとダイオードが逆並列接続されたパワーモジュールなどである。
つぎに、図6に示すように、ユニット100b上にケース13を被せて、ケース13内に保護材として例えばゲル14を充填し、外部導出端子9をケース13上から露出させてパワーモジュールである半導体装置100が出来上がる。この半導体装置100が、本発明の製造方法を用いて製作される半導体装置である。
これは、ボンディングした後の熱時効処理の有無と冷却速度によるワイヤ10と表面電極7の接合部10aの硬度変化を示す図である。
また、熱時効処理温度を250℃とした場合、冷却速度を0.5℃/minとすると、ボンディングしないワイヤ単体の硬度とほぼ同等(変化率100→98)になる。さらに、図示しないが、熱時効処理温度を300℃に上昇させた場合もボンディングしないワイヤ単体の硬度とほぼ同等になる。但し、300℃超に熱時効処理温度を上昇させると前記したように接合材2,8が軟化するため好ましくない。
以上のことをまとめると、ワイヤ母材として微量のNi添加のアルミニウムワイヤを用い、表面電極7として微量のSi添加のアルミニウム膜を用いた場合に、熱時効処理温度が200℃〜300℃、冷却速度が1℃/min以下とすることで、故障サイクル数が目標の3万回を達成できる。
2,8 接合材
3 導電パターン付き絶縁基板
4a,4b 導電パターン
5 半導体チップ
6 裏面電極
7 表面電極
9 外部導出端子
10 ワイヤ
10a 接合部
11 加熱炉
12 N2雰囲気
13 ケース
14 ゲル
Claims (4)
- 半導体チップの表面電極にアルミニウムワイヤがボンディングされた半導体装置の製造方法において、
前記アルミニウムワイヤを前記表面電極にボンディングした後、前記アルミニウムワイヤと前記表面電極を200℃以上、300℃以下の高温に保持し、前記アルミニウムワイヤの結晶粒を最低粒径が10μm以上で平均粒径が15〜100μmとなるように処理する工程と、
1℃/min以下の冷却速度で前記アルミニウムワイヤを徐冷する工程と、
を含むことを特徴とする半導体装置の製造方法。 - 前記冷却速度が0.5℃/min以下であることを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記アルミニウムワイヤの素材が、0.03質量%以下のNi元素が添加されたアルミニウムもしくは純アルミニウムであることを特徴とする請求項1または2に記載の半導体装置の製造方法。
- 前記表面電極の素材が、微量のSi元素が添加されたアルミニウムであることを特徴とする請求項1〜3のいずれか一項に記載の半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011139018A JP5790196B2 (ja) | 2011-06-23 | 2011-06-23 | 半導体装置の製造方法 |
CN201210210563.4A CN102842516B (zh) | 2011-06-23 | 2012-06-20 | 半导体器件的制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011139018A JP5790196B2 (ja) | 2011-06-23 | 2011-06-23 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013008758A JP2013008758A (ja) | 2013-01-10 |
JP5790196B2 true JP5790196B2 (ja) | 2015-10-07 |
Family
ID=47369757
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011139018A Active JP5790196B2 (ja) | 2011-06-23 | 2011-06-23 | 半導体装置の製造方法 |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP5790196B2 (ja) |
CN (1) | CN102842516B (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5978589B2 (ja) * | 2011-10-18 | 2016-08-24 | 富士電機株式会社 | パワー半導体装置の製造方法 |
CN103794578A (zh) * | 2014-01-24 | 2014-05-14 | 嘉兴斯达微电子有限公司 | 一种高频大功率碳化硅mosfet模块 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63293933A (ja) * | 1987-05-27 | 1988-11-30 | Hitachi Ltd | ワイヤボンディング方法およびワイヤボンディング装置 |
JP2865973B2 (ja) * | 1993-05-11 | 1999-03-08 | 株式会社カイジョー | ワイヤループ変形防止ワイヤボンディング装置 |
JPH07135234A (ja) * | 1993-11-09 | 1995-05-23 | Hitachi Ltd | パワー半導体モジュール |
JP3055511B2 (ja) * | 1997-12-02 | 2000-06-26 | 日本電気株式会社 | 半導体装置の製造方法 |
JPH11330134A (ja) * | 1998-05-12 | 1999-11-30 | Hitachi Ltd | ワイヤボンディング方法およびその装置並びに半導体装置 |
JP2001110840A (ja) * | 1999-10-13 | 2001-04-20 | Sony Corp | ワイヤボンド装置及び方法 |
DE112008003425B4 (de) * | 2007-12-20 | 2023-08-31 | Aisin Aw Co., Ltd. | Verfahren zum Herstellen eines Halbleiterbauelements |
JP2010182911A (ja) * | 2009-02-06 | 2010-08-19 | Renesas Electronics Corp | 半導体装置の製造方法及びワイヤボンダ |
-
2011
- 2011-06-23 JP JP2011139018A patent/JP5790196B2/ja active Active
-
2012
- 2012-06-20 CN CN201210210563.4A patent/CN102842516B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
JP2013008758A (ja) | 2013-01-10 |
CN102842516B (zh) | 2015-04-08 |
CN102842516A (zh) | 2012-12-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2023040253A (ja) | パワー半導体装置およびその製造方法 | |
Ramminger et al. | Crack mechanism in wire bonding joints | |
US9748186B2 (en) | Semiconductor device and method for manufacturing the semiconductor device | |
US9818716B2 (en) | Power module | |
CN107615464B (zh) | 电力用半导体装置的制造方法以及电力用半导体装置 | |
JP6336138B2 (ja) | 半導体装置 | |
CN108231613B (zh) | 将电子芯片与连接器主体互连并使连接器主体成形的通用过程 | |
CN109698179B (zh) | 半导体装置及半导体装置的制造方法 | |
JP2014082367A (ja) | パワー半導体装置 | |
JP7450769B2 (ja) | 半導体装置の製造方法、半導体装置用基板の製造方法、半導体装置及び電力変換装置 | |
JP5790196B2 (ja) | 半導体装置の製造方法 | |
JP5978589B2 (ja) | パワー半導体装置の製造方法 | |
WO2017183222A1 (ja) | 半導体装置およびその製造方法 | |
Nishimura et al. | Development of ultrasonic welding for IGBT module structure | |
JP6303776B2 (ja) | 半導体装置 | |
JP5866075B2 (ja) | 接合材の製造方法、接合方法、および電力用半導体装置 | |
US20110260307A1 (en) | Integrated circuit including bond wire directly bonded to pad | |
Rittner et al. | Robust top side contact technology on power semiconductors-results from the public funded projectpropower' | |
JP2015185612A (ja) | 接合構造体およびその製造方法 | |
JP2016143826A (ja) | 電力用半導体装置、超音波接合方法および超音波接合装置 | |
US11430744B2 (en) | Die-attach method to compensate for thermal expansion | |
US20190157412A1 (en) | Semiconductor chip and power module, and manufacturing method of the same | |
CN105428264B (zh) | 半导体装置的制造方法 | |
Bhatt et al. | Optimization of Ultrasonic and Thermosonic Wire-Bonding Parameters on Au/Ni Plated PCB Substrate | |
JP7487614B2 (ja) | 半導体装置、半導体装置の製造方法及び電力変換装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20140514 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150224 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150423 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150519 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150602 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20150707 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20150720 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5790196 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |