JP5720361B2 - Tracking receiver - Google Patents

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JP5720361B2
JP5720361B2 JP2011070419A JP2011070419A JP5720361B2 JP 5720361 B2 JP5720361 B2 JP 5720361B2 JP 2011070419 A JP2011070419 A JP 2011070419A JP 2011070419 A JP2011070419 A JP 2011070419A JP 5720361 B2 JP5720361 B2 JP 5720361B2
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仁 高木
仁 高木
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Mitsubishi Electric Corp
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Description

本発明は、人工衛星などの飛翔体からの無線信号を受信して追尾するための追尾受信機に関する。   The present invention relates to a tracking receiver for receiving and tracking a radio signal from a flying object such as an artificial satellite.

追尾受信機とは、人工衛星などの飛翔体からの無線信号を受信したアンテナ給電部が出力する和信号及び差信号を受けて、相関検波を行うことによりアンテナの追尾誤差を直接検出する方式の受信機である。   A tracking receiver is a method that directly detects the tracking error of an antenna by receiving a sum signal and a difference signal output from an antenna feeding unit that receives a radio signal from a flying object such as an artificial satellite and performing correlation detection. It is a receiver.

このような追尾受信機において、飛翔体からの無線信号が高ビットレートの変調波のような広帯域信号である場合、従来から、帯域を有する信号を90゜移相器により移相するために移相器の周波数特性や遅延の影響のために比帯域に限界があった。すなわち、移相器がほぼ一定の位相量を与える許容周波数変化幅は一般に狭く、信号の中心周波数に対する周波数変化範囲の割合(これを以降「比帯域」呼ぶ)が数%以下と少ないことが必要である。   In such a tracking receiver, when the radio signal from the flying object is a broadband signal such as a high-bit-rate modulated wave, the signal having the band is conventionally shifted in order to be phase-shifted by a 90 ° phase shifter. Due to the frequency characteristics of the phase shifter and the influence of delay, there was a limit to the ratio band. In other words, the allowable frequency change range in which the phase shifter gives an almost constant phase amount is generally narrow, and the ratio of the frequency change range to the center frequency of the signal (hereinafter referred to as “ratio band”) needs to be as small as a few percent It is.

従って、比帯域が大きくなると周波数変化が大きいために移相器の位相調整量が大幅に変動し、アンテナ制御装置へ出力する誤差信号の精度が劣化するという課題があった。特許文献1においては、この課題を解決するために入力周波数を高い周波数に変換して移相調整を行うことにより移相調整量を減らし、比帯域の大きい入力信号に対して移相量の変化を少なくでき、高精度に誤差検出できることを提案している。   Therefore, there is a problem that the phase adjustment amount of the phase shifter greatly fluctuates because the frequency change is large when the ratio band is large, and the accuracy of the error signal output to the antenna control device is deteriorated. In Patent Document 1, in order to solve this problem, the amount of phase shift adjustment is reduced by converting the input frequency to a high frequency and performing phase shift adjustment, and the amount of phase shift is changed with respect to an input signal having a large ratio band. It is proposed that errors can be reduced and errors can be detected with high accuracy.

特開平8−050171号公報(第1−28頁、第1図)JP-A-8-050171 (page 1-28, FIG. 1)

特許文献1によると、追尾誤差信号の精度を向上できるものの、入力周波数を高い周波数に変換するために、装置が大型化するという問題があった。装置の大型化を防ぎ、かつ無線信号の広帯域化に対応した比帯域によらない安定した誤差検出方式が望まれていた。   According to Patent Document 1, although the accuracy of the tracking error signal can be improved, there is a problem that the apparatus becomes large in order to convert the input frequency to a high frequency. There has been a demand for a stable error detection method that does not depend on a specific band corresponding to widening of a radio signal while preventing an increase in the size of the apparatus.

本発明は、このような問題を解決するためのものであり、比帯域の大きな入力信号であっても安定した誤差信号を取り出すことができる追尾受信機を得ることを目的とする。   An object of the present invention is to solve such a problem, and an object of the present invention is to obtain a tracking receiver that can extract a stable error signal even with an input signal having a large ratio band.

飛翔体からの無線信号を受信したアンテナの給電部からの出力を増幅しIF帯信号に変換した信号である和信号及び差信号を受けて、相関検波を行ない前記アンテナの追尾誤差を検出する追尾受信機において、前記和信号及び差信号をそれぞれ帯域制限する和信号用及び差信号用BPFと、これら帯域制限された各出力信号をレベル調整する和信号用及び差信号用AGCと、これらレベル調整された各出力信号をA/D変換する和信号用及び差信号用A/D変換器と、これらA/D変換された各出力信号と基準用クロックが発生した基準用クロック信号並びにこれを90°移相器が90°移相させた信号とをそれぞれ乗算する和信号用及び差信号用乗算器と、これら乗算された各出力信号の高周波成分を除去する和信号用及び差信号用LPFと、これら除去された各出力信号を相関検波し誤差信号を検出する相関検波回路とを備え、前記相関検波回路は、前記和信号用乗算器で、A/D変換された前記和信号に基準用クロック信号を乗算した基準和信号と、前記和信号用乗算器で、A/D変換された前記和信号に基準用クロック信号を90°移相させた信号を乗算した90°移相和信号と、前記差信号用乗算器で、A/D変換された前記差信号に基準用クロック信号を乗算した基準差信号と、前記差信号用乗算器で、A/D変換された前記差信号に基準用クロック信号を90°移相させた信号を乗算した90°移相差信号と、を入力し、前記基準和信号と前記基準差信号とを乗算した信号に前記90°移相和信号と前記90°移相差信号とを乗算した信号を加算したAZ追尾誤差信号を生成し、前記基準差信号と前記90°移相和信号とを乗算した信号から前記90°移相差信号と前記基準和信号とを乗算した信号を減算したEL追尾誤差信号を生成し、前記AZ追尾誤差信号及び前記EL追尾誤差信号を前記誤差信号として出力する

Tracking that detects a tracking error of the antenna by performing correlation detection by receiving a sum signal and a difference signal, which are signals obtained by amplifying the output from the power feeding unit of the antenna that has received the radio signal from the flying object and converting it to an IF band signal In the receiver, the sum signal and difference signal BPF for band-limiting the sum signal and the difference signal, the sum signal and difference signal AGC for level-adjusting each band-limited output signal, and the level adjustment A sum signal and difference signal A / D converter for A / D converting each output signal, a reference clock signal generated by each A / D converted output signal and a reference clock, and 90 A sum signal and difference signal multiplier that multiplies the signals shifted by 90 ° by the phase shifter, and a sum signal and difference signal LPF that removes high frequency components of each of the multiplied output signals; And a correlation detection circuit for detecting an error signal by correlating each of the removed output signals, and the correlation detection circuit uses the sum signal multiplier as a reference for the A / D converted sum signal. A reference sum signal obtained by multiplying the clock signal, and a 90 ° phase-shift sum signal obtained by multiplying the sum signal that has been A / D converted by the sum signal multiplier by a signal obtained by shifting the reference clock signal by 90 °. A reference difference signal obtained by multiplying the difference signal A / D converted by the difference signal multiplier by a reference clock signal, and a reference signal obtained by multiplying the difference signal A / D converted by the difference signal multiplier. 90 ° phase shift difference signal obtained by multiplying the clock signal for phase shift by 90 ° and a signal obtained by multiplying the reference sum signal by the reference difference signal and the 90 ° phase shift sum signal and the 90 ° signal. ° Generates an AZ tracking error signal that is the sum of signals multiplied by the phase shift signal And generating an EL tracking error signal by subtracting a signal obtained by multiplying the 90 ° phase shift difference signal and the reference sum signal from a signal obtained by multiplying the reference difference signal and the 90 ° phase shift sum signal. An error signal and the EL tracking error signal are output as the error signal .

本発明によれば、基準用クロック及びこれを移相器により90°移相した信号を用いることにより、帯域を有する和信号及び差信号そのものを移相させる必要がなく比帯域の問題を解決できる。また、デジタル処理回路の採用により装置小型化の効果も奏する。   According to the present invention, by using a reference clock and a signal whose phase is shifted by 90 ° by a phase shifter, it is not necessary to shift the phase of the sum signal and the difference signal itself, and the problem of the ratio band can be solved. . In addition, the adoption of a digital processing circuit also has the effect of downsizing the apparatus.

本発明の実施の形態1に係る追尾受信機の構成を表すブロック図である。It is a block diagram showing the structure of the tracking receiver which concerns on Embodiment 1 of this invention. 本発明の実施の形態1に追尾受信機の構成のうち、相関検波器の詳細を示した図である。It is the figure which showed the detail of the correlation detector among the structures of the tracking receiver in Embodiment 1 of this invention. 本発明の実施の形態2に係る追尾受信機の構成を表すブロック図である。It is a block diagram showing the structure of the tracking receiver which concerns on Embodiment 2 of this invention. 従来の衛星通信におけるモノパルス追尾方式の原理を説明する図である。It is a figure explaining the principle of the monopulse tracking system in the conventional satellite communication. 従来の追尾受信機の構成を表すブロック図である。It is a block diagram showing the structure of the conventional tracking receiver.

実施の形態1.
図4には、衛星通信におけるモノパルス追尾方式の原理を説明する図を示す。モノパルス追尾方式は、複数の対称に設置したアンテナ給電部からの信号の振幅を比較し、アンテナの追尾誤差を直接検出する方法である。図(a)にはモノパルス追尾方式の概略構成、図(b)には各ホーンのパターン、(c)には合成パターンを示す。アンテナ主軸に対して四つのホーンを対称に置き、それらホーンから出力信号である和信号と差信号を検出する。衛星方向とアンテナの主軸方向のずれは、和信号レベルを基準としたときの差信号レベルを検出することによって得ることができる。また、円形導波管の高次モ−ドであるTM01モード、TE01モードおよびTE21モードなどの各モード成分が発生しないことを利用して追尾する高次モード方式の場合でも同様に、和信号と差信号が出力される。
Embodiment 1 FIG.
FIG. 4 is a diagram illustrating the principle of the monopulse tracking method in satellite communication. The monopulse tracking method is a method of directly detecting an antenna tracking error by comparing the amplitudes of signals from a plurality of symmetrically installed antenna power supply units. FIG. 1A shows a schematic configuration of a monopulse tracking system, FIG. 2B shows a pattern of each horn, and FIG. Four horns are placed symmetrically with respect to the antenna main axis, and sum signals and difference signals as output signals are detected from these horns. The deviation between the satellite direction and the antenna main axis direction can be obtained by detecting the difference signal level with respect to the sum signal level. Similarly, in the case of a high-order mode system that tracks by utilizing the fact that each mode component such as TM01 mode, TE01 mode, and TE21 mode, which are high-order modes of a circular waveguide, is not generated, A difference signal is output.

図5は、従来の追尾受信機の構成を表すブロック図であり、図1に示す実施の形態1のブロック図について説明する前に、従来の追尾受信機のブロック図を説明する。図4において、アンテナ1から入力された人工衛星などの飛翔体からの受信信号を、給電部2が和信号と差信号に分岐する。ここで、受信信号は、ビーコン信号とは限らず、高ビットレートの変調波のような広帯域信号である場合を想定している。分岐した各信号をそれぞれ、和信号用LNA(「Low Noise Amplifier」の略、低雑音増幅器)3、4が信号増幅した後、CONV(「CONVerter」の略、受信周波数変換器)5,6がIF帯信号に変換し、追尾受信機7に送る。   FIG. 5 is a block diagram showing the configuration of a conventional tracking receiver. Before describing the block diagram of the first embodiment shown in FIG. 1, a block diagram of the conventional tracking receiver will be described. In FIG. 4, the power feeding unit 2 branches a received signal from a flying object such as an artificial satellite input from the antenna 1 into a sum signal and a difference signal. Here, the received signal is not limited to a beacon signal, but is assumed to be a wideband signal such as a high-bit-rate modulated wave. Each of the branched signals is amplified by a sum signal LNA (abbreviation of “Low Noise Amplifier”, 3, 4) and then CONV (abbreviation of “CONVERter”, reception frequency converter) 5, 6. It is converted into an IF band signal and sent to the tracking receiver 7.

追尾受信機7においては、和信号と差信号をそれぞれ、和信号用BPF(「Band Pass Filter」の略、帯域濾波器)8,差信号用BPF9が帯域制限を行ない、和信号用AGC(「Automatic Gain Control」の略、自動利得制御器)10、差信号用AGC11がレベル調整を行なう。その後、相関検波回路31において、乗算器32が和信号であるsumと差信号であるerrorを掛け合わせ、LPF(「Low Pass Filter」の略、低周波濾波器)33が濾波することにより方位角(AZ)の追尾誤差E・cosθを得る。   In the tracking receiver 7, the sum signal and difference signal are band-limited by the sum signal BPF (abbreviation of “Band Pass Filter”, band filter) 8 and the difference signal BPF 9, respectively, and the sum signal AGC (“ The automatic gain controller 10) and the difference signal AGC 11 perform level adjustment. Thereafter, in the correlation detection circuit 31, the multiplier 32 multiplies the sum signal sum and the error signal error, and the LPF (abbreviation of “Low Pass Filter”, low frequency filter) 33 filters the azimuth angle. A tracking error E · cos θ of (AZ) is obtained.

一方、和信号であるsumを90°移相器34により移相させた信号であるsum90と差信号errorを乗算器35が掛け合わせ、LPF36が濾波することにより仰角(EL)の追尾誤差E・sinθが得られる。各追尾誤差はアンテナ制御装置に送信され、アンテナの指向方向を補正するための演算に用いられる。和信号用AGC10,差信号用AGC11より以降の演算は相関検波回路31として知られている。   On the other hand, the sum 35, which is a signal obtained by shifting the sum signal by the 90 ° phase shifter 34, is multiplied by the difference signal error by the multiplier 35, and the LPF 36 filters the elevation angle (EL) tracking error E ·. sin θ is obtained. Each tracking error is transmitted to the antenna control device and used for calculation for correcting the directivity direction of the antenna. The calculation after the sum signal AGC 10 and the difference signal AGC 11 is known as a correlation detection circuit 31.

次に、従来の動作を数式で表わし更に詳細に説明する。ここでは簡単化のため信号は無変調信号で表現している。和信号であるsumは(1)式、差信号であるerrorは(2)式、90°移相した和信号であるsum90は(3)式で、それぞれ表される。ここで、E:誤差感度、θ:指向誤差(sum/error位相差)である。   Next, the conventional operation will be described in detail with mathematical expressions. Here, for simplicity, the signal is expressed as an unmodulated signal. Sum that is a sum signal is expressed by equation (1), error that is a difference signal is expressed by equation (2), and sum90 that is a 90-phase shifted sum signal is expressed by equation (3). Here, E: error sensitivity, θ: pointing error (sum / error phase difference).

Figure 0005720361
Figure 0005720361

相関検波回路31において、乗算器32がsum*errorを(4)式で演算した後、LPF33が2ωtの項を削除し(5)式となり、方位角(AZ)の追尾誤差E・cosθが得られる。   In the correlation detection circuit 31, after the multiplier 32 calculates sum * error by the equation (4), the LPF 33 deletes the term of 2ωt to obtain the equation (5), and the tracking error E · cos θ of the azimuth angle (AZ) is obtained. It is done.

Figure 0005720361
Figure 0005720361

また、乗算器35がsum90*errorを(6)式で演算した後、LPF36が2ωtの項を削除し(7)式となり、仰角(EL)の追尾誤差E・sinθが得られる。   Further, after the multiplier 35 calculates sum90 * error by the equation (6), the LPF 36 deletes the term of 2ωt to obtain the equation (7), and the tracking error E · sin θ of the elevation angle (EL) is obtained.

Figure 0005720361
Figure 0005720361

以上のようにして従来の追尾受信機は、入力された和信号、差信号から追尾誤差成分である、E・cosθ、E・sinθの各成分を抽出していた。   As described above, the conventional tracking receiver extracts components E · cos θ and E · sin θ, which are tracking error components, from the input sum signal and difference signal.

次に、図1により本実施の形態1のブロック図を説明する。図1において、和信号用AGC10、差信号用AGC11までのブロック図は、上記に示した従来の構成と同じである。和信号用A/D変換器12、差信号用A/D変換器13はそれぞれ、和信号用AGC10、差信号用AGC11の出力信号を、デジタル化する。デジタル化するのは、後の演算操作が小型化可能なためである。和信号用乗算器16、17、並びに差信号用乗算器18、19がそれぞれ、デジタル化された和信号、差信号と、基準用クロック14が発生する基準用クロック信号並びに、90°移相器15により90°移相された基準用クロック信号とをそれぞれ乗算し、ベースバンド変換する。次に、和信号用LPF20、21、並びに差信号用LPF22、23が、それぞれ乗算された信号の高周波成分を除去した後、相関検波回路24に出力する。相関検波回路24が、図2に示す構成により演算を行い位相成分を取り出す。   Next, a block diagram of the first embodiment will be described with reference to FIG. In FIG. 1, the block diagram from the sum signal AGC 10 to the difference signal AGC 11 is the same as the conventional configuration shown above. The sum signal A / D converter 12 and the difference signal A / D converter 13 respectively digitize the output signals of the sum signal AGC 10 and the difference signal AGC 11. The reason for digitization is that later arithmetic operations can be miniaturized. The sum signal multipliers 16 and 17 and the difference signal multipliers 18 and 19 are respectively digitized sum and difference signals, a reference clock signal generated by the reference clock 14, and a 90 ° phase shifter. 15 is multiplied by the reference clock signal phase-shifted by 90 ° by 15 to perform baseband conversion. Next, the sum signal LPFs 20 and 21 and the difference signal LPFs 22 and 23 remove the high frequency components of the multiplied signals, respectively, and then output them to the correlation detection circuit 24. The correlation detection circuit 24 performs an operation with the configuration shown in FIG. 2 and extracts a phase component.

次に、図2に示すブロック図を数式で表わし更に詳細に説明する。ここでは簡単化のため信号は無変調信号で表現している。和信号sumは(8)式、差信号errorは(9)式、基準用クロック信号loは(10)式、90°移相した基準用クロック信号lo90は(11)式でそれぞれ表される。ここで、E:誤差感度、θ:指向誤差(sum/error位相差)である。   Next, the block diagram shown in FIG. Here, for simplicity, the signal is expressed as an unmodulated signal. The sum signal sum is expressed by equation (8), the difference signal error is expressed by equation (9), the reference clock signal lo is expressed by equation (10), and the reference clock signal lo90 shifted by 90 ° is expressed by equation (11). Here, E: error sensitivity, θ: pointing error (sum / error phase difference).

Figure 0005720361
Figure 0005720361

基準クロック信号loと和信号sumを和信号用乗算器16が掛け合わせた信号Isは(12)式となり、和信号用LPF20が(Ω+ω)tの項を削除し、(13)式となる。   The signal Is obtained by multiplying the reference clock signal lo and the sum signal sum by the sum signal multiplier 16 is expressed by Equation (12), and the sum signal LPF 20 deletes the term (Ω + ω) t and becomes Equation (13).

Figure 0005720361
Figure 0005720361

90°移相された基準クロック信号lo90と和信号sumを和信号用乗算器17が掛け合わせた信号Qsは(14)式となり、和信号用LPF21が(Ω+ω)tの項を削除し(15)式となる。   The signal Qs obtained by multiplying the reference clock signal lo90 shifted by 90 ° and the sum signal sum by the sum signal multiplier 17 is expressed by the equation (14), and the sum signal LPF 21 deletes the term (Ω + ω) t (15 ).

Figure 0005720361
Figure 0005720361

基準クロック信号loと和信号sumを差信号用乗算器18が掛け合わせた信号Ieは、(16)式となり、差信号用LPF22が(Ω+ω)tの項を削除し(17)式となる。   The signal Ie obtained by multiplying the reference clock signal lo and the sum signal sum by the difference signal multiplier 18 becomes the equation (16), and the difference signal LPF 22 deletes the term (Ω + ω) t and becomes the equation (17).

Figure 0005720361
Figure 0005720361

90°移相された基準クロック信号lo90と差信号errorを差信号用乗算器19が掛け合わせた信号Qeは、(18)式となり、差信号用LPF23が(Ω+ω)tの項を削除し(19)式となる。   The signal Qe obtained by multiplying the reference clock signal lo90 phase-shifted by 90 ° and the difference signal error by the difference signal multiplier 19 becomes the equation (18), and the difference signal LPF 23 deletes the term (Ω + ω) t ( 19).

Figure 0005720361
Figure 0005720361

図2に示す相関検波回路24は、AZ追尾用乗算器25、26、EL追尾用乗算器27、28、加算器29、及び減算器30を有しており、以下の演算が行われる。   The correlation detection circuit 24 shown in FIG. 2 includes AZ tracking multipliers 25 and 26, EL tracking multipliers 27 and 28, an adder 29, and a subtractor 30, and the following calculation is performed.

Figure 0005720361
Figure 0005720361

以上により、入力された和信号、差信号をベースバンド変換して得られたI−Q信号を相関検波することにより、アンテナの追尾誤差成分であるE・cosθ、E・sinθの各成分を出力できる。以上は無変調信号により導出したが、広帯域信号の場合においても無変調信号の場合と原理上変わりなく、帯域を有する和信号を移相器を用いて移相させる必要がないので従来の課題である比帯域の問題を解消できる。また、本構成は比帯域の問題を解決することを目的としているが、無変調信号の場合でも動作し、デジタル処理回路の採用による装置小型化の効果も有する。   As described above, by performing correlation detection on the IQ signal obtained by baseband conversion of the input sum signal and difference signal, the respective components of E · cos θ and E · sin θ, which are tracking error components of the antenna, are output. it can. The above is derived from an unmodulated signal. However, even in the case of a wideband signal, the principle is the same as in the case of an unmodulated signal. A certain bandwidth problem can be solved. Further, although this configuration is intended to solve the problem of the ratio band, it operates even in the case of an unmodulated signal, and has an effect of downsizing the apparatus by employing a digital processing circuit.

実施の形態2.
図3には、実施の形態2に係る追尾受信機の構成を表すブロック図を示す。
実施の形態1においては、和信号、差信号それぞれについて、AGCの後にA/D変換する構成を示したが、A/D変換を先に行うことによりAGCをデジタル処理を行う構成としても同様の効果が得られる。従って、図3において、AGCとA/D変換器の処理手順が異なる以外、構成は図1と同様であり、実施の形態1と同様の効果を奏する。
Embodiment 2. FIG.
FIG. 3 is a block diagram showing the configuration of the tracking receiver according to the second embodiment.
In the first embodiment, the configuration in which A / D conversion is performed after the AGC for each of the sum signal and the difference signal has been described. An effect is obtained. Therefore, in FIG. 3, the configuration is the same as in FIG. 1 except that the processing procedures of the AGC and the A / D converter are different, and the same effects as in the first embodiment are achieved.

1 アンテナ
2 給電部
3 和信号用LNA
4 差信号用LNA
5 和信号用CONV
6 差信号用CONV
7 追尾受信機
8 和信号用BPF
9 差信号用BPF
10 和信号用AGC
11 差信号用AGC
12 和信号用A/D変換器
13 差信号用A/D変換器
14 基準用クロック
15 90°移相器
16 和信号用乗算器
17 和信号用乗算器
18 差信号用乗算器
19 差信号用乗算器
20 和信号用LPF
21 和信号用LPF
22 差信号用LPF
23 差信号用LPF
24 相関検波回路
25 AZ追尾用乗算器
26 AZ追尾用乗算器
27 EL追尾用乗算器
28 EL追尾用乗算器
29 加算器
30 減算器
31 相関検波回路
32 乗算器
33 LPF
34 90°移相器
35 乗算器
36 LPF。
1 Antenna 2 Feeder 3 Sum signal LNA
4 LNA for difference signal
5 CONV for sum signal
6 CONV for difference signal
7 Tracking receiver 8 Sum signal BPF
9 BPF for difference signal
10 AGC for sum signal
11 AGC for difference signal
12 A / D converter for sum signal 13 A / D converter for difference signal 14 Reference clock 15 90 ° phase shifter 16 Multiplier for sum signal 17 Multiplier for sum signal 18 Multiplier for difference signal 19 For difference signal Multiplier 20 LPF for sum signal
21 LPF for sum signal
22 LPF for difference signal
23 LPF for difference signal
24 Correlation detection circuit 25 AZ tracking multiplier 26 AZ tracking multiplier 27 EL tracking multiplier 28 EL tracking multiplier 29 Adder 30 Subtractor 31 Correlation detection circuit 32 Multiplier 33 LPF
34 90 ° phase shifter 35 multiplier 36 LPF.

Claims (1)

飛翔体からの無線信号を受信したアンテナの給電部からの出力を増幅しIF帯信号に変換した信号である和信号及び差信号を受けて、相関検波を行ない前記アンテナの追尾誤差を検出する追尾受信機において、
前記和信号及び差信号をそれぞれ帯域制限する和信号用及び差信号用BPFと、
これら帯域制限された各出力信号をレベル調整する和信号用及び差信号用AGCと、
これらレベル調整された各出力信号をA/D変換する和信号用及び差信号用A/D変換器と、
これらA/D変換された各出力信号、基準用クロックが発生した基準用クロック信号、並びにこの基準用クロック信号を90°移相器が90°移相させた信号をそれぞれ乗算する和信号用及び差信号用乗算器と、
これら乗算された各出力信号の高周波成分を除去する和信号用及び差信号用LPFと、
これら除去された各出力信号を相関検波し誤差信号を検出する相関検波回路と
を備え
前記相関検波回路は、
前記和信号用乗算器で、A/D変換された前記和信号に基準用クロック信号を乗算した基準和信号と、
前記和信号用乗算器で、A/D変換された前記和信号に基準用クロック信号を90°移相させた信号を乗算した90°移相和信号と、
前記差信号用乗算器で、A/D変換された前記差信号に基準用クロック信号を乗算した基準差信号と、
前記差信号用乗算器で、A/D変換された前記差信号に基準用クロック信号を90°移相させた信号を乗算した90°移相差信号と、
を入力し、
前記基準和信号と前記基準差信号とを乗算した信号に前記90°移相和信号と前記90°移相差信号とを乗算した信号を加算したAZ追尾誤差信号を生成し、
前記基準差信号と前記90°移相和信号とを乗算した信号から前記90°移相差信号と前記基準和信号とを乗算した信号を減算したEL追尾誤差信号を生成し、
前記AZ追尾誤差信号及び前記EL追尾誤差信号を前記誤差信号として出力することを特徴とする追尾受信機。
Tracking that detects a tracking error of the antenna by performing correlation detection by receiving a sum signal and a difference signal, which are signals obtained by amplifying the output from the power feeding unit of the antenna that has received the radio signal from the flying object and converting it to an IF band signal In the receiver,
A sum signal and a difference signal BPF for band-limiting the sum signal and the difference signal, respectively;
A sum signal and difference signal AGC for adjusting the level of each band-limited output signal,
A sum signal and difference signal A / D converter for A / D converting each level-adjusted output signal;
Each of these A / D converted output signals, a reference clock signal generated by a reference clock, and a sum signal for multiplying the reference clock signal by a signal shifted by 90 ° by a 90 ° phase shifter, and A difference signal multiplier;
LP signal for sum signal and difference signal for removing high frequency components of each of the multiplied output signals,
A correlation detection circuit that detects the error signal by performing correlation detection on each of the removed output signals ,
The correlation detection circuit includes:
A reference sum signal obtained by multiplying the sum signal that has been A / D converted by the sum signal multiplier by a reference clock signal;
A 90 ° phase-shifted sum signal obtained by multiplying the sum signal that has been A / D converted by the sum signal multiplier by a signal obtained by phase-shifting the reference clock signal by 90 °;
A reference difference signal obtained by multiplying the difference signal A / D converted by the difference signal multiplier by a reference clock signal;
A 90 ° phase shift difference signal obtained by multiplying the difference signal that has been A / D converted by the difference signal multiplier by a signal obtained by shifting the reference clock signal by 90 °;
Enter
Generating an AZ tracking error signal obtained by adding a signal obtained by multiplying the reference sum signal and the reference difference signal to the signal obtained by multiplying the 90 ° phase shift sum signal and the 90 ° phase shift difference signal;
An EL tracking error signal obtained by subtracting a signal obtained by multiplying the 90 ° phase difference signal and the reference sum signal from a signal obtained by multiplying the reference difference signal and the 90 ° phase shift sum signal;
A tracking receiver that outputs the AZ tracking error signal and the EL tracking error signal as the error signal .
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