JP5700617B2 - Soi基板の作製方法 - Google Patents
Soi基板の作製方法 Download PDFInfo
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- JP5700617B2 JP5700617B2 JP2009159047A JP2009159047A JP5700617B2 JP 5700617 B2 JP5700617 B2 JP 5700617B2 JP 2009159047 A JP2009159047 A JP 2009159047A JP 2009159047 A JP2009159047 A JP 2009159047A JP 5700617 B2 JP5700617 B2 JP 5700617B2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
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- Computer Hardware Design (AREA)
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- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Description
本実施の形態では、本発明に係るSOI基板の構成について、図1(A)乃至図1(C)を用いて説明する。
(実施の形態2)
本実施の形態では、本発明に係るSOI基板の製造方法について図3乃至図6を用いて説明する。
O2+hν(λ1nm)→O(3P)+O(3P) (1)
O(3P)+O2→O3 (2)
O3+hν(λ2nm)→O(1D)+O2 (3)
O2+hν(λ3nm)→O(1D)+O(3P) (4)
O(3P)+O2→O3 (5)
O3+hν(λ3nm)→O(1D)+O2 (6)
本実施の形態では、上記実施の形態1で示したSOI基板を用いて、半導体装置を作製する方法を説明する。
102 絶縁層
103 脆化層
104 窒素含有層
105 絶縁層
110 ガラス基板
111 変質層
121 イオンビーム
122 半導体層
123 溶液
124 洗浄槽
125 キャリア
126 搬送チャック
127 回転軸
128 洗浄ノズル
129 搬送ローラー
Claims (11)
- ガラス基板を、硫酸と過酸化水素水を混合した硫酸過酸化水素水混合溶液で処理して、前記ガラス基板の少なくとも一方の面上に厚さ5nm以上3μm以下の変質層を形成し、
単結晶半導体基板上に、第1の絶縁層を形成し、
前記変質層上に前記第1の絶縁層を介して前記単結晶半導体基板を貼り合わせ、
前記単結晶半導体基板の一部を分離して、前記ガラス基板上に単結晶半導体層を形成し、
前記ガラス基板は、アルミノシリケートガラス、アルミノホウケイ酸ガラス、又はバリウムホウケイ酸ガラスであり、
前記変質層の組成における酸化シリコンの割合は、前記ガラス基板の組成における酸化シリコンの割合より大きく、
前記変質層の密度は、前記ガラス基板の密度より低いことを特徴とするSOI基板の作製方法。 - ガラス基板を、硫酸と過酸化水素水を混合した硫酸過酸化水素水混合溶液で処理して、前記ガラス基板の少なくとも一方の面上に厚さ5nm以上3μm以下の変質層を形成し、
単結晶半導体基板上に、第1の絶縁層と、窒素含有層と、を形成し、
前記変質層上に前記窒素含有層と前記第1の絶縁層とを介して前記単結晶半導体基板を貼り合わせ、
前記単結晶半導体基板の一部を分離して、前記ガラス基板上に単結晶半導体層を形成し、
前記ガラス基板は、アルミノシリケートガラス、アルミノホウケイ酸ガラス、又はバリウムホウケイ酸ガラスであり、
前記変質層の組成における酸化シリコンの割合は、前記ガラス基板の組成における酸化シリコンの割合より大きく、
前記変質層の密度は、前記ガラス基板の密度より低いことを特徴とするSOI基板の作製方法。 - ガラス基板を、硫酸と過酸化水素水を混合した硫酸過酸化水素水混合溶液で処理して、前記ガラス基板の少なくとも一方の面上に厚さ5nm以上3μm以下の変質層を形成し、
単結晶半導体基板上に、第1の絶縁層と、窒素含有層と、第2の絶縁層と、を形成し、
前記変質層上に前記第2の絶縁層と前記窒素含有層と前記第1の絶縁層とを介して前記単結晶半導体基板を貼り合わせ、
前記単結晶半導体基板の一部を分離して、前記ガラス基板上に単結晶半導体層を形成し、
前記ガラス基板は、アルミノシリケートガラス、アルミノホウケイ酸ガラス、又はバリウムホウケイ酸ガラスであり、
前記変質層の組成における酸化シリコンの割合は、前記ガラス基板の組成における酸化シリコンの割合より大きく、
前記変質層の密度は、前記ガラス基板の密度より低いことを特徴とするSOI基板の作製方法。 - 請求項2又は請求項3において、
前記窒素含有層は、窒化シリコン膜、窒化酸化シリコン膜若しくは酸化窒化シリコン膜から選ばれた一の層又は複数の膜の積層を用いることを特徴とするSOI基板の作製方法。 - 請求項3において、
前記第2の絶縁層は、酸化シリコン膜を用いることを特徴とするSOI基板の作製方法。 - 請求項5において、
前記酸化シリコン膜は、有機シランガスを用いた化学気相成長法により形成することを特徴とするSOI基板の作製方法。 - 請求項1乃至請求項6のいずれか一項において、
前記変質層は、前記ガラス基板よりアルカリ金属及びアルカリ土類金属の濃度が低いことを特徴とするSOI基板の作製方法。 - 請求項1乃至請求項7のいずれか一項において、
前記第1の絶縁層は、酸化シリコン膜を用いることを特徴とするSOI基板の作製方法。 - 請求項8において、
前記酸化シリコン膜は、有機シランガスを用いた化学気相成長法により形成することを特徴とするSOI基板の作製方法。 - 請求項8において、
前記酸化シリコン膜中に塩素原子を含ませることを特徴とするSOI基板の作製方法。 - 請求項1乃至請求項10のいずれか一項において、
前記硫酸過酸化水素水混合溶液に超音波振動を加えて処理を行うことを特徴とするSOI基板の作製方法。
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