JP5633582B2 - Module board - Google Patents

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JP5633582B2
JP5633582B2 JP2012554613A JP2012554613A JP5633582B2 JP 5633582 B2 JP5633582 B2 JP 5633582B2 JP 2012554613 A JP2012554613 A JP 2012554613A JP 2012554613 A JP2012554613 A JP 2012554613A JP 5633582 B2 JP5633582 B2 JP 5633582B2
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sealing resin
shield layer
substrate
top surface
electronic components
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JPWO2012101857A1 (en
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片岡　祐治
祐治 片岡
明彦 鎌田
明彦 鎌田
康一 神凉
康一 神凉
俊輔 北村
俊輔 北村
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Murata Manufacturing Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/165—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Health & Medical Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
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Description

本発明は、ベース基板の一面に実装した複数の電子部品を封止する封止樹脂の天面及び側面を導電材料で被覆してあるモジュール基板に関する。   The present invention relates to a module substrate in which a top surface and a side surface of a sealing resin for sealing a plurality of electronic components mounted on one surface of a base substrate are covered with a conductive material.

近年、電子機器の薄型化に伴い、電子機器に組み込まれるモジュール基板自体にも低背化が求められている。そのため、ベース基板の一面に実装する電子部品に、より低背化した電子部品を用いたり、電子部品を封止する封止樹脂を薄くすることでモジュール基板自体の低背化が行われている。   In recent years, with the reduction in thickness of electronic devices, module substrates themselves incorporated in electronic devices are also required to have a low profile. Therefore, the height of the module substrate itself is reduced by using a lower-profile electronic component for the electronic component mounted on one surface of the base substrate or by thinning the sealing resin for sealing the electronic component. .

特許文献１には、基板（ベース基板）上に複数の部品（電子部品）が配置され各部品が絶縁層（封止樹脂）で被覆された回路モジュール（モジュール基板）が開示されている。また、特許文献１では、絶縁層から露呈させた状態で基板上に設けられた接地用電極と、絶縁層の外側に形成され接地用電極に接続されたシールド層とを具備し、基板とシールド層の端面とが同一平面上に位置している。   Patent Document 1 discloses a circuit module (module substrate) in which a plurality of components (electronic components) are arranged on a substrate (base substrate) and each component is covered with an insulating layer (sealing resin). Further, Patent Document 1 includes a grounding electrode provided on a substrate in a state exposed from the insulating layer, and a shield layer formed outside the insulating layer and connected to the grounding electrode. The end face of the layer is located on the same plane.

特開２００４−１７２１７６号公報JP 2004-172176 A

特許文献１に開示してある回路モジュールでは、接地用電極に接続されたシールド層の側面を除いて、絶縁層の天面を被覆するシールド層の厚みが、絶縁層の側面を被覆するシールド層の厚みに比べて厚い。そのため、回路モジュールを低背化するために電子部品を被覆する絶縁層を薄くすると、基板の一面に実装する電子部品とシールド層との距離が短くなり、実装する電子部品の種類によっては、電子部品とシールド層との間で容量を形成したり、シールド層が電子部品のアンテナとして機能したりして正常に動作しないおそれがあるという問題があった。   In the circuit module disclosed in Patent Document 1, except for the side surface of the shield layer connected to the ground electrode, the thickness of the shield layer covering the top surface of the insulating layer is equal to the shield layer covering the side surface of the insulating layer. Thick compared to the thickness of Therefore, if the insulating layer covering the electronic component is made thin in order to reduce the height of the circuit module, the distance between the electronic component mounted on one surface of the board and the shield layer is shortened, and depending on the type of electronic component mounted, There has been a problem that a capacitor may be formed between the component and the shield layer, or the shield layer may function as an antenna of the electronic component, thereby causing malfunction.

また、絶縁層を被覆するシールド層の厚みを一律に薄くすると、絶縁層の側面を被覆するシールド層の厚みも薄くなり、絶縁層の側面において、実装した電子部品に対するシールド層のシールド性が確保できず、複数の回路モジュールを隣接して他の基板に実装した場合、隣接する回路モジュールからの電磁波の影響を有効に防ぐことができないという問題があった。   In addition, if the thickness of the shield layer covering the insulating layer is uniformly reduced, the thickness of the shield layer covering the side surface of the insulating layer is also reduced, and the shielding property of the shield layer against the mounted electronic component is secured on the side surface of the insulating layer. However, when a plurality of circuit modules are adjacently mounted on another substrate, there is a problem that the influence of electromagnetic waves from the adjacent circuit modules cannot be effectively prevented.

本発明は斯かる事情に鑑みてなされたものであり、実装した電子部品に対するシールド層のシールド性を確保しつつ、低背化しても実装した電子部品が正常に動作することが可能なモジュール基板を提供することを目的とする。   The present invention has been made in view of such circumstances, and a module substrate capable of operating the mounted electronic component normally even if the height is lowered while ensuring the shielding property of the shield layer for the mounted electronic component. The purpose is to provide.

上記目的を達成するために第１発明に係るモジュール基板は、ベース基板と、該ベース基板の少なくとも一面に実装した複数の電子部品と、前記ベース基板の一面に実装した複数の前記電子部品を封止する封止樹脂と、該封止樹脂の天面及び側面を導電材料で被覆するシールド層とを備え、前記封止樹脂の側面を被覆する前記シールド層は、前記封止樹脂の天面を被覆する前記シールド層以上の厚みで形成してあり、前記封止樹脂の側面のうち少なくとも一面を被覆する前記シールド層は、前記封止樹脂の天面を被覆する前記シールド層より厚く形成してあり、前記封止樹脂を被覆する前記シールド層は、前記封止樹脂を平面視した場合の周縁部が他の部分より高くなるよう形成してあることを特徴とする。 In order to achieve the above object, a module substrate according to a first aspect of the present invention includes a base substrate, a plurality of electronic components mounted on at least one surface of the base substrate, and a plurality of electronic components mounted on one surface of the base substrate. A sealing resin that stops and a shield layer that covers the top and side surfaces of the sealing resin with a conductive material, and the shield layer that covers the side surfaces of the sealing resin covers the top surface of the sealing resin. The shield layer is formed with a thickness equal to or greater than the shield layer to be coated, and the shield layer covering at least one of the side surfaces of the sealing resin is formed thicker than the shield layer covering the top surface of the sealing resin. Ah is, the shield layer covering the sealing resin, the peripheral portion when viewed in plan the sealing resin is characterized by the formation and tare Rukoto to be higher than the other portions.

第１発明では、封止樹脂の側面を被覆するシールド層は、封止樹脂の天面を被覆するシールド層以上の厚みで形成してあり、封止樹脂の側面のうち少なくとも一面を被覆する前記シールド層は、前記封止樹脂の天面を被覆する前記シールド層より厚く形成してあるので、封止樹脂の側面において、実装した電子部品に対するシールド層のシールド性を確保でき、複数のモジュール基板を隣接して他の基板に実装した場合でも、隣接するモジュール基板からの電磁波の影響を有効に防ぐことができる。さらに、モジュール基板を低背化するために、電子部品を封止する封止樹脂を薄くしても、封止樹脂の天面を被覆するシールド層の厚みを薄くすることで、実装した電子部品が正常に動作することが可能なモジュール基板を提供することができる。
また、封止樹脂を被覆するシールド層は、封止樹脂を平面視した場合の周縁部が他の部分より高くなるよう形成してあるので、封止樹脂の天面を被覆するシールド層の厚みを薄くした場合であっても、封止樹脂の天面と側面との境界部分が露出するおそれが少なく、シールド層の天面と側面との間の抵抗値を低く抑えることができ、シールド特性の向上を図ることが可能となる。 In the first invention, the shield layer covering the side surface of the sealing resin is formed with a thickness equal to or greater than the shield layer covering the top surface of the sealing resin, and covers at least one surface of the side surfaces of the sealing resin. Since the shield layer is formed thicker than the shield layer covering the top surface of the sealing resin, the shielding property of the shield layer against the mounted electronic component can be secured on the side surface of the sealing resin, and a plurality of module substrates Can be effectively prevented from being affected by electromagnetic waves from adjacent module substrates. Furthermore, in order to reduce the height of the module substrate, even if the sealing resin for sealing the electronic component is made thin, the thickness of the shield layer covering the top surface of the sealing resin is reduced, so that the mounted electronic component It is possible to provide a module substrate that can operate normally.
In addition, since the shield layer covering the sealing resin is formed such that the peripheral edge when the sealing resin is viewed in plan is higher than other portions, the thickness of the shield layer covering the top surface of the sealing resin Even when the thickness of the sealing resin is reduced, the boundary between the top and side surfaces of the sealing resin is less likely to be exposed, and the resistance value between the top and side surfaces of the shield layer can be kept low. Can be improved.

また、第２発明に係るモジュール基板は、第１発明において、前記封止樹脂の側面を被覆する前記シールド層は、全ての側面において、前記封止樹脂の天面を被覆する前記シールド層よりも厚くなるように形成してあることを特徴とする。   In the module substrate according to a second aspect of the present invention, in the first aspect, the shield layer covering the side surface of the sealing resin is more than the shield layer covering the top surface of the sealing resin on all side surfaces. It is formed to be thick.

第２発明では、封止樹脂の側面を被覆するシールド層は、全ての側面において、封止樹脂の天面を被覆するシールド層よりも厚くなるように形成してあるので、封止樹脂の側面において、実装した電子部品に対するシールド層のシールド性を確保でき、複数のモジュール基板を隣接して他の基板に実装した場合でも、隣接するモジュール基板からの電磁波の影響を有効に防ぐことができる。さらに、モジュール基板を低背化するために、電子部品を封止する封止樹脂を薄くしても、封止樹脂の天面を被覆するシールド層の厚みを薄くすることで、実装した電子部品が正常に動作することが可能なモジュール基板を提供することができる。   In the second invention, the shield layer covering the side surface of the sealing resin is formed so as to be thicker than the shield layer covering the top surface of the sealing resin on all side surfaces. In this case, the shielding property of the shield layer for the mounted electronic component can be ensured, and even when a plurality of module substrates are adjacently mounted on another substrate, the influence of electromagnetic waves from adjacent module substrates can be effectively prevented. Furthermore, in order to reduce the height of the module substrate, even if the sealing resin for sealing the electronic component is made thin, the thickness of the shield layer covering the top surface of the sealing resin is reduced, so that the mounted electronic component It is possible to provide a module substrate that can operate normally.

また、第３発明に係るモジュール基板は、第１又は第２発明において、前記封止樹脂の天面と側面との境界部分が面取りされていることを特徴とする。 The module substrate according to the third invention is characterized in that, in the first or second invention , a boundary portion between the top surface and the side surface of the sealing resin is chamfered.

第３発明では、封止樹脂の天面と側面との境界部分が面取りされているので、封止樹脂の天面を被覆するシールド層の厚みを薄くした場合であっても、より封止樹脂の天面と側面との境界部分が露出するおそれが少なく、シールド層の天面と側面との間の抵抗値を低く抑えることができるので、シールド特性の向上を図ることが可能となる。 In the third invention, since the boundary portion between the top surface and the side surface of the sealing resin is chamfered, even if the thickness of the shield layer covering the top surface of the sealing resin is reduced, the sealing resin is more Since there is little possibility that the boundary portion between the top surface and the side surface of the shield layer is exposed and the resistance value between the top surface and the side surface of the shield layer can be kept low, the shield characteristics can be improved.

また、第４発明に係るモジュール基板は、第１乃至第３発明のいずれか１つにおいて、前記ベース基板の一面に実装した複数の前記電子部品のうち、素子の集積率の高い前記電子部品の近傍にある前記封止樹脂の側面を被覆する前記シールド層は、他の前記封止樹脂の側面を被覆する前記シールド層に比べて厚くなるように形成してあることを特徴とする。 A module substrate according to a fourth aspect of the present invention is the module substrate according to any one of the first to third aspects, wherein the electronic component having a high element integration rate among the plurality of the electronic components mounted on one surface of the base substrate. The shield layer covering the side surface of the sealing resin in the vicinity is formed to be thicker than the shield layer covering the side surface of the other sealing resin.

第４発明では、ベース基板の一面に実装した複数の電子部品のうち、素子の集積率の高い電子部品の近傍にある封止樹脂の側面を被覆するシールド層は、他の封止樹脂の側面を被覆するシールド層に比べて厚くなるように形成してあるので、外部からの電磁波による影響を受けやすい素子の集積率の高い電子部品に対して、電磁波の影響を有効に防ぐことができる。 In the fourth invention, among the plurality of electronic components mounted on one surface of the base substrate, the shield layer covering the side surface of the sealing resin in the vicinity of the electronic component having a high element integration rate is the side surface of the other sealing resin. Therefore, it is possible to effectively prevent the influence of electromagnetic waves on an electronic component having a high integration rate of elements that are easily affected by electromagnetic waves from the outside.

また、第５発明に係るモジュール基板は、第１乃至第４発明のいずれか１つにおいて、前記ベース基板の一面に実装した複数の前記電子部品には、コイル及びフィルタのうち少なくとも一つが含まれていることを特徴とする。 A module substrate according to a fifth aspect of the present invention is the module substrate according to any one of the first to fourth aspects, wherein the plurality of electronic components mounted on one surface of the base substrate include at least one of a coil and a filter. It is characterized by.

第５発明では、ベース基板の一面に実装した複数の電子部品には、コイル及びフィルタのうち少なくとも一つが含まれているが、封止樹脂の天面を被覆するシールド層の厚みを薄くすることで、電子部品とシールド層との間で容量を形成したり、シールド層が電子部品のアンテナとして機能したりすることを防ぐことができる。 In the fifth invention, the plurality of electronic components mounted on one surface of the base substrate include at least one of the coil and the filter, but the thickness of the shield layer covering the top surface of the sealing resin is reduced. Thus, it is possible to prevent a capacitance from being formed between the electronic component and the shield layer and the shield layer from functioning as an antenna of the electronic component.

上記構成によれば、封止樹脂の側面を被覆するシールド層は、封止樹脂の天面を被覆するシールド層以上の厚みで形成してあり、封止樹脂の側面のうち少なくとも一面を被覆するシールド層は、封止樹脂の天面を被覆するシールド層より厚く形成してあるので、封止樹脂の側面において、実装した電子部品に対するシールド層のシールド性を確保でき、複数のモジュール基板を隣接して他の基板に実装した場合でも、隣接するモジュール基板からの電磁波の影響を有効に防ぐことができる。さらに、モジュール基板を低背化するために、電子部品を封止する封止樹脂を薄くしても、封止樹脂の天面を被覆するシールド層の厚みを薄くすることで、実装した電子部品が正常に動作することが可能なモジュール基板を提供することができる。
また、封止樹脂を被覆するシールド層は、封止樹脂を平面視した場合の周縁部が他の部分より高くなるよう形成してあるので、封止樹脂の天面を被覆するシールド層の厚みを薄くした場合であっても、封止樹脂の天面と側面との境界部分が露出するおそれが少なく、シールド層の天面と側面との間の抵抗値を低く抑えることができ、シールド特性の向上を図ることが可能となる。 According to the said structure, the shield layer which coat | covers the side surface of sealing resin is formed in the thickness more than the shield layer which covers the top | upper surface of sealing resin, and coat | covers at least one surface among the side surfaces of sealing resin. Since the shield layer is formed thicker than the shield layer covering the top surface of the sealing resin, it is possible to secure the shielding property of the shield layer against the mounted electronic component on the side surface of the sealing resin, and adjacent to a plurality of module substrates. Even when mounted on another board, the influence of electromagnetic waves from adjacent module boards can be effectively prevented. Furthermore, in order to reduce the height of the module substrate, even if the sealing resin for sealing the electronic component is made thin, the thickness of the shield layer covering the top surface of the sealing resin is reduced, so that the mounted electronic component It is possible to provide a module substrate that can operate normally.
In addition, since the shield layer covering the sealing resin is formed such that the peripheral edge when the sealing resin is viewed in plan is higher than other portions, the thickness of the shield layer covering the top surface of the sealing resin Even when the thickness of the sealing resin is reduced, the boundary between the top surface and side surface of the sealing resin is less likely to be exposed, and the resistance value between the top surface and side surface of the shield layer can be kept low. Can be improved.

本発明の実施の形態１に係るモジュール基板の構成を示す概略図である。It is the schematic which shows the structure of the module board which concerns on Embodiment 1 of this invention. 本発明の実施の形態１に係るモジュール基板の製造工程を示す概略図である。It is the schematic which shows the manufacturing process of the module board which concerns on Embodiment 1 of this invention. 本発明の実施の形態２に係るモジュール基板の構成を示す概略図である。It is the schematic which shows the structure of the module board which concerns on Embodiment 2 of this invention. 本発明の実施の形態３に係るモジュール基板の製造工程を示す概略図である。It is the schematic which shows the manufacturing process of the module board which concerns on Embodiment 3 of this invention. 本発明の実施の形態３に係るモジュール基板の、凹面状をした支持基板上に集合基板を載置した状態を示す模式断面図である。It is a schematic cross section which shows the state which mounted the collective substrate on the support substrate made into the concave surface of the module substrate which concerns on Embodiment 3 of this invention. 本発明の実施の形態３に係るモジュール基板の封止樹脂の面取り状態を模式的に示す部分断面図である。It is a fragmentary sectional view which shows typically the chamfering state of sealing resin of the module board which concerns on Embodiment 3 of this invention.

以下、本発明の実施の形態について、図面を参照しながら詳細に説明する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

（実施の形態１）
図１は、本発明の実施の形態１に係るモジュール基板の構成を示す概略図である。図１に示すように、モジュール基板１０は、ベース基板１、ベース基板１の一面に実装した複数の電子部品２、３、実装した複数の電子部品２、３を封止する封止樹脂４、封止樹脂４の天面及び側面を導電材料で被覆するシールド層５、複数の電子部品２、３を実装したベース基板１の一面の反対側の面に形成してある端子電極６を備えている。(Embodiment 1)
FIG. 1 is a schematic diagram showing a configuration of a module substrate according to Embodiment 1 of the present invention. As shown in FIG. 1, the module substrate 10 includes a base substrate 1, a plurality of electronic components 2 and 3 mounted on one surface of the base substrate 1, a sealing resin 4 for sealing the mounted electronic components 2 and 3, A shielding layer 5 for covering the top and side surfaces of the sealing resin 4 with a conductive material, and a terminal electrode 6 formed on the surface opposite to the one surface of the base substrate 1 on which the plurality of electronic components 2 and 3 are mounted are provided. Yes.

ベース基板１としては、ＬＴＣＣ（低温焼成セラミックス：Ｌｏｗ Ｔｅｍｐｅｒａｔｕｒｅ Ｃｏ−ｆｉｒｅｄ Ｃｅｒａｍｉｃｓ）基板、有機基板等、特に限定されるものではない。ベース基板１の複数の電子部品２、３を実装する面には、表面電極（図示せず）が形成されている。電子部品２は、ベース基板１の一面に実装することが可能な集積回路（ＩＣ）である。集積回路（ＩＣ）は、外部からの電磁波の影響により特性が変化する電子部品である。また、電子部品３は、ベース基板１の一面に表面実装することが可能な表面実装型電子部品（Ｓｕｒｆａｃｅ Ｍｏｕｎｔ Ｄｅｖｉｃｅ）である。   The base substrate 1 is not particularly limited, such as an LTCC (Low Temperature Co-fired Ceramics) substrate or an organic substrate. A surface electrode (not shown) is formed on the surface on which the plurality of electronic components 2 and 3 of the base substrate 1 are mounted. The electronic component 2 is an integrated circuit (IC) that can be mounted on one surface of the base substrate 1. An integrated circuit (IC) is an electronic component whose characteristics change due to the influence of an external electromagnetic wave. The electronic component 3 is a surface mount electronic component (Surface Mount Device) that can be surface-mounted on one surface of the base substrate 1.

封止樹脂４は、エポキシ樹脂等からなる絶縁材料であるため、ベース基板１の一面に実装した複数の電子部品２、３の間の絶縁性が向上する。封止樹脂４は、ＳｉＯ2 のフィラを含有している。シールド層５は、例えば、Ａｇフィラ、Ｃｕフィラ、Ｎｉフィラ、及びこれらの混合フィラを含有するエポキシ樹脂又はフェノール樹脂からなる導電材料である。端子電極６は、他の基板にモジュール基板１０を接続するための電極である。Since the sealing resin 4 is an insulating material made of epoxy resin or the like, the insulation between the plurality of electronic components 2 and 3 mounted on one surface of the base substrate 1 is improved. The sealing resin 4 contains a SiO 2 filler. The shield layer 5 is a conductive material made of, for example, an epoxy resin or a phenol resin containing Ag filler, Cu filler, Ni filler, and a mixed filler thereof. The terminal electrode 6 is an electrode for connecting the module substrate 10 to another substrate.

図２は、本発明の実施の形態１に係るモジュール基板１０の製造工程を示す概略図である。まず、図２（ａ）に示すように、集合基板１００の一面において、ハンダが印刷されている表面電極（図示せず）上に複数の電子部品２、３を実装する。複数の電子部品２、３を実装した集合基板１００の一面の反対側の面に、導電ペーストを塗布して、複数の端子電極６を形成する。なお、同じ製造工程で、集合基板１００に複数の電子部品２、３を実装し、複数の端子電極６を形成しても良いし、集合基板１００に複数の電子部品２、３を実装し、別の製造工程で複数の端子電極６を形成しても良い。   FIG. 2 is a schematic diagram illustrating a manufacturing process of the module substrate 10 according to the first embodiment of the present invention. First, as shown in FIG. 2A, on one surface of the collective substrate 100, a plurality of electronic components 2 and 3 are mounted on a surface electrode (not shown) on which solder is printed. A conductive paste is applied to the surface opposite to the one surface of the collective substrate 100 on which the plurality of electronic components 2 and 3 are mounted to form a plurality of terminal electrodes 6. In the same manufacturing process, a plurality of electronic components 2 and 3 may be mounted on the collective substrate 100 to form a plurality of terminal electrodes 6, or a plurality of electronic components 2 and 3 may be mounted on the collective substrate 100, A plurality of terminal electrodes 6 may be formed by another manufacturing process.

次に、図２（ｂ）に示すように、集合基板１００の一面に実装した複数の電子部品２、３を封止する封止樹脂４を形成する。具体的に、封止樹脂４は、複数の電子部品２、３を実装した集合基板１００に、液状の樹脂を塗布し、塗布した樹脂を脱泡後に硬化させることで形成することができる。なお、液状の樹脂に代えて、固形の樹脂、顆粒の樹脂又はシート状の樹脂を、複数の電子部品２、３を実装した集合基板１００に載置して、加熱しても良い。   Next, as shown in FIG. 2B, a sealing resin 4 for sealing the plurality of electronic components 2 and 3 mounted on one surface of the collective substrate 100 is formed. Specifically, the sealing resin 4 can be formed by applying a liquid resin to the collective substrate 100 on which the plurality of electronic components 2 and 3 are mounted, and curing the applied resin after defoaming. Instead of the liquid resin, a solid resin, a granular resin, or a sheet-like resin may be placed on the aggregate substrate 100 on which the plurality of electronic components 2 and 3 are mounted and heated.

次に、図２（ｃ）に示すように、ダイサー等を用いて、封止樹脂４の天面から集合基板１００の一部に至る溝９を形成する。溝９を形成した場合であっても、隣接する２つのベース基板１（集合基板１００）の一部が繋がっている。なお、溝９の幅は、例えば３００μｍである。   Next, as shown in FIG. 2C, a groove 9 extending from the top surface of the sealing resin 4 to a part of the collective substrate 100 is formed using a dicer or the like. Even when the groove 9 is formed, a part of the two adjacent base substrates 1 (the collective substrate 100) is connected. The width of the groove 9 is, for example, 300 μm.

次に、図２（ｄ）に示すように、複数の電子部品２、３を封止した封止樹脂４の天面、及び溝９を被覆するように、ディスペンサー、ジェットディスペンサー、真空印刷装置等を用いて導電材料を塗布して硬化させることにより、シールド層５を形成する。図示していないが、集合基板１００から露出している接地用電極と、シールド層５とが電気的に接続されることにより、実装した複数の電子部品２、３に対するシールド層５のシールド性を確保することができる。導電材料は、例えば、Ａｇフィラ８０重量％、エポキシ樹脂１０重量％、希釈剤５重量％、その他５重量％を含む組成や、Ａｇフィラ５０重量％、Ｎｉフィラ３６重量％、エポキシ樹脂８重量％、希釈剤４重量％、その他２重量％を含む組成である。また、メッシュスクリーンを用いて導電材料を塗布する場合、メッシュスクリーンの厚みが例えば２０μｍであれば、封止樹脂４の天面に厚み２０μｍのシールド層５を形成することができる。メッシュスクリーンの仕様として、例えば、平織メッシュスクリーン、エマルジョンの厚みが２６μｍ、オープニングの長さが８２μｍ、線径が２０μｍ、メッシュ数が２５０個とする。複数の電子部品２、３を封止した封止樹脂４の天面、及び溝９を被覆するように、導電材料を塗布する方法は、真空印刷等の印刷に限定されるものではなく、スピンコートやディッピングであっても良い。   Next, as shown in FIG. 2 (d), a dispenser, a jet dispenser, a vacuum printing apparatus, etc. so as to cover the top surface of the sealing resin 4 sealing the plurality of electronic components 2, 3 and the groove 9 The shield layer 5 is formed by applying a conductive material using and curing the conductive material. Although not shown, the grounding electrode exposed from the collective substrate 100 and the shield layer 5 are electrically connected, so that the shielding property of the shield layer 5 with respect to the plurality of mounted electronic components 2 and 3 is improved. Can be secured. The conductive material is, for example, a composition containing 80% by weight of Ag filler, 10% by weight of epoxy resin, 5% by weight of diluent, and 5% by weight of Ag filler, 50% by weight of Ag filler, 36% by weight of Ni filler, and 8% by weight of epoxy resin. , 4% by weight of diluent and 2% by weight of the other. When the conductive material is applied using a mesh screen, the shield layer 5 having a thickness of 20 μm can be formed on the top surface of the sealing resin 4 if the mesh screen has a thickness of 20 μm, for example. The specifications of the mesh screen are, for example, a plain weave mesh screen, the emulsion thickness is 26 μm, the opening length is 82 μm, the wire diameter is 20 μm, and the number of meshes is 250. The method of applying the conductive material so as to cover the top surface of the sealing resin 4 that seals the plurality of electronic components 2 and 3 and the groove 9 is not limited to printing such as vacuum printing. It may be a coat or dipping.

次に、図２（ｅ）に示すように、ダイサー等を用いて、溝９に形成したシールド層５を、封止樹脂４の天面側から集合基板１００の全部を切断する位置まで切断して、複数のモジュール基板１０に個片化する。溝９に形成した幅３００μｍのシールド層５を幅１００μｍのダイサー等を用いて切断すると、個片化したモジュール基板１０の封止樹脂４の側面に形成されるシールド層５の厚みは１００μｍとなる。封止樹脂４の天面に形成されるシールド層５の厚みが２０μｍとすると、封止樹脂４の側面に形成されるシールド層５の厚みは、封止樹脂４の天面に形成されるシールド層５の厚みの約５倍である。なお、封止樹脂４の天面に形成されるシールド層５の厚みは、５μｍ〜５０μｍ、封止樹脂４の側面に形成されるシールド層５の厚みは、５０μｍ〜１５０μｍであることが好ましい。   Next, as shown in FIG. 2 (e), the shield layer 5 formed in the groove 9 is cut from the top surface side of the sealing resin 4 to a position where the entire assembly substrate 100 is cut using a dicer or the like. Then, it is separated into a plurality of module substrates 10. When the shield layer 5 having a width of 300 μm formed in the groove 9 is cut by using a dicer having a width of 100 μm, the thickness of the shield layer 5 formed on the side surface of the sealing resin 4 of the separated module substrate 10 becomes 100 μm. . When the thickness of the shield layer 5 formed on the top surface of the sealing resin 4 is 20 μm, the thickness of the shield layer 5 formed on the side surface of the sealing resin 4 is the shield formed on the top surface of the sealing resin 4. About 5 times the thickness of layer 5. The thickness of the shield layer 5 formed on the top surface of the sealing resin 4 is preferably 5 μm to 50 μm, and the thickness of the shield layer 5 formed on the side surface of the sealing resin 4 is preferably 50 μm to 150 μm.

また、モジュール基板１０が矩形状である場合、封止樹脂４の全ての側面に形成されるシールド層５の厚みが、封止樹脂４の天面に形成されるシールド層５の厚みに比べて厚い場合に限定されるものではなく、封止樹脂４の四つの側面のうち少なくとも一つの側面に形成されるシールド層５の厚みが、封止樹脂４の天面に形成されるシールド層５の厚みに比べて厚ければ良い。なお、封止樹脂４の他の側面に形成されるシールド層５の厚みは、封止樹脂４の天面に形成されるシールド層５の厚みと同じである。   When the module substrate 10 is rectangular, the thickness of the shield layer 5 formed on all side surfaces of the sealing resin 4 is larger than the thickness of the shield layer 5 formed on the top surface of the sealing resin 4. The thickness of the shield layer 5 formed on at least one of the four side surfaces of the sealing resin 4 is not limited to the case where it is thick. It only needs to be thicker than the thickness. The thickness of the shield layer 5 formed on the other side surface of the sealing resin 4 is the same as the thickness of the shield layer 5 formed on the top surface of the sealing resin 4.

以上のように、本発明の実施の形態１に係るモジュール基板１０は、封止樹脂４の側面を被覆するシールド層５が、封止樹脂４の天面を被覆するシールド層５以上の厚みで形成してあり、封止樹脂４の側面のうち少なくとも一面を被覆するシールド層５が、封止樹脂４の天面を被覆するシールド層５より厚く形成してあるので、封止樹脂４の側面において、実装した電子部品２、３に対するシールド層５のシールド性を確保でき、複数のモジュール基板１０を隣接して他の基板に実装した場合でも、隣接するモジュール基板１０からの電磁波の影響を有効に防ぐことができる。さらに、モジュール基板１０を低背化するために、電子部品２、３を封止する封止樹脂４を薄くしても、封止樹脂４の天面を被覆するシールド層５の厚みを薄くすることで、実装した電子部品２、３が正常に動作することが可能なモジュール基板１０を提供することができる。   As described above, in the module substrate 10 according to Embodiment 1 of the present invention, the shield layer 5 that covers the side surface of the sealing resin 4 has a thickness greater than or equal to the shield layer 5 that covers the top surface of the sealing resin 4. The shield layer 5 that is formed and covers at least one of the side surfaces of the sealing resin 4 is formed thicker than the shield layer 5 that covers the top surface of the sealing resin 4. , The shielding property of the shield layer 5 for the mounted electronic components 2 and 3 can be secured, and even when a plurality of module boards 10 are mounted adjacent to each other, the effect of electromagnetic waves from the adjacent module boards 10 is effective. Can be prevented. Furthermore, in order to reduce the height of the module substrate 10, the thickness of the shield layer 5 that covers the top surface of the sealing resin 4 is reduced even if the sealing resin 4 that seals the electronic components 2 and 3 is thinned. Thus, it is possible to provide the module substrate 10 in which the mounted electronic components 2 and 3 can operate normally.

また、複数の電子部品２、３のうち、表面実装型電子部品である電子部品３に、コイル及びフィルタのうち少なくとも一つが含まれている場合であっても、封止樹脂４の天面を被覆するシールド層５の厚みを薄くすることで、電子部品３とシールド層５との間で容量を形成したり、シールド層５が電子部品３のアンテナとして機能したりすることを防ぐことができる。   Moreover, even if the electronic component 3 that is a surface-mounted electronic component among the plurality of electronic components 2 and 3 includes at least one of a coil and a filter, the top surface of the sealing resin 4 is By reducing the thickness of the shield layer 5 to be covered, it is possible to prevent a capacitance from being formed between the electronic component 3 and the shield layer 5 or the shield layer 5 from functioning as an antenna of the electronic component 3. .

（実施の形態２）
図３は、本発明の実施の形態２に係るモジュール基板の構成を示す概略図である。図３に示すように、モジュール基板１０は、ベース基板１、ベース基板１の一面に実装した複数の電子部品２、３、実装した複数の電子部品２、３を封止する封止樹脂４、封止樹脂４の天面及び側面を導電材料で被覆するシールド層５、複数の電子部品２、３を実装したベース基板１の一面の反対側の面に形成してある端子電極６を備えている。モジュール基板１０は、シールド層５の構成が異なる以外、図１に示したモジュール基板１０の構成と同じであるため、同じ構成要素については同じ符号を付して詳細な説明は省略する。(Embodiment 2)
FIG. 3 is a schematic diagram showing the configuration of the module substrate according to Embodiment 2 of the present invention. As shown in FIG. 3, the module substrate 10 includes a base substrate 1, a plurality of electronic components 2 and 3 mounted on one surface of the base substrate 1, a sealing resin 4 that seals the mounted electronic components 2 and 3, A shielding layer 5 for covering the top and side surfaces of the sealing resin 4 with a conductive material, and a terminal electrode 6 formed on the surface opposite to the one surface of the base substrate 1 on which the plurality of electronic components 2 and 3 are mounted are provided. Yes. The module substrate 10 is the same as the configuration of the module substrate 10 shown in FIG. 1 except that the configuration of the shield layer 5 is different. Therefore, the same components are denoted by the same reference numerals and detailed description thereof is omitted.

シールド層５は、図１に示すシールド層５と同様、封止樹脂４の側面を被覆するシールド層５の厚みは、封止樹脂４の天面を被覆するシールド層５以上の厚みであり、封止樹脂４の側面のうち少なくとも一面を被覆するシールド層５の厚みは、封止樹脂４の天面を被覆するシールド層５の厚みに比べて厚い。さらに、電子部品２の近傍にある封止樹脂４の側面を被覆するシールド層５１の厚みは、電子部品３の近傍にある封止樹脂４の側面を被覆するシールド層５２の厚みに比べて厚い。   As with the shield layer 5 shown in FIG. 1, the shield layer 5 has a thickness equal to or greater than that of the shield layer 5 covering the top surface of the sealing resin 4. The thickness of the shield layer 5 that covers at least one of the side surfaces of the sealing resin 4 is thicker than the thickness of the shield layer 5 that covers the top surface of the sealing resin 4. Furthermore, the thickness of the shield layer 51 covering the side surface of the sealing resin 4 near the electronic component 2 is thicker than the thickness of the shield layer 52 covering the side surface of the sealing resin 4 near the electronic component 3. .

電子部品２は、素子の集積率の高い集積回路（ＩＣ）であり、外部からの電磁波による影響を受けやすい。そのため、電子部品２の近傍にある封止樹脂４の側面を被覆するシールド層５１の厚みを、素子の集積率の低い電子部品３の近傍にある封止樹脂４の側面を被覆するシールド層５２の厚みに比べて厚く形成してあるので、電子部品２に対して、電磁波の影響を有効に防ぐことができる。   The electronic component 2 is an integrated circuit (IC) having a high integration rate of elements, and is easily affected by external electromagnetic waves. Therefore, the thickness of the shield layer 51 covering the side surface of the sealing resin 4 in the vicinity of the electronic component 2 is set to the shield layer 52 covering the side surface of the sealing resin 4 in the vicinity of the electronic component 3 having a low element integration rate. Thus, the electronic component 2 can be effectively prevented from being affected by electromagnetic waves.

本発明の実施の形態２に係るモジュール基板１０の製造方法は、図２に示した本発明の実施の形態１に係るモジュール基板１０の製造方法と同じであるため、詳細な説明は省略する。ただし、本発明の実施の形態２に係るモジュール基板１０の製造方法では、図２に示すようにダイサー等を用いて、溝９に形成したシールド層５を、封止樹脂４の天面側から集合基板１００の全部を切断する位置まで切断するときに、図３に示すように電子部品２の近傍にある封止樹脂４の側面を被覆するシールド層５１の厚みが、電子部品３の近傍にある封止樹脂４の側面を被覆するシールド層５２の厚みに比べて厚くなるように、ダイサー等の位置を調整する必要がある。   The method for manufacturing the module substrate 10 according to the second embodiment of the present invention is the same as the method for manufacturing the module substrate 10 according to the first embodiment of the present invention shown in FIG. However, in the method of manufacturing the module substrate 10 according to Embodiment 2 of the present invention, the shield layer 5 formed in the groove 9 is formed from the top surface side of the sealing resin 4 using a dicer or the like as shown in FIG. When the entire assembly board 100 is cut to a position where it is cut, the thickness of the shield layer 51 covering the side surface of the sealing resin 4 in the vicinity of the electronic component 2 is set in the vicinity of the electronic component 3 as shown in FIG. It is necessary to adjust the position of the dicer or the like so as to be thicker than the thickness of the shield layer 52 covering the side surface of a certain sealing resin 4.

以上のように、本発明の実施の形態２に係るモジュール基板１０は、素子の集積率の高い電子部品２の近傍にある封止樹脂４の側面を被覆するシールド層５１は、他の封止樹脂４の側面を被覆するシールド層５２に比べて厚く形成してあるので、外部からの電磁波による影響を受けやすい素子の集積率の高い電子部品２に対して、電磁波の影響を有効に防ぐことができる。   As described above, the module substrate 10 according to the second embodiment of the present invention has the shield layer 51 that covers the side surface of the sealing resin 4 in the vicinity of the electronic component 2 having a high element integration rate, Since it is formed thicker than the shield layer 52 that covers the side surface of the resin 4, it is possible to effectively prevent the influence of electromagnetic waves on the electronic component 2 having a high integration rate of elements that are easily affected by electromagnetic waves from the outside. Can do.

（実施の形態３）
本発明の実施の形態３に係るモジュール基板の構成は、実施の形態１及び２と同様であることから、同一の符号を付することで詳細な説明は省略する。実施の形態３では、封止樹脂４を被覆するシールド層５が、封止樹脂４を平面視した場合の周縁部が他の部分より高くなるよう形成してある点で実施の形態１及び２と相違する。(Embodiment 3)
Since the configuration of the module substrate according to Embodiment 3 of the present invention is the same as that of Embodiments 1 and 2, detailed description is omitted by attaching the same reference numerals. In the third embodiment, the shield layer 5 covering the sealing resin 4 is formed in such a manner that the peripheral edge when the sealing resin 4 is viewed in plan view is higher than the other portions. Is different.

図４は、本発明の実施の形態３に係るモジュール基板１０の製造工程を示す概略図である。まず、図４（ａ）に示すように、集合基板１００の一面において、ハンダが印刷されている表面電極（図示せず）上に複数の電子部品２、３を実装する。複数の電子部品２、３を実装した集合基板１００の一面の反対側の面に、導電ペーストを塗布して、複数の端子電極６を形成する。なお、同じ製造工程で、集合基板１００に複数の電子部品２、３を実装し、複数の端子電極６を形成しても良いし、集合基板１００に複数の電子部品２、３を実装し、別の製造工程で複数の端子電極６を形成しても良い。   FIG. 4 is a schematic diagram illustrating a manufacturing process of the module substrate 10 according to the third embodiment of the present invention. First, as shown in FIG. 4A, a plurality of electronic components 2 and 3 are mounted on a surface electrode (not shown) on which solder is printed on one surface of the collective substrate 100. A conductive paste is applied to the surface opposite to the one surface of the collective substrate 100 on which the plurality of electronic components 2 and 3 are mounted to form a plurality of terminal electrodes 6. In the same manufacturing process, a plurality of electronic components 2 and 3 may be mounted on the collective substrate 100 to form a plurality of terminal electrodes 6, or a plurality of electronic components 2 and 3 may be mounted on the collective substrate 100, A plurality of terminal electrodes 6 may be formed by another manufacturing process.

次に、図４（ｂ）に示すように、集合基板１００の一面に実装した複数の電子部品２、３を封止する封止樹脂４を形成する。具体的に、封止樹脂４は、複数の電子部品２、３を実装した集合基板１００に、液状の樹脂を塗布し、塗布した樹脂を脱泡後に硬化させることで形成することができる。なお、液状の樹脂に代えて、固形の樹脂、顆粒の樹脂又はシート状の樹脂を、複数の電子部品２、３を実装した集合基板１００に載置して、加熱しても良い。   Next, as shown in FIG. 4B, a sealing resin 4 for sealing the plurality of electronic components 2 and 3 mounted on one surface of the collective substrate 100 is formed. Specifically, the sealing resin 4 can be formed by applying a liquid resin to the collective substrate 100 on which the plurality of electronic components 2 and 3 are mounted, and curing the applied resin after defoaming. Instead of the liquid resin, a solid resin, a granular resin, or a sheet-like resin may be placed on the aggregate substrate 100 on which the plurality of electronic components 2 and 3 are mounted and heated.

次に、図４（ｃ）に示すように、ダイサー等を用いて、封止樹脂４の天面から集合基板１００の一部に至る溝９を形成する。溝９を形成した場合であっても、隣接する２つのベース基板１（集合基板１００）の一部が繋がっている。なお、溝９の幅は、例えば３００μｍである。   Next, as shown in FIG. 4C, a groove 9 extending from the top surface of the sealing resin 4 to a part of the collective substrate 100 is formed using a dicer or the like. Even when the groove 9 is formed, a part of the two adjacent base substrates 1 (the collective substrate 100) is connected. The width of the groove 9 is, for example, 300 μm.

そして、図４（ｄ）に示すように、図示しない凹面状をした支持基板上に集合基板１００を載置することにより、天面側が内側となるように湾曲させ、溝９を形成する側壁を、天面側において互いに対向する側へと傾斜させる。図５は、本発明の実施の形態３に係るモジュール基板１０の、凹面状をした支持基板上に集合基板１００を載置した状態を示す模式断面図である。   Then, as shown in FIG. 4D, by placing the collective substrate 100 on a support substrate having a concave shape (not shown), the side walls that form the grooves 9 are curved so that the top surface side is inside. Inclining to the sides facing each other on the top surface side. FIG. 5 is a schematic cross-sectional view showing a state in which the collective substrate 100 is placed on a concave support substrate of the module substrate 10 according to Embodiment 3 of the present invention.

図５に示すように、凹面状をした支持基板６０上に集合基板１００を載置することにより、支持基板６０に沿って集合基板１００が湾曲し、溝９を形成する側壁は、天面側において互いに対向する側へと傾斜する。したがって、溝９の容積が減少するとともに開口部が狭くなるので、導電材料を塗布した場合に溝９の開口部近傍において盛り上がり部が形成される。   As shown in FIG. 5, by placing the collective substrate 100 on the concave support substrate 60, the collective substrate 100 is curved along the support substrate 60 and the side walls forming the grooves 9 are on the top surface side. Incline toward opposite sides. Accordingly, the volume of the groove 9 is reduced and the opening is narrowed. Therefore, when the conductive material is applied, a raised portion is formed in the vicinity of the opening of the groove 9.

図４に戻って、図４（ｅ）に示すように、複数の電子部品２、３を封止した封止樹脂４の天面、及び溝９を被覆するように、ディスペンサー、ジェットディスペンサー、真空印刷装置等を用いて導電材料を塗布して硬化させることにより、シールド層５を形成する。図示していないが、集合基板１００から露出している接地用電極と、シールド層５とが電気的に接続されることにより、実装した複数の電子部品２、３に対するシールド層５のシールド性を確保することができる。   Returning to FIG. 4, as shown in FIG. 4E, a dispenser, a jet dispenser, a vacuum are applied so as to cover the top surface of the sealing resin 4 sealing the plurality of electronic components 2 and 3 and the groove 9. The shield layer 5 is formed by applying and curing a conductive material using a printing device or the like. Although not shown, the grounding electrode exposed from the collective substrate 100 and the shield layer 5 are electrically connected, so that the shielding property of the shield layer 5 with respect to the plurality of mounted electronic components 2 and 3 is improved. Can be secured.

溝９を形成する側壁が、天面側において互いに対向する側へと傾斜しているので、塗布した導電材料は、溝９の開口部近傍において盛り上がり部を形成し、溝９に沿って高さが高くなっているシールド層５が形成される。   Since the side walls forming the grooves 9 are inclined toward the sides facing each other on the top surface side, the applied conductive material forms a raised portion in the vicinity of the opening of the groove 9 and has a height along the groove 9. As a result, the shield layer 5 is formed.

次に、図４（ｆ）に示すように、ダイサー等を用いて、溝９に形成したシールド層５を、封止樹脂４の天面側から集合基板１００の全部を切断する位置まで切断して、複数のモジュール基板１０に個片化する。溝９の開口部近傍において盛り上がり部が形成されるので、シールド層５は、封止樹脂４を平面視した場合の周縁部が他の部分より高くなるよう形成される。   Next, as shown in FIG. 4 (f), the shield layer 5 formed in the groove 9 is cut from the top surface side of the sealing resin 4 to a position where the entire assembly substrate 100 is cut using a dicer or the like. Then, it is separated into a plurality of module substrates 10. Since the raised portion is formed in the vicinity of the opening of the groove 9, the shield layer 5 is formed so that the peripheral edge when the sealing resin 4 is viewed in plan view is higher than the other portions.

封止樹脂４を被覆するシールド層５が、封止樹脂４を平面視した場合の周縁部が他の部分より高くなるよう形成してあるので、封止樹脂４の天面を被覆するシールド層５の厚みを薄くした場合であっても、封止樹脂４の天面と側面との境界部分が露出するおそれが少なく、シールド層５の天面と側面との間の抵抗値を低く抑えることができ、シールド特性の向上を図ることが可能となる。   Since the shield layer 5 that covers the sealing resin 4 is formed such that the peripheral edge when the sealing resin 4 is viewed in plan view is higher than the other portions, the shield layer that covers the top surface of the sealing resin 4 Even when the thickness of 5 is reduced, there is little risk of exposing the boundary between the top surface and the side surface of the sealing resin 4, and the resistance value between the top surface and the side surface of the shield layer 5 is kept low. Thus, it becomes possible to improve the shield characteristics.

例えば、従来の製造工程で製造したモジュール基板では、封止樹脂の天面の周縁部に形成されるシールド層の厚みは１μｍ程度であり、うっすらと下方の封止樹脂を目視することができるのに対し、本実施の形態３に係る製造工程で製造したモジュール基板１０の、封止樹脂４の天面の周縁部に形成されるシールド層５の厚みは２０μｍ程度と十分に厚く、封止樹脂４を目視することはできない。   For example, in a module substrate manufactured by a conventional manufacturing process, the thickness of the shield layer formed on the peripheral edge of the top surface of the sealing resin is about 1 μm, and the sealing resin below can be visually observed. On the other hand, the thickness of the shield layer 5 formed on the peripheral edge of the top surface of the sealing resin 4 of the module substrate 10 manufactured in the manufacturing process according to the third embodiment is sufficiently thick as about 20 μm. 4 cannot be visually observed.

また、シールド層５の天面と側面との間の抵抗値をテスターで測定したところ、従来の製造工程で製造したモジュール基板では、抵抗値は２Ω前後であったのに対し、本実施の形態３に係る製造工程で製造したモジュール基板１０では、抵抗値が０．１Ω前後と大きく低下していた。抵抗値が低いほどシールド特性が高いことは周知であり、本実施の形態３に係る製造工程で製造したモジュール基板１０のシールド特性が向上していることを確認することができた。   Further, when the resistance value between the top surface and the side surface of the shield layer 5 was measured with a tester, the resistance value was about 2Ω in the module substrate manufactured in the conventional manufacturing process. In the module substrate 10 manufactured in the manufacturing process according to No. 3, the resistance value was greatly reduced to around 0.1Ω. It is well known that the lower the resistance value is, the higher the shield characteristic is, and it has been confirmed that the shield characteristic of the module substrate 10 manufactured in the manufacturing process according to the third embodiment is improved.

なお、封止樹脂４の天面と側面との境界部分を面取りしてあることが好ましい。封止樹脂４の天面と側面との境界部分が露出するおそれがより少ないからである。   In addition, it is preferable that the boundary portion between the top surface and the side surface of the sealing resin 4 is chamfered. This is because the boundary portion between the top surface and the side surface of the sealing resin 4 is less likely to be exposed.

図６は、本発明の実施の形態３に係るモジュール基板１０の封止樹脂４の面取り状態を模式的に示す部分断面図である。図６（ａ）に示すように、封止樹脂４の天面と側面との境界部分を平面状に面取りすることで、封止樹脂４の天面を被覆するシールド層５の厚みを薄くした場合であっても、より封止樹脂４の天面と側面との境界部分が露出するおそれが少ない。   FIG. 6 is a partial cross-sectional view schematically showing the chamfered state of the sealing resin 4 of the module substrate 10 according to Embodiment 3 of the present invention. As shown in FIG. 6A, the thickness of the shield layer 5 covering the top surface of the sealing resin 4 is reduced by chamfering the boundary portion between the top surface and the side surface of the sealing resin 4 in a flat shape. Even in this case, there is less possibility that the boundary portion between the top surface and the side surface of the sealing resin 4 is exposed.

もちろん、平面状に面取りすることに限定されるものではなく、例えば図６（ｂ）に示すように段差状に面取りしても良いし、図６（ｃ）及び（ｄ）に示すように、Ｒの付いた曲面状に面取りしても良い。   Of course, it is not limited to chamfering in a planar shape, and for example, it may be chamfered in a step shape as shown in FIG. 6B, or as shown in FIGS. 6C and 6D, It may be chamfered into a curved surface with an R.

以上のように、本発明の実施の形態３に係るモジュール基板１０は、封止樹脂４を被覆するシールド層５が、封止樹脂４を平面視した場合の周縁部が他の部分より高くなるよう形成してあるので、封止樹脂４の天面を被覆するシールド層５の厚みを薄くした場合であっても、封止樹脂４の天面と側面との境界部分が露出するおそれが少なく、シールド層５の天面と側面との間の抵抗値を低く抑えることができ、シールド特性の向上を図ることが可能となる。   As described above, in the module substrate 10 according to Embodiment 3 of the present invention, the shield layer 5 that covers the sealing resin 4 has a peripheral edge that is higher than other portions when the sealing resin 4 is viewed in plan view. Therefore, even when the thickness of the shield layer 5 covering the top surface of the sealing resin 4 is reduced, there is little possibility that the boundary portion between the top surface and the side surface of the sealing resin 4 is exposed. The resistance value between the top surface and the side surface of the shield layer 5 can be kept low, and the shield characteristics can be improved.

なお、本発明は上記実施例に限定されるものではなく、本発明の趣旨の範囲内であれば多種の変形、置換等が可能であることは言うまでもない。   It should be noted that the present invention is not limited to the above-described embodiments, and it goes without saying that various modifications and substitutions are possible within the scope of the gist of the present invention.

１ ベース基板
２、３ 電子部品
４ 封止樹脂
５ シールド層
６ 端子電極
９ 溝
１０ モジュール基板DESCRIPTION OF SYMBOLS 1 Base substrate 2, 3 Electronic components 4 Sealing resin 5 Shield layer 6 Terminal electrode 9 Groove 10 Module substrate

Claims (5)

ベース基板と、
該ベース基板の少なくとも一面に実装した複数の電子部品と、
前記ベース基板の一面に実装した複数の前記電子部品を封止する封止樹脂と、
該封止樹脂の天面及び側面を導電材料で被覆するシールド層と
を備え、
前記封止樹脂の側面を被覆する前記シールド層は、前記封止樹脂の天面を被覆する前記シールド層以上の厚みで形成してあり、
前記封止樹脂の側面のうち少なくとも一面を被覆する前記シールド層は、前記封止樹脂の天面を被覆する前記シールド層より厚く形成してあり、
前記封止樹脂を被覆する前記シールド層は、前記封止樹脂を平面視した場合の周縁部が他の部分より高くなるよう形成してあることを特徴とするモジュール基板。 A base substrate;
A plurality of electronic components mounted on at least one surface of the base substrate;
A sealing resin for sealing a plurality of the electronic components mounted on one surface of the base substrate;
A shielding layer for covering the top and side surfaces of the sealing resin with a conductive material,
The shield layer covering the side surface of the sealing resin is formed with a thickness equal to or greater than the shield layer covering the top surface of the sealing resin,
Wherein the shield layer that covers at least one surface among the side surfaces of the sealing resin, Ri thicker Tare than said shield layer covering the top surface of the sealing resin,
The shield layer, the module substrate, wherein the tare Rukoto formed so that the peripheral portion when viewed in plan the sealing resin is higher than other portions covering the sealing resin. 前記封止樹脂の側面を被覆する前記シールド層は、全ての側面において、前記封止樹脂の天面を被覆する前記シールド層よりも厚くなるように形成してあることを特徴とする請求項１に記載のモジュール基板。 2. The shield layer covering the side surface of the sealing resin is formed to be thicker than the shield layer covering the top surface of the sealing resin on all side surfaces. The module board as described in. 前記封止樹脂の天面と側面との境界部分が面取りされていることを特徴とする請求項１又は２に記載のモジュール基板。 Module board according to claim 1 or 2 boundary portion between the top surface and the side surface of the sealing resin is characterized in that it is chamfered. 前記ベース基板の一面に実装した複数の前記電子部品のうち、素子の集積率の高い前記電子部品の近傍にある前記封止樹脂の側面を被覆する前記シールド層は、他の前記封止樹脂の側面を被覆する前記シールド層に比べて厚くなるように形成してあることを特徴とする請求項１乃至３のいずれか一項に記載のモジュール基板。 Among the plurality of electronic components mounted on one surface of the base substrate, the shield layer covering the side surface of the sealing resin in the vicinity of the electronic component having a high integration rate of elements is formed of other sealing resin. The module substrate according to any one of claims 1 to 3, wherein the module substrate is formed so as to be thicker than the shield layer covering the side surface . 前記ベース基板の一面に実装した複数の前記電子部品には、コイル及びフィルタのうち少なくとも一つが含まれていることを特徴とする請求項１乃至４のいずれか一項に記載のモジュール基板。 5. The module substrate according to claim 1, wherein the plurality of electronic components mounted on one surface of the base substrate include at least one of a coil and a filter .
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JP5983426B2 (en) * 2013-01-22 2016-08-31 株式会社村田製作所 Module board
EP3132664A4 (en) * 2014-04-18 2017-11-29 Henkel AG & Co. KGaA Emi shielding composition and process for applying it

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JP2006294701A (en) * 2005-04-06 2006-10-26 Shinko Electric Ind Co Ltd Semiconductor device and its manufacturing method
JP2009016715A (en) * 2007-07-09 2009-01-22 Tatsuta System Electronics Kk High-frequency module having shielding and heat radiating performance and manufacturing method for high-frequency module
WO2010103756A1 (en) * 2009-03-10 2010-09-16 パナソニック株式会社 Module component, method for manufacturing same, and electronic apparatus using the module component

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JP2006294701A (en) * 2005-04-06 2006-10-26 Shinko Electric Ind Co Ltd Semiconductor device and its manufacturing method
JP2009016715A (en) * 2007-07-09 2009-01-22 Tatsuta System Electronics Kk High-frequency module having shielding and heat radiating performance and manufacturing method for high-frequency module
WO2010103756A1 (en) * 2009-03-10 2010-09-16 パナソニック株式会社 Module component, method for manufacturing same, and electronic apparatus using the module component

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Publication number Priority date Publication date Assignee Title
EP3471136A4 (en) * 2016-06-08 2019-04-17 Mitsubishi Electric Corporation Semiconductor device, and method for manufacturing same

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