JP5603191B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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Description
Package)と呼ばれるものが知られている(例えば、特許文献1参照)。この半導体装置は半導体基板を備えている。半導体基板上に設けられた絶縁膜の上面には配線が設けられている。配線のランド上面には外部接続用電極が設けられている。配線を含む絶縁膜の上面において外部接続用電極の周囲には封止膜が設けられている。外部接続用電極の上面には半田バンプが設けられている。
また、WLP(Wafer Level Package)をプリント配線板に直接埋込む技術であるEWLP(Embedded Wafer Level Package)では、WLPを埋めん込んだ後に外部接続用電極上の上層絶縁膜に開口部を設けて上層配線と電気的に接続している。しかし、外部接続用電極は、周囲の封止膜と開口部周縁部の上層絶縁膜の二層と接触しているため、層の境界付近において密着性が良くないという問題もあった。
請求項2に記載の発明に係る半導体装置の製造方法は、半導体基板上に、メッキレジスト膜を用いた電解メッキを行うことにより、柱状の外部接続用電極を形成し、 前記メッキレジスト膜を残した状態で前記外部接続用電極の上部およびそれに対応する前記メッキレジスト膜の上面側を切って除去し、前記メッキレジスト膜を剥離し、前記外部接続用電極の周側面および上面を覆うように封止膜を形成し、前記外部接続用電極上面の一部の領域における前記封止膜に開口部を形成することを特徴とするものである。
請求項3に記載の発明に係る半導体装置の製造方法は、請求項2に記載の発明において、前記外部接続用電極の上部およびそれに対応する前記メッキレジスト膜の上面側は、サーフェスプレーナーを用いて切ることを特徴とするものである。
請求項4に記載の発明に係る半導体装置の製造方法は、請求項1または2に記載の発明において、前記封止膜の上面側の研削は前記外部接続用電極上に前記封止膜が厚さ数μm〜10μm残るように研削することを特徴とするものである。
請求項5に記載の発明に係る半導体装置の製造方法は、請求項1または2に記載の発明において、前記封止膜の開口部の形成はレーザビームを照射するレーザ加工により行うことを特徴とするものである。
請求項6に記載の発明に係る半導体装置の製造方法は、請求項5に記載の発明において、前記封止膜の開口部の直径は前記外部接続用電極の直径よりも数μm〜10μm小さくなるようにすることを特徴とするものである。
請求項7に記載の発明に係る半導体装置の製造方法は、請求項1または2に記載の発明において、前記封止膜の開口部内およびその上方に、半田バンプを少なくとも前記外部接続用電極上面の中心を含む領域に接続させて形成することを特徴とするものである。
2 接続パッド
3 パッシベーション膜
5 保護膜
7 配線
10 外部接続用電極
11 封止膜
12 開口部
13 半田バンプ
21 半導体ウエハ
22 ダイシングストリート
27 サーフェスプレーナー
Claims (7)
- 半導体基板上に形成された柱状の外部接続用電極の上部をサーフェスプレーナーで除去し、
前記外部接続用電極の周側面および上面を覆うように封止膜を形成し、
前記外部接続用電極上面の一部の領域における前記封止膜に開口部を形成することを特徴とする半導体装置の製造方法。 - 半導体基板上に、メッキレジスト膜を用いた電解メッキを行うことにより、柱状の外部接続用電極を形成し、
前記メッキレジスト膜を残した状態で前記外部接続用電極の上部およびそれに対応する前記メッキレジスト膜の上面側を切って除去し、
前記メッキレジスト膜を剥離し、
前記外部接続用電極の周側面および上面を覆うように封止膜を形成し、
前記外部接続用電極上面の一部の領域における前記封止膜に開口部を形成することを特徴とする半導体装置の製造方法。 - 請求項2に記載の発明において、前記外部接続用電極の上部およびそれに対応する前記メッキレジスト膜の上面側は、サーフェスプレーナーを用いて切ることを特徴とする半導体装置の製造方法。
- 請求項1または2に記載の発明において、前記封止膜の上面側の研削は前記外部接続用電極上に前記封止膜が厚さ数μm〜10μm残るように研削することを特徴とする半導体装置の製造方法。
- 請求項1または2に記載の発明において、前記封止膜の開口部の形成はレーザビームを照射するレーザ加工により行うことを特徴とする半導体装置の製造方法。
- 請求項5に記載の発明において、前記封止膜の開口部の直径は前記外部接続用電極の直径よりも数μm〜10μm小さくなるようにすることを特徴とする半導体装置の製造方法。
- 請求項1または2に記載の発明において、前記封止膜の開口部内およびその上方に、半田バンプを少なくとも前記外部接続用電極上面の中心を含む領域に接続させて形成することを特徴とする半導体装置の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010216881A JP5603191B2 (ja) | 2010-09-28 | 2010-09-28 | 半導体装置の製造方法 |
US13/225,693 US8564128B2 (en) | 2010-09-28 | 2011-09-06 | Semiconductor device and manufacturing method of the same |
TW100133544A TWI476882B (zh) | 2010-09-28 | 2011-09-19 | 半導體裝置及其製造方法 |
CN2011102801335A CN102420197A (zh) | 2010-09-28 | 2011-09-20 | 半导体器件及其制造方法 |
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JP2010216881A JP5603191B2 (ja) | 2010-09-28 | 2010-09-28 | 半導体装置の製造方法 |
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JP2012074461A JP2012074461A (ja) | 2012-04-12 |
JP5603191B2 true JP5603191B2 (ja) | 2014-10-08 |
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