JP5596123B2 - 有限の耐久性および/または持続性を有するメモリ装置からのモニタ・データの情報を分析する方法およびシステム - Google Patents
有限の耐久性および/または持続性を有するメモリ装置からのモニタ・データの情報を分析する方法およびシステム Download PDFInfo
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- JP5596123B2 JP5596123B2 JP2012503953A JP2012503953A JP5596123B2 JP 5596123 B2 JP5596123 B2 JP 5596123B2 JP 2012503953 A JP2012503953 A JP 2012503953A JP 2012503953 A JP2012503953 A JP 2012503953A JP 5596123 B2 JP5596123 B2 JP 5596123B2
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/52—Protection of memory contents; Detection of errors in memory contents
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0409—Online test
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- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Debugging And Monitoring (AREA)
Description
Claims (18)
- 有限の耐久性および/または持続性を有する複数のメモリ装置からモニタ・データの情報を収集するステップであって、前記モニタ・データは、(1)既知の書き込みサイクルの数の専用メモリ・セルに格納された既知の内容のデータであり、且つ、(2)前記モニタ・データを有する少なくとも1つのブロックの少なくとも一部分がユーザ・データによって上書きされないように書き込み保護される、前記収集するステップと、
前記モニタ・データの情報を分析するステップと、
前記分析するステップに基づいて、前記メモリ装置の少なくとも1つに関してアクションを取るステップと
を含む方法。 - 前記モニタ・データを生成するステップを更に含む、請求項1に記載の方法。
- 前記モニタ・データの情報は、前記モニタ・データのデータ・エイジおよび前記書き込みサイクルの数の少なくとも一方に関するエラー率情報を含む、請求項1又は2に記載の方法。
- 前記収集するステップおよび前記分析するステップを少なくとも2回行うステップと、
それに基づいて統計的傾向を生成するステップと
を更に含む、請求項1〜3のいずれか一項に記載の方法。 - 前記収集するステップおよび前記分析するステップを少なくとも2回行うステップと、
前記モニタ・データの時間依存度を追跡するステップと、
を更に含む、請求項1〜4のいずれか一項に記載の方法。 - 前記アクションを取るステップは前記メモリ装置の少なくとも1つに関する動作目標を設定するステップを含む、請求項1〜5のいずれか一項に記載の方法。
- 前記動作目標は、データ書き込みサイクルの数に関する限界、又は、データ・エイジに関する限界である、請求項6に記載の方法。
- 所定の期間が経過した後、前記メモリ装置の少なくとも1つに関する動作目標を更新するステップ
を更に含む、請求項6又は7に記載の方法。 - 前記モニタ・データはウェアレベリングの影響を受けない、請求項1〜8のいずれか一項に記載の方法。
- 前記メモリ装置はNAND装置である、請求項1〜9のいずれか一項に記載の方法。
- 前記モニタ・データは前記メモリ装置の各々に関するメモリ容量の約1%よりも少ない、請求項1〜10のいずれか一項に記載の方法。
- 前記メモリ装置の各々におけるモニタ・データは複数のブロック・グループに書き込まれ、各グループに対して行われる書き込みサイクルの数は異なる、請求項1〜11のいずれか一項に記載の方法。
- コンピュータに、請求項1〜12のいずれか一項に記載の方法の各ステップを実行させる、コンピュータ・プログラム。
- システムであって、
有限の耐久性および/または持続性を有する複数のメモリ装置であって、
前記メモリ装置の各々は、
複数のメモリ・ブロックであって、前記メモリ・ブロックの少なくとも1つがモニタ・データを書き込まれており、少なくとも1つのメモリ・ブロックが前記モニタ・データを書き込む前に複数回書き込まれており、前記モニタ・データは、(1)既知の書き込みサイクルの数の専用メモリ・セルに格納された既知の内容のデータであり、且つ、(2)前記モニタ・データを有する少なくとも1つのブロックの少なくとも一部分がユーザ・データによって上書きされないように書き込み保護される、前記複数のメモリ・ブロックと、
前記メモリ・ブロックをアドレスするための回路と
を備えている、前記メモリ装置と、
前記メモリ装置に接続されたプロセッサであって、前記メモリ装置から前記モニタ・データの情報を収集し、前記モニタ・データの情報を分析し、及び前記分析するステップに基づいて、前記メモリ装置の少なくとも1つに関してアクションを取るように構成されている前記プロセッサと
を備えている、前記システム。 - 前記モニタ・データのコピーを格納する第二メモリを更に含む、請求項14に記載のシステム。
- 前記モニタ・データの情報は、前記モニタ・データのデータ・エイジおよび前記書き込みサイクルの数の少なくとも一方に関するエラー率情報を含む、請求項14又は15に記載のシステム。
- 前記モニタ・データはウェアレベリングの影響を受けない、請求項14〜16のいずれか一項に記載のシステム。
- 前記メモリ装置はNAND装置である、請求項14〜17のいずれか一項に記載のシステム。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/420,628 US8316173B2 (en) | 2009-04-08 | 2009-04-08 | System, method, and computer program product for analyzing monitor data information from a plurality of memory devices having finite endurance and/or retention |
US12/420,628 | 2009-04-08 | ||
PCT/EP2010/053943 WO2010115726A2 (en) | 2009-04-08 | 2010-03-25 | Analyzing monitor data information from memory devices having finite endurance and/or retention |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2012523599A JP2012523599A (ja) | 2012-10-04 |
JP2012523599A5 JP2012523599A5 (ja) | 2014-05-01 |
JP5596123B2 true JP5596123B2 (ja) | 2014-09-24 |
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Application Number | Title | Priority Date | Filing Date |
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JP2012503953A Expired - Fee Related JP5596123B2 (ja) | 2009-04-08 | 2010-03-25 | 有限の耐久性および/または持続性を有するメモリ装置からのモニタ・データの情報を分析する方法およびシステム |
Country Status (5)
Country | Link |
---|---|
US (2) | US8316173B2 (ja) |
EP (1) | EP2417603B1 (ja) |
JP (1) | JP5596123B2 (ja) |
CN (1) | CN102301427A (ja) |
WO (1) | WO2010115726A2 (ja) |
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US8572443B2 (en) * | 2009-04-08 | 2013-10-29 | International Business Machines Corporation | System, method, and computer program product for determining a retention behavior for at least one block of a memory device having finite endurance and/or retention |
-
2009
- 2009-04-08 US US12/420,628 patent/US8316173B2/en active Active
-
2010
- 2010-03-25 JP JP2012503953A patent/JP5596123B2/ja not_active Expired - Fee Related
- 2010-03-25 EP EP10717562.2A patent/EP2417603B1/en not_active Not-in-force
- 2010-03-25 CN CN201080005997XA patent/CN102301427A/zh active Pending
- 2010-03-25 WO PCT/EP2010/053943 patent/WO2010115726A2/en active Application Filing
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2012
- 2012-09-14 US US13/617,996 patent/US8554989B2/en active Active
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Publication number | Publication date |
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JP2012523599A (ja) | 2012-10-04 |
CN102301427A (zh) | 2011-12-28 |
EP2417603B1 (en) | 2018-04-25 |
US20100262795A1 (en) | 2010-10-14 |
WO2010115726A2 (en) | 2010-10-14 |
EP2417603A2 (en) | 2012-02-15 |
US8554989B2 (en) | 2013-10-08 |
US20130013968A1 (en) | 2013-01-10 |
US8316173B2 (en) | 2012-11-20 |
WO2010115726A3 (en) | 2010-12-23 |
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