JP5595813B2 - 回路基板の製造方法 - Google Patents
回路基板の製造方法 Download PDFInfo
- Publication number
- JP5595813B2 JP5595813B2 JP2010157164A JP2010157164A JP5595813B2 JP 5595813 B2 JP5595813 B2 JP 5595813B2 JP 2010157164 A JP2010157164 A JP 2010157164A JP 2010157164 A JP2010157164 A JP 2010157164A JP 5595813 B2 JP5595813 B2 JP 5595813B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- wiring
- cutting
- general
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0286—Programmable, customizable or modifiable circuits
- H05K1/0292—Programmable, customizable or modifiable circuits having a modifiable lay-out, i.e. adapted for engineering changes or repair
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0228—Cutting, sawing, milling or shearing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/17—Post-manufacturing processes
- H05K2203/175—Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49162—Manufacturing circuit on or in base by using wire as conductive path
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Description
本実施の形態の回路基板の製造方法は、汎用回路基板形成工程、分割工程及び配線切削工程を備えている。
本実施の形態の回路基板1の製造方法においては、図5又は図6に示すように、分割工程の工程内において配線切削工程を行っている。そのため、分割後に在庫保管された汎用回路基板11から不要な配線の一部2a、2b、2c又は2dを削除して所望の回路基板を得る従来の製造方法と比較して、製造コストを増加させることなく、かつ、過不足なく、所望の回路基板1を製造することができる。
すなわち、本発明の実施の形態によれば、上記の通り、分割工程の工程内において配線切削工程を行っているので、所望する回路基板の製造コストを増加させることなく、かつ、その個数を過不足なく所望の回路基板を製造することができるなどの種々の作用を生じる。そのため、回路基板の製造コストの低減及び増加防止を図ることができる回路基板の製造方法を提供することができる。
Claims (4)
- 相互に連結された、適用回路の種類に応じて選択変更すべき回路部の配線を予め接続状態に形成される複数の汎用回路基板を有する集合基板の前記連結部を切削することにより前記集合基板から複数の回路基板を分割する分割工程と、
前記分割工程の工程内において、前記連結部上ではない前記回路基板に予め接続し形成された配線の一部を選択的に切削することにより前記汎用回路基板を所望の回路基板に加工する配線切削工程と
を備えることを特徴とする回路基板の製造方法。 - 前記配線切削工程において切削される前記配線の一部は、前記分割工程において切削される前記連結部の周囲に形成されている
ことを特徴とする請求項1に記載の回路基板の製造方法。 - 前記配線の一部は、前記連結部の両側に各々1個又は2個以上形成されていることを特徴とする請求項2に記載の回路基板の製造方法。
- 前記分割工程及び前記配線切削工程において行われる切削作業の切削ルートは、前記連結部及び前記配線の一部を連続して通過するルートである
ことを特徴とする請求項1から請求項3のいずれか1項に記載の回路基板の製造方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010157164A JP5595813B2 (ja) | 2010-07-09 | 2010-07-09 | 回路基板の製造方法 |
CN201110155019XA CN102316678A (zh) | 2010-07-09 | 2011-05-31 | 电路基板的制造方法 |
US13/166,152 US9032613B2 (en) | 2010-07-09 | 2011-06-22 | Method for making circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010157164A JP5595813B2 (ja) | 2010-07-09 | 2010-07-09 | 回路基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012019161A JP2012019161A (ja) | 2012-01-26 |
JP5595813B2 true JP5595813B2 (ja) | 2014-09-24 |
Family
ID=45429374
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010157164A Expired - Fee Related JP5595813B2 (ja) | 2010-07-09 | 2010-07-09 | 回路基板の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US9032613B2 (ja) |
JP (1) | JP5595813B2 (ja) |
CN (1) | CN102316678A (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5595813B2 (ja) * | 2010-07-09 | 2014-09-24 | 株式会社東海理化電機製作所 | 回路基板の製造方法 |
US20160335592A1 (en) * | 2015-05-13 | 2016-11-17 | Carrier Corporation | Modular data logging system with combined data logs |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5437264A (en) | 1977-08-30 | 1979-03-19 | Nishishiba Denki Kk | Method of making print wiring board |
US5059899A (en) * | 1990-08-16 | 1991-10-22 | Micron Technology, Inc. | Semiconductor dies and wafers and methods for making |
JPH05110230A (ja) * | 1991-10-18 | 1993-04-30 | Fujitsu Ltd | プリント配線基板の製造方法 |
JP3529581B2 (ja) * | 1997-03-14 | 2004-05-24 | 東芝マイクロエレクトロニクス株式会社 | 半導体ウェーハ及びicカード |
TW511401B (en) * | 2000-09-04 | 2002-11-21 | Sanyo Electric Co | Method for manufacturing circuit device |
EP1772878A4 (en) * | 2004-07-23 | 2012-12-12 | Murata Manufacturing Co | METHOD FOR PRODUCING AN ELECTRONIC COMPONENT, NUT PLATE AND ELECTRONIC COMPONENT |
JP2006286801A (ja) * | 2005-03-31 | 2006-10-19 | Fujikura Ltd | フレキシブルプリント配線板 |
JP4887964B2 (ja) * | 2006-08-03 | 2012-02-29 | 日本電気株式会社 | プリント配線基板、携帯電子機器、および基板製造方法 |
JP2008299594A (ja) * | 2007-05-31 | 2008-12-11 | Denso Wave Inc | プログラマブルコントローラ及びプログラマブルコントローラ用の基板 |
JP5418262B2 (ja) * | 2010-02-04 | 2014-02-19 | 株式会社安川電機 | 制御基板とこれを用いた多軸用モータ制御装置 |
JP5595813B2 (ja) * | 2010-07-09 | 2014-09-24 | 株式会社東海理化電機製作所 | 回路基板の製造方法 |
JP5185344B2 (ja) * | 2010-09-06 | 2013-04-17 | 株式会社東芝 | 半導体発光素子の製造方法および半導体発光素子 |
-
2010
- 2010-07-09 JP JP2010157164A patent/JP5595813B2/ja not_active Expired - Fee Related
-
2011
- 2011-05-31 CN CN201110155019XA patent/CN102316678A/zh active Pending
- 2011-06-22 US US13/166,152 patent/US9032613B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20120005895A1 (en) | 2012-01-12 |
US9032613B2 (en) | 2015-05-19 |
CN102316678A (zh) | 2012-01-11 |
JP2012019161A (ja) | 2012-01-26 |
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