JP5390068B2 - チップ、fet製造方法(誘電体ストレッサ要素を有するトランジスタ) - Google Patents
チップ、fet製造方法(誘電体ストレッサ要素を有するトランジスタ) Download PDFInfo
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- JP5390068B2 JP5390068B2 JP2006290998A JP2006290998A JP5390068B2 JP 5390068 B2 JP5390068 B2 JP 5390068B2 JP 2006290998 A JP2006290998 A JP 2006290998A JP 2006290998 A JP2006290998 A JP 2006290998A JP 5390068 B2 JP5390068 B2 JP 5390068B2
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- 238000004519 manufacturing process Methods 0.000 title description 9
- 239000004065 semiconductor Substances 0.000 claims description 111
- 238000002955 isolation Methods 0.000 claims description 20
- 239000004020 conductor Substances 0.000 claims description 12
- 230000005669 field effect Effects 0.000 claims description 8
- 239000000203 mixture Substances 0.000 claims description 4
- 238000000206 photolithography Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 description 34
- 239000000758 substrate Substances 0.000 description 29
- 229910021426 porous silicon Inorganic materials 0.000 description 26
- 230000008569 process Effects 0.000 description 19
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 18
- 229910052710 silicon Inorganic materials 0.000 description 18
- 239000010703 silicon Substances 0.000 description 18
- 229910052796 boron Inorganic materials 0.000 description 13
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 12
- 239000002019 doping agent Substances 0.000 description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 11
- 238000002048 anodisation reaction Methods 0.000 description 10
- 238000002513 implantation Methods 0.000 description 9
- 238000007743 anodising Methods 0.000 description 8
- 230000000873 masking effect Effects 0.000 description 8
- 238000012545 processing Methods 0.000 description 8
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 7
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 5
- 235000012239 silicon dioxide Nutrition 0.000 description 5
- 125000006850 spacer group Chemical group 0.000 description 5
- 125000001475 halogen functional group Chemical group 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 239000002210 silicon-based material Substances 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 229910015900 BF3 Inorganic materials 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- WTEOIRVLGSZEPR-UHFFFAOYSA-N boron trifluoride Chemical compound FB(F)F WTEOIRVLGSZEPR-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000006261 foam material Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- -1 silicon nitride Chemical class 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823412—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
- H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7846—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the lateral device isolation region, e.g. STI
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- Engineering & Computer Science (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
Description
102 埋込み誘電体ストレッサ領域
104 活性半導体領域
106 浅いトレンチ分離(STI)領域
108 活性半導体領域の第1の縁
110 活性半導体領域の第2の縁
112 NFETの縦方向
114 活性半導体領域の第3の縁
116 活性半導体領域の第4の縁
118 NFETの横方向
120 ゲート
121 ゲート導体
122 ソース領域
123 誘電体側壁またはスペーサ
124 ドレイン領域
Claims (8)
- 活性半導体領域と、
いずれも前記活性半導体領域の中に配置されたチャネル領域、ソース領域およびドレイン領域を有し、前記チャネル領域の長さの方向である縦方向と、前記チャネル領域の幅の方向である横方向とを有する電界効果トランジスタ(「FET」)と、
前記チャネル領域外の周りの前記活性半導体領域の一部分の下に存在する水平に延びる上面を有し、前記活性半導体領域と縁を共有し、前記縁が前記上面から遠ざかる下方向に延びる誘電体ストレッサ要素と
を含み、
前記誘電体ストレッサ要素が第1の誘電体ストレッサ要素であり、前記第1の誘電体ストレッサ要素が、前記ソース領域の一部分を含む前記活性半導体領域の一部分の下に存在し、前記縁が、少なくとも垂直な方向に延びる前記活性半導体領域の第1の縁であり、前記FETがさらに、前記ドレイン領域の一部分を含む前記活性半導体領域の一部分の下に存在し水平に延びる上面を有する第2の誘電体ストレッサ要素を含み、前記第2の誘電体ストレッサ要素が、前記活性半導体領域と第2の縁を共有し、前記第2の縁が、前記第2の誘電体ストレッサ要素の前記上面から遠ざかる、前記少なくとも垂直な下方向に延び、
前記FETがさらに、前記チャネル領域の上に存在する導電性部分を有するゲート導体を含み、前記導電性部分が、垂直方向を向いた第1のゲート縁と、前記第1のゲート縁の反対側の垂直方向を向いた第2のゲート縁とを有し、前記第1の誘電体ストレッサ要素の前記第1の縁が前記第1のゲート縁と整列し、前記第2の誘電体ストレッサ要素の前記第2の縁が前記第2のゲート縁と整列した、
チップ。 - 前記FETがn型FET(「NFET」)であり、前記第1および第2の誘電体ストレッサ要素が前記NFETの前記チャネル領域に引張応力を加える、請求項1に記載のチップ。
- 前記縦方向および前記横方向において前記活性半導体領域がトレンチ分離領域の縁と境界をなし、前記第1および第2の誘電体ストレッサ要素が、前記トレンチ分離領域の全ての前記縁の全長と接触した、請求項2に記載のチップ。
- 前記FETがp型FET(「PFET」)であり、前記第1および第2の誘電体ストレッサ要素が前記PFETの前記チャネル領域に圧縮応力を加える、請求項1に記載のチップ。
- 前記第1および第2の誘電体ストレッサ要素が、半導体の酸化物を含む埋込み領域を含み、前記半導体が、前記活性半導体領域に含まれる半導体と同じ組成を有する、請求項1に記載のチップ。
- 前記第1および第2の誘電体ストレッサ要素が、半導体の引張応力が生じた酸化物の埋込み領域を含み、前記半導体が、前記活性半導体領域に含まれる半導体と同じ組成を有し、前記チップがさらに、引張応力が生じた酸化物の前記埋込み領域の上に存在するトレンチ分離領域を含む、請求項2に記載のチップ。
- 前記第1および第2の誘電体ストレッサ要素が、前記活性半導体領域に含まれる半導体の圧縮応力が生じた酸化物の埋込み領域を含み、前記チップがさらに、圧縮応力が生じた酸化物の前記埋込み領域の上に存在するトレンチ分離領域を含む、請求項4に記載のチップ。
- 前記第1および第2の誘電体ストレッサ要素の前記第1および第2の縁がフォトリソグラフィによって画定された、請求項1に記載のチップ。
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US11/163,683 US7759739B2 (en) | 2005-10-27 | 2005-10-27 | Transistor with dielectric stressor elements |
US11/163683 | 2005-10-27 |
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JP2007123898A JP2007123898A (ja) | 2007-05-17 |
JP5390068B2 true JP5390068B2 (ja) | 2014-01-15 |
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US8772127B2 (en) | 2010-12-29 | 2014-07-08 | Institute of Microelectronics, Chinese Academy of Sciences | Semiconductor device and method for manufacturing the same |
CN102569086B (zh) * | 2010-12-29 | 2014-10-29 | 中国科学院微电子研究所 | 半导体器件及其形成方法 |
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JP4371710B2 (ja) * | 2003-06-09 | 2009-11-25 | キヤノン株式会社 | 半導体基体、半導体装置及びこれらの製造方法 |
US7566482B2 (en) * | 2003-09-30 | 2009-07-28 | International Business Machines Corporation | SOI by oxidation of porous silicon |
US7190036B2 (en) * | 2004-12-03 | 2007-03-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Transistor mobility improvement by adjusting stress in shallow trench isolation |
US7442618B2 (en) * | 2005-07-16 | 2008-10-28 | Chartered Semiconductor Manufacturing, Ltd | Method to engineer etch profiles in Si substrate for advanced semiconductor devices |
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2005
- 2005-10-27 US US11/163,683 patent/US7759739B2/en not_active Expired - Fee Related
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2006
- 2006-08-07 CN CN2006101106808A patent/CN1956221B/zh not_active Expired - Fee Related
- 2006-10-26 JP JP2006290998A patent/JP5390068B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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US20070096215A1 (en) | 2007-05-03 |
US7759739B2 (en) | 2010-07-20 |
CN1956221B (zh) | 2010-04-07 |
JP2007123898A (ja) | 2007-05-17 |
CN1956221A (zh) | 2007-05-02 |
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