JP5384690B2 - チップパッケージ - Google Patents
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- JP5384690B2 JP5384690B2 JP2012092264A JP2012092264A JP5384690B2 JP 5384690 B2 JP5384690 B2 JP 5384690B2 JP 2012092264 A JP2012092264 A JP 2012092264A JP 2012092264 A JP2012092264 A JP 2012092264A JP 5384690 B2 JP5384690 B2 JP 5384690B2
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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- H01L2224/29001—Core members of the layer connector
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- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
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- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
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- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
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- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83862—Heat curing
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- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83871—Visible light curing
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- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00013—Fully indexed content
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Description
よって、チップパッケージの信頼度を改善する必要がある。
図1A〜図1Cは、本発明の実施形態によるチップパッケージの製造工程の断面図で、図2は、図1Bの平面図である。図1Bは、図2中のI-I’線に沿った断面図で、簡潔にするため、図2では、パッケージ基板を省略している。
当然わかることであるが、本実施例のチップパッケージの製造工程は、図1A〜図1Cの製造工程に類似し、両者の差異は、本実施形態では、貫通孔Tと接着材料140とが、さらにスペーサ部分134内にも設けられていることである。
注意すべきことは、本実施例のチップパッケージの製造工程は、図3A〜図3Bの製造工程に類似し、両者の差異は、本実施形態のスペーサ層130は複数の内環構造136を有することである。
注意すべきことは、本実施形態のチップパッケージの製造工程は、図3A〜図3Bの製造工程に類似し、両者の差異は、貫通孔Tの配列方式が異なることである。
当然わかることであるが、本実施例のチップパッケージの製造工程は、図9A〜図9Bの製造工程に類似し、両者の差異は、貫通孔Tの配列方式が異なることである。
本発明では好ましい実施例を前述の通り開示したが、これらは決して本発明に限定するものではなく、当該技術を熟知する者なら誰でも、本発明の精神と領域を脱しない範囲内で各種の変動や潤色を加えることができ、従って本発明の保護範囲は、特許請求の範囲で指定した内容を基準とする。
110 半導体ウェハ
110a (ダイス後の)半導体基板
112 デバイス領域
114 中心領域
116 周辺領域
120 パッケージ基板
120a (ダイス後の)パッケージ基板
130 スペーサ層
130a、130b、130c、130d、130e (ダイス後の)スペーサ層
132 外環部
134 スペーサ部分
136 内環構造
138 側壁
140 接着材料
140a 接着材料構造
140b、140c 環状接着材料構造
A トレンチ
B 外環トレンチ
C キャビティ
D 環状トレンチ
H 空洞貫通孔
P 外縁
R 凹部
S スクライブライン
T 貫通孔
Claims (7)
- チップパッケージであって、
デバイス領域を有する半導体基板と、
前記半導体基板上に設置されるパッケージ基板と、
前記半導体基板と前記パッケージ基板の間に設置され、かつ、前記デバイス領域を露出させるキャビティを区画するスペーサ層と、
前記スペーサ層中に埋め込まれるとともに、前記キャビティ外に位置する互いに独立した複数の接着材料構造と、を含み、
前記スペーサ層の材料は前記複数の接着材料構造の材料と異なり、
前記スペーサ層は、前記キャビティから離れた面に側壁を有し、前記側壁は、前記半導体基板から前記パッケージ基板にまで延伸する複数の凹部を有し、かつ、前記複数の接着材料構造は、それぞれ、前記複数の凹部中を充填することを特徴とするチップパッケージ。 - 前記複数の接着材料構造のそれぞれは、前記キャビティから離れた面に第二側壁を有し、前記第二側壁は前記スペーサ層の前記側壁と同一面となっていることを特徴とする請求項1に記載のチップパッケージ。
- チップパッケージであって、
デバイス領域を有する半導体基板と、
前記半導体基板上に設置されるパッケージ基板と、
前記半導体基板と前記パッケージ基板の間に設置され、かつ、前記デバイス領域を露出させるキャビティを区画するスペーサ層と、
前記スペーサ層中に埋め込まれるとともに、前記キャビティ外に位置する互いに独立した複数の接着材料構造と、を含み、
前記スペーサ層の材料は前記複数の接着材料構造の材料と異なり、
前記スペーサ層は複数の貫通孔を有し、前記複数の接着材料構造のそれぞれは、前記複数の貫通孔を充填することを特徴とするチップパッケージ。 - チップパッケージであって、
デバイス領域を有する半導体基板と、
前記半導体基板上に設置されるパッケージ基板と、
前記半導体基板と前記パッケージ基板の間に設置され、かつ、前記デバイス領域を露出させるキャビティを区画するスペーサ層と、
前記スペーサ層中に埋め込まれるとともに、前記キャビティ外に位置する互いに独立した複数の接着材料構造と、を含み、
前記スペーサ層の材料は前記複数の接着材料構造の材料と異なり、
前記スペーサ層は、さらに、前記キャビティ中に内環構造を有し、前記内環構造は複数の貫通孔を有し、
前記チップパッケージは、さらに、それぞれ、前記貫通孔中に充填される互いに独立した複数の第二接着材料構造を有し、前記スペーサ層の材料は、前記第二接着材料構造の材料と異なることを特徴とするチップパッケージ。 - 前記スペーサ層は、前記半導体基板と前記パッケージ基板とに物理的に接触しており、前記接着材料構造のそれぞれは、前記半導体基板から前記パッケージ基板にまで延出していることを特徴とする請求項1、3および4のいずれかに記載のチップパッケージ。
- さらに、前記スペーサ層の前記側壁を囲みかつ被覆し、かつ、前記キャビティ外に位置する連続した環状接着材料構造を含むことを特徴とする請求項1、3および4のいずれかに記載のチップパッケージ。
- 前記スペーサ層は、前記スペーサ層を貫通し、かつ、前記キャビティを環繞する環状トレンチを有し、
前記チップパッケージは、さらに、前記環状トレンチ中に充填される連続した環状接着材料構造を含むことを特徴とする請求項1、3および4のいずれかに記載のチップパッケージ。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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CN201110092927.9 | 2011-04-13 | ||
CN201110092927.9A CN102738013B (zh) | 2011-04-13 | 2011-04-13 | 晶片封装体及其制作方法 |
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JP2012222366A JP2012222366A (ja) | 2012-11-12 |
JP5384690B2 true JP5384690B2 (ja) | 2014-01-08 |
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US (1) | US9136241B2 (ja) |
JP (1) | JP5384690B2 (ja) |
CN (1) | CN102738013B (ja) |
TW (1) | TWI512811B (ja) |
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TWI485818B (zh) * | 2011-06-16 | 2015-05-21 | Xintec Inc | 晶片封裝體及其形成方法 |
CN104037135B (zh) | 2013-03-07 | 2017-09-22 | 精材科技股份有限公司 | 晶片封装体及其形成方法 |
CN103400808B (zh) * | 2013-08-23 | 2016-04-13 | 苏州晶方半导体科技股份有限公司 | 影像传感器的晶圆级封装结构及封装方法 |
WO2015094184A1 (en) * | 2013-12-17 | 2015-06-25 | Intel Corporation | Package mems switch and method |
US20150371956A1 (en) * | 2014-06-19 | 2015-12-24 | Globalfoundries Inc. | Crackstops for bulk semiconductor wafers |
CN104362243B (zh) * | 2014-10-24 | 2017-11-03 | 深圳市华星光电技术有限公司 | 基板的封装方法及封装结构 |
TWI731260B (zh) * | 2018-08-30 | 2021-06-21 | 奕力科技(開曼)股份有限公司 | 半導體基板結構及其製造方法 |
US11521938B2 (en) | 2020-01-06 | 2022-12-06 | Xintec Inc. | Chip package including substrate inclined sidewall and redistribution line |
KR20220001292A (ko) | 2020-06-29 | 2022-01-05 | 삼성전자주식회사 | 반도체 패키지 |
CN111710618B (zh) * | 2020-07-15 | 2021-10-12 | 广芯微电子(广州)股份有限公司 | 一种晶圆钝化层缺陷的检测方法 |
TWI837882B (zh) * | 2022-01-14 | 2024-04-01 | 精材科技股份有限公司 | 晶片封裝體及其製造方法 |
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2012
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TWI512811B (zh) | 2015-12-11 |
TW201241908A (en) | 2012-10-16 |
US20120261809A1 (en) | 2012-10-18 |
JP2012222366A (ja) | 2012-11-12 |
CN102738013B (zh) | 2016-04-20 |
US9136241B2 (en) | 2015-09-15 |
CN102738013A (zh) | 2012-10-17 |
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