JP5314478B2 - 表示装置 - Google Patents
表示装置 Download PDFInfo
- Publication number
- JP5314478B2 JP5314478B2 JP2009087680A JP2009087680A JP5314478B2 JP 5314478 B2 JP5314478 B2 JP 5314478B2 JP 2009087680 A JP2009087680 A JP 2009087680A JP 2009087680 A JP2009087680 A JP 2009087680A JP 5314478 B2 JP5314478 B2 JP 5314478B2
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- JP
- Japan
- Prior art keywords
- decoder
- circuit
- bits
- output
- tournament
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000011159 matrix material Substances 0.000 claims description 48
- 230000007423 decrease Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 21
- 239000004973 liquid crystal related substance Substances 0.000 description 20
- 239000000758 substrate Substances 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal (AREA)
Description
Claims (3)
- 表示素子と該表示素子を駆動する駆動回路とを有する表示装置であって、
前記駆動回路は、8ビットのデジタル値に基づいて、前記8ビットのデジタル値に対応する電圧を出力するデコーダ回路を有し、前記デコーダ回路は、
前記デジタル値のうちの複数のビットを用いて、一の電圧を出力するプレデコーダ回路を3つ有することにより、3つの出力信号線に電圧を出力するプレデコーダ回路群と、
前記3つの出力信号線に印加された3つの電圧を入力とし、前記デジタル値のうちの複数のビットを用いて、前記3つの電圧のうちの2つの電圧を選択し、2つの出力信号線に印加する選択回路部と、
前記選択回路部により選択された前記2つの電圧を入力とし、前記2つの電圧の平均の電圧を出力する中間電圧出力回路と、を備え、
前記3つのプレデコーダ回路のうち、少なくとも1つのプレデコーダ回路は、
6ビットをデコードするデコーダ回路であり、
デコードにより選択される候補の信号線に、それぞれ一つのトランジスタスイッチを有するマトリクス型のデコーダ回路であり、3ビット分のデコードを行う第1マトリクス型デコーダ回路と、
デコードにより選択される候補の信号線の数が、各ビットのデコードを行うトランジスタスイッチを経由する毎に減少するトーナメント型のデコーダ回路であり、3ビット分のデコードを行う第1トーナメント型デコーダ回路と、を有し、
前記プレデコーダ回路群の3つのプレデコーダ回路のうち、少なくとも1つのプレデコーダ回路は、
5ビットをデコードするデコーダ回路であり、
2ビット分のデコードを行う第2マトリクス型デコーダ回路と、
3ビット分のデコードを行う第2トーナメント型デコーダ回路と、を有する表示装置。 - 前記選択回路部が用いる前記複数のビットは、3ビットである、ことを特徴とする請求項1に記載の表示装置。
- 前記デコーダ回路は、前記トーナメント型のデコーダ回路である第3トーナメント型デコーダ回路、を更に備え、
前記8ビットのデジタル値の所定の複数の上位ビットすべてが0である場合、及び前記8ビットのデジタル値の所定の複数の上位ビットすべてが1である場合には、前記第3トーナメント型デコーダ回路による出力を出力とする、ことを特徴とする請求項1又は2に記載の表示装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009087680A JP5314478B2 (ja) | 2009-03-31 | 2009-03-31 | 表示装置 |
US12/700,787 US8610699B2 (en) | 2009-03-31 | 2010-02-05 | Display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009087680A JP5314478B2 (ja) | 2009-03-31 | 2009-03-31 | 表示装置 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2010237591A JP2010237591A (ja) | 2010-10-21 |
JP2010237591A5 JP2010237591A5 (ja) | 2012-04-12 |
JP5314478B2 true JP5314478B2 (ja) | 2013-10-16 |
Family
ID=42783561
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009087680A Active JP5314478B2 (ja) | 2009-03-31 | 2009-03-31 | 表示装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US8610699B2 (ja) |
JP (1) | JP5314478B2 (ja) |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4281319A (en) * | 1980-06-30 | 1981-07-28 | Ricoh Company, Ltd. | Digital-to-analog converter |
US6377502B1 (en) * | 1999-05-10 | 2002-04-23 | Kabushiki Kaisha Toshiba | Semiconductor device that enables simultaneous read and write/erase operation |
JP3718607B2 (ja) * | 1999-07-21 | 2005-11-24 | 株式会社日立製作所 | 液晶表示装置及び映像信号線駆動装置 |
JP4143588B2 (ja) * | 2003-10-27 | 2008-09-03 | 日本電気株式会社 | 出力回路及びデジタルアナログ回路並びに表示装置 |
JP2008111917A (ja) * | 2006-10-30 | 2008-05-15 | Seiko Epson Corp | 電圧選択回路、駆動回路、電気光学装置及び電子機器 |
JP2009036936A (ja) * | 2007-08-01 | 2009-02-19 | Hitachi Displays Ltd | 画像表示装置 |
JP4540734B2 (ja) * | 2008-02-07 | 2010-09-08 | ルネサスエレクトロニクス株式会社 | デジタルアナログ変換回路とデータドライバ及び表示装置 |
-
2009
- 2009-03-31 JP JP2009087680A patent/JP5314478B2/ja active Active
-
2010
- 2010-02-05 US US12/700,787 patent/US8610699B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20100245320A1 (en) | 2010-09-30 |
JP2010237591A (ja) | 2010-10-21 |
US8610699B2 (en) | 2013-12-17 |
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