JP5109446B2 - パターン形成方法および電子素子の製造方法 - Google Patents
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/207—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a prefabricated paste pattern, ink pattern or powder pattern
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/464—Lateral top-gate IGFETs comprising only a single gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/60—Forming conductive regions or layers, e.g. electrodes
- H10K71/611—Forming conductive regions or layers, e.g. electrodes using printing deposition, e.g. ink jet printing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/0108—Male die used for patterning, punching or transferring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/046—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/80—Constructional details
- H10K10/82—Electrodes
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Printing Methods (AREA)
Description
上記実施形態と同様に、スピンコーターにて、ガラス基板11上に、下記表1に示す樹脂材料を主成分とする溶液を塗布することで、第1版10(ブランケット)を作製した。一方、ガラス基板上に、下記表1に示す樹脂材料を主成分とする溶液を塗布し、樹脂膜を形成した後、通常のリソグラフィー技術を用いたエッチングにより、表面側にラインアンドスペース(L/S)が5μmとなるように凹凸パターンを形成することで、第2版20を作製した。
一方、上記実施例1、2に対する比較例1〜3として、表1に示すように、第1版10、第2版20および液組成物の溶媒を設定した以外は、実施例1、2と同様に、L/S=5μmの配線パターンを形成した。なお、比較例1、2の第1版10の表面張力(α)と液組成物の動的表面張力(β)はα<βであり、比較例3の第1版10の表面張力(α)と第2版の表面張力はγ<αであることで、いずれもγ>α≧βを満たしていない。特に、比較例3では、液組成物の静的表面張力(β’)が、α≧β’を満たすように設定した。
Claims (5)
- 第1版上に液組成物を塗布することで、液組成物塗膜を形成する第1工程と、
表面側に凹凸パターンを有する第2版を、前記第1版の前記液組成物塗膜の形成面側に押圧し、当該第2版の凸部の頂面に、前記液組成物塗膜の不要なパターンを転写して除去することで、前記第1版上にパターンを形成する第2工程と、
前記第1版の前記パターンの形成面側を、被転写基板の表面に押圧することで、当該被転写基板の表面に前記パターンを転写する第3工程、
とを有し、
前記第1版における前記液組成物が塗布される表面の表面張力をα、最大泡圧法による100msec時の前記液組成物の動的表面張力をβ、前記第2版における凸部の頂面の表面張力をγとした場合、γ>α≧βとなるように、前記液組成物の組成または前記第1版もしくは前記第2版の表面の材質を設定するパターン形成方法。 - 前記液組成物の粘度が、50mPa・s以下である請求項1に記載のパターン形成方法。
- 前記液組成物は導電性材料を含有しており、
前記第1工程では、前記第1版上に前記液組成物を塗布することで、導電性膜を形成する請求項1に記載のパターン形成方法。 - 第1版上に液組成物を塗布することで、液組成物塗膜を形成する第1工程と、
表面側に凹凸パターンを有する第2版を、前記第1版の前記液組成物塗膜の形成面側に押圧し、当該第2版の凸部の頂面に、前記液組成物塗膜の不要なパターンを転写して除去することで、前記第1版上にパターンを形成する第2工程と、
前記第1版の前記パターンの形成面側を、被転写基板の表面に押圧することで、当該被転写基板の表面に前記パターンを転写する第3工程、
とを有し、
前記第1版における前記液組成物が塗布される表面の表面張力をα、最大泡圧法による100msec時の前記液組成物の動的表面張力をβ、前記第2版における凸部の頂面の表面張力をγとした場合、γ>α≧βとなるように、前記液組成物の組成または前記第1版もしくは前記第2版の表面の材質を設定する電子素子の製造方法。 - 前記電子素子は、基板上に、ソース・ドレイン電極、ゲート絶縁膜およびゲート電極がこの順またはこれと逆の順に積層され、ソース・ドレイン電極の上層側または下層側に半導体層を備えた半導体装置であり、
前記第1工程では、前記第1版上に導電性材料を含有する前記液組成物を塗布することで、導電性膜を形成し、
前記第2工程では、前記第2版を前記第1版の前記導電性膜の形成面側に押圧し、当該第2版の凸部の頂面に、前記導電性膜の不要なパターンを転写して除去することで、前記第1版上に導電性パターンを形成し、
前記第3工程では、前記第1版の前記導電性パターンの形成面側を、被転写基板の表面に押圧し、当該被転写基板の表面に前記導電性パターンを転写することで、前記ソース・ドレイン電極または前記ゲート電極を形成する請求項4に記載の電子素子の製造方法。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007092178A JP5109446B2 (ja) | 2007-03-30 | 2007-03-30 | パターン形成方法および電子素子の製造方法 |
CN2008800107266A CN101647095B (zh) | 2007-03-30 | 2008-01-10 | 形成图案的方法和制作电子元件的方法 |
US12/593,846 US8361372B2 (en) | 2007-03-30 | 2008-01-10 | Method of forming pattern and method of producing electronic element |
PCT/JP2008/050215 WO2008126425A1 (ja) | 2007-03-30 | 2008-01-10 | パターン形成方法および電子素子の製造方法 |
KR1020097020336A KR20100014666A (ko) | 2007-03-30 | 2008-01-10 | 패턴 형성 방법 및 전자 소자의 제조 방법 |
TW097101402A TWI381567B (zh) | 2007-03-30 | 2008-01-14 | Pattern forming method and manufacturing method of electronic component |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007092178A JP5109446B2 (ja) | 2007-03-30 | 2007-03-30 | パターン形成方法および電子素子の製造方法 |
Publications (3)
Publication Number | Publication Date |
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JP2008251887A JP2008251887A (ja) | 2008-10-16 |
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JP (1) | JP5109446B2 (ja) |
KR (1) | KR20100014666A (ja) |
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JP4432993B2 (ja) * | 2007-04-16 | 2010-03-17 | ソニー株式会社 | パターン形成方法および半導体装置の製造方法 |
KR101959576B1 (ko) * | 2010-11-19 | 2019-03-18 | 디에스엠 아이피 어셋츠 비.브이. | 금속박 패턴 적층체, 금속박의 펀칭 방법, 회로 기판, 그 제조 방법 및 태양 전지 모듈 |
KR102067846B1 (ko) | 2011-06-06 | 2020-01-17 | 디에스엠 아이피 어셋츠 비.브이. | 금속박 패턴 적층체, 금속박 적층체, 금속박 적층 기판, 태양 전지 모듈 및 금속박 패턴 적층체의 제조 방법 |
JP7382236B2 (ja) | 2020-01-15 | 2023-11-16 | 日本特殊陶業株式会社 | シート体の製造方法 |
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US5514503A (en) * | 1994-10-17 | 1996-05-07 | Corning Incorporated | Apparatus and method for printing a color filter |
JP3689536B2 (ja) | 1997-08-12 | 2005-08-31 | 光村印刷株式会社 | 画像形成法 |
JP4281457B2 (ja) * | 2003-08-06 | 2009-06-17 | 日立化成工業株式会社 | 異方導電性膜の製造方法、それにより得られる異方導電性膜及びそれを用いた回路接続方法 |
JP4828791B2 (ja) | 2003-10-24 | 2011-11-30 | 光村印刷株式会社 | 精密パターニング用インキ組成物 |
JP2005246790A (ja) * | 2004-03-04 | 2005-09-15 | Hitachi Chem Co Ltd | レジストパターン形成法、電子部品の製造法、および電子部品 |
JP2005353770A (ja) * | 2004-06-09 | 2005-12-22 | Hitachi Chem Co Ltd | 印刷配線板の製造方法 |
JP2006045294A (ja) * | 2004-08-02 | 2006-02-16 | Hitachi Chem Co Ltd | 印刷インキ組成物、塗膜及びその形成方法、並びに、電子部品及びその製造方法 |
JP2006124546A (ja) * | 2004-10-29 | 2006-05-18 | Hitachi Chem Co Ltd | 印刷インキ組成物、レジストパターンの形成法、電子部品の製造法及び電子部品 |
JP2006156426A (ja) * | 2004-11-25 | 2006-06-15 | Seiko Epson Corp | 導電性パターンの形成方法 |
JP4772465B2 (ja) * | 2004-11-26 | 2011-09-14 | パナソニック株式会社 | 薄膜の間欠塗工方法 |
JP4984446B2 (ja) * | 2005-07-11 | 2012-07-25 | 大日本印刷株式会社 | 発光層、正孔注入層の形成方法およびそれらを用いた有機発光デバイスの製造方法 |
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TWI381567B (zh) | 2013-01-01 |
US20100044905A1 (en) | 2010-02-25 |
TW200845446A (en) | 2008-11-16 |
KR20100014666A (ko) | 2010-02-10 |
CN101647095B (zh) | 2011-04-20 |
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