JP5076730B2

JP5076730B2 - Phase detector

Info

Publication number: JP5076730B2
Application number: JP2007214090A
Authority: JP
Inventors: 剛幸松本
Original assignee: Sanken Electric Co Ltd
Current assignee: Sanken Electric Co Ltd
Priority date: 2007-07-25
Filing date: 2007-08-20
Publication date: 2012-11-21
Anticipated expiration: 2027-08-20
Also published as: JP2009050091A

Description

本発明は、太陽光発電装置や燃料電池発電装置などの直流電力を単相交流電力に変換し、単相交流電力系統に連系させて負荷に電力を供給する単相系統連系インバータ装置の系統電圧位相の検出に好適な位相検出装置に関する。 The present invention relates to a single-phase grid-connected inverter device that converts DC power, such as a solar power generation device or a fuel cell power generation device, into single-phase AC power and links the single-phase AC power system to supply power to a load. The present invention relates to a phase detection device suitable for detecting a system voltage phase.

インバータ装置を含む典型的な単相電力系統は、図１に示すように複数のインバータ装置即ち第１及び第２のインバータ装置２，２´を含む。第１のインバータ装置２の第１及び第２の直流入力端子１ａ、１ｂは、太陽電池、燃料電池、蓄電池等から成る第１の直流電源１に接続されている。第１のインバータ装置２の第１及び第２交流出力端子２ａ、２ｂは抵抗（Ｒ），インダクタンス（Ｌ），キャパシタンス（Ｃ）を有する負荷４に接続され、且つ回路遮断器５を介して単相交流電力系統３に接続されている。従って、第１の直流電源１と第１のインバータ装置２とから成る第１の分散化電源と単相交流電力系統３とが連系して負荷４に電力を供給する。なお、図１では、第１の直流電源１及び第１のインバータ装置２とから成る第１の分散化電源の他に、第１の直流電源１及び第１のインバータ装置２と同様に構成された第２の直流電源１´及び第２のインバータ装置２´とから成る第２の分散化電源が設けられており、第２のインバータ装置２´も負荷４に接続されている。即ち、第１及び第２のインバータ装置２、２´は並列接続されている。第２の分散化電源の構成及び機能は第１の分散化電源と実質的に同じであるので、その説明を省略する。また、以下の説明では第１の直流電源１及び第１のインバータ装置２を単に直流電源１、インバータ装置２と呼ぶことにする。 A typical single-phase power system including an inverter device includes a plurality of inverter devices, that is, first and second inverter devices 2 and 2 'as shown in FIG. The first and second DC input terminals 1a and 1b of the first inverter device 2 are connected to a first DC power source 1 including a solar cell, a fuel cell, a storage battery and the like. The first and second AC output terminals 2 a and 2 b of the first inverter device 2 are connected to a load 4 having a resistance (R), an inductance (L), and a capacitance (C), and are simply connected via a circuit breaker 5. It is connected to the phase AC power system 3. Therefore, the first distributed power source composed of the first DC power source 1 and the first inverter device 2 and the single-phase AC power system 3 are connected to supply power to the load 4. In FIG. 1, in addition to the first distributed power source including the first DC power source 1 and the first inverter device 2, the configuration is the same as the first DC power source 1 and the first inverter device 2. In addition, a second distributed power source including a second DC power source 1 ′ and a second inverter device 2 ′ is provided, and the second inverter device 2 ′ is also connected to the load 4. That is, the first and second inverter devices 2 and 2 ′ are connected in parallel. Since the configuration and function of the second distributed power supply are substantially the same as those of the first distributed power supply, description thereof is omitted. In the following description, the first DC power source 1 and the first inverter device 2 are simply referred to as the DC power source 1 and the inverter device 2.

インバータ装置２は、直流―交流変換回路即ちインバータ回路６、リアクトルＬｏ及びコンデンサＣｏから成るフィルタ回路、制御回路７、電圧検出ライン８、電流検出器ＣＴ、及び単独運転阻止用の回路遮断器９を有する。 The inverter device 2 includes a DC-AC converter circuit, that is, an inverter circuit 6, a filter circuit including a reactor Lo and a capacitor Co, a control circuit 7, a voltage detection line 8, a current detector CT, and a circuit breaker 9 for preventing an independent operation. Have.

負荷４の保守点検時には、原則として回路遮断器５，９をオフにする。もし、一方の回路遮断器５がオフであっても他方の回路遮断器９がオンに保たれていれば、単独運転になり、既に説明したように負荷４の保守点検者に危険を及ぼす。このため、回路遮断器９の手動によるオフ操作が忘れられたとしても、単独運転検出手段（図示せず）で単独運転を検出し、インバータ装置２から負荷４への電力供給が停止することが必要になる。一般に単独運転検出手段は制御回路７の中に設けられ、電圧検出ライン８の検出電圧の位相に基づいて単独運転を検出する。また、インバータ装置２においては、一般的に電力系統の力率が１になるようにインバータスイッチが制御され、この力率制御のためにも系統電圧位相が必要になる。従って、系統電圧位相の正確且つ容易な検出が要求されている。このため、制御回路７は位相検出装置７ａを内蔵している。 When the load 4 is inspected, the circuit breakers 5 and 9 are turned off in principle. If one circuit breaker 5 is off and the other circuit breaker 9 is kept on, the circuit breaker 9 is in an isolated operation, which poses a risk to the maintenance inspector of the load 4 as already described. For this reason, even if the manual OFF operation of the circuit breaker 9 is forgotten, the isolated operation is detected by the isolated operation detecting means (not shown), and the power supply from the inverter device 2 to the load 4 is stopped. I need it. Generally, the isolated operation detecting means is provided in the control circuit 7 and detects the isolated operation based on the phase of the detection voltage of the voltage detection line 8. Further, in the inverter device 2, the inverter switch is generally controlled so that the power factor of the power system becomes 1, and the system voltage phase is also required for this power factor control. Therefore, accurate and easy detection of the system voltage phase is required. For this reason, the control circuit 7 has a built-in phase detector 7a.

図２に従来の単相電力系統の位相検出装置が示されている。この位相検出装置は、電力系統における交流電圧ｖ_α＝Ｖ_pｃｏｓθｓを検出する電圧検出手段１０と、電圧検出手段１０から得られた交流電圧ｖ_αの９０度遅れ信号ｖ_β´を作成する９０度遅れ回路１３ａと、電圧検出手段１０から得られた交流電圧ｖ_αと９０度遅れ回路１３ａから得られた９０度遅れ信号ｖ_β´とを位相検出信号出力ライン１９の検出位相θ_dを用いて回転座標変換して、交流電圧ｖ_αの位相と検出位相θ_dとの位相差ｖ_qを出力する位相差検出手段１４ａと、位相差検出手段１４ａから得られた位相差ｖ_qを示す信号を増幅して補償角周波数ω_cを得る補償角周波数作成手段１５と、基準角周波数ω_bを発生する基準角周波数発生手段１６と、補償角周波数ω_cと基準角周波数ω_bとに基づいて検出角周波数ω_dを作成する検出角周波数作成手段１７と、検出角周波数ω_dを積分して検出位相θ_dを出力する積分手段１８と、積分手段１８に接続された位相検出信号出力ライン１９とから成る。 FIG. 2 shows a conventional phase detector for a single-phase power system. This phase detection device creates a voltage detection means 10 for detecting an AC voltage v _α = V _p cos θs in the power system and a 90-degree delayed signal v _β ′ of the AC voltage v _α obtained from the voltage detection means 10 90. Using the detection phase θ _d of the phase detection signal output line 19, the degree delay circuit 13 a, the AC voltage v _α obtained from the voltage detection means 10, and the 90 degree delay signal v _β ′ obtained from the 90 degree delay circuit 13 a are used. rotating coordinate transformation Te, a signal indicating a phase difference detector 14a for outputting a phase difference v _q between the phase and the detected phase theta _d of the AC voltage v _alpha, a phase difference v _q obtained from the phase difference detecting means 14a Based on the compensation angular frequency generating means 15 for obtaining the compensation angular frequency ω _c , the reference angular frequency generating means 16 for generating the reference angular frequency ω _b , the compensation angular frequency ω _c and the reference angular frequency ω _b. detection to create a detection angular frequency ω _d Frequency creating unit 17, the integrating means 18 for outputting a detected phase theta _d by integrating the detected angular frequency omega _d, consisting connected phase detected signal output line 19. to the integrator means 18.

位相差検出手段１４ａは、周知のα−β／ｄ−ｑ座標変換手段からなり、静止座標の入力信号としての交流電圧ｖ_αとこの９０度遅れ信号ｖ_β´とを検出位相θ_dを用いて回転座標変換して、ｄ軸成分電圧ｖ_dとｑ軸成分電圧ｖ_qとの内の一方のｑ軸成分電圧ｖ_qを位相差を示す信号として出力するものである。補償角周波数作成手段１５は、ＰＩ（比例積分）手段から成り、位相差ｖ_qを示す信号を増幅して補償角周波数ω_c（ｒａｄ／ｓｅｃ）を得るものである。基準周波数発生手段１６は基準角周波数ω_b（ｒａｄ／ｓｅｃ）を発生する。検出角周波数作成手段１７は、例えば加算器からなり、補償角周波数ω_cと基準角周波数ω_bとを加算して検出角周波数ω_d（ｒａｄ／ｓｅｃ）を作成する。１／ｓで示されている積分手段１８は検出角周波数ω_dを積分して検出位相θ_dを位相検出信号出力ライン１９に出力する。 The phase difference detection means 14a is composed of a well-known α-β / dq coordinate conversion means, and uses an AC voltage v _α as an input signal of stationary coordinates and the 90-degree delayed signal v _β ′ as a detection phase θ _d . rotating coordinate transformation Te, and outputs one of the q-axis component voltage v _q of the d-axis component voltage v _d and the q-axis component voltage v _q as a signal indicating the phase difference. Compensation angular frequency creation means 15 comprises PI (proportional integration) means, and amplifies a signal indicating phase difference v _q to obtain compensation angular frequency ω _c (rad / sec). The reference frequency generating means 16 generates a reference angular frequency ω _b (rad / sec). The detection angular frequency creation means 17 is composed of, for example, an adder, and creates the detection angular frequency ω _d (rad / sec) by adding the compensation angular frequency ω _c and the reference angular frequency ω _b . The integration means 18 indicated by 1 / s integrates the detection angular frequency ω _d and outputs the detection phase θ _d to the phase detection signal output line 19.

９０度遅れ回路１３ａは、例えば次の（１）（２）（３）のいずれか１つで形成される。
（１）半導体メモリを使用し、半導体メモリに電圧検出手段１０の出力（交流電圧Ｖ_α）を読み込み、９０度遅で読み出し、９０度遅れ信号Ｖ_β´を得る回路。
（２）微分器を使用し、微分器で電圧検出手段１０の出力（交流電圧ｖ_α）を微分して９０度遅れ信号ｖ_β´を得る回路。
（３）フィルタを使用し、フィルタに電圧検出手段１０の出力（交流電圧Ｖ_α）を通すことによって９０度遅れ信号ｖ_β´を得る回路。 The 90-degree delay circuit 13a is formed by any one of the following (1), (2), and (3), for example.
(1) A circuit that uses a semiconductor memory, reads the output (AC voltage V _α ) of the voltage detection means 10 into the semiconductor memory, reads it with a 90 ° delay, and obtains a 90 ° delayed signal V _β ′.
(2) A circuit that uses a differentiator and differentiates the output (AC voltage v _α ) of the voltage detecting means 10 with the differentiator to obtain a 90-degree delayed signal v _β ′.
(3) A circuit that uses a filter and obtains a 90-degree delayed signal v _β ′ by passing the output of the voltage detection means 10 (AC voltage V _α ) through the filter.

ところで、９０度遅れ回路１３ａを上記（１）に示すように半導体メモリを用いて構成した場合には、精度良い位相検出を行うために半導体メモリの容量を大きくすること、ハイスペックなＣＰＵ及びメモリを用意することが必要になる。また、交流電圧に周波数変動が発生した場合に９０度遅れ成分を作成することが困難となる。
９０度遅れ回路１３ａを上記（２）に示すように微分器を用いて構成した場合には、ノイズ誤動作する可能性が大きい。また、周波数変動が発生した場合、検出電圧と位相遅れ成分に振幅差が発生する。
９０度遅れ回路１３ａを上記（３）に示すようにフィルタを用いて構成した場合には、周波数変動が発生した時に９０度遅れ成分は９０度位相差ではなくなり、振幅誤差も発生する。 By the way, when the 90-degree delay circuit 13a is configured using a semiconductor memory as shown in (1) above, the capacity of the semiconductor memory is increased in order to perform accurate phase detection, and a high-spec CPU and memory. It is necessary to prepare. In addition, it is difficult to create a 90-degree delayed component when a frequency variation occurs in the AC voltage.
When the 90-degree delay circuit 13a is configured using a differentiator as shown in (2) above, there is a high possibility of noise malfunction. Further, when frequency fluctuation occurs, an amplitude difference is generated between the detected voltage and the phase delay component.
When the 90-degree delay circuit 13a is configured using a filter as shown in (3) above, the 90-degree delay component is not a 90-degree phase difference and an amplitude error occurs when a frequency variation occurs.

従来の別な位相検出装置が特開平１０−２９５０７３号公報（特許文献１）に開示されている。この特許文献１の位相検出装置では、位相検出のための入力交流電圧に振幅変動が発生した場合に振幅誤差を補償して位相を検出する。しかし、この特許文献１の位相検出装置では、振幅誤差を検出電圧（交流電圧）の絶対値から求めているので、振幅誤差が振動成分となり、且つ補償ゲインを高くする必要がある。従って、位相検出における制御性が悪く、ノイズに対しても弱い系になる可能性がある。
特開平１０−２９５０７３号公報 Another conventional phase detector is disclosed in Japanese Patent Laid-Open No. 10-295073 (Patent Document 1). In the phase detection device of Patent Document 1, when an amplitude fluctuation occurs in the input AC voltage for phase detection, the phase is detected by compensating for the amplitude error. However, in the phase detection device disclosed in Patent Document 1, the amplitude error is obtained from the absolute value of the detection voltage (alternating voltage), so that the amplitude error becomes a vibration component and the compensation gain needs to be increased. Therefore, controllability in phase detection is poor, and there is a possibility that the system is weak against noise.
Japanese Patent Laid-Open No. 10-295073

従って、本発明が解決しようとする課題は、交流電圧の振幅、位相、周波数が変動した場合においても速やかに位相を検出できる制御性のよい方式が要求されていることであり、本発明の目的は上記要求に応えることができる位相検出装置を提供することにある。 Therefore, the problem to be solved by the present invention is that there is a demand for a controllable system capable of quickly detecting the phase even when the amplitude, phase and frequency of the AC voltage fluctuate. Is to provide a phase detector capable of meeting the above requirements.

次に上記課題を解決し、上記目的を達成するための本発明を、実施例を示す図面の符号を参照して説明する。ただし、特許請求の範囲及びここでの参照符号は本発明の理解を助けるためのものであり、本発明を限定するものではない。
本発明の電力系統における交流電圧の位相を検出する位相検出装置は、電力系統における交流電圧（ｖ_α＝Ｖ_pｃｏｓθｓ）を検出する電圧検出手段（１０）とＰＬＬ位相検出部（１１）と電圧振幅補償部（１２）と仮想β軸電圧作成部（１３）と位相検出信号出力ライン（１９）とを有し、
前記ＰＬＬ位相検出部（１１）は、前記電圧検出手段（１０）から得られた前記交流電圧（ｖ _α ）と後記乗算手段（２７）から得られた前記交流電圧（ｖ _α ）よりも９０度遅れの仮想β軸電圧（ｖ _β ）とを前記位相検出信号出力ライン（１９）の検出位相（θ _d ）を用いて回転座標変換して、前記交流電圧（ｖ _α ）の位相と前記検出位相（θ _d ）との位相差（ｖ _q ）を出力し且つ前記交流電圧（ｖ _α ）と前記仮想β軸電圧（ｖ _β ）との振幅誤差（ｖ _d ）を出力する位相差及び振幅誤差検出手段（１４）と、前記位相差及び振幅誤差検出手段（１４）から得られた前記位相差（ｖ _q ）を示す信号を増幅して補償角周波数（ω _c ）を得る補償角周波数作成手段（１５）と、基準角周波数（ω _b ）を発生する基準角周波数発生手段（１６）と、前記補償角周波数（ω _c ）と前記基準角周波数（ω _b ）とに基づいて検出角周波数（ω _d ）を作成する検出角周波数作成手段（１７）と、前記検出角周波数（ω _d ）を積分して検出位相（θ _d ）を前記位相検出信号出力ライン（１９）に出力する積分手段（１８）とから成り、
前記電圧振幅補償部（１２）は、前記位相差及び振幅誤差検出手段（１４）から得られた前記位相差（ｖ _q ）を示す信号に含まれる交流成分（ｖ _qβ ）及び振幅誤差（ｖ _d ）を示す信号に含まれる交流成分（ｖ _dα ）を抽出する交流成分抽出手段（２０）と、前記位相検出信号出力ライン（１９）の前記検出位相（θ _d ）に対して逆位相の２倍を示す逆位相２倍信号を作成する逆位相２倍信号作成手段（２１）と、前記交流成分抽出手段（２０）から得られた２つの交流成分（ｖ _qβ 、ｖ _dα ）を前記逆位相２倍信号作成手段（２１）から得られた前記逆位相２倍信号を用いて逆回転座標変換して直流振幅誤差（ｖ _d2 ）を検出する直流振幅誤差検出手段（２２）と、前記直流振幅誤差検出手段（２２）から得られた前記直流振幅誤差（ｖ _d2 ）を増幅して補償電圧（Ｖ _c ）を得る補償電圧作成手段（２３）と、基準電圧（Ｋ _v ）を発生する基準電圧発生手段（２４）と、前記補償電圧（Ｖ _c ）と前記基準電圧（Ｋ _v ）とに基づいて検出振幅（Ｖ _q ）を作成する検出振幅作成手段（２５）とから成り、
前記仮想β軸電圧作成部（１３）は、前記位相検出信号出力ライン（１９）の前記検出位相（θ_d）を位相角とする正弦波信号（ｓｉｎθ_d）を作成する正弦波信号作成手段（２６）と、前記検出振幅作成手段（２５）から得られた前記検出振幅（Ｖ_q）と前記正弦波信号作成手段（２６）から得られた前記正弦波信号（ｓｉｎθ_d）とを乗算して前記電圧検出手段（１０）から得られた前記交流電圧（Ｖ_α）よりも９０度遅れの仮想β軸電圧（ｖ_β）を出力する乗算手段（２７）とから成る。 Next, the present invention for solving the above-described problems and achieving the above-described object will be described with reference to the reference numerals of the drawings showing embodiments. It should be noted, however, that the claims and the reference signs used herein are intended to assist the understanding of the present invention and are not intended to limit the present invention.
The phase detection device for detecting the phase of the AC voltage in the power system of the present invention includes a voltage detection means (10), a PLL phase detection unit (11), and a voltage that detect an AC voltage (v _α = V _p cos θs) in the power system. An amplitude compensator (12), a virtual β-axis voltage generator (13), and a phase detection signal output line (19);
The PLL phase detector (11) is 90 degrees from the AC voltage (v _α ) obtained from the voltage detector (10) and the AC voltage (v _α ) obtained from the multiplier (27) described later. The delayed virtual β-axis voltage (v _β ) is subjected to rotational coordinate conversion using the detection phase (θ _d ) of the phase detection signal output line (19), and the phase of the AC voltage (v _α ) and the detection phase Phase difference and amplitude error detection that outputs a phase difference (v _q ) from (θ _d ) and an amplitude error (v _d ) between the AC voltage (v _α ) and the virtual β-axis voltage (v _β ) Compensation angular frequency generating means ( amplifying a signal indicating the phase difference (v _q ) obtained from the means (14) and the phase difference and amplitude error detection means (14) to obtain a compensation angular frequency (ω _c ) 15), the reference angular frequency generating means for generating a reference angular frequency (omega _b) and (16), wherein Integration 償角frequency (omega _c) and said reference angular frequency (omega _b) and the detected angular frequency generating means for generating a detection angular frequency (omega _d) on the basis of (17), the detected angular frequency (omega _d) And integrating means (18) for outputting the detection phase (θ _d ) to the phase detection signal output line (19) ,
The voltage amplitude compensator (12) includes an AC component (v _qβ ) and an amplitude error (v _d ) included in the signal indicating the phase difference (v _q ) obtained from the phase difference and amplitude error detector (14). AC component extraction means (20) for extracting an AC component (v _dα ) included in the signal indicating ), and twice the phase opposite to the detected phase (θ _d ) of the phase detection signal output line (19) and antiphase twice signal creating means for creating an anti-phase double signal indicating (21), two AC components above obtained from the AC component extracting means (20) (v _{Q [beta],} v _{d [alpha])} the reverse phase 2 DC amplitude error detecting means (22) for detecting a DC amplitude error (v _d2 ) by performing reverse rotation coordinate conversion using the antiphase double signal obtained from the double signal generating means (21 ), and the DC amplitude error obtained from the detecting means (22) said DC amplitude error and (v _d2) Width compensation voltage compensating voltage generating means for obtaining (V _c) (23), the reference voltage (K _v) reference voltage generating means for generating (24), said compensation voltage (V _c) and said reference voltage ( K _v ) and detection amplitude generation means (25) for generating detection amplitude (V _q ) based on
The virtual β-axis voltage generator (13) is a sine wave signal generator (sin θ _d ) that generates a sine wave signal (sin θ _d ) having the detected phase (θ _d ) of the phase detection signal output line (19) as a phase angle. 26), the detected amplitude (V _q ) obtained from the detected amplitude creating means (25) and the sine wave signal (sin θ _d ) obtained from the sine wave signal creating means (26) And multiplication means (27) for outputting a virtual β-axis voltage (v _β ) delayed by 90 degrees from the AC voltage (V _α ) obtained from the voltage detection means (10).

本発明によれば、位相差及び振幅誤差検出手段（１４）における回転座標変換によって、交流電圧（ｖ_α）の位相と検出位相（θ_d）との位相差（ｖ_q）及び交流電圧（ｖ_α）と仮想β軸電圧（ｖ_β）との振幅誤差（ｖ_d）を求め、これに基づいて検出位相（θ_d）、検出振幅（Ｖ_q）及び交流電圧（Ｖ_α）よりも９０度遅れの仮想β軸電圧（ｖ_β）を求めるので、交流電圧の振幅、位相、周波数が変動した場合においても速やかに位相を検出でき且つ制御性がよい位相検出装置を提供することができる。 According to the present invention, the phase difference (v _q ) between the phase of the AC voltage (v _α ) and the detected phase (θ _d ) and the AC voltage (v The amplitude error (v _d ) between _α ) and the virtual β-axis voltage (v _β ) is obtained, and based on this, the detected phase (θ _d ), detected amplitude (V _q ), and AC voltage (V _α ) are 90 degrees. Since the delayed virtual β-axis voltage (v _β ) is obtained, it is possible to provide a phase detector that can detect the phase quickly and has good controllability even when the amplitude, phase, and frequency of the AC voltage fluctuate.

次に、図３を参照して本発明の実施形態を説明する。なお、図３において図２と共通する部分に図２と同一の参照符号が付されている。 Next, an embodiment of the present invention will be described with reference to FIG. In FIG. 3, the same reference numerals as those in FIG.

図３に示す本発明の実施例１に従う位相検出装置は、図１の位相検出装置７ａとして使用することができるものであり、大別して電圧検出手段１０と、回転座標変換手段を使用して検出位相θ_dを作成するＰＬＬ位相検出部１１と、ＰＬＬ位相検出部１１の信号を使用して交流電圧のピ−ク値の推定値に相当する検出振幅Ｖ_qを作成する電圧振幅補償部１２と、交流電圧ｖ_α＝Ｖ_pｃｏｓθｓと９０度の位相差を有し且つ検出振幅Ｖ_qをピ−ク値とする仮想β軸電圧ｖ_β＝Ｖ_qｓｉｎθ_dを作成する仮想β軸電圧作成部１３とから成る。 The phase detection apparatus according to the first embodiment of the present invention shown in FIG. 3 can be used as the phase detection apparatus 7a of FIG. 1, and is roughly detected using the voltage detection means 10 and the rotational coordinate conversion means. A PLL phase detector 11 for generating the phase θ _d , a voltage amplitude compensator 12 for generating a detection amplitude V _q corresponding to the estimated value of the peak value of the AC voltage using the signal of the PLL phase detector 11, and And a virtual β-axis voltage generator that generates a virtual β-axis voltage v _β = V _q sin θ _d having a phase difference of 90 degrees from the AC voltage v _α = V _p cos θs and having the detected amplitude V _q as a peak value. 13 and.

電圧検出手段１０は図１の電圧検出ライン８に相当するものに接続され、電力系統における交流電圧ｖ_α＝Ｖ_pｃｏｓθｓを検出する。 The voltage detection means 10 is connected to the one corresponding to the voltage detection line 8 in FIG. 1, and detects the AC voltage v _α = V _p cos θs in the power system.

ＰＬＬ位相検出部１１は、位相差及び振幅誤差検出手段１４と、補償角周波数作成手段１５と、基準角周波数発生手段１６と、検出角周波数作成手段１７と、積分手段１８と、位相検出信号出力ライン１９とから成り、検出位相θ_dを出力する。次に、ＰＬＬ位相検出部１１の各部を詳しく説明する。 The PLL phase detector 11 includes a phase difference and amplitude error detector 14, a compensation angular frequency generator 15, a reference angular frequency generator 16, a detection angular frequency generator 17, an integrator 18, and a phase detection signal output. Line 19 and outputs the detection phase θ _d . Next, each part of the PLL phase detector 11 will be described in detail.

位相差及び振幅誤差検出手段１４はα−β／ｄ−ｑ回転座標変換手段（演算手段）から成り、電圧検出手段１０に接続され第１の入力端子と、仮想β軸電圧作成部１３の乗算手段２７に接続された第２の入力端子と、位相検出信号出力ライン１９に接続された位相信号入力端子と、第１及び第２の出力端子１４ａ、１４ｂとを有し、電圧検出手段１０から得られた交流電圧ｖ_αと乗算手段２７から得られた交流電圧ｖ_αよりも９０度遅れの仮想β軸電圧ｖ_βとを位相検出信号出力ライン１９の検出位相θ_dを用いて回転座標変換して、交流電圧ｖ_αと仮想β軸電圧ｖ_βとの振幅誤差ｖ_dを演算によって求めて第１の出力端子１４ａに出力し、交流電圧ｖ_αの位相と検出位相θ_dとの位相差ｖ_qを演算によって求めて第２の出力端子１４ｂに出力する。位相差及び振幅誤差検出手段１４の入出関係は次の式（１）に示す通りである。 The phase difference and amplitude error detection means 14 is composed of α-β / dq rotation coordinate conversion means (calculation means), which is connected to the voltage detection means 10 and multiplied by the first input terminal and the virtual β-axis voltage generator 13. A second input terminal connected to the means 27; a phase signal input terminal connected to the phase detection signal output line 19; and first and second output terminals 14a and 14b; The obtained alternating voltage v _α and the virtual β-axis voltage v _β delayed by 90 degrees from the alternating voltage v _α obtained from the multiplying means 27 are subjected to rotational coordinate conversion using the detected phase θ _d of the phase detection signal output line 19. Then, an amplitude error v _d between the AC voltage v _α and the virtual β-axis voltage v _β is obtained by calculation and output to the first output terminal 14a, and the phase difference between the phase of the AC voltage v _α and the detected phase θ _d _vq is calculated and output to the second output terminal 14b. The input / output relationship of the phase difference and amplitude error detecting means 14 is as shown in the following equation (1).

位相差及び振幅誤差検出手段１４の第２の出力端子１４ｂに接続された補償角周波数作成手段１５は比例積分手段（ＰＩ回路）から成り、位相差及び振幅誤差検出手段１４から得られた位相差ｖ _qを示す信号を増幅して補償角周波数ω_c（rad/sec）を出力する。 Compensation angular frequency generation means 15 connected to the second output terminal 14 b of the phase difference and amplitude error detection means 14 is composed of proportional integration means (PI circuit), and the phase difference obtained from the phase difference and amplitude error detection means 14. A signal indicating v _q is amplified to output a compensation angular frequency ω _c (rad / sec).

基準角周波数発生手段１６は電力系統の交流電圧の基準角周波数ω_b（rad/sec）を発生する。検出角周波数作成手段１７は加算手段から成り、補償角周波数作成手段１５と基準角周波数発生手段１６とに接続され、基準角周波数ω_bに補償角周波数ω_cを加算して検出角周波数ω_d（rad/sec）を作成する。なお、補償角周波数作成手段１５と基準角周波数発生手段１６とのいずれか１つの極性を変えて検出角周波数作成手段１７を減算手段で構成することもできる。 The reference angular frequency generation means 16 generates a reference angular frequency ω _b (rad / sec) of the AC voltage of the power system. The detection angular frequency creation means 17 comprises addition means, and is connected to the compensation angular frequency creation means 15 and the reference angular frequency generation means 16, and adds the compensation angular frequency ω _c to the reference angular frequency ω _b to detect the detection angular frequency ω _d. Create (rad / sec). Note that the detection angular frequency generation means 17 may be configured by a subtraction means by changing the polarity of any one of the compensation angular frequency generation means 15 and the reference angular frequency generation means 16.

検出角周波数作成手段１７に接続された積分手段１８は、検出角周波数ω_dを積分して検出位相θ_d（rad）を位相検出信号出力ライン１９に出力する。検出位相θ_d（rad）は単独運転検出、及びインバータ装置にける力率制御等に使用される。 The integration unit 18 connected to the detection angular frequency generation unit 17 integrates the detection angular frequency ω _d and outputs the detection phase θ _d (rad) to the phase detection signal output line 19. The detection phase θ _d (rad) is used for isolated operation detection, power factor control in the inverter device, and the like.

電圧振幅補償部１２は、交流成分抽出手段２０と、逆位相２倍信号作成手段２１と、直流振幅誤差検出手段２２と、補償電圧作成手段２３と、基準電圧発生手段２４と、検出振幅作成手段２５とから成り、検出振幅Ｖ_qを出力する。次に、電圧振幅補償部１２の各部を詳しく説明する。 Voltage amplitude compensation section 12, and an AC component extracting detecting means 20, an inverse phase twice signal generating means 21, a DC amplitude error detection means 22, and compensation voltage generating means 23, a reference voltage generating means 24, detects amplitude creation And a detection amplitude V _q is output. Next, each part of the voltage amplitude compensation part 12 is demonstrated in detail.

交流成分抽出手段２０はｖ _d 、ｖ _q に含まれる交流成分を抽出するフィルタ手段（ＨＰＦ）から成り、位相差及び振幅誤差検出手段１４の第１及び第２の出力端子１４ａ、１４ｂに接続された第１及び第２の入力端子２０ａ、２０ｂと、振幅誤差ｖ _dを示す信号に含まれる交流成分ｖ_dαを出力する第１の出力端子２０ｃと、位相差ｖ_qを示す信号に含まれる交流成分ｖ_qβを出力する第２の出力端子２０ｄとを有し、位相差及び振幅誤差検出手段１４から得られた振幅誤差ｖ_dを示す信号に含まれる交流成分ｖ_dα及び位相差ｖ_qを示す信号に含まれる交流成分ｖ_qβを抽出する。２つの交流成分ｖ_dα及びｖ_qβは、位相差及び振幅誤差検出手段１４に入力する交流電圧（検出電圧）ｖ_αと仮想β軸電圧ｖ_βとの振幅誤差ΔＶに関係して変化する。今、交流電圧（検出電圧）ｖ_αの位相θ_sと検出位相θ_dとが等しく、交流電圧（検出電圧）ｖ_αと仮想β軸電圧ｖ_βとの間に振幅誤差ΔＶがあると仮定し、それぞれを次の式（A）で表す。 AC component Extraction means 20 v _d, an AC component included in v _q consist filter means (HPF) that to extract the first and second output terminals 14a of the phase difference and amplitude error detection means 14, the 14b first and second input terminals 20a connected, and 20b, a first output terminal 20c for outputting an amplitude error v AC component contained in the signal indicating the _d v _{d alpha,} a signal indicating a phase difference v _q And a second output terminal 20d for outputting the included AC component v _{q β} , and the AC component v _{d α} and the level included in the signal indicating the amplitude error v _d obtained from the phase difference and amplitude error detector 14. retardation v to extract an AC component v _{q beta} included in the signal indicating the _q. The two AC components v _{d α} and v _{q β} change in relation to the amplitude error ΔV between the AC voltage (detection voltage) v _α and the virtual β-axis voltage v _β input to the phase difference and amplitude error detection means 14. . Now, an AC voltage (detection voltage) v and phase theta _s of _alpha detection phase theta _d are equal, assuming that there is amplitude error ΔV between the AC voltage and the (detected voltage) v _alpha and virtual beta -axis voltage v _beta , Each is represented by the following formula (A) .

θ_dを用いて回転座標変換すると、位相差及び振幅誤差検出手段１４の第１及び第２の出力端子１４ａ、１４ｂの振幅誤差ｖ_dと位相差ｖ_qとを次の式（２）で示すことができる。従って、交流成分抽出手段２０の出力を次の式（３）で示すことができる。これ等の式（２）（３）から明らかなように振幅誤差ΔＶがあると、位相差及び振幅誤差検出手段１４から得られる振幅誤差ｖ_d、及び交流成分抽出手段２０から得られる２つの交流成分ｖ_dα及びｖ_qβに、検出電圧即ち交流電圧ｖ_α に対して逆位相の２倍の周波数の振動成分が含まれる。従って、交流成分抽出手段２０は検出電圧即ち交流電圧ｖ_α に対して逆位相の２倍の周波数の振動成分を検出している。 When rotating coordinate conversion is performed using θ _d , the amplitude error v _d and the phase difference v _q of the first and second output terminals 14a and 14b of the phase difference and amplitude error detecting means 14 are expressed by the following equation (2). be able to. Therefore, it is possible to show the output of the alternating current component extracting detecting means 20 by the following equation (3). If this like have an expression (2) (3) the amplitude As is clear from the error ΔV of the phase difference and amplitude error detection means 14 obtained from the amplitude error v _d, and the AC component extracting detecting means 20 from the two resulting The alternating current components v _{d α} and v _{q β} include a vibration component having a frequency twice the opposite phase to the detection voltage, that is, the alternating voltage v _α . Thus, the AC component extracting detecting means 20 detects the double oscillation component of the frequency of the opposite phase to the detected voltage or the AC voltage v _alpha.

位相検出信号出力ライン１９に接続された２倍信号作成手段２１は、検出位相θ_d に対して逆位相の２倍を示す逆位相２倍信号（―２×θ_d）を作成する。 The double signal creating means 21 connected to the phase detection signal output line 19 creates a reverse phase double signal (−2 × θ _d ) indicating twice the reverse phase with respect to the detection phase θ _d .

直流振幅誤差検出手段２２は、α−β／ｄ−ｑ回転座標変換手段（演算手段）から成り、交流成分抽出手段２０の第１及び第２の出力端子２０ｃ、２０ｄに接続された第１及び第２の入力端子と、逆位相２倍信号作成手段２１に接続された位相信号入力端子と、ｄ軸成分を出力する端子とを有し、交流成分抽出手段２０から得られた２倍の振動成分から成る２つの交流成分ｖ_qβ、ｖ_dαを逆位相２倍信号作成手段２１から得られた逆位相２倍信号（―２×θ_d）を用いて逆回転座標変換して、制御性の良い直流量として直流振幅誤差ｖ_d2を検出する。この直流振幅誤差検出手段２２における逆回転座標変換は次の式（４）で行われる。直流振幅誤差検出手段２２からはｑ軸成分が取り出されず、ｄ軸成分のみが取り出されので、直流振幅誤差検出手段２２から得られる直流量の振幅誤差ｖ_d2は次の式（５）で示される。 DC amplitude error detection means 22 is made α-β / d-q rotational coordinate transformation means (calculating means), first and second output terminals 20c of the AC component extracting detecting means 20, the first connected to 20d and and a second input terminal, and the phase signal input terminal connected to opposite phases twice signal generating means 21, and a terminal for outputting a d-axis component, twice that obtained from the AC component extraction means 20 AC component v _{q beta} of the two consisting vibration component, and the reverse rotation coordinate conversion using the v _d antiphase doubled signal obtained _α from reverse phase twice signal creating means 21 (-2 × θ _d) The DC amplitude error v _d2 is detected as a DC amount with good controllability . The reverse rotation coordinate conversion in the DC amplitude error detecting means 22 is performed by the following equation (4). Since the q-axis component is not extracted from the DC amplitude error detecting means 22 and only the d-axis component is extracted, the DC amount amplitude error v _d2 obtained from the DC amplitude error detecting means 22 is expressed by the following equation (5). .

直流振幅誤差検出手段２２に接続された補償電圧作成手段２３は、直流振幅誤差検出手段２２から得られた直流振幅誤差ｖ_d2を増幅して補償電圧Ｖ_cを得るための増幅手段から成る。 The compensation voltage creating means 23 connected to the DC amplitude error detecting means 22 is composed of an amplifying means for amplifying the DC amplitude error v _d2 obtained from the DC amplitude error detecting means 22 to obtain the compensation voltage V _c .

基準電圧発生手段２４は、固定の基準電圧Ｋ_v即ち電力系統の交流電圧の定格値（実効値）を発生する。基準電圧発生手段２４と補償電圧作成手段２３とに接続された検出振幅作成手段２５は加算手段から成り、補償電圧Ｖ_cと基準電圧Ｋ_vとを加算して検出振幅Ｖ_qを作成する。この検出振幅Ｖ_qは系統電圧のピーク値Ｖ_pの推定値を示す。なお、補償電圧Ｖ_cと基準電圧Ｋ_vとのいずれか１つの極性を変えて検出振幅作成手段２５を減算手段で構成することもできる。 The reference voltage generating means 24 generates a fixed reference voltage K _{v, that} is, a rated value (effective value) of the AC voltage of the power system. The detection amplitude creating means 25 connected to the reference voltage generating means 24 and the compensation voltage creating means 23 is composed of an adding means, and creates the detected amplitude V _q by adding the compensation voltage V _c and the reference voltage K _v . This detected amplitude V _q indicates an estimated value of the peak value V _p of the system voltage. Note that the detection amplitude generating means 25 can be configured by a subtracting means by changing the polarity of any one of the compensation voltage V _c and the reference voltage K _v .

仮想β軸電圧作成部１３はフィードバック部と呼ぶこともできるものであり、正弦波信号作成手段２６と乗算手段２７とから成る。位相検出信号出力ライン１９に接続された正弦波信号作成手段２６は検出位相θ_dに基づいて正弦波信号ｓｉｎθ_dを作成する。乗算手段２７は、検出振幅作成手段２５と正弦波信号作成手段２６とに接続され、検出振幅作成手段２５から得られた検出振幅Ｖ_qと正弦波信号作成手段２６から得られた正弦波信号ｓｉｎθ_dとを乗算して仮想β軸電圧ｖ_β＝Ｖ_qｓｉｎθ_dを出力する。仮想β軸電圧Ｖ_βは電圧検出手段１０から得られた検出電圧即ち交流電圧Ｖ_αよりも９０度遅れの信号であり、β軸信号として位相差及び振幅誤差検出手段１４に送られる。 The virtual β-axis voltage creation unit 13 can also be called a feedback unit, and includes a sine wave signal creation unit 26 and a multiplication unit 27. Sinusoidal signal generating means 26 connected to the phase detection signal output line 19 to create a sine wave signal sin [theta _d based on the detected phase theta _d. The multiplication unit 27 is connected to the detection amplitude generation unit 25 and the sine wave signal generation unit 26, and the detection amplitude V _q obtained from the detection amplitude generation unit 25 and the sine wave signal sin θ obtained from the sine wave signal generation unit 26. _The virtual β-axis voltage v _β = V _q sin θ _d is output by multiplying by _d . The virtual β-axis voltage V _β is a signal delayed by 90 degrees from the detection voltage obtained from the voltage detection means 10, that is, the AC voltage V _α , and is sent to the phase difference and amplitude error detection means 14 as a β-axis signal.

本実施例の位相検出装置は次の効果を有する。
（１）直流振幅誤差検出手段２２としてα−β／ｄ−ｑ回転座標変換手段（演算手段）を用いて制御性の良い直流量の振幅誤差ｖ_d2を求め、これを使用して補償電圧Ｖ_cを決定し、この補償電圧Ｖ_cと基準電圧Ｋ_vとに基づいて検出振幅Ｖ_qを作成する。しかる後、この検出振幅Ｖ_qを使用して位相差及び振幅誤差検出手段１４が要求する仮想β軸電圧ｖ_βを作成する。従って、制御性及び耐ノイズが良い位相検出装置を提供することができる。
（２）検出振幅Ｖ_qと検出位相θ_dとに基づいて仮想β軸電圧ｖ_βを容易に作成することができる。
（３）検出位相θ_dと位相差及び振幅誤差検出手段１４との出力とに基づいて検出振幅Ｖ_qを容易に作成することができる。 The phase detector of the present embodiment has the following effects.
(1) Using the α-β / dq rotating coordinate conversion means (calculation means) as the DC amplitude error detection means 22, the DC error amplitude error v _d2 with good controllability is obtained and used to obtain the compensation voltage V _c is determined, and a detection amplitude V _q is created based on the compensation voltage V _c and the reference voltage K _v . Thereafter, a virtual β-axis voltage v _β required by the phase difference and amplitude error detecting means 14 is created using the detected amplitude V _q . Therefore, it is possible to provide a phase detection device with good controllability and noise resistance.
(2) The virtual β-axis voltage v _β can be easily created based on the detected amplitude V _q and the detected phase θ _d .
(3) The detection amplitude V _q can be easily created based on the detection phase θ _d and the output of the phase difference and amplitude error detection means 14.

本発明は上述の実施例に限定されるものでなく、例えば次の変形が可能なものである。
（１）図３の各手段をディジタル回路で構成することができる。
（２）図３において複数の手段を一体化することができる。
（３）図３の位相検出装置を、図１以外の回路にも使用可能である。 The present invention is not limited to the above-described embodiments, and for example, the following modifications are possible.
(1) Each means in FIG. 3 can be constituted by a digital circuit.
(2) In FIG. 3, a plurality of means can be integrated.
(3) The phase detector of FIG. 3 can be used for circuits other than FIG.

本発明の実施例１に従う位相検出装置を使用することができるインバータ装置を含む電力系統を示す回路図である。It is a circuit diagram which shows the electric power system containing the inverter apparatus which can use the phase detection apparatus according to Example 1 of this invention. 従来の位相検出装置を示す回路図である。It is a circuit diagram which shows the conventional phase detection apparatus. 本発明の実施例１に従う位相検出装置を示す回路図である。It is a circuit diagram which shows the phase detection apparatus according to Example 1 of this invention.

１０電圧検出手段
１１ＰＬＬ位相検出部
１２電圧振幅補償部
１３仮想β軸電圧作成部
１４位相差及び振幅誤差検出手段 DESCRIPTION OF SYMBOLS 10 Voltage detection means 11 PLL phase detection part 12 Voltage amplitude compensation part 13 Virtual beta axis voltage preparation part 14 Phase difference and amplitude error detection means

Claims

電力系統における交流電圧の位相を検出する位相検出装置であって、
電力系統における交流電圧（ｖ_α＝Ｖ_pｃｏｓθｓ）を検出する電圧検出手段（１０）とＰＬＬ位相検出部（１１）と電圧振幅補償部（１２）と仮想β軸電圧作成部（１３）と位相検出信号出力ライン（１９）とを有し、
前記ＰＬＬ位相検出部（１１）は、前記電圧検出手段（１０）から得られた前記交流電圧（ｖ _α ）と後記乗算手段（２７）から得られた前記交流電圧（ｖ _α ）よりも９０度遅れの仮想β軸電圧（ｖ _β ）とを前記位相検出信号出力ライン（１９）の検出位相（θ _d ）を用いて回転座標変換して、前記交流電圧（ｖ _α ）の位相と前記検出位相（θ _d ）との位相差（ｖ _q ）を出力し且つ前記交流電圧（ｖ _α ）と前記仮想β軸電圧（ｖ _β ）との振幅誤差（ｖ _d ）を出力する位相差及び振幅誤差検出手段（１４）と、前記位相差及び振幅誤差検出手段（１４）から得られた前記位相差（ｖ _q ）を示す信号を増幅して補償角周波数（ω _c ）を得る補償角周波数作成手段（１５）と、基準角周波数（ω _b ）を発生する基準角周波数発生手段（１６）と、前記補償角周波数（ω _c ）と前記基準角周波数（ω _b ）とに基づいて検出角周波数（ω _d ）を作成する検出角周波数作成手段（１７）と、前記検出角周波数（ω _d ）を積分して検出位相（θ _d ）を前記位相検出信号出力ライン（１９）に出力する積分手段（１８）とから成り、
前記電圧振幅補償部（１２）は、前記位相差及び振幅誤差検出手段（１４）から得られた前記位相差（ｖ _q ）を示す信号に含まれる交流成分（ｖ _qβ ）及び振幅誤差（ｖ _d ）を示す信号に含まれる交流成分（ｖ _dα ）を抽出する交流成分抽出手段（２０）と、前記位相検出信号出力ライン（１９）の前記検出位相（θ _d ）に対して逆位相の２倍を示す逆位相２倍信号を作成する逆位相２倍信号作成手段（２１）と、前記交流成分抽出手段（２０）から得られた２つの交流成分（ｖ _qβ 、ｖ _dα ）を前記逆位相２倍信号作成手段（２１）から得られた前記逆位相２倍信号を用いて逆回転座標変換して直流振幅誤差（ｖ _d2 ）を検出する直流振幅誤差検出手段（２２）と、前記直流振幅誤差検出手段（２２）から得られた前記直流振幅誤差（ｖ _d2 ）を増幅して補償電圧（Ｖ _c ）を得る補償電圧作成手段（２３）と、基準電圧（Ｋ _v ）を発生する基準電圧発生手段（２４）と、前記補償電圧（Ｖ _c ）と前記基準電圧（Ｋ _v ）とに基づいて検出振幅（Ｖ _q ）を作成する検出振幅作成手段（２５）とから成り、
前記仮想β軸電圧作成部（１３）は、前記位相検出信号出力ライン（１９）の前記検出位相（θ _d ）を位相角とする正弦波信号（ｓｉｎθ _d ）を作成する正弦波信号作成手段（２６）と、前記検出振幅作成手段（２５）から得られた前記検出振幅（Ｖ _q ）と前記正弦波信号作成手段（２６）から得られた前記正弦波信号（ｓｉｎθ _d ）とを乗算して前記電圧検出手段（１０）から得られた前記交流電圧（Ｖ _α ）よりも９０度遅れの仮想β軸電圧（ｖ _β ）を出力する乗算手段（２７）とから成ることを特徴とする位相検出装置。 A phase detection device for detecting the phase of an AC voltage in a power system,
Voltage detection means (10) for detecting AC voltage (v _α = V _p cos θs) in the power system, PLL phase detection unit (11), voltage amplitude compensation unit (12), virtual β-axis voltage generation unit (13) and phase A detection signal output line (19),
The PLL phase detector (11) is 90 degrees from the AC voltage (v _α ) obtained from the voltage detector (10) and the AC voltage (v _α ) obtained from the multiplier (27) described later. The delayed virtual β-axis voltage (v _β ) is subjected to rotational coordinate conversion using the detection phase (θ _d ) of the phase detection signal output line (19), and the phase of the AC voltage (v _α ) and the detection phase Phase difference and amplitude error detection that outputs a phase difference (v _q ) from (θ _d ) and an amplitude error (v _d ) between the AC voltage (v _α ) and the virtual β-axis voltage (v _β ) Compensation angular frequency generating means ( amplifying a signal indicating the phase difference (v _q ) obtained from the means (14) and the phase difference and amplitude error detection means (14) to obtain a compensation angular frequency (ω _c ) 15), the reference angular frequency generating means for generating a reference angular frequency (omega _b) and (16), wherein Integration 償角frequency (omega _c) and said reference angular frequency (omega _b) and the detected angular frequency generating means for generating a detection angular frequency (omega _d) on the basis of (17), the detected angular frequency (omega _d) And integrating means (18) for outputting the detection phase (θ _d ) to the phase detection signal output line (19) ,
The voltage amplitude compensator (12) includes an AC component (v _qβ ) and an amplitude error (v _d ) included in the signal indicating the phase difference (v _q ) obtained from the phase difference and amplitude error detector (14). AC component extraction means (20) for extracting an AC component (v _dα ) included in the signal indicating ), and twice the phase opposite to the detected phase (θ _d ) of the phase detection signal output line (19) and antiphase twice signal creating means for creating an anti-phase double signal indicating (21), two AC components above obtained from the AC component extracting means (20) (v _{Q [beta],} v _{d [alpha])} the reverse phase 2 DC amplitude error detecting means (22) for detecting a DC amplitude error (v _d2 ) by performing reverse rotation coordinate conversion using the antiphase double signal obtained from the double signal generating means (21 ), and the DC amplitude error obtained from the detecting means (22) said DC amplitude error and (v _d2) Width compensation voltage compensating voltage generating means for obtaining (V _c) (23), the reference voltage (K _v) reference voltage generating means for generating (24), said compensation voltage (V _c) and said reference voltage ( K _v ) and detection amplitude generation means (25) for generating detection amplitude (V _q ) based on
The virtual β-axis voltage generator (13) is a sine wave signal generator (sin θ _d ) that generates a sine wave signal (sin θ _d ) having the detected phase (θ _d ) of the phase detection signal output line (19 ) as a phase angle. 26), the detected amplitude (V _q ) obtained from the detected amplitude creating means (25) and the sine wave signal (sin θ _d ) obtained from the sine wave signal creating means (26) Phase detection means comprising: multiplication means (27) for outputting a virtual β-axis voltage (v _β ) delayed by 90 degrees from the AC voltage (V _α ) obtained from the voltage detection means (10). apparatus.