JP4984431B2 - Integrated thin film solar cell and manufacturing method thereof - Google Patents

Integrated thin film solar cell and manufacturing method thereof Download PDF

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JP4984431B2
JP4984431B2 JP2005141870A JP2005141870A JP4984431B2 JP 4984431 B2 JP4984431 B2 JP 4984431B2 JP 2005141870 A JP2005141870 A JP 2005141870A JP 2005141870 A JP2005141870 A JP 2005141870A JP 4984431 B2 JP4984431 B2 JP 4984431B2
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solder
solar cell
lead wire
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年信 中田
正隆 近藤
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Kaneka Corp
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Description

本発明は、集積型薄膜太陽電池、及びその製造方法に関するものであり、特に、環境への負荷が小さく、外観、信頼性、及び生産性に優れた集積型薄膜太陽電池、及びその製造方法に関するものである。   The present invention relates to an integrated thin film solar cell and a method for manufacturing the same, and particularly relates to an integrated thin film solar cell having a low environmental load and excellent appearance, reliability, and productivity, and a method for manufacturing the same. Is.

従来、家電、電子機器などエレクトロニクス製品で使用される半田として、錫・鉛の組成からなる共晶半田が広く用いてきた。鉛成分は人体への影響を含め、環境に対する不可が大きいことが認識されており、その使用が規制されてきている。鉛成分を含まない、或いは鉛成分の組成が小さい半田（以下、鉛フリー半田という）の開発が急がれており、例えば、特許文献１には、Ａｇが３〜５重量％、Ｃｕが０．５〜３重量％、Ｓｂが０〜５重量％、及び残部がＳｎの組成からなる鉛フリー半田が記載されている。   Conventionally, eutectic solders composed of tin and lead have been widely used as solders used in electronic products such as home appliances and electronic devices. It is recognized that the lead component has a great environmental impact, including effects on the human body, and its use has been regulated. There is an urgent need to develop a solder containing no lead component or having a small lead component composition (hereinafter referred to as lead-free solder). For example, Patent Document 1 discloses that Ag is 3 to 5% by weight and Cu is 0%. A lead-free solder having a composition of 0.5 to 3% by weight, Sb of 0 to 5% by weight, and the balance of Sn is described.

また、特許文献２に開示されているように、太陽電池の分野においても同様に鉛フリー半田の使用が検討されてきている。
特開平５−５０２８９号公報 特開２００２−３１４１０４号公報 In addition, as disclosed in Patent Document 2, the use of lead-free solder has also been studied in the field of solar cells.
JP-A-5-50289 JP 2002-314104 A

しかしながら、ガラス基板上に直接形成された太陽電池層からなる複数のセルが集積化されてなる集積型薄膜太陽電池であって、この集積型薄膜太陽電池内の最も電位差が大きくなる正負の電極部分であり、取り出し電極としてリード線が取り付けられるリード付け領域に所定間隔を存して列状に半田バンプを形成し、取り出し電極として半田ディップリード線を取り付けてなる集積型薄膜太陽電池においては、半田バンプの半田と、半田ディップリード線を形成する半田のそれぞれの組成が異なりこと等から、満足できる信頼性、及び生産性の鉛フリー半田を用いた集積型薄膜太陽電池がが得られていなかった。   However, it is an integrated thin film solar cell in which a plurality of cells composed of solar cell layers directly formed on a glass substrate are integrated, and the positive and negative electrode portions having the largest potential difference in the integrated thin film solar cell In an integrated thin film solar cell in which solder bumps are formed in a row at predetermined intervals in a lead attachment area where a lead wire is attached as an extraction electrode, and a solder dip lead wire is attached as an extraction electrode, solder An integrated thin film solar cell using lead-free solder with satisfactory reliability and productivity has not been obtained due to differences in the composition of the solder of the bump and the solder forming the solder dip lead wire, etc. .

また一般に、鉛フリー・セラミック半田は従来の鉛成分を含む半田より融点が高く、特に、ガラス基板上に直接形成された太陽電池層からなる複数のセルが集積化されてなる集積型薄膜太陽電池の太陽電池層の膜面、透明導電性酸化物層、又はガラス面等に半田バンプを形成する場合には、このような例えば金属酸化物に対して強固に半田付けできる半田が必要とされ、半田ディップリード線を半田バンプにとりつける際に、半田バンプが溶融するまで半田ディップリード線の半田が必要以上長時間に渡って溶融状態に保持され、例えば酸化等により半田が劣化し半田ディップリード線と半田バンプとの接合強度が不十分になるという問題があった。   In general, lead-free ceramic solder has a higher melting point than solder containing conventional lead components, and in particular, an integrated thin film solar cell in which a plurality of cells composed of solar cell layers directly formed on a glass substrate are integrated. When forming a solder bump on the film surface of the solar cell layer, the transparent conductive oxide layer, or the glass surface, a solder that can be firmly soldered to such a metal oxide, for example, is required. When the solder dip lead wire is attached to the solder bump, the solder dip lead wire is held in a molten state for a longer time than necessary until the solder bump is melted. There is a problem that the bonding strength between the solder bump and the solder bump is insufficient.

しかしながら、逆に半田ディップリード線の半田の融点をバンプ半田の半田の融点より高くすると、半田ディップリード線の半田が溶融するまで半田バンプの半田が必要以上長時間に渡って溶融状態に保持され、例えば酸化等により半田が劣化し半田バンプと太陽電池層の膜面、透明導電性酸化物層、又はガラス面等との接合部分の機械強度が低下するという問題があった。   However, if the melting point of the solder of the solder dip lead wire is higher than the melting point of the solder of the bump solder, the solder of the solder bump is held in a molten state for an unnecessarily long time until the solder of the solder dip lead wire is melted. For example, there is a problem that the solder deteriorates due to oxidation or the like, and the mechanical strength of the joint portion between the solder bump and the film surface of the solar cell layer, the transparent conductive oxide layer, or the glass surface decreases.

本発明の集積型薄膜太陽電池は、ガラス基板上に直接形成された太陽電池層からなる複数のセルが集積化されてなる集積型薄膜太陽電池であって、前記集積型薄膜太陽電池内の最も電位差が大きくなる正負の電極部分に於いて、各々の前記電極部分に対応して取り出し電極として半田ディップリード線が、一つの前記電極部分内の所定の間隔の位置にて前記ガラス基板上に複数の前記位置にて半田バンプを介して半田付けされてなり、前記半田ディップリード線、及び前記半田バンプの半田の組成が各々、Ａｇ、Ａｌ、Ｃｕ、Ｚｎ、Ｓｂ、Ｉｎ、Ｇｅ、Ｐ、Ｎｉ、Ｂｉから選らばれる少なくとも１種類以上の元素を０．０５重量％以上、１１重量％以下含み、かつ、Ｓｎを８９重量％以上、９９．５％以下含むこと特徴とする集積型薄膜太陽電池であって、鉛フリー半田を用いても取り出し電極がガラス基板上に強い機械的強度で形成できる。   The integrated thin film solar cell of the present invention is an integrated thin film solar cell in which a plurality of cells each formed of a solar cell layer directly formed on a glass substrate are integrated, and is the most in the integrated thin film solar cell. In positive and negative electrode portions where the potential difference increases, a plurality of solder dip lead wires corresponding to each of the electrode portions as a take-out electrode are provided on the glass substrate at predetermined intervals within the one electrode portion. The solder dip lead wire and the solder composition of the solder bump are respectively Ag, Al, Cu, Zn, Sb, In, Ge, P, and Ni. Integrated thin-film solar comprising 0.05% by weight or more and 11% by weight or less of at least one element selected from Bi, and Sn containing 89% by weight or more and 99.5% or less by weight A pond, electrode lead be used lead-free solder can be formed with high mechanical strength on a glass substrate.

前記半田バンプの半田の融点と、前記半田ディップリード線の半田の融点との差が２０℃以下であると特に機械的強度が高くなり好ましい。更に好ましくは１４℃以下である。   It is preferable that the difference between the solder melting point of the solder bump and the solder melting point of the solder dip lead wire is 20 ° C. or less because the mechanical strength is particularly high. More preferably, it is 14 degrees C or less.

また、前記半田ディップリード線の半田としては、Ｓｎを主成分とし、Ａｇを２．５〜７．７重量％、かつ、Ｃｕを０．０〜４．０重量％含むものであることが好ましく、前記半田バンプの半田としては、Ｓｎを主成分とし、Ｚｎを２．５〜４．０重量％、Ｓｂを０．５〜３．０重量％、かつ、Ａｌを０．０２〜０．１重量％含むものであることが好ましい。   The solder of the solder dip lead wire preferably contains Sn as a main component, contains 2.5 to 7.7% by weight of Ag, and contains 0.0 to 4.0% by weight of Cu. As solder of the solder bump, Sn is a main component, Zn is 2.5 to 4.0% by weight, Sb is 0.5 to 3.0% by weight, and Al is 0.02 to 0.1% by weight. It is preferable that it is included.

最も好ましいのは、半田ディップリード線の半田の融点がバンプ半田の半田の融点より１０℃程度低い場合であって、この状態で半田付けをする場合には、半田ディップリード線の半田が溶融すると同時に半田ごての熱量が半田ディップリード線を通して半田バンプに容易に移動するようになるので、半田ディップリード線、及び半田バンプの溶融が殆ど同時に起こり、半田ディップリード線、半田バンプ、及び太陽電池層の膜面、透明導電性酸化物層、又はガラス面等の３者が特に強固に接合できる。   Most preferably, the melting point of the solder dip lead wire is about 10 ° C. lower than the melting point of the bump solder solder. When soldering in this state, the solder dip lead wire melts. At the same time, since the amount of heat of the soldering iron easily moves to the solder bumps through the solder dip lead wires, the solder dip lead wires and the solder bumps melt almost simultaneously, and the solder dip lead wires, the solder bumps, and the solar cell Three members, such as a film surface of a layer, a transparent conductive oxide layer, or a glass surface, can be bonded particularly firmly.

さらに、本発明の集積型薄膜太陽電池の製造方法として、前記半田付けの前に予め前記ガラス基板上に複数の前記半田バンプを形成する工程、及び、４０〜１５０℃に前記半田ディップリード線を加熱し、その後、半田ごてを前記半田ディップリード線側から押し当ててることで前記半田付けを行う工程を含むようにすると、半田ごてから伝わる熱量が半田ディップリード線上で拡散する速度が抑えられ、半田ディップリード線、及び半田バンプの溶融が殆ど同時に起こり易くなるので、半田ディップリード線、半田バンプ、及び太陽電池層の膜面、透明導電性酸化物層、又はガラス面等の３者がさらに強固に接合でき好ましい。   Furthermore, as a manufacturing method of the integrated thin film solar cell of the present invention, a step of forming a plurality of solder bumps on the glass substrate in advance before the soldering, and the solder dip lead wires at 40 to 150 ° C. Heating and then soldering the soldering iron from the side of the solder dip lead wire to include the step of soldering will reduce the rate at which the amount of heat transmitted from the soldering iron diffuses on the solder dip lead wire. Therefore, the melting of the solder dip lead wire and the solder bump is likely to occur almost at the same time. Therefore, the solder dip lead wire, the solder bump, the film surface of the solar cell layer, the transparent conductive oxide layer, the glass surface, etc. Is preferable because it can be more firmly joined.

リード付け領域に所定間隔を存して列状に半田バンプを形成し、半田ディップリード線を取り付けてなる集積型薄膜太陽電池において、特に、バンプ半田と太陽電池層の膜面、透明導電性酸化物層、又はガラス面等の太陽電池の接合部分とるの機械強度に満足できる鉛フリー半田を用いた集積型薄膜太陽電池が得られる。   In integrated thin-film solar cells in which solder bumps are formed in rows at predetermined intervals in the lead attachment area and solder dip lead wires are attached, especially the bump solder and the solar cell layer film surface, transparent conductive oxidation An integrated thin-film solar cell using lead-free solder that can satisfy the mechanical strength of the solar cell junction such as a physical layer or a glass surface can be obtained.

以下、本発明の実施形態について、図面を参照しながらより詳細に説明する。なお、本願の各図において同一の参照符号は同一部分または相当部分を示し、重複する説明は繰り返されない。   Hereinafter, embodiments of the present invention will be described in more detail with reference to the drawings. In the drawings of the present application, the same reference numerals indicate the same or corresponding parts, and redundant description is not repeated.

図１は、本発明の集積型薄膜太陽電池１を説明するための説明図である。図１に示すように、集積型薄膜太陽電池１はガラス基板２の上に、光を電力に変換する太陽電池層からなる光電変換セルが集積化されている領域３を設け、ガラス基板２側から入射する光を、光電変換セルによって光電変換する。絶縁線４により周囲からの絶縁を図り、半田ディップリード線５を通じて発生した電力を取り出す構造を有している。   FIG. 1 is an explanatory view for explaining an integrated thin film solar cell 1 of the present invention. As shown in FIG. 1, the integrated thin-film solar cell 1 is provided on a glass substrate 2 with a region 3 in which photoelectric conversion cells composed of solar cell layers that convert light into electric power are integrated, and on the glass substrate 2 side. The light incident from the light is photoelectrically converted by the photoelectric conversion cell. Insulation from the surroundings is achieved by the insulating wire 4 and the power generated through the solder dip lead wire 5 is taken out.

さらに、図１の線Ａの断面方向の構造の一部を説明図２に示した。図２に示すように、集積型薄膜太陽電池１は、ガラス基板２上に、透明導電膜６、光電変換膜７、及び裏面電極膜８を順次積層した構造と、発生した電力を取り出すため半田ディップリード線５と、透明導電膜６、光電変換膜７、及び／又は裏面電極膜８を接続するための半田バンプ９を有している。   Further, FIG. 2 shows a part of the structure in the cross-sectional direction of line A in FIG. As shown in FIG. 2, the integrated thin film solar cell 1 includes a structure in which a transparent conductive film 6, a photoelectric conversion film 7, and a back electrode film 8 are sequentially laminated on a glass substrate 2, and solder for taking out generated power. A solder bump 9 for connecting the dip lead wire 5 to the transparent conductive film 6, the photoelectric conversion film 7, and / or the back electrode film 8 is provided.

次に、この薄膜太陽電池１の各構成要素について説明する。   Next, each component of the thin film solar cell 1 will be described.

ガラス基板２としては、大面積な板が安価に入手可能で透明性、絶縁性が高い、ＳiＯ2、Ｎａ2Ｏ及びＣａＯを主成分とする両主面が平滑なフロート板ガラスを用いることができる。 As the glass substrate 2, it is possible to use a float plate glass which has a large area plate available at low cost, is highly transparent and has high insulating properties, and has both main surfaces of which are mainly composed of SiO 2 , Na 2 O and CaO. .

透明導電膜６は、ＩＴＯ膜、ＳｎＯ2膜、或いはＺｎＯ膜のような透明導電性酸化物層等で構成することができる。透明導電膜６は、蒸着法、ＣＶＤ法、或いはスパッタリング法等それ自体既知の気相堆積法を用いて形成することができる。 The transparent conductive film 6 can be composed of a transparent conductive oxide layer such as an ITO film, a SnO 2 film, or a ZnO film. The transparent conductive film 6 can be formed using a known vapor deposition method such as an evaporation method, a CVD method, or a sputtering method.

光電変換膜７は非晶質及び／又は多結晶シリコン系半導体光電変換層を備えており、例えば、透明導電膜６側からｐ型シリコン系半導体層、ｉ型シリコン系半導体層、及びｎ型シリコン系半導体層を順次積層した構造を有する。これらｐ型半導体層、ｉ型半導体層、及びｎ型半導体層はいずれもプラズマＣＶＤ法により形成することができる。また、これらｐｉｎ構造を２段積層したタンデム構造、３段積層したトリプル構造等の構造であってもよい。   The photoelectric conversion film 7 includes an amorphous and / or polycrystalline silicon-based semiconductor photoelectric conversion layer. For example, a p-type silicon-based semiconductor layer, an i-type silicon-based semiconductor layer, and an n-type silicon are formed from the transparent conductive film 6 side. It has a structure in which system-based semiconductor layers are sequentially stacked. These p-type semiconductor layer, i-type semiconductor layer, and n-type semiconductor layer can all be formed by a plasma CVD method. Moreover, a tandem structure in which these pin structures are stacked in two stages, a triple structure in which three stages are stacked, or the like may be used.

光電変換膜７を構成するｐ型半導体層は、例えば、シリコンまたはシリコンカーバイドやシリコンゲルマニウム等のシリコン合金に、ボロンやアルミニウム等のｐ導電型決定不純物原子をドープすることにより形成することができる。また、ｉ型半導体層は、非晶質シリコン系半導体材料及び結晶質シリコン系半導体材料でそれぞれ形成することができ、そのような材料としては、真性半導体のシリコン（水素化シリコン等）やシリコンカーバイド及びシリコンゲルマニウム等のシリコン合金等を拳げることができる。また、光電変換機能を十分に備えていれば、微量の導電型決定不純物を含む弱ｐ型もしくは弱ｎ型のシリコン系半導体材料も用いられ得る。さらに、ｎ型半導体層は、シリコンまたはシリコンカーバイドやシリコンゲルマニウム等のシリコン合金に、燐や窒素等のｎ導電型決定不純物原子をドープすることにより形成することができる。   The p-type semiconductor layer constituting the photoelectric conversion film 7 can be formed, for example, by doping silicon or a silicon alloy such as silicon carbide or silicon germanium with p conductivity type determining impurity atoms such as boron or aluminum. The i-type semiconductor layer can be formed of an amorphous silicon-based semiconductor material and a crystalline silicon-based semiconductor material, respectively. Examples of such a material include intrinsic semiconductor silicon (such as silicon hydride) and silicon carbide. In addition, silicon alloys such as silicon germanium can be fisted. In addition, if the photoelectric conversion function is sufficiently provided, a weak p-type or weak n-type silicon-based semiconductor material containing a small amount of a conductivity type determining impurity may be used. Furthermore, the n-type semiconductor layer can be formed by doping silicon or a silicon alloy such as silicon carbide or silicon germanium with n-conductivity determining impurity atoms such as phosphorus or nitrogen.

裏面電極膜８は電極としての機能を有するだけでなく、絶縁透光性基板２から光電変換膜７に入射し裏面電極膜８に到着した光を反射して光電変換膜７に再入射させる反射層としての機能も有している。裏面電極膜８は、銀やアルミニウム等を用いて、蒸着法やスパッタ法等により、例えば２００ｎｍ〜４００ｎｍ程度の厚さに形成することができる。   The back electrode film 8 not only has a function as an electrode, but also reflects light that enters the photoelectric conversion film 7 from the insulating translucent substrate 2 and arrives at the back electrode film 8 and re-enters the photoelectric conversion film 7. It also functions as a layer. The back electrode film 8 can be formed to a thickness of, for example, about 200 nm to 400 nm by vapor deposition, sputtering, or the like using silver, aluminum, or the like.

なお、裏面電極膜８と光電変換膜７との間には、例えば両者の間の接着性を向上させるために、ＺｎＯのような非金属材料からなる透明電導性薄膜（図示せず）を設けることができる。   A transparent conductive thin film (not shown) made of a nonmetallic material such as ZnO is provided between the back electrode film 8 and the photoelectric conversion film 7, for example, in order to improve the adhesion between them. be able to.

半田ディップリード線５は、Ａｇ、Ａｌ、Ｃｕ、Ｚｎ、Ｓｂ、Ｉｎ、Ｇｅ、Ｐ、Ｎｉ、Ｂｉから選らばれる少なくとも１種類以上の元素を含み、Ｓｎ８９重量％以上の組成からなる半田を溶融したものに、銅箔を浸漬し、銅箔表面に半田をコートすることにより作製することが出来る。   The solder dip lead 5 includes at least one element selected from Ag, Al, Cu, Zn, Sb, In, Ge, P, Ni, and Bi, and melts a solder having a composition of Sn 89% by weight or more. It can be produced by immersing a copper foil in the object and coating the surface of the copper foil with solder.

上記半田として、例えば、Ａｇ２．５〜７．７重量％、Ｃｕ０．０〜４．０重量％、Ｓｎ８９重量％以上の組成からなる半田、Ｚｎ１．０~１１重量％、Ｓｎ８９重量％以上の組成からなる半田を使用することが出来る。さらに好ましくは、Ａｇ２．５〜４．０重量％、Ｃｕ０．０〜１．５重量％、Ｓｎ８９重量％以上の組成からなる半田である。   Examples of the solder include a solder having a composition of Ag 2.5 to 7.7 wt%, Cu 0.0 to 4.0 wt%, Sn 89 wt% or more, Zn 1.0 to 11 wt%, and Sn 89 wt% or more. Solder made of can be used. More preferably, the solder is composed of Ag 2.5 to 4.0% by weight, Cu 0.0 to 1.5% by weight, and Sn 89% by weight or more.

上記銅箔の厚みは４０μｍ〜１２０μｍが好ましく、さらに好ましくは、６０μｍ〜１００μｍである。上記銅箔表面にコートした半田の厚みは、１０μｍ〜８０μｍが好ましく、さらに好ましくは、２０μｍ〜６０μｍである。また、これらの半田組成物に含まれるＰｂは、製造コストを考慮して０．１重量％以下であり、好ましいくは０．０５重量％以下である。半田ディップリード線５の半田の融点が２５０℃超である場合、半田リード線の取り付け温度は３５０℃超の条件が必要となり、半田の酸化による半田こての汚れ、加熱による太陽電池素子のダメージが大きく加速される。コストバランスを考慮して、Ｓｎ重量組成は８９重量％以上が好ましい。   The thickness of the copper foil is preferably 40 μm to 120 μm, and more preferably 60 μm to 100 μm. The thickness of the solder coated on the surface of the copper foil is preferably 10 μm to 80 μm, and more preferably 20 μm to 60 μm. Further, Pb contained in these solder compositions is 0.1% by weight or less, preferably 0.05% by weight or less in consideration of manufacturing cost. When the melting point of the solder of the solder dip lead wire 5 is higher than 250 ° C., the solder lead wire needs to be attached at a temperature higher than 350 ° C., the solder iron is contaminated due to solder oxidation, and the solar cell element is damaged due to heating. Is greatly accelerated. Considering the cost balance, the Sn weight composition is preferably 89% by weight or more.

半田バンプ９は、透明導電性酸化物層である透明導電膜６に物理的に強固に固着され電気的に接続される必要があるため、金属酸化物に半田付け可能なセラミック半田である。したがって、Ａｇ、Ａｌ、Ｃｕ、Ｓｂ、Ｉｎ、Ｇｅ、Ｐ、Ｎｉ、Ｂｉから選らばれる少なくとも１種類以上の元素を含み、ＳｎとＺｎの組成の合計が８９重量％以上である半田である。上記半田として、例えば、Ａｇ２．５〜７．７重量％、Ｃｕ０．０〜４．０重量％、Ｓｎ８９重量％以上の組成からなる半田、Ｚｎ１．０~１１重量％、Ｓｎ８９重量％以上の組成からなる半田を使用することが出来る。さらに好ましくは、Ａｇ２．５〜４．０重量％、Ｃｕ０．０〜１．５重量％、Ｓｎ８９重量％以上の組成からなる半田である。半田バンプ９の半田の融点が２５０℃超である場合、半田バンプ９の形成温度は３５０℃超の条件が必要となり、半田の酸化による小手先の汚れ、加熱による太陽電池素子のダメージが大きく加速される。コストバランスを考慮して、Ｓｎ重量組成は８９重量％以上が好ましいい。   The solder bump 9 is a ceramic solder that can be soldered to a metal oxide because it needs to be physically firmly fixed and electrically connected to the transparent conductive film 6 that is a transparent conductive oxide layer. Therefore, the solder contains at least one element selected from Ag, Al, Cu, Sb, In, Ge, P, Ni, and Bi, and the total composition of Sn and Zn is 89% by weight or more. Examples of the solder include a solder having a composition of Ag 2.5 to 7.7 wt%, Cu 0.0 to 4.0 wt%, Sn 89 wt% or more, Zn 1.0 to 11 wt%, and Sn 89 wt% or more. Solder made of can be used. More preferably, the solder is composed of Ag 2.5 to 4.0% by weight, Cu 0.0 to 1.5% by weight, and Sn 89% by weight or more. When the melting point of the solder bump 9 is higher than 250 ° C., the solder bump 9 needs to be formed at a temperature higher than 350 ° C., and the contamination of the small tip due to the oxidation of the solder and the damage to the solar cell element due to the heating are greatly accelerated. The In consideration of cost balance, the Sn weight composition is preferably 89% by weight or more.

また、これらの半田組成物に含まれるＰｂは、製造コストを考慮して、２重量％以下である。好ましいくは、１重量％以下である。フラックスの添加は可能であるが、薄膜太陽電池の長期使用における信頼性を確保するため、フラックスを含まない方が好ましい。   Further, Pb contained in these solder compositions is 2% by weight or less in consideration of manufacturing cost. Preferably, it is 1% by weight or less. Although addition of a flux is possible, in order to ensure the reliability in the long-term use of a thin film solar cell, it is preferable not to contain a flux.

最初に、ガラス基板２一方の全面に透明導電膜６を製膜した後、例えばＹＡＧ基本波レーザ光を照射して透明導電膜６を短冊状に分割する第１の分離溝１０を形成する。   First, after forming the transparent conductive film 6 on the entire surface of one side of the glass substrate 2, the first separation groove 10 that divides the transparent conductive film 6 into strips is formed by, for example, irradiating YAG fundamental wave laser light.

次に、第１の分離溝１０が形成された透明導電膜６にわたって光電変換膜７としてアモルファスシリコン及び／又は多結晶シリコンを、プラズマＣＶＤ法等でｐ型、ｉ型、ｎ型の順に１回以上積層した後、例えばＹＡＧ第２高調波レーザ光を照射して光電変換膜７を短冊状に分割する接続溝１１を形成する。   Next, amorphous silicon and / or polycrystalline silicon as the photoelectric conversion film 7 is formed once in the order of p-type, i-type, and n-type by the plasma CVD method over the transparent conductive film 6 in which the first separation groove 10 is formed. After the above lamination, for example, YAG second harmonic laser light is irradiated to form connection grooves 11 that divide the photoelectric conversion film 7 into strips.

引き続き、接続溝１１が形成された光電変換膜７にわたって裏面電極膜８として透明電導性薄膜及び金属膜を、この順にスパッタ法等で製膜した後、例えばＹＡＧ第２高調波レーザ光を絶縁透光性基板２側から照射して裏面電極膜８を短冊状に分割する第２の分離溝１２を形成する。このようにして、絶縁透光性基板２の一主面上に順に積層された透明導電膜６、非晶質及び／又は多結晶シリコン系半導体からなる光電変換膜７、裏面電極膜８を含む多層膜を含み、直列接続された複数の光電変換セルを含むセル領域３を形成する。   Subsequently, after forming a transparent conductive thin film and a metal film as a back electrode film 8 over the photoelectric conversion film 7 in which the connection groove 11 is formed by a sputtering method or the like in this order, for example, YAG second harmonic laser light is insulated and transmitted. A second separation groove 12 that irradiates from the optical substrate 2 side and divides the back electrode film 8 into strips is formed. In this way, the transparent conductive film 6, the photoelectric conversion film 7 made of an amorphous and / or polycrystalline silicon-based semiconductor, and the back electrode film 8 are sequentially stacked on one main surface of the insulating translucent substrate 2. A cell region 3 including a multilayer film and including a plurality of photoelectric conversion cells connected in series is formed.

さらに、電力取り出し用の半田ディップリード線５を集積型薄膜太陽電池１内の最も電位差が大きくなる正負の電極部分に、通常は、集積化された太陽電池層の外側のガラス基板上の両辺に近い領域に配する。例えば、図３の破線Ｂ、破線Ｃで示される集積化されている複数の光電変換セルの両端外側位置に、ＹＡＧ第２高調波レーザ光を絶縁透光性基板２側から照射して、光電変換膜７と裏面電極膜８を除去し、図４に示す形状のリードの接続溝１３を作製する。この接続溝１３に重なるように、図５に示すように光電変換セル側から半田バンク９を形成する。この半田バンクの形状は、図６のように透明電極層６に固定され、接続溝１３を充填し、光電変換セルから突き出した形状となる。この形成した半田バンク９にして、半田ディップリード線５を、加熱した半田ごてを用いて取り付け、図２に示したように、電力取り出し用の半田ディップリード線３を配した集積型薄膜太陽電池１を作製できる。   Furthermore, the solder dip lead wires 5 for taking out electric power are formed on the positive and negative electrode portions having the largest potential difference in the integrated thin film solar cell 1, and usually on both sides of the glass substrate outside the integrated solar cell layer. Place it in a close area. For example, the YAG second harmonic laser beam is irradiated from the side of the insulating translucent substrate 2 to the outer ends of both ends of the plurality of integrated photoelectric conversion cells indicated by the broken lines B and C in FIG. The conversion film 7 and the back electrode film 8 are removed, and lead connection grooves 13 having the shape shown in FIG. 4 are formed. As shown in FIG. 5, a solder bank 9 is formed from the photoelectric conversion cell side so as to overlap with the connection groove 13. The shape of this solder bank is fixed to the transparent electrode layer 6 as shown in FIG. 6, fills the connection groove 13, and protrudes from the photoelectric conversion cell. In this formed solder bank 9, a solder dip lead wire 5 is attached using a heated soldering iron, and as shown in FIG. Battery 1 can be produced.

前記電力取り出し用の半田ディップリード線９の作製方法は、第一段階として、例えば、超音波振動子とこの超音波振動子に直結した、内部に電気ヒーターを有した半田コテ（以下超音波半田コテという）を用いる。すなわち、超音波半田コテにて、半田バンプ９に使用する半田を溶融し、超音波半田コテに付着・保持させたものを、超音波振動子により発生した振動を超音波半田コテに伝達した状態で、接続溝１３の位置に押し当て、半田バンプ９を形成する。この場合、加熱した超音波半田コテの温度は、半田バンプ９に使用するセラミック半田の融点（液相温度と固相温度が存在する場合、液相温度を示す）より２０℃〜３００℃高い範囲である。４０℃〜１５０℃であることが好ましい。超音波半田コテの温度が、半田バンプ９に使用するセラミック半田の融点に近いとセラミック半田の溶融速度が遅く、生産性が低下する。また、超音波半田コテの温度が高すぎるとセラミック半田の酸化が進行し、品質が損なわれる。   The first method for producing the solder dip lead wire 9 for taking out the power is, for example, an ultrasonic vibrator and a soldering iron (hereinafter referred to as an ultrasonic solder) directly connected to the ultrasonic vibrator and having an electric heater inside. Is used). That is, in the ultrasonic soldering iron, the solder used for the solder bumps 9 is melted and adhered and held on the ultrasonic soldering iron, and the vibration generated by the ultrasonic vibrator is transmitted to the ultrasonic soldering iron. Then, the solder bumps 9 are formed by pressing against the connection grooves 13. In this case, the temperature of the heated ultrasonic soldering iron is in the range of 20 ° C. to 300 ° C. higher than the melting point of the ceramic solder used for the solder bump 9 (showing the liquid phase temperature when the liquid phase temperature and the solid phase temperature are present). It is. It is preferable that it is 40 to 150 degreeC. When the temperature of the ultrasonic soldering iron is close to the melting point of the ceramic solder used for the solder bump 9, the melting rate of the ceramic solder is slow and the productivity is lowered. On the other hand, if the temperature of the ultrasonic soldering iron is too high, the oxidation of the ceramic solder proceeds and the quality is impaired.

第二段階として、電気ヒーターで加熱した半田コテ（以下リード線用半田コテ）を半田ディップリード線５側より押圧して、半田バンプ９と溶融・接続する。この場合、リード線用半田コテの温度は、半田ディップリード線５に使用する半田の融点より２０℃〜３００℃高い範囲である。４０℃〜１５０℃であることが好ましい。リード線用半田コテの温度が、半田ディップリード線５に使用する半田の融点に近いと半田の溶融速度が遅く、生産性が低下する。また、リード線用半田コテの温度が高すぎると半田の酸化が進行し、品質が損なわれる。   As a second stage, a soldering iron heated by an electric heater (hereinafter referred to as a soldering iron for lead wires) is pressed from the solder dip lead wire 5 side to be melted and connected to the solder bumps 9. In this case, the temperature of the lead wire soldering iron is in the range of 20 ° C. to 300 ° C. higher than the melting point of the solder used for the solder dip lead wire 5. It is preferable that it is 40 to 150 degreeC. If the temperature of the soldering iron for the lead wire is close to the melting point of the solder used for the solder dip lead wire 5, the melting rate of the solder is slow and the productivity is lowered. On the other hand, if the temperature of the lead wire soldering iron is too high, the solder oxidizes and the quality is impaired.

半田バンプ９を形成する半田と、半田ディップリード線５に用いる半田の融点が大きく異なる場合、先に溶融した半田が、表面張力により半田ディップリード線５に濡れ拡がり、接合部分より失われ、半田ディップリード線５の接合強度が低下する。半田の溶融のタイミングを合わせるため、半田バンク９に用いるセラミック半田と半田ディップリード線５に用いる半田のそれぞれ融点の差は、５０℃以下が好ましく、さらに好ましくは２０℃以下が好ましく、更に好ましくは１４℃以下である。何故なら、半田ディップリード線５を半田バンプ９に取り付ける際に、半田バンプ９が必要以上長時間に渡って溶融状態に保持された場合に生じる半田バンプ９と透明電極層６の接合部分の機械強度の低下を、抑制することができるからである。さらに、半田バンプ９に用いるセラミック半田の融点が、半田ディップリード線５に用いる半田より高いほうが好ましい。   When the melting point of the solder forming the solder bump 9 and the solder used for the solder dip lead 5 is greatly different, the previously melted solder wets and spreads on the solder dip lead 5 due to surface tension, and is lost from the joint portion. The bonding strength of the dip lead wire 5 is reduced. In order to match the timing of melting of the solder, the difference in melting point between the ceramic solder used for the solder bank 9 and the solder used for the solder dip lead 5 is preferably 50 ° C. or less, more preferably 20 ° C. or less, and still more preferably. It is 14 degrees C or less. This is because, when the solder dip lead wire 5 is attached to the solder bump 9, the machine of the joint portion between the solder bump 9 and the transparent electrode layer 6 that is generated when the solder bump 9 is held in a molten state for an unnecessarily long time. This is because a decrease in strength can be suppressed. Furthermore, the melting point of the ceramic solder used for the solder bump 9 is preferably higher than that of the solder used for the solder dip lead wire 5.

また、半田バンプ９にリード線用半田ごてによって半田ディップリード線５を取り付ける工程において、一度透明電極９上に形成した半田バンプ９を、高温度、長時間、溶融した状態に保持すると、半田バンプ９と透明電極膜６間の結合が破壊され、接合力が低下する。従来のＳｎ−Ｐｂ共晶半田と比較すると、鉛フリー半田は融点が高いため、半田ディップリード線５の取り付け可能な温度範囲は小さくなる。したがって、半田ディップリード線５の１段階の加熱条件では、取り付け不良が発生する可能性があり、多段階の加熱工程が有利である。すなわち、薄膜太陽電池１の全体またはその一部を加熱してから、半田バンプ９にリード線用半田ごてによって半田ディップリード線５を取り付ける。この場合、薄膜太陽電池１全体を加熱しても、半田バンプ９を含むリード取り付け部分を加熱しても、半田ディップリード線５を加熱してもよい。好ましくは、半田ディップリード線５の加熱である。加熱温度は４０〜１５０℃が好ましく、１００℃〜１５０℃が更に好ましい。また、加熱工程の段数は、装置コストを考慮して、２〜５段階が好ましい。さらに好ましくは、２〜３段階である。   Further, in the step of attaching the solder dip lead wire 5 to the solder bump 9 by a lead wire soldering iron, once the solder bump 9 formed on the transparent electrode 9 is held in a molten state at a high temperature for a long time, The bond between the bump 9 and the transparent electrode film 6 is broken, and the bonding force is reduced. Compared with conventional Sn—Pb eutectic solder, lead-free solder has a higher melting point, and therefore the temperature range in which the solder dip lead wire 5 can be attached becomes smaller. Therefore, under the one-stage heating condition of the solder dip lead 5, there is a possibility that a mounting failure may occur, and a multi-stage heating process is advantageous. That is, after heating the entire thin film solar cell 1 or a part thereof, the solder dip lead wire 5 is attached to the solder bump 9 by a lead wire soldering iron. In this case, the entire thin film solar cell 1 may be heated, the lead attachment portion including the solder bump 9 may be heated, or the solder dip lead wire 5 may be heated. Preferably, the solder dip lead wire 5 is heated. The heating temperature is preferably 40 to 150 ° C, more preferably 100 to 150 ° C. In addition, the number of heating steps is preferably 2 to 5 in consideration of the apparatus cost. More preferably, it is 2-3 steps.

このようにして、電力取り出し用の半田ディップリード線５を具備した集積型薄膜太陽電池１が形成される。   In this way, the integrated thin film solar cell 1 provided with the solder dip lead 5 for taking out electric power is formed.

屋外環境で使用される薄膜太陽電池１は、それを保護する目的で、保護フィルムを光電変換セル側より封止する。保護フィルムは、加熱により軟化・溶融を経て硬化し得る封止樹脂を介して薄膜太陽電池に強固に接着される。このような保護フィルムの例としては、ポリフッ化ビニルフィルム（例えば、テドラーフィルム（登録商標））等のフッ素樹脂フィルムやポリエチレンテレフタレート（ＰＥＴ）フィルムのような有機フィルム、アルミニウム等からなる金属箔を、単層構造または複層構造で積層した構造を有する積層フィルムである。また、加熱により軟化・溶融を経て硬化し得る封止樹脂としては、例えば、エチレン／ビニルアセテート共重合体（ＥＶＡ）、エチレン／酢酸ビニル／トリアリルイソシアヌレート（ＥＶＡＴ）、ポリビニルブチラート（ＰＶＢ）、ポリイソブチレン（ＰＩＢ）等の熱可塑樹脂に、パーオキサイド化合物等の架橋剤を添加したものである。   The thin film solar cell 1 used in an outdoor environment seals a protective film from the photoelectric conversion cell side for the purpose of protecting it. The protective film is firmly adhered to the thin-film solar cell through a sealing resin that can be cured through heating and softening / melting. Examples of such a protective film include a fluororesin film such as a polyvinyl fluoride film (for example, Tedlar film (registered trademark)), an organic film such as a polyethylene terephthalate (PET) film, and a metal foil made of aluminum or the like. A laminated film having a structure laminated in a single layer structure or a multilayer structure. Examples of the sealing resin that can be cured through heating and softening / melting include, for example, ethylene / vinyl acetate copolymer (EVA), ethylene / vinyl acetate / triallyl isocyanurate (EVAT), and polyvinyl butyrate (PVB). A crosslinking agent such as a peroxide compound is added to a thermoplastic resin such as polyisobutylene (PIB).

また、このように集積型薄膜太陽電池１に保護フィルムを取りつける場合、半田ディップ銅箔、金属箔、ケーブル等を使用した内部配線と、端子ボックス等の外部配線剤を介し、電力取り出し用半田ディップリード線から得られる電力を外部に取り出す。また、内部配線剤に半田材料を用いる場合、鉛フリー半田を使用することが好ましい。   Moreover, when attaching a protective film to the integrated thin film solar cell 1 in this way, the solder dip for taking out the electric power through the internal wiring using the solder dip copper foil, metal foil, cable, etc. and the external wiring agent such as the terminal box The electric power obtained from the lead wire is taken out. Moreover, when using a solder material for the internal wiring agent, it is preferable to use lead-free solder.

以下、本発明をいくつかの実施例に基づいて詳細に説明するが、本発明はその趣旨を超えない限り以下の記載例に限定されるものではない。   Hereinafter, although the present invention is explained in detail based on some examples, the present invention is not limited to the following description examples unless it exceeds the purpose.

上述した実施の形態に従い、薄膜太陽電池１を作製した。   A thin film solar cell 1 was produced according to the above-described embodiment.

まず、９８０ｍｍ×９５０ｍｍの面積と５ｍｍの厚さを有するガラス基板２上に、透明導電膜６として、熱ＣＶＤ法による厚さ約７００ｎｍのＳｎＯ2膜を製膜した。このＳｎＯ2膜６に対して、ＳｎＯ2膜６側からＹＡＧ基本波レーザ光ビームを照射することにより、第１の分離溝１０をパターンニング加工形成した。 First, on a glass substrate 2 having an area of 980 mm × 950 mm and a thickness of 5 mm, an SnO 2 film having a thickness of about 700 nm was formed as a transparent conductive film 6 by a thermal CVD method. By irradiating the SnO 2 film 6 with a YAG fundamental wave laser beam from the SnO 2 film 6 side, a first separation groove 10 was formed by patterning.

次に、加工により生じた微粉などを洗浄除去した後、ガラス基板２をプラズマＣＶＤ製膜装置に搬入し、厚さ約３００ｎｍのアモルファスシリコンからなる光電変換膜７を製膜した。ＣＶＤ装置からガラス基板２を搬出した後、光電変換膜７にガラス基板２側からＹＡＧ第二高調波レーザ光を照射して接続溝１１を形成した。   Next, after fine powders and the like generated by the processing were washed away, the glass substrate 2 was carried into a plasma CVD film forming apparatus, and a photoelectric conversion film 7 made of amorphous silicon having a thickness of about 300 nm was formed. After unloading the glass substrate 2 from the CVD apparatus, the connecting groove 11 was formed by irradiating the photoelectric conversion film 7 with YAG second harmonic laser light from the glass substrate 2 side.

次に裏面電極膜８として、厚さ約８０ｎｍのＺｎＯ膜と厚さ約３００ｎｍのＡｇ膜をこの順でスパッタ法で光電変換膜７上に製膜した。さらに、裏面電極膜８にガラス基板２側からＹＡＧ第二高調波レーザ光を照射して短冊上に分割し第２の分離溝１２を形成した。セル領域と接続領域とをガラス基板２周囲から絶縁するために、ガラス基板２の周辺に沿ってＹＡＧレーザ光を照射して、ＳｎＯ2膜６、アモルファスシリコン光電変換膜７、及び裏面電極膜８を除去し、絶縁線４を形成した。以上のようにして、面積がほぼ８２．６７ｃｍ2の光電変換セルが１０８個直列接続した集積型薄膜太陽電池を得た。 Next, as a back electrode film 8, a ZnO film having a thickness of about 80 nm and an Ag film having a thickness of about 300 nm were formed on the photoelectric conversion film 7 in this order by a sputtering method. Furthermore, the back electrode film 8 was irradiated with YAG second harmonic laser light from the glass substrate 2 side, and divided into strips to form second separation grooves 12. In order to insulate the cell region and the connection region from the periphery of the glass substrate 2, YAG laser light is irradiated along the periphery of the glass substrate 2, and the SnO 2 film 6, the amorphous silicon photoelectric conversion film 7, and the back electrode film 8. Then, the insulating wire 4 was formed. As described above, an integrated thin film solar cell in which 108 photoelectric conversion cells having an area of approximately 82.67 cm 2 were connected in series was obtained.

次に、半田バンプ９の半田として表１に示したＨ１、Ｈ２、及びＨ３の組成、溶融温度のものを使用し、半田溶融付着部（コテ先）の径１ｍｍ、超音波半田コテを温度３００℃、超音波出力３Ｗ、半田付け時間１ｓにて、半田接続溝１３に半田バンクを２０ｍｍ間隔で４６点形成した。形成した半田バンクの直径は２．０〜２．７ｍｍで、高さが０．２〜０．５ｍｍであった。   Next, as the solder of the solder bump 9, those having the composition of H1, H2, and H3 shown in Table 1 and the melting temperature are used, the diameter of the solder melt adhesion portion (tip) is 1 mm, and the ultrasonic soldering iron is set to a temperature of 300. Forty-six solder banks were formed in the solder connection grooves 13 at 20 mm intervals at a temperature of 3 ° C., an ultrasonic output of 3 W, and a soldering time of 1 s. The formed solder bank had a diameter of 2.0 to 2.7 mm and a height of 0.2 to 0.5 mm.

Figure 0004984431
次に、リード線用半田コテを用いて、半田ディップリード線５と半田バンプ９を溶融・接続した。表２に使用した半田ディップリード線５であるＬ１、Ｌ２、Ｌ３、及びＬ４の半田の組成、及び融点を示す。また、半田ディップリード線を構成する銅箔の厚みは８０μｍ、幅２ｍｍとした。
Figure 0004984431
 Next, the solder dip lead wire 5 and the solder bump 9 were melted and connected using a lead wire soldering iron. Table 2 shows the solder composition and melting point of L1, L2, L3, and L4, which are the solder dip lead wires 5 used. The thickness of the copper foil constituting the solder dip lead wire was 80 μm and the width was 2 mm.

Figure 0004984431
ここで、リード用半田コテの温度を半田ディップリード線の融点から凡そ４０〜１６０℃の範囲で２０℃毎に変化させて接続した。つまり２４０℃から３６０℃の範囲で７つの温度で、表１の半田バンプ３組成、及び表２の半田ディップコートの４半田組成の、７×３×４通り＝８４通りの組み合わせにつき集積型薄膜太陽電池１を作成した。
Figure 0004984431
 Here, the temperature of the lead soldering iron was changed every 20 ° C. within the range of 40 to 160 ° C. from the melting point of the solder dip lead wire, and the connection was made. That is, the integrated thin film per 7 × 3 × 4 = 84 combinations of the solder bump 3 composition in Table 1 and the four solder compositions in Table 2 at 7 temperatures in the range of 240 ° C. to 360 ° C. A solar cell 1 was prepared.

最後に、ガラス基板２上に半田バンプ９を介して半田付けした半田ディップリード線５の９０°引っ張り強度（引っ張り速度１ｍｍ／１ｓ）を測定した。その結果を表３に示す。なお、表中の引っ張り強度の値は４６点／通りの平均値である。   Finally, the 90 ° tensile strength (tensile speed 1 mm / 1 s) of the solder dip lead wire 5 soldered onto the glass substrate 2 via the solder bumps 9 was measured. The results are shown in Table 3. The tensile strength values in the table are 46 points / average value.

Figure 0004984431
表３に示すように、半田ディップリード線の９０°引っ張り強度は、リード線用半田コテの温度が半田ディップリード線の半田の融点より凡そ１００℃高い温度領域で最大となり、また、その最大の値は、表３の実験結果に示すように、半田バンプ９の半田と半田ディップリード線５の半田の融点が近いほど大きくなる傾向を示した。特に、図９に示すように、半田バンプ９の半田と半田ディップリード線５の半田の融点の差（絶対値）が２０℃より小さくなる方向で、半田ディップリード線５の９０°引っ張り強度の最大値は増大する傾向を示した。
Figure 0004984431
 As shown in Table 3, the 90 ° tensile strength of the solder dip lead wire is maximum in the temperature region where the temperature of the soldering iron for the lead wire is approximately 100 ° C. higher than the melting point of the solder of the solder dip lead wire, and the maximum As shown in the experimental results of Table 3, the values tended to increase as the melting points of the solder bump 9 and the solder dip lead 5 became closer. In particular, as shown in FIG. 9, the 90 ° tensile strength of the solder dip lead wire 5 is such that the difference (absolute value) in melting point between the solder of the solder bump 9 and the solder of the solder dip lead wire 5 becomes smaller than 20 ° C. The maximum value tended to increase.

また、表４に、表３の実施例１におけるリード用半田コテ３２０℃設定の半田ディップリード線５の取り付けの良品率と、半田ディップリード線５を１２０℃に加熱した後に同様に取り付けた場合の良品率の比較を示した（半田未溶融・未接着のものを不良とした）。加熱は熱風ヒーターにて実施した。表４に示したように、半田ディップリード線５を加熱した後、半田ディップリード線５を半田バンプ９に取り付けることにより、その取り付けの良品率が向上していることが分かった。   Also, in Table 4, when the solder dip lead wire 5 is mounted at the same temperature after the solder dip lead wire 5 is heated to 120 ° C. and the solder dip lead wire 5 is set at 320 ° C. in the lead soldering iron of Example 1 in Table 3 Of non-defective products was shown (the solder unmelted / non-bonded one was regarded as defective). Heating was performed with a hot air heater. As shown in Table 4, it was found that by attaching the solder dip lead wire 5 to the solder bump 9 after heating the solder dip lead wire 5, the non-defective product rate of the attachment was improved.

Figure 0004984431
Figure 0004984431

本発明の集積型薄膜太陽電池を概念的に説明する概念図The conceptual diagram explaining the integrated thin film solar cell of this invention notionally 本発明の集積型薄膜太陽電池の断面を概念的に説明する概念図The conceptual diagram explaining notionally the cross section of the integrated thin film solar cell of this invention 本発明の１つの加工例を概念的に示す平面図The top view which shows one processing example of this invention notionally 本発明の１つの加工例を概念的に示す断面図Sectional drawing which shows one processing example of this invention notionally 本発明の１つの加工例を概念的に示す平面図The top view which shows one processing example of this invention notionally 本発明の１つの加工例を概念的に示す断面図Sectional drawing which shows one processing example of this invention notionally 本発明の１つの加工例を概念的に示す断面図Sectional drawing which shows one processing example of this invention notionally 半田バンプと半田ディップリード線との半田の融点の差異と半田ディップリード線のガラス基板への付着力の関係の実験結果を説明する図The figure explaining the experimental result of the relationship between the difference in the melting point of the solder between the solder bump and the solder dip lead and the adhesion of the solder dip lead to the glass substrate

符号の説明Explanation of symbols

１ 集積型薄膜太陽電池
２ ガラス基板
３ 光電変換セルが集積化されている領域
４ 絶縁線
５ 半田ディップリード線
６ 透明導電膜
７ 光電変換膜
８ 裏面電極膜
９ 半田バンプ
１０ 第一の分離溝
１１ 接続溝
１２ 第二の分離溝
１３ リード接続溝 DESCRIPTION OF SYMBOLS 1 Integrated thin-film solar cell 2 Glass substrate 3 The area | region where the photoelectric conversion cell is integrated 4 Insulation wire 5 Solder dip lead wire 6 Transparent conductive film 7 Photoelectric conversion film 8 Back surface electrode film 9 Solder bump 10 First separation groove 11 Connection groove 12 Second separation groove 13 Lead connection groove

Claims (3)

ガラス基板上に直接形成された太陽電池層からなる複数のセルが集積化されてなる集積型薄膜太陽電池であって、該集積型薄膜太陽電池内の最も電位差が大きくなる正負の電極部分に於いて、各々の該電極部分に対応して取り出し電極として半田ディップリード線が、一つの該電極部分内の所定の間隔の位置にて該ガラス基板上に複数の該位置にて半田バンプを介して半田付けされてなり、前記半田ディップリード線の半田が、Ｓｎを主成分とし、Ａｇを２．５〜７．７重量％、かつ、Ｃｕを０．０〜４．０重量％含む組成の鉛フリー半田であり、前記半田バンプの半田が、Ｓｎを主成分とし、Ｚｎを２．５〜４．０重量％、Ｓｂを０．５〜３．０重量％、かつ、Ａｌを０．０２〜０．１重量％含む組成の鉛フリー半田であり、前記半田バンプの半田の融点と、前記半田ディップリード線の半田の融点の差が、２０℃以下であることを特徴とする集積型薄膜太陽電池。 An integrated thin film solar cell in which a plurality of cells composed of a solar cell layer directly formed on a glass substrate are integrated, and the positive and negative electrode portions in the integrated thin film solar cell have the largest potential difference. A solder dip lead wire as an extraction electrode corresponding to each of the electrode portions is disposed on the glass substrate at a plurality of positions at a predetermined interval in one electrode portion via solder bumps. it is soldered, the solder of the solder dipping leads, as a main component Sn, and Ag 2.5-7.7 wt%, and lead composition comprising a Cu .0 to 4.0 wt% The solder of the solder bump is composed of Sn as a main component, Zn is 2.5 to 4.0 wt%, Sb is 0.5 to 3.0 wt%, and Al is 0.02 to 0.02 wt%. It is a lead-free solder composition comprising 0.1% by weight, the solder vans And the melting point of the solder of the difference in the melting point of the solder of the solder dipping leads, integrated thin-film solar cell, characterized in that at 20 ° C. or less. 前記半田バンプの半田の融点と、前記半田ディップリード線の半田の融点の差が、１４℃以下である請求項１記載の集積型薄膜太陽電池。   2. The integrated thin-film solar cell according to claim 1, wherein a difference between a melting point of the solder of the solder bump and a melting point of the solder of the solder dip lead wire is 14 ° C. or less. 請求項１又は２記載の集積型薄膜太陽電池の製造方法であって、前記半田付けの前に予め前記ガラス基板上に複数の前記半田バンプを形成する工程、及び、４０〜１５０℃に前記半田ディップリード線を加熱し、その後、半田ごてを前記半田ディップリード線側から押し当ててることで前記半田付けを行う工程を含むことを特徴にする集積型薄膜太陽電池の製造方法。
3. The method of manufacturing an integrated thin film solar cell according to claim 1, wherein a plurality of solder bumps are formed on the glass substrate in advance before the soldering, and the solder is formed at 40 to 150 ° C. A method of manufacturing an integrated thin film solar cell, comprising the step of heating the dip lead wire and then performing the soldering by pressing a soldering iron from the solder dip lead wire side.
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