JP4978114B2 - Method for manufacturing piezoelectric vibrating piece - Google Patents

Method for manufacturing piezoelectric vibrating piece Download PDF

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JP4978114B2
JP4978114B2 JP2006223928A JP2006223928A JP4978114B2 JP 4978114 B2 JP4978114 B2 JP 4978114B2 JP 2006223928 A JP2006223928 A JP 2006223928A JP 2006223928 A JP2006223928 A JP 2006223928A JP 4978114 B2 JP4978114 B2 JP 4978114B2
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thin film
piezoelectric thin
piezoelectric
vibrating piece
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誠 古畑
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Seiko Epson Corp
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Description

本発明は、圧電体装置に使用される圧電振動片の製造方法に関する。 The present invention relates to a method for manufacturing a piezoelectric vibrating piece used in a piezoelectric device.

屈曲振動を利用した振動片を備えた振動子は、低駆動電圧および低消費電力が必要とされる小型電子機器に用いられる。これらの振動子の使用周波数帯は、kHz〜MHzである。この場合の屈曲振動長は、kHz帯では数十μmであり、MHz帯では数百μmである。
屈曲振動を利用するには、MEMS(Micro Electro Mechanical Systems)が使用される。MEMSには、静電MEMSと圧電MEMSとが知られている。
静電MEMSは、電極である振動片と対向する電極とのギャップ間距離が狭いほど駆動電圧、消費電力が低減される。ここで、ギャップ間距離を狭くするには、細線処理技術、電極同士の吸着防止技術が必要で、多くの工程が必要である。
一方、圧電振動片を備えた圧電MEMSでは、上電極と下電極とに挟まれた圧電体薄膜を振動片である基板に設けているので、ギャップ間距離を狭くすることで生じる問題は少ない。しかしながら、圧電効率を向上させ、低駆動電圧、低消費電力を実現するには、圧電体薄膜の結晶性を向上させる必要がある。一般に圧電体薄膜の結晶性は、その成膜温度が高いほどよい。
A vibrator including a vibrating piece using bending vibration is used in a small electronic device that requires low driving voltage and low power consumption. The use frequency band of these vibrators is kHz to MHz. In this case, the bending vibration length is several tens of μm in the kHz band and several hundreds μm in the MHz band.
In order to utilize the bending vibration, MEMS (Micro Electro Mechanical Systems) is used. As MEMS, electrostatic MEMS and piezoelectric MEMS are known.
In the electrostatic MEMS, the driving voltage and the power consumption are reduced as the distance between the gap between the vibrating piece as an electrode and the facing electrode is narrower. Here, in order to narrow the distance between the gaps, a fine line processing technique and an adsorption prevention technique between electrodes are required, and many processes are required.
On the other hand, in the piezoelectric MEMS provided with the piezoelectric vibrating piece, the piezoelectric thin film sandwiched between the upper electrode and the lower electrode is provided on the substrate that is the vibrating piece, so that there are few problems caused by narrowing the distance between the gaps. However, in order to improve the piezoelectric efficiency and realize a low driving voltage and low power consumption, it is necessary to improve the crystallinity of the piezoelectric thin film. In general, the crystallinity of a piezoelectric thin film is better as its deposition temperature is higher.

ところが、下電極に圧電体薄膜を形成する場合、成膜温度が高いと下電極を形成する材料が圧電体薄膜に拡散し、結晶性の向上した圧電体薄膜が得られない。
成膜温度を下げて結晶性の良好な圧電体薄膜を製造する方法として、結晶性のよい薄い圧電体薄膜(バッファ層)を形成した後、成膜速度の速い条件で数μmの圧電体薄膜(成長層)を形成する方法が知られている。バッファ層の成膜条件として、成膜速度が0.4μm/h以下または成膜温度(基板温度)が150℃〜300℃の条件が示されている(例えば、特許文献1参照)。
However, when forming a piezoelectric thin film on the lower electrode, if the film forming temperature is high, the material forming the lower electrode diffuses into the piezoelectric thin film, and a piezoelectric thin film with improved crystallinity cannot be obtained.
As a method of manufacturing a piezoelectric thin film having good crystallinity by lowering the film forming temperature, a piezoelectric thin film having a thickness of several μm is formed under a condition of high film forming speed after forming a thin piezoelectric thin film (buffer layer) with good crystallinity. A method of forming a (growth layer) is known. As the film forming conditions for the buffer layer, a film forming speed of 0.4 μm / h or less or a film forming temperature (substrate temperature) of 150 ° C. to 300 ° C. is shown (for example, see Patent Document 1).

特開平9−256139号公報(第2頁、段落番号[0009]および[0010])JP-A-9-256139 (page 2, paragraph numbers [0009] and [0010])

しかしながら、バッファ層の成膜条件の最適化を行っただけでは、十分な結晶性を有するバッファ層が得られない。その結果、成長層もバッファ層以上の結晶性をもって成長できず、全体として結晶性のより向上した圧電体薄膜が得られない。また、圧電振動片の圧電振動効率を向上させるには、圧電体薄膜と振動片である基板との力学的な最適化も必要である。
本発明の目的は、圧電振動効率がよく、駆動電圧および消費電力が低減した圧電振動片の製造方法を提供することにある。
However, a buffer layer having sufficient crystallinity cannot be obtained only by optimizing the film formation conditions of the buffer layer. As a result, the growth layer cannot grow with crystallinity higher than that of the buffer layer, and a piezoelectric thin film with improved crystallinity as a whole cannot be obtained. Further, in order to improve the piezoelectric vibration efficiency of the piezoelectric vibrating piece, it is necessary to optimize the dynamics of the piezoelectric thin film and the substrate that is the vibrating piece.
An object of the present invention is to provide a method of manufacturing a piezoelectric vibrating piece with good piezoelectric vibration efficiency and reduced driving voltage and power consumption.

本発明の圧電振動片の製造方法は、基板上に下電極を形成する工程と、前記下電極上に第1圧電体薄膜を形成する工程と、前記第1圧電体薄膜を熱処理する工程と、前記熱処理後の前記第1圧電体薄膜上に第2圧電体薄膜を成長させ、前記第1圧電体薄膜と前記第2圧電体薄膜とで圧電体薄膜を形成する工程と、前記圧電体薄膜上に上電極を形成する工程と、を含み、前記基板の厚みTとヤング率E と密度ρ と、前記圧電体薄膜の厚みtとヤング率E と密度ρ との関係が、0<(t√(E /ρ ))/(T√(E /ρ ))≦1を満足することを特徴とする。 The method for manufacturing a piezoelectric vibrating piece of the present invention includes a step of forming a lower electrode on a substrate, a step of forming a first piezoelectric thin film on the lower electrode, a step of heat-treating the first piezoelectric thin film, A step of growing a second piezoelectric thin film on the first piezoelectric thin film after the heat treatment, and forming the piezoelectric thin film with the first piezoelectric thin film and the second piezoelectric thin film; and on the piezoelectric thin film Forming a top electrode on the substrate, and the relationship between the thickness T, Young's modulus E 1 and density ρ 1 of the substrate, and the thickness t, Young's modulus E 2 and density ρ 2 of the piezoelectric thin film is 0 <(T√ (E 1 / ρ 1 )) / (T√ (E 2 / ρ 2 )) ≦ 1 is satisfied.

この発明によれば、圧電体薄膜を、バッファ層としての第1圧電体薄膜と成長層としての第2圧電体薄膜との2回に分けて形成する。ここで、第1圧電体薄膜形成後に熱処理を行うため、第1圧電体薄膜の結晶性が、熱処理前の第1圧電体薄膜と比較してより向上する。そして、その後形成される第2圧電体薄膜も第1圧電体薄膜に倣って結晶成長し、全体として結晶性のより向上した圧電体薄膜を備えた圧電振動片が得られる。したがって、駆動電圧および消費電力が低減される。また、応力の中立面が圧電振動片の基板内に存在するため、圧電体薄膜に伸縮を妨げる方向の応力が加わりにくい。したがって、効率よく圧電振動が行われ、駆動電圧および消費電力が低減される。 According to the present invention, the piezoelectric thin film is formed in two steps of the first piezoelectric thin film as the buffer layer and the second piezoelectric thin film as the growth layer. Here, since the heat treatment is performed after the formation of the first piezoelectric thin film, the crystallinity of the first piezoelectric thin film is further improved as compared with the first piezoelectric thin film before the heat treatment. Then, the second piezoelectric thin film formed thereafter is crystal-grown following the first piezoelectric thin film, and a piezoelectric vibrating piece having a piezoelectric thin film with improved crystallinity as a whole is obtained. Therefore, driving voltage and power consumption are reduced. Further, since the neutral surface of the stress exists in the substrate of the piezoelectric vibrating piece, the stress in the direction that prevents expansion and contraction is hardly applied to the piezoelectric thin film. Therefore, piezoelectric vibration is efficiently performed, and driving voltage and power consumption are reduced.

本発明では、前記第1圧電体薄膜の材料と前記第2圧電体薄膜の材料とが同一材料であるのが好ましい。
この発明では、第1圧電体薄膜の材料と第2圧電体薄膜の材料とが、同じ結晶定数を持つことができる同一材料で形成されるので、第2圧電体薄膜が第1圧電体薄膜により倣って形成され、結晶性がより向上する。また、圧電特性が同じ材料であれば、圧電体薄膜としての圧電特性も安定する。
In the present invention, the material of the first piezoelectric thin film and the material of the second piezoelectric thin film are preferably the same material.
In the present invention, since the material of the first piezoelectric thin film and the material of the second piezoelectric thin film are formed of the same material having the same crystal constant, the second piezoelectric thin film is formed by the first piezoelectric thin film. It is formed by copying, and the crystallinity is further improved. In addition, if the material has the same piezoelectric characteristics, the piezoelectric characteristics as a piezoelectric thin film are also stable.

本発明では、前記第1圧電体薄膜の膜厚は5nm以上で100nm以下で、かつ前記熱処理の温度は300℃より高く400℃以下であるのが好ましい。
この発明では、第1圧電体薄膜の膜厚が、5nm以上で100nm以下で、圧電体薄膜全体の膜厚である数μmと比較すると薄い。この程度の厚さの薄膜は、結晶の欠陥数自体が少ない。そして、熱処理温度が300℃より高ければ、欠陥数が少ないので十分な結晶性が得られ、400℃以下であれば、下電極を形成する材料の第1圧電体薄膜への拡散が抑えられ、第1圧電体薄膜の不純物が少なくなるため結晶性がより向上する。
In the present invention, the thickness of the first piezoelectric thin film is preferably 5 nm or more and 100 nm or less, and the temperature of the heat treatment is preferably higher than 300 ° C. and 400 ° C. or lower.
In the present invention, the film thickness of the first piezoelectric thin film is 5 nm or more and 100 nm or less, which is thinner than several μm, which is the film thickness of the entire piezoelectric thin film. Such a thin film has a small number of crystal defects. If the heat treatment temperature is higher than 300 ° C., sufficient crystallinity is obtained because the number of defects is small, and if it is 400 ° C. or less, diffusion of the material forming the lower electrode into the first piezoelectric thin film is suppressed, Since the first piezoelectric thin film has fewer impurities, the crystallinity is further improved.

本発明では、前記第1圧電体薄膜を形成する工程と前記第1圧電体薄膜と前記第2圧電体薄膜とで圧電体薄膜を形成する工程においてRFスパッタリング法を用い、前記熱処理を、前記第1圧電体薄膜の構成材料に含まれる元素のうち、前記構成材料における最も分圧の低い元素が存在する雰囲気中でホットプレートにより行なうのが好ましい。
この発明では、熱処理中の雰囲気が分圧の低い元素で満たされているので、分圧の低い元素の抜けが防げるため、組成変化が押さえられ結晶性がより向上する。
In the present invention, in the step of forming the first piezoelectric thin film and the step of forming the piezoelectric thin film by the first piezoelectric thin film and the second piezoelectric thin film, an RF sputtering method is used, and the heat treatment is performed by the first heat treatment. Of the elements contained in the constituent material of one piezoelectric thin film, the hot plate is preferably used in an atmosphere in which the element having the lowest partial pressure in the constituent material exists .
In the present invention, since the atmosphere during the heat treatment is filled with an element having a low partial pressure, the element having a low partial pressure can be prevented from coming off, so that the composition change is suppressed and the crystallinity is further improved.

以下、本発明の実施形態を図面に基づいて説明する。
(第1実施形態)
図1(a)は、本実施形態にかかる圧電振動片1を備えた圧電MEMS10を示す概略平面図、同図(b)は概略正断面図である。同図(c)は同図(a)におけるA−A部分断面図である。圧電MEMS10は、図示しない圧電体装置に組み込まれて使用される。
図2は、圧電振動片1の製造方法を示すフロー図、図3は、圧電振動片1の製造方法を示す概略部分断面図である。
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1A is a schematic plan view showing a piezoelectric MEMS 10 including the piezoelectric vibrating reed 1 according to the present embodiment, and FIG. 1B is a schematic front sectional view. FIG. 2C is a partial cross-sectional view taken along the line AA in FIG. The piezoelectric MEMS 10 is used by being incorporated in a piezoelectric device (not shown).
FIG. 2 is a flowchart showing a method for manufacturing the piezoelectric vibrating piece 1, and FIG. 3 is a schematic partial cross-sectional view showing the method for manufacturing the piezoelectric vibrating piece 1.

図1において、圧電MEMS10は、圧電体装置の支持基板13に設けられ、圧電振動片1とアンカー部11とを備えている。圧電振動片1の形状は、上面と下面とが長方形で、薄い厚みを持つ直方体である。ここで、圧電振動片1の形状は、圧電振動が可能な形状であればどのような形状であってもよい。
2つのアンカー部11は、圧電振動片1の下面の長辺方向の両端付近に配置されている。2つのアンカー部11の間の支持基板13には、圧電振動片1の振動の妨げにならないように、エッチング等により孔14が形成されている。
なお、本実施形態では、アンカー部11は、支持基板13の一部を利用しているが、支持基板13上に別途アンカー部を設けて、このアンカー部間に圧電振動片1を配置してもよい。この場合、アンカー部によって支持基板13と圧電振動片1との間に圧電振動可能な空間を設けることが可能で、孔14を形成しなくてもよい。
圧電振動片1は、図1(b)に2点鎖線で示したように、アンカー部11を節として矢印で示すように上下に振動する。アンカー部11間の距離が屈曲振動長Lである。屈曲振動長Lは、使用周波数帯が数MHzの場合は、50μm程度であり、数十kHzの場合は、500μ程度である。
In FIG. 1, a piezoelectric MEMS 10 is provided on a support substrate 13 of a piezoelectric device, and includes a piezoelectric vibrating piece 1 and an anchor portion 11. The shape of the piezoelectric vibrating piece 1 is a rectangular parallelepiped having a thin upper surface and a rectangular upper surface and lower surface. Here, the shape of the piezoelectric vibrating piece 1 may be any shape as long as piezoelectric vibration is possible.
The two anchor portions 11 are arranged near both ends in the long side direction of the lower surface of the piezoelectric vibrating piece 1. A hole 14 is formed in the support substrate 13 between the two anchor portions 11 by etching or the like so as not to hinder the vibration of the piezoelectric vibrating piece 1.
In this embodiment, the anchor portion 11 uses a part of the support substrate 13. However, a separate anchor portion is provided on the support substrate 13, and the piezoelectric vibrating reed 1 is disposed between the anchor portions. Also good. In this case, it is possible to provide a space capable of piezoelectric vibration between the support substrate 13 and the piezoelectric vibrating piece 1 by the anchor portion, and the hole 14 may not be formed.
The piezoelectric vibrating reed 1 vibrates up and down as indicated by arrows with the anchor portion 11 as a node, as indicated by a two-dot chain line in FIG. The distance between the anchor portions 11 is the bending vibration length L. The bending vibration length L is about 50 μm when the frequency band used is several MHz, and about 500 μm when it is several tens of kHz.

図1(c)において、圧電振動片1は、基板2と下電極3と圧電体薄膜4と上電極5とを備えている。
下電極3は、基板2のアンカー部11が配置されている下面と対向する上面に形成されている。下電極3上には、圧電体薄膜4が形成され、さらにその上に上電極5が形成されている。
In FIG. 1C, the piezoelectric vibrating piece 1 includes a substrate 2, a lower electrode 3, a piezoelectric thin film 4, and an upper electrode 5.
The lower electrode 3 is formed on the upper surface of the substrate 2 that faces the lower surface on which the anchor portion 11 is disposed. A piezoelectric thin film 4 is formed on the lower electrode 3, and an upper electrode 5 is further formed thereon.

ここで、基板2の厚みTとヤング率E1と密度ρ1と、圧電体薄膜4の厚みtとヤング率E2と密度ρ2との関係が下式の関係を有している。
0<(t√(E1/ρ1))/(T√(E2/ρ2))≦1
この関係にあれば、図1(c)中に1点線鎖線で示すように、応力の中立面100が基板2に存在する。図1(c)中の1点鎖線は、中立面100を圧電振動片1の断面から見た位置を示している。
Here, the relationship between the thickness T, Young's modulus E 1 and density ρ 1 of the substrate 2 and the thickness t, Young's modulus E 2 and density ρ 2 of the piezoelectric thin film 4 has the following relationship.
0 <(t√ (E 1 / ρ 1 )) / (T√ (E 2 / ρ 2 )) ≦ 1
If this relationship exists, a neutral surface 100 of stress exists on the substrate 2 as indicated by a one-dot chain line in FIG. A chain line in FIG. 1C indicates a position of the neutral surface 100 as viewed from the cross section of the piezoelectric vibrating piece 1.

基板2には、シリコン、二酸化ケイ素、窒化ケイ素等を用いることができる。
下電極3には、白金、チタン、アルミニウム、クロム、ニッケル等を用いることができる。圧電体薄膜4の結晶性の向上には、白金が好ましく、次にチタン、アルミニウムが好ましい。
圧電体薄膜4としては、酸化亜鉛、窒化アルミニウム、チタン酸鉛、ジルコン酸鉛、チタン酸ジルコン酸鉛、ニオブ酸カリウム、ニオブ酸ナトリウムカリウム等の薄膜が挙げられる。
上電極5には、下電極3に用いた材料を用いることができるが、同じ材料である必要はない。
For the substrate 2, silicon, silicon dioxide, silicon nitride or the like can be used.
For the lower electrode 3, platinum, titanium, aluminum, chromium, nickel, or the like can be used. For improving the crystallinity of the piezoelectric thin film 4, platinum is preferable, and titanium and aluminum are preferable.
Examples of the piezoelectric thin film 4 include thin films of zinc oxide, aluminum nitride, lead titanate, lead zirconate, lead zirconate titanate, potassium niobate, sodium potassium niobate, and the like.
Although the material used for the lower electrode 3 can be used for the upper electrode 5, it is not necessary to be the same material.

図2において、圧電振動片1の製造方法は、下電極形成工程であるステップ1(S1)と、第1圧電体薄膜形成工程であるステップ2(S2)と、第1圧電体薄膜熱処理工程であるステップ3(S3)と、第2圧電体薄膜形成工程であるステップ4(S4)と、上電極形成工程であるステップ5(S5)とを含んでいる。各ステップは、ステップの番号順に行う。   In FIG. 2, the piezoelectric vibrating reed 1 is manufactured by a lower electrode forming step 1 (S 1), a first piezoelectric thin film forming step 2 (S 2), and a first piezoelectric thin film heat treatment step. Step 3 (S3), Step 4 (S4) as the second piezoelectric thin film forming process, and Step 5 (S5) as the upper electrode forming process are included. Each step is performed in the order of step numbers.

図3において、図3(a)はS1、(b)はS2、(c)はS3、(d)はS4、(e)はS5を示す概略断面図である。
図3(a)において、基板2に下電極3を形成する。下電極3には、前述の白金等を形成する。形成方法としては、蒸着法、スパッタ法を用いることができる。
3, FIG. 3 (a) is a schematic cross-sectional view showing S1, (b) is S2, (c) is S3, (d) is S4, and (e) is S5.
In FIG. 3A, the lower electrode 3 is formed on the substrate 2. The lower electrode 3 is formed with the aforementioned platinum or the like. As a formation method, an evaporation method or a sputtering method can be used.

図3(b)において、下電極3上に第1圧電体薄膜42を形成する。
第1圧電体薄膜42の形成方法は、RFスパッタリング法等のPVD(Physical Vapor Deposition)法であってもよいし、CVD(Chemical Vapor Deposition)法であってもよい。また、第1圧電体薄膜42の厚みは、5nm〜100nmが好ましい。
In FIG. 3B, the first piezoelectric thin film 42 is formed on the lower electrode 3.
The method for forming the first piezoelectric thin film 42 may be a PVD (Physical Vapor Deposition) method such as an RF sputtering method or a CVD (Chemical Vapor Deposition) method. The thickness of the first piezoelectric thin film 42 is preferably 5 nm to 100 nm.

図3(c)において、第1圧電体薄膜42の熱処理を行い、熱処理後の第1圧電体薄膜43を形成する。
熱処理は、ランプ加熱による熱処理、レーザ光による熱処理であってもよいが、400℃以下での熱処理には、温度管理ができ温度を低温から上昇できる熱処理が好ましい。
具体的には、より安定した温度管理ができる熱処理炉による熱処理、より簡便なホットプレートによる熱処理、真空チャンバ中での熱処理が好ましい。これらの方法は、下電極3の材料の第1圧電体薄膜42への拡散を抑える場合に有効である。
熱処理温度は、第1圧電体薄膜42の材料の物性、下電極3の融点によって選択できるが、300℃より高く400℃以下が好ましい。
また、熱処理の雰囲気は、第1圧電体薄膜42の材料を構成する元素のうち、最も分圧の低い元素が存在する雰囲気中で行う。より具体的に例を挙げると、第1圧電体薄膜42の材料が酸化亜鉛である場合は酸素雰囲気中での熱処理が好ましく、窒化アルミニウムの場合は窒素雰囲気中での熱処理が好ましい。
In FIG. 3C, the first piezoelectric thin film 42 is heat-treated to form the first piezoelectric thin film 43 after the heat treatment.
The heat treatment may be a heat treatment by lamp heating or a heat treatment by laser light, but the heat treatment at 400 ° C. or lower is preferably a heat treatment capable of controlling the temperature and increasing the temperature from a low temperature.
Specifically, heat treatment by a heat treatment furnace capable of more stable temperature management, heat treatment by a simpler hot plate, and heat treatment in a vacuum chamber are preferable. These methods are effective in suppressing the diffusion of the material of the lower electrode 3 into the first piezoelectric thin film 42.
The heat treatment temperature can be selected depending on the physical properties of the material of the first piezoelectric thin film 42 and the melting point of the lower electrode 3, but is preferably higher than 300 ° C and lower than 400 ° C.
Further, the heat treatment atmosphere is performed in an atmosphere in which an element having the lowest partial pressure among the elements constituting the material of the first piezoelectric thin film 42 is present. More specifically, heat treatment in an oxygen atmosphere is preferable when the material of the first piezoelectric thin film 42 is zinc oxide, and heat treatment in a nitrogen atmosphere is preferable when aluminum nitride is used.

図3(d)において、熱処理後の第1圧電体薄膜43上に第2圧電体薄膜44を形成する。第2圧電体薄膜44は、結晶化の進んだ熱処理後の第1圧電体薄膜43上で結晶成長するものであればどのような圧電体薄膜でもよいが、好ましくは、熱処理後の第1圧電体薄膜43と同一材料からなるのが好ましい。
第2圧電体薄膜44も第1圧電体薄膜42と同様に、PVD法、CVD法で形成することができる。第2圧電体薄膜44は、数μmの厚さに形成する。
熱処理後の第1圧電体薄膜43と第2圧電体薄膜44とが一体となって圧電体薄膜4が形成されている。
In FIG. 3D, a second piezoelectric thin film 44 is formed on the first piezoelectric thin film 43 after the heat treatment. The second piezoelectric thin film 44 may be any piezoelectric thin film as long as crystal growth occurs on the first piezoelectric thin film 43 after the heat treatment that has been crystallized, and preferably the first piezoelectric thin film after the heat treatment. The body thin film 43 is preferably made of the same material.
Similarly to the first piezoelectric thin film 42, the second piezoelectric thin film 44 can be formed by the PVD method or the CVD method. The second piezoelectric thin film 44 is formed to a thickness of several μm.
The piezoelectric thin film 4 is formed by integrating the first piezoelectric thin film 43 and the second piezoelectric thin film 44 after the heat treatment.

図3(e)において、第2圧電体薄膜44上の上電極5を形成する。上電極5も下電極3と同様の材料、方法で形成することができる。   In FIG. 3E, the upper electrode 5 on the second piezoelectric thin film 44 is formed. The upper electrode 5 can also be formed by the same material and method as the lower electrode 3.

このような本実施形態によれば、以下の効果がある。
(1)応力の中立面100が圧電振動片1の基板2内に存在するため、圧電体薄膜4へ伸縮を妨げる方向の応力を加わりにくくできる。したがって、効率よく圧電振動が行われ、駆動電圧および消費電力を低減できる。
According to this embodiment, there are the following effects.
(1) Since the neutral surface 100 of the stress exists in the substrate 2 of the piezoelectric vibrating piece 1, it is difficult to apply stress in a direction that prevents expansion and contraction to the piezoelectric thin film 4. Therefore, piezoelectric vibration is efficiently performed, and driving voltage and power consumption can be reduced.

(2)圧電体薄膜4を、バッファ層としての第1圧電体薄膜42と成長層としての第2圧電体薄膜44との2回に分けて形成する。ここで、第1圧電体薄膜42形成後に熱処理を行うため、熱処理後の第1圧電体薄膜43の結晶性を、熱処理前の第1圧電体薄膜42と比較してより向上できる。そして、その後形成される第2圧電体薄膜44も熱処理後の第1圧電体薄膜43に倣って結晶成長し、全体として結晶性のより向上した圧電体薄膜4を得ることができる。
また、下電極3を形成する材料の圧電体薄膜4への拡散を防ぐことができ、圧電体薄膜4の結晶性を向上できる。
(2) The piezoelectric thin film 4 is formed in two steps: a first piezoelectric thin film 42 as a buffer layer and a second piezoelectric thin film 44 as a growth layer. Here, since the heat treatment is performed after the first piezoelectric thin film 42 is formed, the crystallinity of the first piezoelectric thin film 43 after the heat treatment can be further improved as compared with the first piezoelectric thin film 42 before the heat treatment. Then, the second piezoelectric thin film 44 formed thereafter is also crystal-grown following the first piezoelectric thin film 43 after the heat treatment, and the piezoelectric thin film 4 with improved crystallinity as a whole can be obtained.
Moreover, diffusion of the material forming the lower electrode 3 into the piezoelectric thin film 4 can be prevented, and the crystallinity of the piezoelectric thin film 4 can be improved.

(3)第1圧電体薄膜42の材料と第2圧電体薄膜44の材料とが、同じ結晶定数を持つことができる同一材料で形成されるので、第2圧電体薄膜44が熱処理後の第1圧電体薄膜43により倣って形成され、結晶性を向上できる。また、圧電特性が同じ材料であれば、圧電体薄膜4としての圧電特性を安定にできる。   (3) Since the material of the first piezoelectric thin film 42 and the material of the second piezoelectric thin film 44 are formed of the same material that can have the same crystal constant, the second piezoelectric thin film 44 is heat-treated after the heat treatment. 1 is formed by copying the piezoelectric thin film 43 to improve the crystallinity. Moreover, if the material has the same piezoelectric characteristics, the piezoelectric characteristics as the piezoelectric thin film 4 can be stabilized.

(4)第1圧電体薄膜42の膜厚が、5nm以上で100nm以下で、圧電体薄膜4全体の膜厚である数μmと比較すると薄い。この程度の厚さの薄膜は、結晶の欠陥数自体が少ない。そして、熱処理温度が300℃より高ければ、欠陥数が少ないので十分な結晶性が得られ、400℃以下であれば、下電極3を形成する材料の熱処理後の第1圧電体薄膜43への拡散が抑えられ、熱処理後の第1圧電体薄膜43の不純物が少なくできるため結晶性をより向上できる。   (4) The film thickness of the first piezoelectric thin film 42 is 5 nm or more and 100 nm or less, which is thinner than the several μm that is the film thickness of the entire piezoelectric thin film 4. Such a thin film has a small number of crystal defects. If the heat treatment temperature is higher than 300 ° C., the number of defects is small, so that sufficient crystallinity is obtained. Diffusion is suppressed and impurities in the first piezoelectric thin film 43 after heat treatment can be reduced, so that crystallinity can be further improved.

(5)熱処理中の雰囲気が分圧の低い元素で満たされているので、分圧の低い元素の抜けが防げるため、組成変化が押さえられ結晶性をより向上できる。   (5) Since the atmosphere during the heat treatment is filled with an element having a low partial pressure, it is possible to prevent the element having a low partial pressure from falling out, so that the change in composition can be suppressed and the crystallinity can be further improved.

(第2実施形態)
図4に本実施形態の圧電振動片20の部分断面図を示した。
本実施形態の圧電振動片20およびその製造方法は、第1実施形態で形成した下電極3、圧電体薄膜4および上電極5を基板2の両面に設けた以外は、第1実施形態と同様の材料および構成である。
(Second Embodiment)
FIG. 4 shows a partial cross-sectional view of the piezoelectric vibrating piece 20 of the present embodiment.
The piezoelectric vibrating piece 20 and its manufacturing method of this embodiment are the same as those of the first embodiment except that the lower electrode 3, the piezoelectric thin film 4 and the upper electrode 5 formed in the first embodiment are provided on both surfaces of the substrate 2. Material and composition.

このような本実施形態によれば、以下の効果がある。
(6)応力の中立面200が圧電振動片20の基板2内に存在するため、圧電体薄膜4へ伸縮を妨げる方向の応力を加わりにくくできる。それに加え、圧電振動片20が2つの圧電体薄膜4を備えているので、振動を励起しやすくできる。また、両面に圧電体薄膜4等を形成することにより、圧電体薄膜4等による応力を互いに打ち消すことができ、片面にだけ圧電体薄膜4等を形成した場合に生ずる基板2の反りを抑えることができる。
According to this embodiment, there are the following effects.
(6) Since the neutral surface 200 of the stress exists in the substrate 2 of the piezoelectric vibrating piece 20, it is difficult to apply stress in a direction that prevents expansion and contraction to the piezoelectric thin film 4. In addition, since the piezoelectric vibrating piece 20 includes the two piezoelectric thin films 4, vibration can be easily excited. Further, by forming the piezoelectric thin film 4 etc. on both surfaces, the stress due to the piezoelectric thin film 4 etc. can be canceled out, and the warpage of the substrate 2 that occurs when the piezoelectric thin film 4 etc. is formed only on one side is suppressed. Can do.

以下に、実施例と比較例とにより、圧電体薄膜4の結晶性の評価および圧電振動片1の圧電振動効率の目安となるインピーダンスの評価を行った。
(実施例)
基板2として、シリコン基板を用意した。
S1の工程として、下電極3として白金を形成し、その上に圧電体薄膜4として酸化亜鉛薄膜を形成した。圧電体薄膜4は、以下のように形成した。
S2の工程として、第1圧電体薄膜42を、RF(Radio Frequency)スパッタリング法により、膜厚が50nmの酸化亜鉛膜を形成した。RFスパッタリング法の条件は、RFスパッタリングパワーを1.0kW、アルゴン流量を50sccm、酸素流量を50sccm、ガス圧を0.5Pa、成膜温度を500℃で、ターゲットを酸化亜鉛の焼結体として行った。
次に、S3の工程として、第1圧電体薄膜42を、酸素雰囲気中で310℃、30秒の条件でホットプレートによる熱処理を行った。
次に、S4の工程として、熱処理後の第1圧電体薄膜43上に、第2圧電体薄膜44として酸化亜鉛膜を形成した。酸化亜鉛膜は、第1圧電体薄膜42と同様にRFスパッタリングで行い、膜厚は1.95μmとした。
S5の工程として、上電極5として白金を形成した。
In the following, evaluation of crystallinity of the piezoelectric thin film 4 and evaluation of impedance serving as a standard for the piezoelectric vibration efficiency of the piezoelectric vibrating piece 1 were performed according to Examples and Comparative Examples.
(Example)
A silicon substrate was prepared as the substrate 2.
In step S1, platinum was formed as the lower electrode 3, and a zinc oxide thin film was formed as the piezoelectric thin film 4 thereon. The piezoelectric thin film 4 was formed as follows.
In step S2, a zinc oxide film having a thickness of 50 nm was formed on the first piezoelectric thin film 42 by RF (Radio Frequency) sputtering. The conditions of the RF sputtering method are as follows: RF sputtering power is 1.0 kW, argon flow rate is 50 sccm, oxygen flow rate is 50 sccm, gas pressure is 0.5 Pa, film forming temperature is 500 ° C., and the target is a sintered body of zinc oxide. It was.
Next, as a step of S3, the first piezoelectric thin film 42 was heat-treated with a hot plate in an oxygen atmosphere at 310 ° C. for 30 seconds.
Next, as step S4, a zinc oxide film was formed as the second piezoelectric thin film 44 on the first piezoelectric thin film 43 after the heat treatment. The zinc oxide film was formed by RF sputtering in the same manner as the first piezoelectric thin film 42, and the film thickness was 1.95 μm.
In step S5, platinum was formed as the upper electrode 5.

(比較例)
第1圧電体薄膜42としての酸化亜鉛膜を形成せずに、下電極3上に直接、圧電体薄膜4としての酸化亜鉛膜を実施例と同じ条件でRFスパッタリングで行った。膜厚は、2.00μmで形成した。
(Comparative example)
Without forming the zinc oxide film as the first piezoelectric thin film 42, the zinc oxide film as the piezoelectric thin film 4 was directly formed on the lower electrode 3 by RF sputtering under the same conditions as in the example. The film thickness was 2.00 μm.

以下に、実施例および比較例で得られた圧電振動片1を評価した結果を示す。
[XRD(X-ray diffraction)による結晶性評価]
図5には、実施例および比較例で得られた圧電体薄膜4をXRDで測定したロッキング曲線の結果を示す図が示されている。
図5(a)は、実施例の結果を示し、図5(b)は、比較例の結果を示している。横軸は試料角度ω(deg)、縦軸は散乱強度(cps)である。
実施例でのσ値は0.7で、比較例でのσ値は1.5であり、第1圧電体薄膜42を形成した後熱処理を行い、第2圧電体薄膜44を形成した圧電体薄膜4の結晶性が、圧電体薄膜4を単体で形成した場合と比較して向上することが確認できた。
Below, the result of having evaluated the piezoelectric vibrating piece 1 obtained by the Example and the comparative example is shown.
[Evaluation of crystallinity by XRD (X-ray diffraction)]
FIG. 5 shows a diagram showing the result of a rocking curve obtained by measuring the piezoelectric thin film 4 obtained in the example and the comparative example by XRD.
FIG. 5A shows the result of the example, and FIG. 5B shows the result of the comparative example. The horizontal axis is the sample angle ω (deg), and the vertical axis is the scattering intensity (cps).
The σ value in the example is 0.7, and the σ value in the comparative example is 1.5. The piezoelectric body in which the second piezoelectric thin film 44 is formed by performing heat treatment after the first piezoelectric thin film 42 is formed. It was confirmed that the crystallinity of the thin film 4 was improved as compared with the case where the piezoelectric thin film 4 was formed alone.

[インピーダンス特性評価]
実施例、比較例で得られた圧電振動片1を用いて圧電MEMS10を形成し、インピーダンスZを評価した。
図6にインピーダンスZの測定の結果の概略を示す図を示した。使用周波数f0において、実施例のインピーダンスはZaであり、比較例のインピーダンスZbより小さくなることが確認できた。
以上、実施例および比較例により、本発明における工程および数値範囲内での結晶性向上の効果、および圧電振動効率の向上が確認できた。
[Impedance characteristics evaluation]
The piezoelectric MEMS 10 was formed using the piezoelectric vibrating reeds 1 obtained in the examples and comparative examples, and the impedance Z was evaluated.
FIG. 6 shows a schematic diagram of the result of the impedance Z measurement. At the operating frequency f 0 , it was confirmed that the impedance of the example was Za and was smaller than the impedance Zb of the comparative example.
As described above, according to the examples and comparative examples, the effect of improving the crystallinity within the process and numerical range in the present invention and the improvement of the piezoelectric vibration efficiency were confirmed.

なお、本発明は前述の実施形態に限定されるものではなく、本発明の目的を達成できる範囲での変形、改良等は本発明に含まれるものである。
例えば、基板2自体が導電性を有し、下電極を兼ねていてもよい。
It should be noted that the present invention is not limited to the above-described embodiments, and modifications, improvements, and the like within the scope that can achieve the object of the present invention are included in the present invention.
For example, the substrate 2 itself has conductivity and may also serve as the lower electrode.

(a)は、本発明の第1実施形態にかかる圧電振動片を備えた圧電MEMSを示す概略平面図、(b)は概略正断面図、(c)は(a)におけるA−A部分断面図。(A) is a schematic plan view which shows the piezoelectric MEMS provided with the piezoelectric vibrating piece concerning 1st Embodiment of this invention, (b) is a schematic front sectional view, (c) is the AA partial cross section in (a). Figure. 圧電振動片の製造方法を示すフロー図。The flowchart which shows the manufacturing method of a piezoelectric vibrating piece. 圧電振動片の製造方法を示す概略部分断面図。FIG. 6 is a schematic partial cross-sectional view showing a method for manufacturing a piezoelectric vibrating piece. 本発明の第2実施形態にかかる圧電振動片の部分断面図。The fragmentary sectional view of the piezoelectric vibrating piece according to the second embodiment of the present invention. (a)は、実施例のロッキング曲線の結果を示す図、(b)は、比較例のロッキング曲線の結果を示す図。(A) is a figure which shows the result of the rocking curve of an Example, (b) is a figure which shows the result of the rocking curve of a comparative example. インピーダンスZの測定の結果を示す概略図。Schematic which shows the result of a measurement of impedance Z. FIG.

符号の説明Explanation of symbols

1…圧電振動片、2…基板、3…下電極、4…圧電体薄膜、5…上電極、42,43…第1圧電体薄膜、44…第2圧電体薄膜。
DESCRIPTION OF SYMBOLS 1 ... Piezoelectric vibrating piece, 2 ... Board | substrate, 3 ... Lower electrode, 4 ... Piezoelectric thin film, 5 ... Upper electrode, 42, 43 ... 1st piezoelectric thin film, 44 ... 2nd piezoelectric thin film.

Claims (4)

基板上に下電極を形成する工程と、
前記下電極上に第1圧電体薄膜を形成する工程と、
前記第1圧電体薄膜を熱処理する工程と、
前記熱処理後の前記第1圧電体薄膜上に第2圧電体薄膜を成長させ、前記第1圧電体薄膜と前記第2圧電体薄膜とで圧電体薄膜を形成する工程と、
前記圧電体薄膜上に上電極を形成する工程と、を含み、
前記基板の厚みTとヤング率E と密度ρ と、前記圧電体薄膜の厚みtとヤング率E と密度ρ との関係が、0<(t√(E /ρ ))/(T√(E /ρ ))≦1を満足することを特徴とする圧電振動片の製造方法。
Forming a lower electrode on the substrate;
Forming a first piezoelectric thin film on the lower electrode;
Heat treating the first piezoelectric thin film;
Growing a second piezoelectric thin film on the first piezoelectric thin film after the heat treatment, and forming the piezoelectric thin film with the first piezoelectric thin film and the second piezoelectric thin film;
Forming an upper electrode on the piezoelectric thin film ,
The relationship between the thickness T, Young's modulus E 1 and density ρ 1 of the substrate, and the thickness t, Young's modulus E 2 and density ρ 2 of the piezoelectric thin film is 0 <(t√ (E 1 / ρ 1 )) / (T√ (E 2 / ρ 2 )) ≦ 1 is satisfied . A method for manufacturing a piezoelectric vibrating piece, wherein:
請求項1に記載の圧電振動片の製造方法において、
前記第1圧電体薄膜の材料と前記第2圧電体薄膜の材料とが同一材料であることを特徴とする圧電振動片の製造方法。
In the manufacturing method of the piezoelectric vibrating piece according to claim 1,
A method of manufacturing a piezoelectric vibrating piece, wherein the material of the first piezoelectric thin film and the material of the second piezoelectric thin film are the same material.
請求項1または請求項2に記載の圧電振動片の製造方法において、
前記第1圧電体薄膜の膜厚は5nm以上100nm以下で、かつ前記熱処理の温度は、300℃より高く400℃以下であることを特徴とする圧電振動片の製造方法。
In the manufacturing method of the piezoelectric vibrating piece according to claim 1 or 2,
A method of manufacturing a piezoelectric vibrating piece, wherein the thickness of the first piezoelectric thin film is 5 nm to 100 nm, and the temperature of the heat treatment is higher than 300 ° C. and 400 ° C. or lower.
請求項1〜請求項3のいずれか一項に記載の圧電振動片の製造方法において、
前記第1圧電体薄膜を形成する工程と前記第1圧電体薄膜と前記第2圧電体薄膜とで圧電体薄膜を形成する工程においてRFスパッタリング法を用い、
前記熱処理を、前記第1圧電体薄膜の構成材料に含まれる元素のうち、前記構成材料における最も分圧の低い元素が存在する雰囲気中でホットプレートにより行なうことを特徴とする圧電振動片の製造方法。
In the manufacturing method of the piezoelectric vibrating piece according to any one of claims 1 to 3,
RF sputtering is used in the step of forming the first piezoelectric thin film and the step of forming the piezoelectric thin film by the first piezoelectric thin film and the second piezoelectric thin film,
Manufacturing of a piezoelectric vibrating piece, wherein the heat treatment is performed by a hot plate in an atmosphere in which an element having the lowest partial pressure in the constituent material is present among the elements contained in the constituent material of the first piezoelectric thin film Method.
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JP3576788B2 (en) * 1998-02-13 2004-10-13 株式会社東芝 Electronic component and method of manufacturing the same
JP3127245B1 (en) * 1999-09-03 2001-01-22 工業技術院長 Multilayer electronic material, method of manufacturing the same, sensor and storage device using the same
JP4122430B2 (en) * 2003-03-26 2008-07-23 独立行政法人産業技術総合研究所 Ferroelectric film

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