JP4924593B2 - CMP polishing method, CMP apparatus, semiconductor device and manufacturing method thereof - Google Patents

CMP polishing method, CMP apparatus, semiconductor device and manufacturing method thereof Download PDF

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JP4924593B2
JP4924593B2 JP2008306741A JP2008306741A JP4924593B2 JP 4924593 B2 JP4924593 B2 JP 4924593B2 JP 2008306741 A JP2008306741 A JP 2008306741A JP 2008306741 A JP2008306741 A JP 2008306741A JP 4924593 B2 JP4924593 B2 JP 4924593B2
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polishing
time
silicon oxide
oxide film
film thickness
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岳大 桝村
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Seiko Epson Corp
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本発明は、CMP研磨方法、CMP装置、半導体装置及びその製造方法に関する。特には、1回の研磨処理によって正確な狙い膜厚が得られるCMP研磨方法、CMP装置、半導体装置及びその製造方法に関する。   The present invention relates to a CMP polishing method, a CMP apparatus, a semiconductor device, and a manufacturing method thereof. In particular, the present invention relates to a CMP polishing method, a CMP apparatus, a semiconductor device, and a manufacturing method thereof that can obtain an accurate target film thickness by a single polishing process.

従来のCMP装置はターンテーブルを有しており、このターンテーブルは回転モータによって回転可能に構成されている。ターンテーブルの上面上には研磨クロスが貼り付けられている。ターンテーブルの上方にはウエハ保持手段である研磨ヘッドが配置されており、この研磨ヘッドは回転モータによって回転可能に構成されている。また、ターンテーブルの上方にはスラリーを吐出するノズルが配置されている。また、このCMP装置は、研磨時間、ターンテーブルの回転数、研磨ヘッドの回転などを制御する制御部を有している。   A conventional CMP apparatus has a turntable, and this turntable is configured to be rotatable by a rotary motor. A polishing cloth is affixed on the upper surface of the turntable. A polishing head as wafer holding means is disposed above the turntable, and this polishing head is configured to be rotatable by a rotary motor. A nozzle that discharges slurry is disposed above the turntable. The CMP apparatus also has a controller that controls the polishing time, the number of rotations of the turntable, the rotation of the polishing head, and the like.

上記CMP装置を用いて次のように研磨する。
1ロットには25枚の製品用ウエハが含まれており、製品用ウエハの研磨はロット単位で行う。まず、研磨レートを測定するために、モニター用ウエハを準備する。このモニター用ウエハには、製品用ウエハで研磨しようとしている膜(例えばシリコン酸化膜など)が全面に成膜されている。次いで、モニター用ウエハの研磨前の膜厚(初期膜厚)を測定し、所定時間研磨を行う。即ち、研磨ヘッドの下部にモニター用ウエハの裏面を真空保持し、ターンテーブルを所定の回転数で矢印の方向に回転させ、ノズルからスラリーを吐出し、そのスラリーを研磨クロスの中央付近に滴下し、回転モータによって研磨ヘッドを所定の回転数で矢印の方向に回転させ、モニター用ウエハの表面(研磨面)を研磨クロスに押圧し、さらに研磨ヘッドによってウエハの裏面にエアー圧をかけて押圧する。このようにしてモニター用ウエハを所定時間研磨する。そして、研磨後の膜厚を測定し、初期膜厚と研磨後の膜厚と研磨時間から研磨レートを導出する。
Polishing is performed using the CMP apparatus as follows.
One lot includes 25 product wafers, and the product wafers are polished on a lot basis. First, in order to measure the polishing rate, a monitor wafer is prepared. A film (for example, a silicon oxide film or the like) to be polished by the product wafer is formed on the entire surface of the monitor wafer. Next, the film thickness (initial film thickness) of the monitor wafer before polishing is measured and polished for a predetermined time. That is, the back surface of the monitor wafer is held under vacuum at the bottom of the polishing head, the turntable is rotated in the direction of the arrow at a predetermined number of revolutions, the slurry is discharged from the nozzle, and the slurry is dropped near the center of the polishing cloth. The polishing head is rotated in the direction of the arrow at a predetermined number of rotations by a rotation motor, the surface (polishing surface) of the monitor wafer is pressed against the polishing cloth, and the back surface of the wafer is pressed by the polishing head by applying air pressure. . In this way, the monitor wafer is polished for a predetermined time. Then, the film thickness after polishing is measured, and the polishing rate is derived from the initial film thickness, the film thickness after polishing, and the polishing time.

次に、25枚の製品用ウエハには2回に分けて上記CMP装置を用いて研磨を行う。まず、1回目の研磨で、25枚の製品用ウエハに所望の膜厚より少し厚くなる程度まで研磨を行った後、研磨後の膜厚を測定する。次いで、この測定した研磨後の膜厚と研磨レートから2回目の研磨を行う際の研磨時間を導出する。この後、この導出した研磨時間の研磨を25枚の製品用ウエハに対して行う。1回目の研磨と2回目の研磨の両方において研磨時間以外の研磨条件は同一とする。このようにして研磨を行った後、25枚の製品用ウエハのうちの1枚又は2枚について研磨後の膜厚を測定し、所望の膜厚となっていることを確認する。これにより、25枚の製品用ウエハの研磨を終了する。   Next, the 25 product wafers are polished twice using the CMP apparatus. First, in the first polishing, 25 product wafers are polished to a degree slightly thicker than a desired film thickness, and then the film thickness after polishing is measured. Next, a polishing time for performing the second polishing is derived from the measured film thickness after polishing and the polishing rate. Thereafter, the polishing for the derived polishing time is performed on 25 product wafers. The polishing conditions other than the polishing time are the same in both the first polishing and the second polishing. After polishing in this way, the film thickness after polishing is measured for one or two of the 25 product wafers, and it is confirmed that the desired film thickness is obtained. Thus, the polishing of the 25 product wafers is completed.

上述したように2回に分けて研磨処理を行うことにより、研磨後の膜が狙い膜厚になるように合わせ込んでいた。しかし、2回に分けて研磨処理を行うと、1回で研磨処理を終了させる場合に比べて処理工程が多くなるので、処理の遅延により生産能力が低下するという問題があった。   As described above, by performing the polishing process in two steps, the film after polishing was adjusted so as to have a target film thickness. However, when the polishing process is performed in two steps, the number of processing steps is increased as compared with the case where the polishing process is completed once, so that there is a problem that the production capacity is reduced due to a delay in the processing.

本発明は上記のような事情を考慮してなされたものであり、その目的は、1回の研磨処理によって正確な狙い膜厚が得られるCMP研磨方法、CMP装置、半導体装置及びその製造方法を提供することにある。   The present invention has been made in consideration of the above-described circumstances, and an object of the present invention is to provide a CMP polishing method, a CMP apparatus, a semiconductor device, and a manufacturing method thereof that can obtain an accurate target film thickness by a single polishing process. It is to provide.

上記課題を解決するため、本発明に係るCMP研磨方法は、モニター用ウエハで研磨レートを測定する第1工程と、
複数の製品用ウエハから一部を抜き取り、抜き取った一部の製品用ウエハの初期膜厚を測定し、前記初期膜厚と研磨後の狙い膜厚と前記研磨レートから研磨時間を導出する第2工程と、
前記一部の製品用ウエハに対して前記研磨時間の研磨処理を行う第3工程と、
前記第3工程での研磨処理後の膜厚を測定し、前記膜厚と狙い膜厚から研磨不足時間を導出する第4工程と、
前記研磨不足時間と前記第2工程で導出した研磨時間とから理想研磨時間を導出する第5工程と、
前記第2工程で一部が抜き取られた製品用ウエハの残りを前記理想研磨時間で研磨処理する第6工程と、
を具備する。
In order to solve the above problems, a CMP polishing method according to the present invention includes a first step of measuring a polishing rate with a monitor wafer,
Secondly, a part is extracted from a plurality of product wafers, an initial film thickness of a part of the extracted product wafers is measured, and a polishing time is derived from the initial film thickness, a target film thickness after polishing, and the polishing rate. Process,
A third step of performing a polishing process for the polishing time on the partial product wafer;
Measuring the film thickness after the polishing process in the third step, and deriving the polishing shortage time from the film thickness and the target film thickness;
A fifth step of deriving an ideal polishing time from the polishing shortage time and the polishing time derived in the second step;
A sixth step of polishing the remainder of the product wafer partially extracted in the second step with the ideal polishing time;
It comprises.

上記CMP研磨方法によれば、第1工程から第5工程で理想研磨時間を導出することにより、従来のCMP研磨方法のように2回に分けて研磨処理を行う必要が無くなる上、終点検出機能を用いることなく研磨終点を正確に制御することができ、1回の研磨処理によって正確な狙い膜厚に研磨することができる。   According to the CMP polishing method, by deriving the ideal polishing time from the first step to the fifth step, it is not necessary to perform the polishing process in two steps as in the conventional CMP polishing method, and the end point detection function It is possible to accurately control the polishing end point without using a film, and it is possible to polish to an accurate target film thickness by a single polishing process.

また、本発明に係るCMP研磨方法においては、前記第6工程の後又は前記第1工程乃至第6工程の途中で、前記第1工程で測定した研磨レートと前記第5工程で導出した理想研磨時間をデータとして保存し、前記第1工程乃至第6工程を繰り返し行うことにより研磨レートと理想研磨時間のデータを複数保存し、これら複数のデータから研磨レートと理想研磨時間の関係を導く第7工程をさらに具備することも可能である。   In the CMP polishing method according to the present invention, after the sixth step or in the middle of the first to sixth steps, the polishing rate measured in the first step and the ideal polishing derived in the fifth step. The time is stored as data, and a plurality of data of the polishing rate and the ideal polishing time are stored by repeatedly performing the first to sixth steps, and the relationship between the polishing rate and the ideal polishing time is derived from the plurality of data. It is possible to further include a process.

また、本発明に係るCMP研磨方法においては、前記第7工程の後に、モニター用ウエハで研磨レートを測定し、この測定した研磨レートと前記第7工程で導いた関係から、現在の装置状態での理想研磨時間を導出し、前記理想研磨時間で製品用ウエハの研磨処理を行う第8工程をさらに具備することも可能である。第7工程で研磨レート(マシンコンディション)と理想研磨時間の関係を得ることにより、モニター用ウエハで研磨レートを測定しただけで現在の装置状態の理想研磨時間を導出できるため、第2工程乃至第4工程を省略しても1回の研磨処理によって正確な狙い膜厚に研磨することが可能となる。   Further, in the CMP polishing method according to the present invention, after the seventh step, the polishing rate is measured with the monitor wafer, and the relationship between the measured polishing rate and the seventh step leads to the current apparatus state. It is also possible to further include an eighth step of deriving the ideal polishing time and polishing the product wafer with the ideal polishing time. By obtaining the relationship between the polishing rate (machine condition) and the ideal polishing time in the seventh step, the ideal polishing time of the current apparatus state can be derived simply by measuring the polishing rate with the monitor wafer. Even if the four steps are omitted, it is possible to polish to an accurate target film thickness by a single polishing process.

本発明に係る半導体装置は、前記のCMP研磨方法を用いて研磨した工程を経て製造されたものである。
本発明に係る半導体装置の製造方法は、前記のCMP研磨方法を用いて研磨する工程を有するものである。
The semiconductor device according to the present invention is manufactured through a polishing process using the CMP polishing method.
A method for manufacturing a semiconductor device according to the present invention includes a step of polishing using the CMP polishing method.

本発明に係るCMP装置は、ウエハをCMP研磨するCMP装置であって、
回転可能に構成されたターンテーブルと、
前記ターンテーブル上に配置された研磨クロスと、
前記研磨クロス上にスラリーを供給するスラリー供給機構と、
前記ウエハを保持しながら前記研磨クロスに該ウエハを押し当てる研磨ヘッドと、
前記研磨ヘッド及び前記ターンテーブルの動作を制御する制御部と、
を具備するCMP装置において、
前記制御部は、モニター用ウエハで研磨レートを測定し、複数の製品用ウエハから一部を抜き取り、抜き取った一部の製品用ウエハの初期膜厚を測定し、前記初期膜厚と研磨後の狙い膜厚と前記研磨レートから研磨時間を導出し、前記一部の製品用ウエハに対して前記研磨時間の研磨処理を行い、研磨処理後の膜厚を測定し、前記膜厚と狙い膜厚から研磨不足時間を導出し、前記研磨不足時間と前記研磨時間とから理想研磨時間を導出し、前記理想研磨時間と前記研磨レートをデータとして保存し、これらのデータを複数収集することにより研磨レートと理想研磨時間の関係を導出し、この関係から、モニター用ウエハで研磨レートを測定するだけで現在の装置状態での理想研磨時間を導出し、この理想研磨時間で製品用ウエハを研磨するように制御する。
A CMP apparatus according to the present invention is a CMP apparatus for CMP polishing a wafer,
A turntable configured to be rotatable,
A polishing cloth disposed on the turntable;
A slurry supply mechanism for supplying slurry onto the polishing cloth;
A polishing head for pressing the wafer against the polishing cloth while holding the wafer;
A control unit for controlling operations of the polishing head and the turntable;
In a CMP apparatus comprising:
The control unit measures a polishing rate with a monitor wafer, extracts a part from a plurality of product wafers, measures an initial film thickness of the extracted product wafers, The polishing time is derived from the target film thickness and the polishing rate, the polishing process is performed on the part of the product wafers, the film thickness after the polishing process is measured, and the film thickness and the target film thickness are measured. Deriving the polishing undertime from the above, deriving the ideal polishing time from the underpolishing time and the polishing time, storing the ideal polishing time and the polishing rate as data, and collecting a plurality of these data to obtain the polishing rate The ideal polishing time is derived from this relationship by simply measuring the polishing rate on the monitor wafer, and the ideal polishing time in the current equipment state is derived, and the product wafer is polished with this ideal polishing time. To control to.

本発明に係る半導体装置は、前記のCMP装置を用いて研磨した工程を経て製造されたものである。
本発明に係る半導体装置の製造方法は、前記のCMP装置を用いて研磨する工程を有するものである。
The semiconductor device according to the present invention is manufactured through a polishing process using the CMP apparatus.
A method for manufacturing a semiconductor device according to the present invention includes a step of polishing using the CMP apparatus.

以下、図面を参照して本発明の実施の形態について説明する。
図1(a)は、本発明に係る実施の形態によるCMP(Chemical Mechanical Polishing)装置の概略を示す平面図であり、図1(b)は、図1(a)に示すCMP装置の側面図である。
図1(a)、(b)に示すように、CMP装置は円盤形状のターンテーブル111を有しており、このターンテーブル111の下面には回転軸(図示せず)を介して回転モータ(図示せず)が配置されている。
Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1A is a plan view showing an outline of a CMP (Chemical Mechanical Polishing) apparatus according to an embodiment of the present invention, and FIG. 1B is a side view of the CMP apparatus shown in FIG. It is.
As shown in FIGS. 1A and 1B, the CMP apparatus has a disk-shaped turntable 111, and a rotary motor (not shown) is provided on the lower surface of the turntable 111 via a rotary shaft (not shown). (Not shown) is arranged.

ターンテーブル111の上面上には研磨クロス113が貼り付けられている。ターンテーブル111の上方にはウエハ保持手段である研磨ヘッド117が配置されており、この研磨ヘッド117の上部には回転軸118を介して回転モータ(図示せず)が配置されている。また、ターンテーブル111の上方にはスラリー121を吐出するノズル119が配置されている。また、本CMP装置は、研磨時間、ターンテーブル111の回転数、研磨ヘッド117の回転を制御する制御部(図示せず)を有している。   A polishing cloth 113 is affixed on the top surface of the turntable 111. A polishing head 117 serving as a wafer holding unit is disposed above the turntable 111, and a rotation motor (not shown) is disposed above the polishing head 117 via a rotation shaft 118. A nozzle 119 for discharging the slurry 121 is disposed above the turntable 111. The CMP apparatus also has a control unit (not shown) that controls the polishing time, the number of rotations of the turntable 111, and the rotation of the polishing head 117.

上記CMP装置を図2に示すように動作させて次のように研磨する。
図2は、本発明に係る実施の形態によるCMP研磨方法を説明する図である。
1ロットには25枚の製品用ウエハが含まれており、製品用ウエハの研磨はロット単位で行う。
The CMP apparatus is operated as shown in FIG. 2 to polish as follows.
FIG. 2 is a diagram for explaining a CMP polishing method according to an embodiment of the present invention.
One lot includes 25 product wafers, and the product wafers are polished on a lot basis.

まず、研磨レートを測定するために、モニター用ウエハを準備する。このモニター用ウエハには、製品用ウエハで研磨しようとしている膜(例えばシリコン酸化膜)が全面に成膜されている。次いで、モニター用ウエハの研磨前の膜厚(初期膜厚)を測定し、所定時間研磨を行う。即ち、研磨ヘッド117の下部にモニター用ウエハの裏面を真空保持し、ターンテーブル111を所定の回転数で矢印の方向に回転させ、ノズル119からスラリー121を吐出し、そのスラリーを研磨クロス113の中央付近に滴下し、回転モータによって研磨ヘッド117を所定の回転数で矢印の方向に回転させ、モニター用ウエハの表面(研磨面)を研磨クロス113に押圧し、さらに研磨ヘッド117によってウエハの裏面にエアー圧をかけて押圧する。このようにしてモニター用ウエハを所定時間研磨する。そして、研磨後の膜厚を測定し、初期膜厚と研磨後の膜厚と研磨時間から研磨レート(例えば300nm/分)を導出する(ST1)。   First, in order to measure the polishing rate, a monitor wafer is prepared. A film (for example, a silicon oxide film) to be polished by the product wafer is formed on the entire surface of the monitor wafer. Next, the film thickness (initial film thickness) of the monitor wafer before polishing is measured and polished for a predetermined time. That is, the back surface of the monitor wafer is held under vacuum in the lower part of the polishing head 117, the turntable 111 is rotated in the direction of the arrow at a predetermined rotation number, the slurry 121 is discharged from the nozzle 119, and the slurry is removed from the polishing cloth 113. The liquid is dropped near the center, and the polishing head 117 is rotated in the direction of the arrow at a predetermined rotation number by a rotary motor, the surface (polishing surface) of the monitor wafer is pressed against the polishing cloth 113, and the back surface of the wafer is further polished by the polishing head 117. Press the air pressure on. In this way, the monitor wafer is polished for a predetermined time. Then, the film thickness after polishing is measured, and a polishing rate (for example, 300 nm / min) is derived from the initial film thickness, the film thickness after polishing, and the polishing time (ST1).

次に、25枚の製品用ウエハ(1ロット)を準備する。製品用ウエハにはシリコン酸化膜が成膜されており、このシリコン酸化膜が前記CMP装置を用いて研磨される。
次いで、上記製品用ウエハの25枚のうち1枚を抜き取り、シリコン酸化膜の初期膜厚を測定し、この初期膜厚と研磨後の狙い膜厚と研磨レートから研磨時間(例えば100秒)を導出する。尚、ここでは1枚を抜き取っているが、2枚以上を抜き取ることも可能である。
次いで、上記の抜き取った1枚の製品用ウエハに対して前記導出した研磨時間の研磨処理を行う(ST2)。
Next, 25 product wafers (one lot) are prepared. A silicon oxide film is formed on the product wafer, and this silicon oxide film is polished using the CMP apparatus.
Next, one of the 25 product wafers is extracted, the initial film thickness of the silicon oxide film is measured, and the polishing time (for example, 100 seconds) is calculated from the initial film thickness, the target film thickness after polishing, and the polishing rate. To derive. Although one sheet is extracted here, it is possible to extract two or more sheets.
Next, a polishing process for the derived polishing time is performed on the one product wafer extracted (ST2).

この後、上記研磨処理後のシリコン酸化膜の膜厚を測定し、この膜厚と狙い膜厚から研磨時間の過不足を導出する(ST3)。すなわち、上記研磨処理後のシリコン酸化膜の膜厚を測定したら1370nmであり、研磨後の狙い膜厚が1300nmである場合、70nmだけ研磨不足となるので、300nm/分の研磨レートから計算すると研磨不足時間が14秒間となる。尚、ST2の工程で2枚の製品用ウエハを抜き取り、研磨処理を行った場合、研磨時間の過不足を導出する際には平均値を用いることが好ましい。   Thereafter, the film thickness of the silicon oxide film after the polishing process is measured, and the excess or deficiency of the polishing time is derived from the film thickness and the target film thickness (ST3). That is, when the film thickness of the silicon oxide film after the polishing process is measured, it is 1370 nm, and when the target film thickness after polishing is 1300 nm, the polishing is insufficient by 70 nm. The shortage time is 14 seconds. In addition, when two product wafers are extracted and subjected to a polishing process in the step ST2, it is preferable to use an average value when deriving the excess or deficiency of the polishing time.

次に、上記ST3の工程で導出した研磨不足時間の研磨を行い、研磨後の膜厚を測定して狙い膜厚になっているかを確認し、前記研磨時間と研磨不足時間との和から理想研磨時間(例えば100+14=114秒)を導出する(ST4)。
次いで、上記製品用ウエハの25枚のうち残りの24枚に対して上記理想研磨時間(例えば114秒)の研磨処理を行う(ST5)。
Next, polishing is performed for the polishing undertime derived in the step ST3, and the film thickness after polishing is measured to confirm whether the target film thickness is obtained. From the sum of the polishing time and the polishing undertime, an ideal is obtained. A polishing time (for example, 100 + 14 = 114 seconds) is derived (ST4).
Next, the remaining 24 of the 25 product wafers are polished for the ideal polishing time (eg, 114 seconds) (ST5).

この後、上記ST5の工程で研磨処理を行った24枚のうち2枚を抜き取り、研磨後の膜厚を測定し、狙い膜厚となっていることを確認する(ST6)。尚、本実施の形態では、1ロットに対する研磨処理をST1〜ST6までの工程によって行っているが、2ロット以上に対する研磨処理をST1〜ST6までの工程によって行うことも可能である。また、ST1〜ST6の工程は制御部によって制御しながら行われることが好ましい。   Thereafter, two of the 24 sheets subjected to the polishing process in the step ST5 are extracted, the film thickness after polishing is measured, and it is confirmed that the target film thickness is obtained (ST6). In this embodiment, the polishing process for one lot is performed by the processes from ST1 to ST6, but the polishing process for two or more lots can also be performed by the processes from ST1 to ST6. Moreover, it is preferable to perform the process of ST1-ST6, controlling by a control part.

次いで、前記研磨レート(300nm/分)と前記理想研磨時間(114秒)を制御部の記憶部にデータとして保存する。
次に、上述したST1〜ST6までの工程を、前記CMP装置を用いて繰り返し行う。これにより、研磨レートが例えば250nm/分、理想研磨時間が120秒というデータ、研磨レートが例えば230nm/分、理想研磨時間が140秒というデータなどをとることができる。
Next, the polishing rate (300 nm / min) and the ideal polishing time (114 seconds) are stored as data in the storage unit of the control unit.
Next, the above-described steps ST1 to ST6 are repeated using the CMP apparatus. Thereby, data such as a polishing rate of 250 nm / min and an ideal polishing time of 120 seconds, data of a polishing rate of 230 nm / min and an ideal polishing time of 140 seconds, and the like can be obtained.

CMP装置を使用していく間に研磨レートが変化していくのは、CMP装置の状態(即ちマシンコンディション)が変化していくからである。この変化の原因となるものは、例えばCMP装置の研磨クロス113の摩耗、研磨剤の劣化などが挙げられる。前記のデータを前記記憶部に蓄積していくことにより、図3に示すような研磨レート(マシンコンディション)と理想研磨時間の関係を得ることができる。この関係は数式化(例えばy=ax+b、xが研磨レートでyが理想研磨時間)することも可能である。   The reason why the polishing rate changes while using the CMP apparatus is that the state of the CMP apparatus (that is, the machine condition) changes. The causes of this change include, for example, wear of the polishing cloth 113 of the CMP apparatus, deterioration of the abrasive, and the like. By accumulating the data in the storage unit, a relationship between the polishing rate (machine condition) and the ideal polishing time as shown in FIG. 3 can be obtained. This relationship can be expressed by a mathematical formula (for example, y = ax + b, where x is a polishing rate and y is an ideal polishing time).

上記のような関係を得ることにより、研磨レートを測定するだけで理想研磨時間を導出することが可能となる。つまり、研磨レートを測定し、その研磨レートと前記の関係から理想研磨時間を導出することが可能となる。その場合は、前述したST2〜ST4の工程を省略することができ、研磨レートを測定した後、すぐにST5の工程で1ロットの25枚のすべての製品用ウエハを理想研磨時間で研磨処理することができる。   By obtaining the relationship as described above, it is possible to derive the ideal polishing time only by measuring the polishing rate. That is, it is possible to measure the polishing rate and derive the ideal polishing time from the above-mentioned relationship with the polishing rate. In that case, the above-described steps ST2 to ST4 can be omitted, and immediately after measuring the polishing rate, all the 25 product wafers in one lot are polished in an ideal polishing time in the step ST5. be able to.

上記実施の形態によれば、ST1〜ST4の工程で理想研磨時間を導出することにより、従来のCMP研磨方法のように2回に分けて研磨処理を行う必要が無くなる上、終点検出機能を用いることなく研磨終点を正確に制御することができ、1回の研磨処理によって正確な狙い膜厚に研磨することができる。従って、CMP装置の処理能力を向上させることができる。   According to the above embodiment, by deriving the ideal polishing time in the steps ST1 to ST4, it is not necessary to perform the polishing process in two steps as in the conventional CMP polishing method, and the end point detection function is used. Therefore, the polishing end point can be accurately controlled, and polishing can be performed to an accurate target film thickness by a single polishing process. Therefore, the processing capability of the CMP apparatus can be improved.

また、研磨レートと理想研磨時間のデータを制御部の記憶部に蓄積していくといったデータのフィードバックを行い、研磨レート(マシンコンディション)と理想研磨時間の関係を得ることにより、ST2〜ST4の工程を省略しても1回の研磨処理によって正確な狙い膜厚に研磨することが可能となる。
尚、本発明は上述した実施の形態に限定されず、本発明の主旨を逸脱しない範囲内で種々変更して実施することが可能である。
In addition, the process of ST2 to ST4 is performed by feeding back data such as storing the data of the polishing rate and the ideal polishing time in the storage unit of the control unit and obtaining the relationship between the polishing rate (machine condition) and the ideal polishing time. Even if is omitted, it is possible to polish to an accurate target film thickness by a single polishing process.
The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.

また、上記実施の形態では、本発明をCMP装置、CMP研磨方法に適用した例を示しているが、これに限定されるものではなく、本発明を半導体装置及びその製造方法に適用することも可能である。例えば、本実施の形態によるCMP装置を用いて研磨した工程を経て製造された半導体装置、本実施の形態によるCMP研磨方法を用いて研磨した工程を経て製造された半導体装置、本実施の形態によるCMP装置を用いて研磨する工程を有する半導体装置の製造方法、本実施の形態によるCMP研磨方法を用いて研磨する工程を有する半導体装置の製造方法についても本発明の適用範囲に含まれる。   In the above-described embodiment, the present invention is applied to a CMP apparatus and a CMP polishing method. However, the present invention is not limited to this, and the present invention may be applied to a semiconductor device and a manufacturing method thereof. Is possible. For example, a semiconductor device manufactured through a polishing process using the CMP apparatus according to the present embodiment, a semiconductor device manufactured through a polishing process using the CMP polishing method according to the present embodiment, and the present embodiment. A manufacturing method of a semiconductor device having a step of polishing using a CMP apparatus and a manufacturing method of a semiconductor device having a step of polishing using a CMP polishing method according to this embodiment are also included in the scope of the present invention.

本発明に係る実施の形態によるCMP装置の概略を示す図。The figure which shows the outline of the CMP apparatus by embodiment which concerns on this invention. 本発明に係る実施の形態によるCMP研磨方法を説明する図。The figure explaining the CMP grinding | polishing method by embodiment which concerns on this invention. 研磨レートと理想研磨時間の関係を示す図。The figure which shows the relationship between a polishing rate and ideal polishing time.

符号の説明Explanation of symbols

111…ターンテーブル、113…研磨クロス、115…ウエハ、117…研磨ヘッド、118…回転軸、119…ノズル、121…スラリー   DESCRIPTION OF SYMBOLS 111 ... Turntable, 113 ... Polishing cloth, 115 ... Wafer, 117 ... Polishing head, 118 ... Rotating shaft, 119 ... Nozzle, 121 ... Slurry

Claims (5)

モニター用ウエハに形成されている第1シリコン酸化膜の第1研磨レートを導出する第1工程と、
第1製品用ウエハに形成されている第2シリコン酸化膜の膜厚及び狙い膜厚並びに前記第1研磨レートから、第1研磨時間を導出する第2工程と、
前記第1研磨時間で前記第2シリコン酸化膜を研磨する第3工程と、
前記狙い膜厚と研磨後の前記第2シリコン酸化膜の膜厚とから、前記第2シリコン酸化膜の研磨不足の膜厚を導出する第4工程と、
前記第1研磨レートと前記研磨不足の膜厚とから、第2研磨時間を導出する第5工程と、
前記第2研磨時間で、研磨後の前記第2シリコン膜を研磨する第6工程と、
前記第1研磨時間と前記第2研磨時間とから導出された第3研磨時間で、第2製品用ウエハに形成されている第3シリコン酸化膜を研磨する第7工程と、を含み、
前記第1工程から前記第7工程を繰り返すことにより、前記第1研磨レート及び前記第3研磨時間の関係を導出し、その後、前記第1工程を行うことによって前記第1研磨レートを導出し、前記第1研磨レートと前記関係から第4研磨時間を導出し、前記第4研磨時間で第3製品用ウエハに形成されている第4シリコン酸化膜を研磨する、研磨方法。
A first step of deriving a first polishing rate of the first silicon oxide film formed on the monitor wafer;
A second step of deriving a first polishing time from the thickness and target thickness of the second silicon oxide film formed on the first product wafer and the first polishing rate;
A third step of polishing the second silicon oxide film in the first polishing time;
A fourth step of deriving the under-polished film thickness of the second silicon oxide film from the target film thickness and the film thickness of the second silicon oxide film after polishing;
A fifth step of deriving a second polishing time from the first polishing rate and the insufficiently polished film thickness;
A sixth step of polishing the second silicon film after polishing in the second polishing time;
In the third polishing time derived from the first polishing time and the second polishing time, I saw including a seventh step of polishing the third silicon oxide film which is formed on the second product wafer, and
By repeating the seventh step from the first step, the relationship between the first polishing rate and the third polishing time is derived, and then the first polishing rate is derived by performing the first step, A polishing method, wherein a fourth polishing time is derived from the first polishing rate and the relationship, and the fourth silicon oxide film formed on the third product wafer is polished by the fourth polishing time .
請求項1において、
前記第6工程の研磨後の前記第2シリコン酸化膜の膜厚が前記狙い膜厚になっていることを確認した後に、前記第7工程を行う、研磨方法。
Oite to claim 1,
A polishing method of performing the seventh step after confirming that the thickness of the second silicon oxide film after the polishing in the sixth step is the target thickness.
請求項1又は2の研磨方法を含む、半導体装置の製造方法。 A method for manufacturing a semiconductor device, comprising the polishing method according to claim 1 . ターンテーブルと、
前記ターンテーブル上に配置された研磨クロスと、
前記研磨クロス上に配置されたスラリー供給機構と、
前記研磨クロス上に配置された研磨ヘッドと、
前記研磨ヘッド及び前記ターンテーブルの動作を制御する制御部と、を含み、
前記制御部は、
第1モニター用ウエハに形成されている第1シリコン酸化膜の第1研磨レート並びに第1製品用ウエハに形成されている第2シリコン酸化膜の膜厚及び狙い膜厚から導出された第1研磨時間で、前記第2シリコン酸化膜が研磨されるように、前記研磨ヘッド及び前記ターンテーブルの第1動作を制御し、
前記狙い膜厚と前記第2シリコン酸化膜の研磨後の膜厚とから導出された前記第2シリコン酸化膜の研磨不足の膜厚及び前記第1研磨レートから導出された第2研磨時間で、研磨後の前記第2シリコン酸化膜が研磨されるように、前記研磨ヘッド及び前記ターンテーブルの第2動作を制御し、
前記第1研磨時間と前記第2研磨時間とから導出された第3研磨時間で、第2製品用ウエハに形成されている第3シリコン酸化膜が研磨されるように、前記研磨ヘッド及び前記ターンテーブルの第3動作を制御し、
前記第1動作から前記第3動作を繰り返すように制御することにより、前記第1研磨レート及び前記第3研磨時間の関係を導出し、その後、第2モニター用ウエハに形成されている第4シリコン酸化膜の第2研磨レートと前記関係から第4研磨時間を導出し、前記第4研磨時間で、第3製品用ウエハに形成されている第5シリコン酸化膜が研磨されるように、前記研磨ヘッド及び前記ターンテーブルの動作を制御する、研磨装置。
A turntable,
A polishing cloth disposed on the turntable;
A slurry supply mechanism disposed on the polishing cloth;
A polishing head disposed on the polishing cloth;
A controller for controlling the operation of the polishing head and the turntable,
The controller is
First polishing derived from the first polishing rate of the first silicon oxide film formed on the first monitor wafer and the film thickness and target film thickness of the second silicon oxide film formed on the first product wafer. Controlling the first operation of the polishing head and the turntable so that the second silicon oxide film is polished over time;
A second polishing time derived from the under-polished film thickness of the second silicon oxide film derived from the target film thickness and the film thickness after polishing of the second silicon oxide film, and the first polishing rate, Controlling the second operation of the polishing head and the turntable so that the second silicon oxide film after polishing is polished;
The polishing head and the turn so that the third silicon oxide film formed on the second product wafer is polished at a third polishing time derived from the first polishing time and the second polishing time. Control the third movement of the table ,
By controlling to repeat the third operation from the first operation, the relationship between the first polishing rate and the third polishing time is derived, and then the fourth silicon formed on the second monitor wafer A fourth polishing time is derived from the second polishing rate of the oxide film and the relationship, and the polishing is performed so that the fifth silicon oxide film formed on the third product wafer is polished by the fourth polishing time. A polishing apparatus for controlling operations of the head and the turntable .
請求項の研磨装置を用いた研磨方法を含む、半導体装置の製造方法。 A method for manufacturing a semiconductor device, comprising a polishing method using the polishing apparatus according to claim 4 .
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