JP4771945B2 - バリヤ金属上に直接銅めっきするマルチステップ電着法 - Google Patents
バリヤ金属上に直接銅めっきするマルチステップ電着法 Download PDFInfo
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- JP4771945B2 JP4771945B2 JP2006518879A JP2006518879A JP4771945B2 JP 4771945 B2 JP4771945 B2 JP 4771945B2 JP 2006518879 A JP2006518879 A JP 2006518879A JP 2006518879 A JP2006518879 A JP 2006518879A JP 4771945 B2 JP4771945 B2 JP 4771945B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76864—Thermal treatment
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/38—Electroplating: Baths therefor from solutions of copper
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/10—Electroplating with more than one layer of the same or of different metals
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76868—Forming or treating discontinuous thin films, e.g. repair, enhancement or reinforcement of discontinuous thin films
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
Description
[0001]本発明の実施形態は、一般的には、電気化学めっきにより金属層を堆積させる方法に関し、特に、金属層は銅シード層である。
[0002]サブクォータミクロンサイズの特徴部のメタライゼーションは、集積回路製造工程の現在及び将来の世代のための基本的技術である。超大規模集積型デバイスのようなデバイス、即ち、集積回路が百万を超えるロジックゲートを含むデバイスにおいて、これらデバイスの中心にあるマルチレベル相互接続部は、通常は、高アスペクト比相互接続特徴部を導電物質(例えば、銅又はアルミニウム)で充填することにより形成される。従来、化学気相堆積(CVD)や物理気相堆積(PVD)のような堆積技術は、これら相互接続特徴部を充填するために用いられてきた。しかしながら、相互接続部サイズが小さくなり、アスペクト比が増加するにつれて、従来のメタライゼーション技術によるボイドを含まない相互接続特徴部はますます困難である。その結果として、めっき技術、例えば、電気化学めっき(ECP)や無電解めっきが、集積回路製造工程においてサブクォータミクロンサイズの高アスペクト比相互接続特徴部を充填するための実行可能なプロセスとして出現してきた。
[0043]銅シード層を、バリヤ層(コバルト)を有する基板上に堆積した。銅シードを、Electra Cu ECP(登録商標)システムの変更されたセル内に以下のめっき溶液を用いて堆積した。基板を以下のめっき溶液を含有する槽内に配置した。
脱イオン水中約0.25Mの硫酸銅と、
脱イオン水中約0.5Mクエン酸ナトリウム2水和物。
[0044]銅シード層を、バリヤ層(コバルト)を含む基板上に堆積した。銅シードを、Electra Cu ECP(登録商標)システムの変更されたセル内で以下のめっき溶液を用いて堆積した。基板は以下のめっき溶液を含有する槽内に配置した。
脱イオン水中約0.25Mの硫酸銅と、
脱イオン水中約0.5Mのクエン酸ナトリウム2水和物と、
約200ppmのポリカルボン酸(EO/PO)コポリマー。
[0045]銅シード層を、バリヤ層(ルテニウム)を含む基板上に堆積した。銅シードを、Electra Cu ECP(登録商標)システムの変更されたセル内に以下のめっき溶液を用いて堆積した。基板を以下のめっき溶液を含有する槽内に配置した。
脱イオン水中の約0.3Mの硫酸銅と、
脱イオン水中の約0.5Mのホウ酸。
[0046]銅シード層を、バリヤ層(ルテニウム)を含む基板上に堆積した。銅シードを、Electra Cu ECP(登録商標)システムの変更されたセル内に以下のめっき溶液を用いて堆積した。基板を以下のめっき溶液を含有する槽内に配置した。
脱イオン水中の約0.3Mの硫酸銅と、
脱イオン水中の約0.5Mのホウ酸と、
約200ppmのEO/POコポリマー。
[0048]銅シード層を、実施例1の手順と一致したコバルトバリヤ層を含むいくつかの基板に堆積した。基板を厚さが約100オングストロームのシード層でめっきを始める際に種々の手段で調べた。テープテストによって、バリヤ層と銅シード層間の強力な接着を求めた。銅シード層の導電性は定性的に高かった。更に、シード層の堆積の間バリヤ層にほとんど又は全く酸化が生じなかった。
Claims (19)
- 基板表面に配置されたバリヤ層に銅シード層を堆積させる方法であって、
7未満のpH値を有する錯体形成銅イオンを含む銅溶液に該基板を入れるステップであって、該錯体形成銅イオンが、クエン酸銅、ホウ酸銅、酒石酸銅、シュウ酸銅、ピロリン酸銅、酢酸銅、EDTA銅錯体及びその組合せからなる群より選ばれる、前記ステップと、
該基板表面に電気的バイアスを印加するステップと、
該錯体形成銅イオンを該バイアスで還元して該銅シード層を該バリヤ層に堆積させるステップであって、該バリヤ層が、コバルト、ルテニウム、ニッケル、タングステン、窒化タングステン、チタン、窒化チタン及び銀及びその組合せからなる群より選ばれる物質を含む、前記ステップと、
を含む前記方法。 - 基板表面上に配置されたバリヤ層に金属シード層を堆積させる方法であって、
7未満のpH値を有する第一の銅溶液に該基板を晒すステップであって、該第一の銅溶液は、硫酸銅、リン酸銅、硝酸銅、ホウ酸銅、クエン酸銅、酒石酸銅、シュウ酸銅、EDTA銅、酢酸銅、ピロリン酸銅及びその組合せからなる群より選ばれる銅源から得られる錯体形成銅イオンを含む、前記ステップと、
該錯体形成銅イオンを電気めっき技術で還元して銅シード層を該バリヤ層の表面に直接形成するステップと、
を含む、前記方法。 - 該バリヤ層が、コバルト、ルテニウム、ニッケル、タングステン、窒化タングステン、チタン、窒化チタン及び銀及びその組合せからなる群より選ばれる物質を含む、請求項2記載の方法。
- 該第一の銅溶液の銅濃度が0.02M〜0.8Mの範囲にある、請求項2記載の方法。
- 第一の電気的バイアスが、電気めっき技術中に該基板表面全体に10mA/cm2未満の電流密度を生成するように構成されている、請求項2記載の方法。
- 該電流密度が、0.5mA/cm2〜3mA/cm2の範囲にある、請求項5記載の方法。
- 遊離銅イオンを含む第二の銅溶液に該基板を晒す工程、該基板表面全体に第二電気的バイアスを印加して該銅シード層に銅間隙充填層を堆積させる工程により、該銅間隙充填層を堆積させるステップを更に含む、請求項2記載の方法。
- 遊離銅イオンを含む第三の銅溶液に該基板を晒す工程、該基板表面全体に第三電気的バイアスを印加して該銅間隙充填層に銅バルク充填層を堆積させる工程により、該バルク充填銅層を堆積させるステップを更に含む、請求項7記載の方法。
- 少なくとも1つのレベリング剤を該第一の銅溶液に添加して該第二の銅溶液を形成する、請求項8記載の方法。
- 銅含有シード層をバリヤ層に堆積する方法であって、
基板を準備するステップであって、該基板はその表面上に堆積されたバリヤ層を含み、該バリヤ層はバリヤ表面を有し、該バリヤ表面は、タングステン表面、窒化タングステン表面、チタン表面、窒化チタン表面、コバルト表面、ルテニウム表面、ニッケル表面及び銀表面からなる群より選ばれる、前記ステップと、
錯体形成銅イオンを含む7未満のpH値を有する電気めっき溶液に該基板を晒すステップであって、該錯体形成銅イオンは、間に介在層を堆積することなく該バリヤ層の該バリヤ表面上に銅シード層を直接堆積する為に、遊離銅イオンに対して、より負の堆積電位を有する、前記ステップと、
を含む、前記方法。 - 該電気めっき溶液は、pH値が3〜7の範囲である、請求項10記載の方法。
- 該電気めっき溶液に該基板を晒すステップは、
該基板の該表面全体に第一電気的バイアスを印加し、該錯体形成銅イオンを該第一電気的バイアスで化学的に還元する工程を更に含む、請求項10記載の方法。 - 該錯体形成銅イオンは、硫酸銅、リン酸銅、硝酸銅、ホウ酸銅、クエン酸銅、酒石酸銅、シュウ酸銅、EDTA銅、酢酸銅、ピロリン酸銅及びその組合せからなる群より選ばれる銅源から得られる、請求項10記載の方法。
- 該基板表面全体に第二電気的バイアスを印加して該銅シード層に銅間隙充填層を堆積させるステップを更に含む、請求項10記載の方法。
- 該基板表面全体に第三電気的バイアスを印加して該銅間隙充填層に銅バルク充填層を堆積させるステップを更に含む、請求項14記載の方法。
- 該第一電気的バイアスは、該基板表面全体に10mA/cm2未満の電流密度を有し、該第一電気めっき溶液は、0.02M〜0.8Mの範囲にある銅濃度を含む、請求項12記載の方法。
- 該第一電気的バイアスは、該基板表面全体に0.5mA/cm2〜3mA/cm2の範囲にある電流密度を有する、請求項16記載の方法。
- 銅間隙充填層をアニールするステップを更に有する請求項15記載の方法。
- 該アニールするステップは、酸素を含まない環境で実施される、請求項18記載の方法。
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Application Number | Priority Date | Filing Date | Title |
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US10/616,097 | 2003-07-08 | ||
US10/616,097 US20050006245A1 (en) | 2003-07-08 | 2003-07-08 | Multiple-step electrodeposition process for direct copper plating on barrier metals |
PCT/US2004/021771 WO2005008759A1 (en) | 2003-07-08 | 2004-07-08 | Multiple-step electrodeposition process for direct copper plating on barrier metals |
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JP2007528932A JP2007528932A (ja) | 2007-10-18 |
JP4771945B2 true JP4771945B2 (ja) | 2011-09-14 |
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US (2) | US20050006245A1 (ja) |
EP (1) | EP1649502A1 (ja) |
JP (1) | JP4771945B2 (ja) |
TW (1) | TW200506107A (ja) |
WO (1) | WO2005008759A1 (ja) |
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US20090120799A1 (en) | 2009-05-14 |
WO2005008759A1 (en) | 2005-01-27 |
US20050006245A1 (en) | 2005-01-13 |
EP1649502A1 (en) | 2006-04-26 |
TW200506107A (en) | 2005-02-16 |
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