JP4697412B2 - Switching power supply - Google Patents

Switching power supply Download PDF

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JP4697412B2
JP4697412B2 JP2005207373A JP2005207373A JP4697412B2 JP 4697412 B2 JP4697412 B2 JP 4697412B2 JP 2005207373 A JP2005207373 A JP 2005207373A JP 2005207373 A JP2005207373 A JP 2005207373A JP 4697412 B2 JP4697412 B2 JP 4697412B2
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circuit
power supply
capacitor
charging
switching
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修 大竹
利幸 山岸
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Sanken Electric Co Ltd
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本発明は、ＤＣ−ＤＣコンバータ又はインバータ等のスイッチング電源装置、特にブリッジ型のスイッチング回路を有するスイッチング電源装置に関する。   The present invention relates to a switching power supply device such as a DC-DC converter or an inverter, and more particularly to a switching power supply device having a bridge type switching circuit.

１次側のスイッチング回路がブリッジ型の構成を有するスイッチング電源装置は、従来から大容量のＤＣ−ＤＣコンバータ又はインバータ等の電源装置として広く用いられている。例えば、図４に示す従来のスイッチング電源装置は、直流電源(3)に対して直列に接続され且つ交互にオン・オフ駆動される第１及び第２のスイッチング素子としての第１及び第２のＭＯＳ-ＦＥＴ(1,2)と、第１のＭＯＳ-ＦＥＴ(1)と並列に且つ第２のＭＯＳ-ＦＥＴ(2)と直列に接続された電流共振用コンデンサ(4)及びトランス(5)の１次巻線(5a)の直列回路と、トランス(5)の２次巻線(5b,5c)に接続されて主直流出力電圧ＶOを発生する主整流平滑回路(6)と、第１及び第２のＭＯＳ-ＦＥＴ(1,2)を交互にオン・オフ駆動する制御回路(10)と、トランス(5)に設けられた第３の巻線(5d)に接続されて補助直流出力電圧ＶCCを発生する補助整流平滑回路(11)と、制御回路(10)内に設けられ且つトランス(5)の第３の巻線(5d)から補助整流平滑回路(11)を介して電力が供給される安定化電源回路(14)と、安定化電源回路(14)の出力端子と第１及び第２のＭＯＳ-ＦＥＴ(1,2)の接続点との間に直列に接続されたダイオード(16)、電流制限用抵抗(17)及び昇圧用コンデンサ(18)から成る昇圧回路(15)と、制御回路(10)内に設けられ且つ安定化電源回路(14)から電力が供給されて第１のＭＯＳ-ＦＥＴ(1)をオン・オフ駆動する第１の駆動信号ＶG1を出力する第１の駆動回路(19)と、制御回路(10)内に設けられ且つ昇圧回路(15)の昇圧用コンデンサ(18)から電力が供給されて第２のＭＯＳ-ＦＥＴ(2)をオン・オフ駆動する第２の駆動信号ＶG2を出力する第２の駆動回路(20)と、安定化電源回路(14)の出力端子と１次側接地端子との間に接続された保持用コンデンサ(21)とを備えている。主整流平滑回路(6)は、トランス(5)の２次巻線(5b,5c)にそれぞれ接続された２つの主整流ダイオード(7,8)と、２つの主整流ダイオード(7,8)のカソードと２次巻線(5b,5c)の中間タップとの間に接続された主平滑コンデンサ(9)とから構成される。補助整流平滑回路(11)は、トランス(5)の第３の巻線(5d)に接続された補助整流ダイオード(12)と、補助整流ダイオード(12)のカソードと１次側接地端子との間に接続された補助平滑コンデンサ(13)とから構成される。なお、図示は省略するが、制御回路(10)内の第１及び第２の駆動回路(19,20)の前段には、例えば主整流平滑回路(6)から出力される主直流出力電圧ＶOに応じてパルス幅が変化するＰＷＭ（パルス幅変調）信号を第１及び第２の駆動回路(19,20)に出力するＰＷＭ変調回路が接続される。 A switching power supply device in which a primary-side switching circuit has a bridge configuration has been widely used as a power supply device for a large-capacity DC-DC converter or an inverter. For example, the conventional switching power supply device shown in FIG. 4 is connected in series to the DC power supply (3) and is turned on / off alternately, and the first and second switching elements are first and second switching elements. MOS-FET (1, 2), current resonance capacitor (4) and transformer (5) connected in parallel with the first MOS-FET (1) and in series with the second MOS-FET (2) A primary circuit (6a) connected to the secondary windings (5b, 5c) of the transformer (5) to generate the main DC output voltage V O , Auxiliary DC connected to a control circuit (10) for alternately turning on and off the first and second MOS-FETs (1, 2) and a third winding (5d) provided in the transformer (5) Auxiliary rectifying / smoothing circuit (11) for generating output voltage V CC and a third winding (5d) of transformer (5) provided in control circuit (10) through auxiliary rectifying / smoothing circuit (11) Power is supplied Stabilized power supply circuit (14), and diode (16) connected in series between the output terminal of the stabilized power supply circuit (14) and the connection point of the first and second MOS-FETs (1, 2) A booster circuit (15) comprising a current limiting resistor (17) and a booster capacitor (18), and a first power circuit provided in the control circuit (10) and supplied with power from the stabilized power supply circuit (14). A first drive circuit (19) for outputting a first drive signal VG1 for driving the MOS-FET (1) on and off, and a booster circuit (15) provided in the control circuit (10) A second drive circuit (20) that outputs a second drive signal V G2 that is supplied with electric power from the capacitor (18) to drive the second MOS-FET (2) on and off, and a stabilized power supply circuit ( And 14) a holding capacitor (21) connected between the output terminal and the primary side ground terminal. The main rectifying / smoothing circuit (6) includes two main rectifying diodes (7, 8) and two main rectifying diodes (7, 8) connected to the secondary windings (5b, 5c) of the transformer (5). And a main smoothing capacitor (9) connected between the cathode and the intermediate tap of the secondary winding (5b, 5c). The auxiliary rectifying / smoothing circuit (11) includes an auxiliary rectifying diode (12) connected to the third winding (5d) of the transformer (5), a cathode of the auxiliary rectifying diode (12), and a primary side ground terminal. And an auxiliary smoothing capacitor (13) connected therebetween. Although not shown, the main DC output voltage V output from the main rectifying / smoothing circuit (6) is provided, for example, before the first and second drive circuits (19, 20) in the control circuit (10). A PWM modulation circuit for outputting a PWM (pulse width modulation) signal whose pulse width changes according to O to the first and second drive circuits (19, 20) is connected.

図４に示す構成において、第２のＭＯＳ-ＦＥＴ(2)がオンすると、電流共振用コンデンサ(4)とトランス(5)の１次巻線(5a)のインダクタンスによる共振電流が励磁電流として流れ、電流共振用コンデンサ(4)とトランス(5)の１次巻線(5a)の図示しない漏洩インダクタンスによる共振電流が２次巻線(5b,5c)に伝達される。第２のＭＯＳ-ＦＥＴ(2)がオフし、第１のＭＯＳ-ＦＥＴ(1)がオンすると、第２のＭＯＳ-ＦＥＴ(2)のオン期間中に電流共振用コンデンサ(4)とトランス(5)の１次巻線(5a)に蓄積されたエネルギが第１のＭＯＳ-ＦＥＴ(1)を介して放出される。このとき、第１のＭＯＳ-ＦＥＴ(1)、電流共振用コンデンサ(4)及びトランス(5)の１次巻線(5a)で構成される閉回路に流れる電流は、電流共振用コンデンサ(4)とトランス(5)の１次巻線(5a)のインダクタンスによる共振電流と、トランス(5)の２次巻線(5b,5c)に伝達される電流共振用コンデンサ(4)と図示しない漏洩インダクタンスによる共振電流との合成電流となる。これにより、トランス(5)の２次巻線(5b,5c)から主整流平滑回路(6)の各主整流ダイオード(7,8)を介して主平滑コンデンサ(9)の両端に主直流出力電圧ＶOが発生する。更に、主直流出力電圧ＶOに応じてパルス幅が変化するＰＷＭ信号が制御回路(10)内の図示しないＰＷＭ変調回路から第１及び第２の駆動回路(19,20)に入力され、第１及び第２のＭＯＳ-ＦＥＴ(1,2)の各ゲートに第１及び第２の駆動信号ＶG1,ＶG2が付与される。これにより、第１及び第２のＭＯＳ-ＦＥＴ(1,2)が主直流出力電圧ＶOに応じて交互にオン・オフ駆動され、主整流平滑回路(6)から出力される主直流出力電圧ＶOが略一定レベルに制御される。 In the configuration shown in FIG. 4, when the second MOS-FET (2) is turned on, a resonance current due to the inductance of the primary winding (5a) of the current resonance capacitor (4) and the transformer (5) flows as an excitation current. The resonance current due to the leakage inductance (not shown) of the current resonance capacitor (4) and the primary winding (5a) of the transformer (5) is transmitted to the secondary windings (5b, 5c). When the second MOS-FET (2) is turned off and the first MOS-FET (1) is turned on, the current resonance capacitor (4) and the transformer ( The energy stored in the primary winding (5a) of 5) is released through the first MOS-FET (1). At this time, the current flowing in the closed circuit composed of the first MOS-FET (1), the current resonance capacitor (4) and the primary winding (5a) of the transformer (5) is the current resonance capacitor (4 ) And the resonance current due to the inductance of the primary winding (5a) of the transformer (5), the current resonance capacitor (4) transmitted to the secondary winding (5b, 5c) of the transformer (5) and the leakage (not shown) It becomes a combined current with the resonance current due to the inductance. As a result, the main DC output is applied to both ends of the main smoothing capacitor (9) from the secondary winding (5b, 5c) of the transformer (5) via the main rectifier diodes (7, 8) of the main rectifier smoothing circuit (6). A voltage V O is generated. Further, a PWM signal whose pulse width changes according to the main DC output voltage V O is input from a PWM modulation circuit (not shown) in the control circuit (10) to the first and second drive circuits (19, 20), First and second drive signals V G1 and V G2 are applied to the gates of the first and second MOS-FETs (1, 2). As a result, the first and second MOS-FETs (1, 2) are alternately turned on and off according to the main DC output voltage V O , and the main DC output voltage output from the main rectifying and smoothing circuit (6). V O is controlled to a substantially constant level.

第１及び第２のＭＯＳ-ＦＥＴ(1,2)のオン・オフにより、トランス(5)の第３の巻線(5d)に電圧が発生し、補助整流平滑回路(11)の補助整流ダイオード(12)及び補助平滑コンデンサ(13)を介して制御回路(10)の駆動電源入力端子(VCC)に補助直流出力電圧ＶCCが印加される。これにより、制御回路(10)内の安定化電源回路(14)が駆動され、安定化電源回路(14)から一定レベルの駆動電圧ＶDが出力される。安定化電源回路(14)からの駆動電圧ＶDは、図示しないＰＷＭ変調回路及び第１の駆動回路(19)に供給され、ＰＷＭ変調回路及び第１の駆動回路(19)が駆動される。これにより、第１の駆動回路(19)から第１のＭＯＳ-ＦＥＴ(1)のゲートに第１の駆動信号ＶG1が付与され、第１のＭＯＳ-ＦＥＴ(1)がオン・オフ駆動される。また、安定化電源回路(14)の駆動電圧ＶDにより保持用コンデンサ(21)が略同一の電圧ＶDに充電され、第２のＭＯＳ-ＦＥＴ(2)がオフで第１のＭＯＳ-ＦＥＴ(1)がオンのとき、保持用コンデンサ(21)から昇圧回路(15)内のダイオード(16)及び電流制限用抵抗(17)を介して昇圧用コンデンサ(18)に充電電流が流れる。これにより、昇圧用コンデンサ(18)が安定化電源回路(14)の駆動電圧ＶDよりも高電位の電圧ＶC1（＝ＶB−ＶS）に充電されるため、昇圧用コンデンサ(18)の充電電圧ＶC1が制御回路(10)のハイサイド電源入力端子(VB)及びスイッチング出力端子(VS)を介して第２の駆動回路(20)に印加され、第２の駆動回路(20)が駆動される。これにより、第２の駆動回路(20)から第２のＭＯＳ-ＦＥＴ(2)のゲートに第２の駆動信号ＶG2が付与され、第２のＭＯＳ-ＦＥＴ(2)がオン・オフ駆動される。このときの第１及び第２のＭＯＳ-ＦＥＴ(1,2)の接続点の電圧ＶSと昇圧用コンデンサ(18)の両端の電圧ＶC1を図５(Ａ)及び(Ｂ)にそれぞれ示す。 By turning on and off the first and second MOS-FETs (1, 2), a voltage is generated in the third winding (5d) of the transformer (5), and the auxiliary rectifying diode of the auxiliary rectifying and smoothing circuit (11). The auxiliary DC output voltage V CC is applied to the drive power input terminal (V CC ) of the control circuit (10) via (12) and the auxiliary smoothing capacitor (13). As a result, the stabilized power supply circuit (14) in the control circuit (10) is driven, and a drive voltage V D at a constant level is output from the stabilized power supply circuit (14). The drive voltage V D from the stabilized power supply circuit (14) is supplied to a PWM modulation circuit and a first drive circuit (19) (not shown), and the PWM modulation circuit and the first drive circuit (19) are driven. As a result, the first drive signal V G1 is applied from the first drive circuit (19) to the gate of the first MOS-FET (1), and the first MOS-FET (1) is turned on / off. The The holding capacitor by the drive voltage V D of the stabilized power supply circuit (14) (21) is charged to substantially the same voltage V D, the first MOS-FET a second MOS-FET (2) is off When (1) is on, a charging current flows from the holding capacitor (21) to the boosting capacitor (18) through the diode (16) and the current limiting resistor (17) in the boosting circuit (15). As a result, the boosting capacitor (18) is charged to a voltage V C1 (= V B −V S ) having a higher potential than the drive voltage V D of the stabilized power supply circuit (14). charging voltage V C1 is applied to the second driving circuit through the high side power supply terminal (V B) and the switching output terminal of the control circuit (10) to (V S) (20) of the second drive circuit ( 20) is driven. As a result, the second drive signal V G2 is applied from the second drive circuit (20) to the gate of the second MOS-FET (2), and the second MOS-FET (2) is driven on and off. The 5A and 5B show the voltage V S at the connection point of the first and second MOS-FETs (1, 2) and the voltage V C1 at both ends of the boost capacitor 18 at this time, respectively. .

即ち、第１のＭＯＳ-ＦＥＴ(1)がオンで第２のＭＯＳ-ＦＥＴ(2)がオフのときは、図５(Ａ)に示すように第１及び第２のＭＯＳ-ＦＥＴ(1,2)の接続点の電圧ＶSが０Ｖとなり、昇圧用コンデンサ(18)が充電されるため、図５(Ｂ)に示すように昇圧用コンデンサ(18)の両端の電圧ＶC1が直線的に上昇する。次に、第１のＭＯＳ-ＦＥＴ(1)がオフして第２のＭＯＳ-ＦＥＴ(2)がオンになると、図５(Ａ)に示すように第１及び第２のＭＯＳ-ＦＥＴ(1,2)の接続点の電圧ＶSが高い電圧(Ｈ)レベルとなり、昇圧用コンデンサ(18)の電圧ＶC1により第２の駆動回路(20)が駆動されるため、図５(Ｂ)に示すように昇圧用コンデンサ(18)の両端の電圧ＶC1が指数関数的に低下するが、第２の駆動回路(20)を駆動するために必要な閾値電圧ＶTH（例えば、ＶTH:１２Ｖ程度）以下には低下せず、第１及び第２のＭＯＳ-ＦＥＴ(1,2)が交互に連続してオン・オフ駆動される。 That is, when the first MOS-FET (1) is on and the second MOS-FET (2) is off, the first and second MOS-FETs (1, 1) as shown in FIG. Since the voltage V S at the connection point 2) becomes 0V and the boosting capacitor 18 is charged, the voltage V C1 across the boosting capacitor 18 is linearly shown in FIG. 5B. To rise. Next, when the first MOS-FET (1) is turned off and the second MOS-FET (2) is turned on, the first and second MOS-FETs (1) are turned on as shown in FIG. , the voltage V S at the connection point of 2) becomes a high voltage (H) level, the second driving circuit (20) is driven by the boosted voltage V C1 of the capacitor (18), in FIG. 5 (B) As shown, the voltage V C1 across the boost capacitor 18 decreases exponentially, but the threshold voltage V TH (for example, V TH : 12V) necessary for driving the second drive circuit 20 is shown. The first and second MOS-FETs (1, 2) are alternately and continuously driven on and off.

上記の類のスイッチング素子の駆動方式は、２つのスイッチング素子を直列に接続して交互にオン・オフする構成のスイッチング回路では良く知られており、例えば下記に示す特許文献１には、図４に示すスイッチング電源装置と略類似の構成のスイッチング回路を有するインバータ回路が開示されている。   The above-described switching element driving method is well known in a switching circuit having a configuration in which two switching elements are connected in series and alternately turned on and off. For example, in Patent Document 1 shown below, FIG. An inverter circuit having a switching circuit having a configuration substantially similar to that of the switching power supply device shown in FIG.

特開平５−３８１６０号公報（第６頁、図３）Japanese Patent Laid-Open No. 5-38160 (page 6, FIG. 3)

近年、ＤＣ−ＤＣコンバータやインバータ等のスイッチング電源装置では、消費電力の低減、特に負荷待機時等の軽負荷時における消費電力の低減が強く要求されている。このため、例えば図４に示す従来のスイッチング電源装置では、負荷待機時等の軽負荷時に第１及び第２のＭＯＳ-ＦＥＴ(1,2)のオン・オフ動作を断続的に行う間欠発振動作（バースト動作）により消費電力を低減する場合が多い。この場合、図６(Ａ)及び(Ｂ)に示すように、第１及び第２のＭＯＳ-ＦＥＴ(1,2)のオン・オフ動作、即ち発振動作の休止期間中に昇圧回路(15)内の昇圧用コンデンサ(18)の電圧ＶC1が制御回路(10)内の第２の駆動回路(20)の閾値電圧ＶTH（例えば、ＶTH:１２Ｖ程度）以下に低下することがあるため、発振動作の再開時に第２のＭＯＳ-ＦＥＴ(2)をオンできないことがあった。このため、発振休止期間経過後に第１及び第２のＭＯＳ-ＦＥＴ(1,2)のオン・オフ動作を迅速に再開できない問題があった。この問題を解消するために、昇圧回路(15)内の昇圧用コンデンサ(18)の静電容量を大きくして充電電圧ＶC1を高くする場合も考えられるが、この場合は充電時の時定数が大きくなり、昇圧用コンデンサ(18)を短時間で必要十分な電圧に充電できない問題が生じる。また、制御回路(10)内の安定化電源回路(14)の出力容量を大きくする必要があり、制御回路(10)を集積化する際に半導体チップが大形となり、製造コストが高騰する問題が生じる。 In recent years, switching power supply devices such as DC-DC converters and inverters have been strongly demanded to reduce power consumption, particularly at light loads such as when the load is on standby. For this reason, for example, in the conventional switching power supply device shown in FIG. 4, the intermittent oscillation operation in which the first and second MOS-FETs (1, 2) are intermittently turned on / off at a light load such as in a standby state of the load. (Burst operation) often reduces power consumption. In this case, as shown in FIGS. 6 (A) and 6 (B), the booster circuit (15) during the on / off operation of the first and second MOS-FETs (1, 2), that is, the quiescent period of the oscillation operation. The voltage V C1 of the boosting capacitor (18) in the internal circuit may drop to a threshold voltage V TH (for example, V TH : about 12V) of the second drive circuit (20) in the control circuit (10). When the oscillation operation is restarted, the second MOS-FET (2) may not be turned on. For this reason, there is a problem that the on / off operation of the first and second MOS-FETs (1, 2) cannot be resumed quickly after the oscillation suspension period has elapsed. To solve this problem, it may be possible to increase the charging voltage V C1 by increasing the capacitance of the boosting capacitor (18) in the boosting circuit (15). As a result, the problem arises that the boosting capacitor (18) cannot be charged to a necessary and sufficient voltage in a short time. In addition, it is necessary to increase the output capacity of the stabilized power supply circuit (14) in the control circuit (10), and when the control circuit (10) is integrated, the semiconductor chip becomes large and the manufacturing cost increases. Occurs.

そこで、本発明では、発振休止期間経過後にスイッチング素子のオン・オフ動作を迅速に再開することができるスイッチング電源装置を提供することを目的とする。   Therefore, an object of the present invention is to provide a switching power supply device that can quickly restart the on / off operation of the switching element after the oscillation suspension period has elapsed.

本発明によるスイッチング電源装置は、直流電源(3)に対して直列に接続され且つ交互にオン・オフ駆動される第１のスイッチング素子(1)及び第２のスイッチング素子(2)と、第１のスイッチング素子(1)に並列に且つ第２のスイッチング素子(2)に直列に接続されたトランス(5)の１次巻線(5a)と、トランス(5)の２次巻線(5b)に接続されて主直流出力ＶOを発生する主整流平滑回路(6)と、トランス(5)に設けられた第３の巻線(5d)に接続されて補助直流出力ＶCCを発生する補助整流平滑回路(11)と、トランス(5)の第３の巻線(5d)から補助整流平滑回路(11)を介して電力が供給される安定化電源回路(14)と、安定化電源回路(14)から電力が供給されて第１のスイッチング素子(1)を駆動する第１の駆動回路(19)と、第２のスイッチング素子(2)を駆動する第２の駆動回路(20)とを備える。このスイッチング電源装置では、安定化電源回路(14)に接続された保持用コンデンサ(21)と、第１のスイッチング素子(1)及び第２のスイッチング素子(2)の接続点と安定化電源回路(14)及び保持用コンデンサ(21)の接続点との間に接続された昇圧用コンデンサ(18)と、制御端子が前記保持用コンデンサ(21)に接続され且つ入力端子が前記補助整流平滑回路(11)又は他の直流電源に接続されたドロッパ回路(22)と、ドロッパ回路(22)の出力端子に接続された充電用コンデンサ(23)と、充電用コンデンサ(23)と昇圧用コンデンサ(18)との間に接続された逆流阻止用整流素子(24)とを備え、安定化電源回路(14)と昇圧用コンデンサ(18)との接続点を第２の駆動回路(20)に接続すると共に、補助整流平滑回路(11)又は他の直流電源からドロッパ回路(22)を介して充電用コンデンサ(23)に充電電流を供給する。 The switching power supply device according to the present invention includes a first switching element (1) and a second switching element (2) connected in series to a DC power supply (3) and alternately turned on / off, and a first switching element (1). The primary winding (5a) of the transformer (5) connected in parallel to the switching element (1) and in series with the second switching element (2), and the secondary winding (5b) of the transformer (5) Is connected to the main rectifying and smoothing circuit (6) for generating the main DC output V O and the auxiliary winding for generating the auxiliary DC output V CC is connected to the third winding (5d) provided in the transformer (5). A rectifying / smoothing circuit (11), a stabilized power circuit (14) in which power is supplied from the third winding (5d) of the transformer (5) via the auxiliary rectifying / smoothing circuit (11), and a stabilized power circuit The first drive circuit (19) for driving the first switching element (1) when power is supplied from (14), and the second drive circuit (20) for driving the second switching element (2) Equipped with a. In this switching power supply device, the holding capacitor (21) connected to the stabilized power circuit (14), the connection point between the first switching element (1) and the second switching element (2), and the stabilized power circuit. (14) and the capacitor for boosting (18) connected between the connecting point of the holding capacitor (21), the control terminal is connected to the holding capacitor (21), and the input terminal is the auxiliary rectifying / smoothing circuit (11) or a dropper circuit (22) connected to another DC power source, a charging capacitor (23) connected to the output terminal of the dropper circuit (22), a charging capacitor (23), and a boosting capacitor ( 18) and a rectifying element (24) for preventing a backflow connected to the second driving circuit (20) at the connection point between the stabilized power supply circuit (14) and the boosting capacitor (18). And a charging capacitor (11) from the auxiliary rectifying / smoothing circuit (11) or other DC power source via the dropper circuit (22). Supply charging current to 23).

連続発振動作時に、安定化電源回路(14)から保持用コンデンサ(21)を介して昇圧用コンデンサ(18)が充電され、昇圧用コンデンサ(18)から第２の駆動回路(20)に電力が供給されて第２のスイッチング素子(2)が駆動されると共に、充電用コンデンサ(23)は補助整流平滑回路(11)又は他の直流電源からドロッパ回路(22)を介して流れる電流により充電される。間欠発振動作時に、第１のスイッチング素子(1)と第２のスイッチング素子(2)のオン動作が長期間休止すると、保持用コンデンサ(21)の電圧ＶDが充電用コンデンサ(23)の電圧ＶC2よりも低下するので、充電用コンデンサ(23)から逆流阻止用整流素子(24)を通じて昇圧用コンデンサ(18)に充電電流が流れ、昇圧用コンデンサ(18)が短時間で充電される。このため、発振休止期間経過後に第１のスイッチング素子(1)と第２のスイッチング素子(2)のオン・オフ動作を迅速に再開することができる。 During the continuous oscillation operation, the boosting capacitor (18) is charged from the stabilized power supply circuit (14) via the holding capacitor (21), and power is supplied from the boosting capacitor (18) to the second drive circuit (20). The second switching element (2) is driven and the charging capacitor (23) is charged by the current flowing through the dropper circuit (22) from the auxiliary rectifying / smoothing circuit (11) or other DC power source. The When the ON operation of the first switching element (1) and the second switching element (2) is suspended for a long time during the intermittent oscillation operation, the voltage V D of the holding capacitor (21) becomes the voltage of the charging capacitor (23). Since it is lower than V C2 , a charging current flows from the charging capacitor (23) to the boosting capacitor (18) through the backflow blocking rectifier element (24), and the boosting capacitor (18) is charged in a short time. Therefore, the on / off operation of the first switching element (1) and the second switching element (2) can be quickly restarted after the oscillation pause period has elapsed.

本発明によれば、発振休止期間経過後にスイッチング素子のオン・オフ動作を迅速に再開することができるので、スイッチング電源装置の間欠発振動作時におけるスイッチング動作を安定化することが可能となる。   According to the present invention, since the on / off operation of the switching element can be promptly resumed after the oscillation suspension period has elapsed, the switching operation during the intermittent oscillation operation of the switching power supply device can be stabilized.

以下、本発明によるスイッチング電源装置の３つの実施形態を図１〜図３に基づいて説明する。但し、これらの図面では、図４に示す箇所と実質的に同一の部分には同一の符号を付し、その説明を省略する。   Hereinafter, three embodiments of a switching power supply device according to the present invention will be described with reference to FIGS. However, in these drawings, substantially the same parts as those shown in FIG. 4 are denoted by the same reference numerals, and description thereof is omitted.

本発明の第１の実施形態を示す実施例１のスイッチング電源装置は、図１に示すように、ベースが保持用コンデンサ(21)に接続され且つコレクタが電流制限抵抗(25)を介して補助整流平滑回路(11)の補助平滑コンデンサ(12)に接続されたドロッパ回路としてのＮＰＮトランジスタ(22)と、ＮＰＮトランジスタ(22)のエミッタと１次側接地端子との間に接続された充電用コンデンサ(23)と、充電用コンデンサ(23)と昇圧回路(15)内の昇圧用コンデンサ(18)との間に接続された逆流阻止用整流素子としての逆流阻止用ダイオード(24)とを備えた充電回路(26)を図４に示す補助整流平滑回路(11)と昇圧回路(15)との間に接続したものである。その他の構成は、図４に示す従来のスイッチング電源装置と略同様である。   As shown in FIG. 1, in the switching power supply of Example 1 showing the first embodiment of the present invention, the base is connected to the holding capacitor (21) and the collector is assisted through the current limiting resistor (25). An NPN transistor (22) as a dropper circuit connected to the auxiliary smoothing capacitor (12) of the rectifying / smoothing circuit (11), and for charging connected between the emitter of the NPN transistor (22) and the primary side ground terminal A capacitor (23), and a backflow blocking diode (24) as a backflow blocking rectifier connected between the charging capacitor (23) and the boosting capacitor (18) in the boosting circuit (15). The charging circuit (26) is connected between the auxiliary rectifying / smoothing circuit (11) and the booster circuit (15) shown in FIG. Other configurations are substantially the same as those of the conventional switching power supply device shown in FIG.

図１に示す構成において、保持用コンデンサ(21)は制御回路(10)内の安定化電源回路(14)の出力電圧ＶDにより充電され、充電回路(26)内の充電用コンデンサ(23)は安定化電源回路(14)の出力電圧ＶDからＮＰＮトランジスタ(22)のベース−エミッタ間電圧だけ低い電圧ＶC2で充電される。したがって、保持用コンデンサ(21)の電圧ＶDが充電用コンデンサ(23)の電圧ＶC2より高いため、通常の連続発振動作時において第１のＭＯＳ-ＦＥＴ(1)がオンしたときは、保持用コンデンサ(21)から昇圧回路(15)内のダイオード(16)及び電流制限用抵抗(17)を介して昇圧用コンデンサ(18)に充電電流が流れ、昇圧用コンデンサ(18)が充電される。昇圧用コンデンサ(18)の充電電圧ＶC1（＝ＶB−ＶS）は、制御回路(10)内の第２の駆動回路(20)に印加されて第２の駆動回路(20)が駆動され、第１のＭＯＳ-ＦＥＴ(1)がオフしたときに第２のＭＯＳ-ＦＥＴ(2)をオンする。これと共に、補助整流平滑回路(11)から電流制限用抵抗(25)、ＮＰＮトランジスタ(22)のコレクタ及びエミッタを介して流れる電流により充電用コンデンサ(23)が引き続き充電され、前記電圧ＶC2を一定レベルに保持する。再び、第２のＭＯＳ-ＦＥＴ(2)がオフして第１のＭＯＳ-ＦＥＴ(1)がオンするとき、保持用コンデンサ(21)から昇圧回路(15)内のダイオード(16)及び電流制限用抵抗(17)を介して昇圧用コンデンサ(18)に充電電流が流れて昇圧用コンデンサ(18)が再び充電され、第２の駆動回路(20)を駆動する。通常の連続発振動作時では、昇圧用コンデンサ(18)の充電電圧ＶC1により第２の駆動回路(20)が駆動され、昇圧用コンデンサ(18)の両端の電圧ＶC1が指数関数的に低下するが、第２の駆動回路(20)を駆動するために必要な閾値電圧ＶTH（例えば、ＶTH:１２Ｖ程度）以下には低下せず、第１及び第２のＭＯＳ-ＦＥＴ(1,2)が交互に連続してオン・オフ駆動される。 In the configuration shown in FIG. 1, the holding capacitor (21) is charged by the output voltage V D of the stabilized power circuit (14) in the control circuit (10), and the charging capacitor (23) in the charging circuit (26). Is charged with a voltage V C2 that is lower than the output voltage V D of the stabilized power supply circuit 14 by the base-emitter voltage of the NPN transistor 22. Accordingly, since the voltage V D of the holding capacitor (21) is higher than the voltage V C2 of the charging capacitor (23), the voltage is held when the first MOS-FET (1) is turned on during normal continuous oscillation operation. The charging current flows from the capacitor (21) to the boosting capacitor (18) through the diode (16) and the current limiting resistor (17) in the boosting circuit (15), and the boosting capacitor (18) is charged. . The charging voltage V C1 (= V B −V S ) of the boosting capacitor (18) is applied to the second driving circuit (20) in the control circuit (10) to drive the second driving circuit (20). When the first MOS-FET (1) is turned off, the second MOS-FET (2) is turned on. At the same time, the charging capacitor (23) is continuously charged by the current flowing from the auxiliary rectifying / smoothing circuit (11) through the current limiting resistor (25), the collector and emitter of the NPN transistor (22), and the voltage V C2 is reduced. Hold at a certain level. Again, when the second MOS-FET (2) is turned off and the first MOS-FET (1) is turned on, the holding capacitor (21) to the diode (16) in the booster circuit (15) and the current limiter A charging current flows to the boosting capacitor (18) via the resistor (17), and the boosting capacitor (18) is charged again to drive the second drive circuit (20). During normal continuous operation, the second drive circuit (20) is driven by the charge voltage V C1 of the boost capacitor (18), and the voltage V C1 across the boost capacitor (18) decreases exponentially. However, the first and second MOS-FETs (1, 2) do not drop below the threshold voltage V TH (for example, V TH : about 12 V) necessary for driving the second drive circuit (20). 2) is continuously turned on and off alternately.

無負荷時や軽負荷時等で第１及び第２のＭＯＳ-ＦＥＴ(1,2)が間欠発振動作となり、第１のＭＯＳ-ＦＥＴ(1)と第２のＭＯＳ-ＦＥＴ(2)のオン動作が長期間休止すると、保持用コンデンサ(21)の電圧ＶDが充電回路(26)内の充電用コンデンサ(23)の電圧ＶC2よりも低下してＮＰＮトランジスタ(22)がオフとなるため、昇圧回路(15)内の昇圧用コンデンサ(18)の電圧ＶC1が充電回路(26)内の充電用コンデンサ(23)の電圧ＶC2と逆流阻止用ダイオード(24)の順方向電圧降下との差電圧よりも低下したとき、充電用コンデンサ(23)から逆流阻止用ダイオード(24)を通じて昇圧用コンデンサ(18)に充電電流が流れる。これにより、昇圧回路(15)内の昇圧用コンデンサ(18)が短時間で第２の駆動回路(20)を駆動するために必要な閾値電圧ＶTHまで充電される。即ち、第１のＭＯＳ-ＦＥＴ(1)と第２のＭＯＳ-ＦＥＴ(2)のオン動作が長期間休止して保持用コンデンサ(21)の電圧ＶDが低下しても、充電回路(26)内の充電用コンデンサ(23)から逆流阻止用ダイオード(24)を通じて昇圧用コンデンサ(18)が速やかに充電されるので、第１及び第２のＭＯＳ-ＦＥＴ(1,2)のオン動作の休止期間がより長期間に亘る場合でも、昇圧回路(15)内の昇圧用コンデンサ(18)の両端の電圧ＶC1が第２の駆動回路(20)の閾値電圧ＶTHまで低下しない。このため、第１及び第２のＭＯＳ-ＦＥＴ(1,2)のオン動作の休止期間が経過した後に第１のＭＯＳ-ＦＥＴ(1)及び第２のＭＯＳ-ＦＥＴ(2)のオン・オフ動作を迅速に再開することができる。なお、昇圧回路(15)内の昇圧用コンデンサ(18)の静電容量を大きくすれば、間欠発振動作時でも昇圧用コンデンサ(18)の電圧低下が少なくなり、第１及び第２のＭＯＳ-ＦＥＴ(1,2)のオン動作をより長期間休止させることができるが、その分だけ昇圧用コンデンサ(18)の充電時間が長くなるため、起動時又は間欠発振動作での動作再開時等では、第２の駆動回路(20)の駆動電圧が不足して再起動できなくなる可能性がある。一方、起動時又は通常動作時において、充電回路(26)内の充電用コンデンサ(23)の電圧ＶC2は保持用コンデンサ(21)の電圧ＶDよりもＮＰＮトランジスタ(22)のベース−エミッタ間の電圧だけ低いので、起動時又は通常動作時は保持用コンデンサ(21)の電圧ＶDにより昇圧用コンデンサ(18)が充電され、充電用コンデンサ(23)の電圧ＶC2は昇圧用コンデンサ(18)の充電には何等も寄与しない。したがって、充電用コンデンサ(23)の静電容量を大きくすることにより、間欠発振動作時における第１及び第２のＭＯＳ-ＦＥＴ(1,2)のオン動作の休止期間をより延長することが可能となる。 The first and second MOS-FETs (1, 2) operate intermittently when no load or light load is applied, and the first MOS-FET (1) and the second MOS-FET (2) are turned on. When the operation is stopped for a long time, the voltage V D of the holding capacitor (21) is lower than the voltage V C2 of the charging capacitor (23) in the charging circuit (26) and the NPN transistor (22) is turned off. The voltage V C1 of the boosting capacitor (18) in the boosting circuit (15) is equal to the voltage V C2 of the charging capacitor (23) in the charging circuit (26) and the forward voltage drop of the reverse current blocking diode (24). The charging current flows from the charging capacitor (23) to the boosting capacitor (18) through the reverse current blocking diode (24). As a result, the boosting capacitor (18) in the booster circuit (15) is charged to the threshold voltage V TH necessary for driving the second drive circuit (20) in a short time. That is, even if the ON operation of the first MOS-FET (1) and the second MOS-FET (2) is suspended for a long time and the voltage V D of the holding capacitor (21) decreases, the charging circuit (26 ), The boosting capacitor (18) is quickly charged from the charging capacitor (23) through the backflow prevention diode (24), so that the first and second MOS-FETs (1, 2) are turned on. Even when the pause period is longer, the voltage V C1 across the boosting capacitor (18) in the booster circuit (15) does not drop to the threshold voltage VTH of the second drive circuit (20). For this reason, the first MOS-FET (1) and the second MOS-FET (2) are turned on / off after the on-operation pause period of the first and second MOS-FETs (1, 2) has elapsed. The operation can be resumed quickly. If the capacitance of the boosting capacitor (18) in the boosting circuit (15) is increased, the voltage drop of the boosting capacitor (18) is reduced even during the intermittent oscillation operation, and the first and second MOS- The on-operation of the FET (1, 2) can be paused for a longer period, but the charging time of the boost capacitor (18) becomes longer by that much, so at the time of start-up or when restarting operation in intermittent oscillation operation, etc. There is a possibility that the driving voltage of the second driving circuit (20) is insufficient and cannot be restarted. On the other hand, during start-up or normal operation, the voltage V C2 of the charging capacitor (23) in the charging circuit (26) is higher than the voltage V D of the holding capacitor (21) between the base and emitter of the NPN transistor (22). Therefore, during start-up or normal operation, the boost capacitor (18) is charged by the voltage V D of the holding capacitor (21), and the voltage V C2 of the charge capacitor (23) is the boost capacitor (18 ) Will not contribute to the charging. Therefore, by increasing the capacitance of the charging capacitor (23), it is possible to further extend the pause period of the ON operation of the first and second MOS-FETs (1, 2) during the intermittent oscillation operation. It becomes.

実施例１では、連続発振動作時に、安定化電源回路(14)から保持用コンデンサ(21)を介して昇圧回路(15)内の昇圧用コンデンサ(18)が充電され、昇圧用コンデンサ(18)から制御回路(10)内の第２の駆動回路(20)に駆動電力が供給されて第２のＭＯＳ-ＦＥＴ(2)がオン駆動されると共に、充電回路(26)内の充電用コンデンサ(23)は補助整流平滑回路(11)から電流制限用抵抗(25)及びＮＰＮトランジスタ(22)を介して流れる電流により充電される。また、間欠発振動作時に、第１及び第２のＭＯＳ-ＦＥＴ(1,2)のオン動作が長期間休止すると、保持用コンデンサ(21)の電圧ＶDが充電用コンデンサ(23)の電圧ＶC2よりも低下するので、充電用コンデンサ(23)から逆流阻止用ダイオード(24)を通じて昇圧用コンデンサ(18)に充電電流が流れ、昇圧用コンデンサ(18)が短時間で充電される。このため、発振動作の休止期間が経過した後に第１及び第２のＭＯＳ-ＦＥＴ(1,2)のオン・オフ動作を迅速に再開することができる。したがって、スイッチング電源装置の間欠発振動作時におけるスイッチング動作を安定化することが可能となる。 In the first embodiment, during the continuous oscillation operation, the boosting capacitor (18) in the booster circuit (15) is charged from the stabilized power supply circuit (14) via the holding capacitor (21), and the boosting capacitor (18) is charged. Drive power is supplied to the second drive circuit (20) in the control circuit (10) to turn on the second MOS-FET (2) and the charging capacitor (26) in the charging circuit (26) 23) is charged by the current flowing from the auxiliary rectifying / smoothing circuit (11) through the current limiting resistor (25) and the NPN transistor (22). Further, when the ON operation of the first and second MOS-FETs (1, 2) is suspended for a long time during the intermittent oscillation operation, the voltage V D of the holding capacitor (21) becomes the voltage V of the charging capacitor (23). Since it is lower than C2 , a charging current flows from the charging capacitor (23) to the boosting capacitor (18) through the backflow prevention diode (24), and the boosting capacitor (18) is charged in a short time. Therefore, the on / off operation of the first and second MOS-FETs (1, 2) can be quickly restarted after the quiescent period of the oscillation operation has elapsed. Therefore, the switching operation during the intermittent oscillation operation of the switching power supply device can be stabilized.

図１に示す実施例１のスイッチング電源装置は変更が可能である。例えば、本発明の第２の実施形態を示す実施例２のスイッチング電源装置は、図２に示すように、図１に示すトランス(5)の第３の巻線(5d)に他の補助整流ダイオード(31)及び他の補助平滑コンデンサ(32)から成る他の補助整流平滑回路(30)を接続し、ＮＰＮトランジスタ(22)のコレクタを電流制限用抵抗(25)を介して他の補助整流平滑回路(30)を構成する他の補助平滑コンデンサ(32)に接続したものである。その他の構成は、図１に示す実施例１のスイッチング電源装置と略同様である。   The switching power supply device according to the first embodiment shown in FIG. 1 can be changed. For example, in the switching power supply of Example 2 showing the second embodiment of the present invention, as shown in FIG. 2, another auxiliary rectification is applied to the third winding (5d) of the transformer (5) shown in FIG. Another auxiliary rectification smoothing circuit (30) comprising a diode (31) and another auxiliary smoothing capacitor (32) is connected, and the collector of the NPN transistor (22) is connected to another auxiliary rectification via a current limiting resistor (25). This is connected to another auxiliary smoothing capacitor (32) constituting the smoothing circuit (30). Other configurations are substantially the same as those of the switching power supply device according to the first embodiment shown in FIG.

実施例２では、他の補助整流平滑回路(30)から電流制限用抵抗(25)及びＮＰＮトランジスタ(22)を介して充電用コンデンサ(23)を充電できるので、補助整流平滑回路(11)の充電回路(26)への電力負担分が減り、補助整流平滑回路(11)を構成する補助平滑コンデンサ(13)の静電容量を小さくすることが可能である。また、他の補助整流平滑回路(30)を構成する他の補助平滑コンデンサ(32)は、充電回路(26)内の充電用コンデンサ(23)の充電専用として使用され、実施例１の補助整流平滑回路(11)内の補助平滑コンデンサ(13)のように制御回路(10)で消費されないので、発振休止期間での充電用コンデンサ(23)の充電電圧ＶC1の低下が少ない。したがって、昇圧回路(15)内の昇圧用コンデンサ(18)を一定レベルの電圧に充電することが可能である。 In the second embodiment, the charging capacitor (23) can be charged from the other auxiliary rectifying / smoothing circuit (30) via the current limiting resistor (25) and the NPN transistor (22). The burden of power on the charging circuit (26) is reduced, and the capacitance of the auxiliary smoothing capacitor (13) constituting the auxiliary rectifying and smoothing circuit (11) can be reduced. The other auxiliary smoothing capacitor (32) constituting the other auxiliary rectifying / smoothing circuit (30) is used exclusively for charging the charging capacitor (23) in the charging circuit (26), and is used for the auxiliary rectification of the first embodiment. Since it is not consumed by the control circuit (10) like the auxiliary smoothing capacitor (13) in the smoothing circuit (11), the charging voltage V C1 of the charging capacitor (23) is hardly lowered during the oscillation suspension period. Therefore, the boosting capacitor (18) in the booster circuit (15) can be charged to a constant level voltage.

また、本発明の第３の実施形態を示す実施例３のスイッチング電源装置は、図３に示すように、図１に示すトランス(5)に第４の巻線(5e)を設け、第４の巻線(5e)に他の補助整流ダイオード(31)及び他の補助平滑コンデンサ(32)から成る他の補助整流平滑回路(30)を接続し、ＮＰＮトランジスタ(22)のコレクタを電流制限用抵抗(25)を介して他の補助整流平滑回路(30)を構成する他の補助平滑コンデンサ(32)に接続したものである。その他の構成は、図１に示す実施例１のスイッチング電源装置と略同様である。   Further, in the switching power supply of Example 3 showing the third embodiment of the present invention, as shown in FIG. 3, a fourth winding (5e) is provided on the transformer (5) shown in FIG. Is connected to another auxiliary rectifier smoothing circuit (30) consisting of another auxiliary rectifier diode (31) and other auxiliary smoothing capacitor (32), and the collector of the NPN transistor (22) is used for current limiting. This is connected to another auxiliary smoothing capacitor (32) constituting another auxiliary rectifying / smoothing circuit (30) via a resistor (25). Other configurations are substantially the same as those of the switching power supply device according to the first embodiment shown in FIG.

実施例３では、トランス(5)の第４の巻線(5e)の巻数を変更することにより、他の補助整流平滑回路(30)の出力電圧Ｖ1を任意の値に設定することができる。このため、例えば発振動作の休止期間中におけるトランス(5)の各巻線(5a〜5e)の電圧低下が大きい場合でも、第４の巻線(5e)の巻数を多くして他の補助整流平滑回路(30)の出力電圧Ｖ1を高くすることにより、充電用コンデンサ(23)を必要十分な電圧に充電することができる。 In the third embodiment, the output voltage V 1 of the other auxiliary rectifying / smoothing circuit (30) can be set to an arbitrary value by changing the number of turns of the fourth winding (5e) of the transformer (5). . For this reason, for example, even when the voltage drop of each of the windings (5a to 5e) of the transformer (5) during the quiescent period of the oscillation operation is large, the number of turns of the fourth winding (5e) is increased and other auxiliary rectification smoothing by increasing the output voltage V 1 of the circuit (30), it can be charged to the required voltage sufficient to charge capacitor (23).

本発明の実施態様は前記の３つの実施例１〜３に限定されず、更に種々の変更が可能である。例えば、実施例１〜３ではドロッパ回路としてＮＰＮトランジスタを使用したが、制御端子を安定化電源回路(14)に接続し、入力端子を補助整流平滑回路(11)（実施例１の場合）又は他の補助整流平滑回路(30)（実施例２及び３の場合）に接続し、出力端子を充電用コンデンサ(23)と逆流阻止用ダイオード(24)のアノードとの接続点に接続した三端子レギュレータ等をドロッパ回路として使用することも可能である。また、実施例１〜３において電流制限用抵抗(17)よりも抵抗値の低い他の電流制限用抵抗を逆流阻止用ダイオード(24)と直列に接続して、充電用コンデンサ(23)から逆流阻止用ダイオード(24)を通じて昇圧用コンデンサ(18)に流れる充電電流の大きさを適宜調整することも可能である。更に、実施例１〜３ではハーフブリッジ構成の電流共振型ＤＣ−ＤＣコンバータに本発明を適用したが、これに限定されず、フルブリッジ構成の電流共振型ＤＣ−ＤＣコンバータ、ハーフブリッジ又はフルブリッジ構成のＤＣ−ＤＣコンバータ或いはブリッジ構成のインバータ等に本発明を適用することも可能である。   The embodiment of the present invention is not limited to the above-mentioned three Examples 1 to 3, and various modifications can be made. For example, in the first to third embodiments, an NPN transistor is used as the dropper circuit, but the control terminal is connected to the stabilized power supply circuit (14), and the input terminal is the auxiliary rectifying / smoothing circuit (11) (in the case of the first embodiment) or Three terminals connected to the other auxiliary rectification smoothing circuit (30) (in the case of Examples 2 and 3), and the output terminal connected to the connection point between the charging capacitor (23) and the anode of the backflow prevention diode (24) It is also possible to use a regulator or the like as a dropper circuit. Further, in Examples 1 to 3, another current limiting resistor having a resistance value lower than that of the current limiting resistor (17) is connected in series with the reverse current blocking diode (24), and the reverse current flows from the charging capacitor (23). It is also possible to appropriately adjust the magnitude of the charging current flowing through the boosting capacitor (18) through the blocking diode (24). Further, in the first to third embodiments, the present invention is applied to a half-bridge current resonance type DC-DC converter, but the present invention is not limited to this, and a full-bridge current resonance type DC-DC converter, half bridge, or full bridge. The present invention can also be applied to a DC-DC converter having a configuration or an inverter having a bridge configuration.

本発明は、ハーフブリッジ型又はフルブリッジ型等のスイッチング回路を備えたスイッチング電源装置に良好に適用できる。   The present invention can be favorably applied to a switching power supply device provided with a switching circuit of a half bridge type or a full bridge type.

本発明によるスイッチング電源装置の第１の実施形態を示す電気回路図（実施例１）Electrical circuit diagram showing a first embodiment of a switching power supply device according to the present invention (Example 1) 本発明の第２の実施形態を示す電気回路図（実施例２）Electric circuit diagram showing a second embodiment of the present invention (Example 2) 本発明の第３の実施形態を示す電気回路図（実施例３）Electric circuit diagram showing a third embodiment of the present invention (Example 3) 従来のスイッチング電源装置を示す電気回路図Electric circuit diagram showing a conventional switching power supply 連続発振動作時における図４のスイッチング電源装置の各部電圧を示す波形図FIG. 4 is a waveform diagram showing voltages at various parts of the switching power supply device in FIG. 間欠発振動作時における図４のスイッチング電源装置の各部電圧を示す波形図FIG. 4 is a waveform diagram showing voltages at various parts of the switching power supply device of FIG. 4 during intermittent oscillation operation.

符号の説明Explanation of symbols

(1)・・第１のＭＯＳ-ＦＥＴ（第１のスイッチング素子）、 (2)・・第２のＭＯＳ-ＦＥＴ（第２のスイッチング素子）、 (3)・・直流電源、 (4)・・電流共振用コンデンサ、 (5)・・トランス、 (5a)・・１次巻線、 (5b,5c)・・２次巻線、 (5d)・・第３の巻線、 (5e)・・第４の巻線、 (6)・・主整流平滑回路、 (7,8)・・主整流ダイオード、 (9)・・主平滑コンデンサ、 (10)・・制御回路、 (11)・・補助整流平滑回路、 (12)・・補助整流ダイオード、 (13)・・補助平滑コンデンサ、 (14)・・安定化電源回路、 (15)・・昇圧回路、 (16)・・ダイオード、 (17)・・電流制限用抵抗、 (18)・・昇圧用コンデンサ、 (19)・・第１の駆動回路、 (20)・・第２の駆動回路、 (21)・・保持用コンデンサ、 (22)・・ＮＰＮトランジスタ（ドロッパ回路）、 (23)・・充電用コンデンサ、 (24)・・逆流阻止用ダイオード（逆流阻止用整流素子）、 (25)・・電流制限用抵抗、 (26)・・充電回路、 (30)・・他の補助整流平滑回路、 (31)・・他の補助整流ダイオード、 (32)・・他の補助平滑コンデンサ   (1) ・ ・ First MOS-FET (first switching element), (2) ・ ・ Second MOS-FET (second switching element), (3) ・ ・ DC power supply, (4) ・・ Capacitors for current resonance, (5) ・ ・ Transformer, (5a) ・ ・ Primary winding, (5b, 5c) ・ ・ Secondary winding, (5d) ・ ・ Third winding, (5e) ・・ Fourth winding, (6) ・ ・ Main rectification smoothing circuit, (7,8) ・ ・ Main rectification diode, (9) ・ ・ Main smoothing capacitor, (10) ・ ・ Control circuit, (11) ・ ・Auxiliary rectification smoothing circuit, (12) ・ ・ Auxiliary rectification diode, (13) ・ ・ Auxiliary smoothing capacitor, (14) ・ ・ Stabilized power supply circuit, (15) ・ ・ Boosting circuit, (16) ・ ・ Diode, (17 ··· Current limiting resistor, (18) · · Boosting capacitor, (19) · · First drive circuit, (20) · · Second drive circuit, (21) · · Holding capacitor, (22 ) ・ ・ NPN transistor (dropper circuit), (23) ・ ・ Charging Capacitor, (24) ・ ・ Backflow prevention diode (rectifier for backflow prevention), (25) ・ ・ Current limiting resistor, (26) ・ ・ Charging circuit, (30) ・ Other auxiliary rectification smoothing circuit, ( 31) ... Other auxiliary rectifier diodes, (32) ... Other auxiliary smoothing capacitors

Claims (5)

直流電源に対して直列に接続され且つ交互にオン・オフ駆動される第１のスイッチング素子及び第２のスイッチング素子と、前記第１のスイッチング素子に並列に且つ前記第２のスイッチング素子に直列に接続されたトランスの１次巻線と、前記トランスの２次巻線に接続されて主直流出力を発生する主整流平滑回路と、前記トランスに設けられた第３の巻線に接続されて補助直流出力を発生する補助整流平滑回路と、前記第３の巻線から前記補助整流平滑回路を介して電力が供給される安定化電源回路と、前記安定化電源回路から電力が供給されて前記第１のスイッチング素子を駆動する第１の駆動回路と、前記第２のスイッチング素子を駆動する第２の駆動回路とを備えたスイッチング電源装置において、
前記安定化電源回路に接続された保持用コンデンサと、
前記第１のスイッチング素子と第２のスイッチング素子との接続点と、前記安定化電源回路と前記保持用コンデンサとの接続点との間に接続された昇圧用コンデンサと、
制御端子が前記保持用コンデンサに接続され、入力端子が前記補助整流平滑回路又は他の直流電源に接続されたドロッパ回路と、
該ドロッパ回路の出力端子に接続された充電用コンデンサと、
該充電用コンデンサと前記昇圧用コンデンサとの間に接続された逆流阻止用整流素子とを備え、
前記安定化電源回路と昇圧用コンデンサとの接続点を前記第２の駆動回路に接続すると共に、前記補助整流平滑回路又は前記他の直流電源から前記ドロッパ回路を介して前記充電用コンデンサに充電電流を供給することを特徴とするスイッチング電源装置。 A first switching element and a second switching element that are connected in series to a DC power supply and are alternately turned on / off, and in parallel with the first switching element and in series with the second switching element A primary winding of a connected transformer, a main rectifying / smoothing circuit connected to the secondary winding of the transformer to generate a main DC output, and an auxiliary connected to a third winding provided in the transformer An auxiliary rectifying / smoothing circuit that generates a direct current output; a stabilized power circuit that is supplied with electric power from the third winding through the auxiliary rectifying / smoothing circuit; In a switching power supply device comprising: a first drive circuit that drives one switching element; and a second drive circuit that drives the second switching element,
A holding capacitor connected to the stabilized power supply circuit;
A boosting capacitor connected between a connection point between the first switching element and the second switching element, and a connection point between the stabilized power supply circuit and the holding capacitor;
A dropper circuit having a control terminal connected to the holding capacitor and an input terminal connected to the auxiliary rectifying / smoothing circuit or another DC power source;
A charging capacitor connected to the output terminal of the dropper circuit;
A backflow blocking rectifier connected between the charging capacitor and the boosting capacitor;
A connection point between the stabilized power supply circuit and the boosting capacitor is connected to the second driving circuit, and a charging current is supplied to the charging capacitor from the auxiliary rectifying / smoothing circuit or the other DC power supply via the dropper circuit. A switching power supply device. 前記ドロッパ回路は、前記保持用コンデンサの充電電圧より一定レベル低い電圧に前記充電用コンデンサを充電させる請求項１に記載のスイッチング電源装置。   The switching power supply device according to claim 1, wherein the dropper circuit charges the charging capacitor to a voltage lower than a charging voltage of the holding capacitor by a certain level. 前記補助整流平滑回路又は他の直流電源と前記ドロッパ回路の入力端子との間に電流制限用抵抗を接続した請求項１又は２に記載のスイッチング電源装置。   The switching power supply device according to claim 1, wherein a current limiting resistor is connected between the auxiliary rectifying / smoothing circuit or another DC power supply and an input terminal of the dropper circuit. 前記ドロッパ回路は、前記補助整流平滑回路又は他の直流電源に接続された第１の主端子と、前記逆流阻止用整流素子に接続された第２の主端子と、前記安定化電源回路に接続された制御端子とを有するトランジスタである請求項１〜３の何れか１項に記載のスイッチング電源装置。   The dropper circuit is connected to the first main terminal connected to the auxiliary rectifying / smoothing circuit or another DC power source, a second main terminal connected to the backflow preventing rectifier element, and the stabilized power circuit. The switching power supply device according to claim 1, wherein the switching power supply device is a transistor having a controlled terminal. 前記トランスに第４の巻線を設け、該第４の巻線に他の補助整流平滑回路を接続して他の直流電源を構成した請求項１〜４の何れか１項に記載のスイッチング電源装置。   The switching power supply according to any one of claims 1 to 4, wherein a fourth winding is provided in the transformer, and another auxiliary rectifying / smoothing circuit is connected to the fourth winding to form another DC power supply. apparatus.
JP2005207373A 2005-07-15 2005-07-15 Switching power supply Expired - Fee Related JP4697412B2 (en)

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