JP4638025B2

JP4638025B2 - Wiring board

Info

Publication number: JP4638025B2
Application number: JP2000397525A
Authority: JP
Inventors: 孝昭藤岡; 光彦野妻
Original assignee: Kyocera Corp
Current assignee: Kyocera Corp
Priority date: 2000-12-27
Filing date: 2000-12-27
Publication date: 2011-02-23
Anticipated expiration: 2020-12-27
Also published as: JP2002198606A

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体レーザ（レーザダイオード：ＬＤ），フォトダイオード（ＰＤ）等の光半導体素子等の半導体素子を搭載するための配線基板に関するものである。
【０００２】
【従来の技術】
従来の半導体素子を搭載するための配線基板１０を図２に示す。図２の（ａ）は配線基板１０の上面図、（ｂ）は配線基板１０の側断面図、（ｃ）は（ａ）のＡ−Ａ’線における断面図である。
【０００３】
図２において、１は窒化アルミニウム（ＡｌＮ）質焼結体等から成る絶縁層を複数積層して成る絶縁基板、２ａは絶縁基板１の上面に形成された、ＬＤ，ＰＤ等の光半導体素子５を搭載する搭載部、２ｂは端部が光半導体素子５に電気的に接続される線路導体、２ｃは絶縁基板の下面の全面に形成された接地導体層、３は光半導体素子５を接着させるためのロウ材層、４はスライシング装置等による切削加工で形成された段差部である。
【０００４】
かかる配線基板１０は、光半導体素子５や光ファイバ（図示せず）等を組み込んだ光半導体モジュール等に用いられ、光半導体素子５を搭載部２ａ上にロウ材層３を介して搭載し、ワイヤーボンディング６等によって光半導体素子５と線路導体２ｂとを接続し、光半導体素子５に駆動信号を入力したり、光半導体素子５からの光電変換された電気信号を出力するのに用いられる。
【０００５】
また、搭載したＬＤ等の光半導体素子５から出射される光が光ファイバの入出力端面に効率よく入射されるように、光ファイバの取付位置に合わせて絶縁基板１の厚みを設定することにより光半導体素子５の光軸の高さを調節している。
【０００６】
そして、配線基板１０の段差部４は、ＬＤ等の光半導体素子５から出射される光を受光するＰＤ等を搭載したり、光半導体素子５から出射される光を集光、分光、分岐等させるレンズやフィルター等を搭載するために用いられる。また、段差部４はスライシング装置等による切削加工等の方法により形成される。
【０００７】
【発明が解決しようとする課題】
しかしながら、近年のＧＨｚ帯域の高周波信号や光信号を用いた高速通信化に対して、従来の配線基板１０を用いた光半導体モジュールでは、高速信号に対応することができないという問題が生じている。これは、線路導体２ｂを伝送する高周波信号が高速化、即ち高周波化されると、インピーダンス不整合等のために反射信号が大きくなり伝送損失が増大して、光半導体モジュールの動作不良が発生するということによるものである。
【０００８】
また、光半導体パッケージや回路基板等に好適に使用できる内層導体層を有する窒化アルミニウム質焼結体であって、内層導体層中に含まれる配線基板を形成する焼結体の含有率を３〜１０重量％としたものが提案されている（特開平４−８３７８３号公報参照）。
【０００９】
しかしながら、内層接地導体層の組成中の絶縁基板を形成する焼結体の含有率が３〜１０重量％の場合、内層接地導体層と絶縁基板との熱膨張係数差が大きいため、内層接地導体層を含む絶縁基板の端部をスライシング装置等によって切削加工して段差部を形成する際、加工による摩擦ストレスおよび摩擦熱による内層接地導体層と絶縁層との熱膨張係数差に起因する熱ストレスによって、絶縁層にクラックや割れ等を生じ易い。
【００１０】
１０重量％を超えると内層接地導体層の電気抵抗が高くなり、光半導体パッケージや回路基板等の内層接地導体層としては不向きである。焼結体の含有率がさらに大きくなると、内層接地導体層の電気抵抗がさらに高くなって、ジュール熱の発生が大きくなり、温度に対して敏感なＬＤ等の光半導体素子に悪影響を及ぼすこととなる。
【００１１】
従って、本発明は上記事情に鑑みて完成されたものであり、その目的は、高周波信号を伝送効率を良好にして伝送することが可能な光半導体モジュールを構成し得、また光ファイバ等と光軸を容易に合わせることができる配線基板を提供することにある。
【００１２】
【課題を解決するための手段】
本発明の配線基板は、絶縁層を複数積層して成り、窒化アルミニウム質焼結体より成る絶縁基板の上面に半導体素子を搭載する搭載部と前記半導体素子に電気的に接続される線路導体とが設けられ、内部に、タングステン粉末に前記窒化アルミニウム質焼結体の粒子を添加した内層接地導体層が形成され、かつ下面に接地導体層が形成されており、前記搭載部と前記内層接地導体層および前記接地導体層が貫通導体を介して接続されている配線基板であって、前記絶縁基板の端部を上面から少なくとも最下層の前記絶縁層を残して前記端部下方に位置する前記内層接地導体層と共に切り欠いた段差部が形成されており、前記内層接地導体層中に前記窒化アルミニウム質焼結体の粒子が１３〜１７重量％含まれていることを特徴とする。
【００１３】
本発明は、上記の構成により、絶縁基板を多層化して、下面に形成された接地導体層と内部に設けられた内層接地導体層とを貫通導体を介して電気的に接続して、線路導体の直下に接地電位部を形成するとともに、例えば、高周波信号伝送用の線路導体と内層接地導体層との間の絶縁層の厚みを、高周波信号を効率良く伝送し得る特性インピーダンスに整合させた厚みとすることで、高周波信号が伝送効率良く伝送される。即ち、線路導体と内層接地導体層とを対向配置したマイクロストリップ構造とし得る。
【００１４】
また、下面の接地導体層と内層接地導体層との間の絶縁層の厚みや層数を変えることによって、配線基板の全体の厚みを自在にコントロールできる。このために、搭載した光半導体素子から出射される光が光ファイバの端面に効率よく入射されるように、光半導体素子の光軸の高さを調節することができる。
【００１５】
さらに、内層接地導体層中に絶縁基板と実質的に同じ材料から成る焼結体の粒子が１３〜１７重量％含まれていることにより、内層接地導体層と絶縁基板との熱膨張係数差が小さくなる。その結果、内層接地導体層を含む絶縁基板の端部をスライシング装置等によって切削加工して段差部を形成する際、加工による摩擦ストレスおよび摩擦熱による内層接地導体層と絶縁層との熱膨張係数差に起因する熱ストレスによって、絶縁層にクラックや割れ等が生じるといった問題が解消される。
【００１６】
また、内層接地導体層は信号伝送部ではなく接地電位部として機能するため、焼結体の含有率は従来よりも多くなってもよく、１３〜１７重量％であっても良好な接地電位を形成し得る。
【００１７】
【発明の実施の形態】
本発明の配線基板について以下に詳細に説明する。図１の（ａ）は本発明の配線基板１１の上面図であり、（ｂ）は配線基板１１の側断面図、（ｃ）は（ａ）のＢ−Ｂ’線における断面図である。同図において、１は絶縁層を複数積層して成る絶縁基板、１ａおよび１ｃは絶縁層、１ｂは内層接地導体層、１ｄは貫通導体、２ａは光半導体素子５を搭載する薄膜よりなる搭載部、２ｂは端部が光半導体素子５に電気的に接続される線路導体、２ｃは絶縁基板１の下面の全面に形成された薄膜よりなる接地導体層、３は光半導体素子５を接着させるためのロウ材層、４はスライシング装置等による切削加工で形成された段差部である。
【００１８】
本発明の絶縁基板１は、窒化アルミニウム（ＡｌＮ）質焼結体より成り、セラミックスの積層技術およびスクリーン印刷等の厚膜技術によって製作され、具体的には以下のような方法で作成される。
【００１９】
窒化アルミニウム質焼結体の場合、まず、窒化アルミニウム粉末に適当な有機バインダー、可塑剤、溶剤を添加混合して泥漿状となす。これを従来周知のドクターブレード法やカレンダーロール法等のテープ成形技術を採用して複数枚のセラミックグリーンシート（セラミック生シート）を得る。各セラミックグリーンシートの所定位置に穴開け加工法により貫通導体１ｄ用のスルーホールを形成する。次に、タングステン（Ｗ）、モリブデン（Ｍｏ）等の高融点金属粉末に窒化アルミニウム質粉末を１３〜１７重量％添加した固形分を含む導体ペーストを、セラミックグリーンシートの表面に所定パターンに印刷塗布するとともにスルーホール内に充填する。最後に、表面およびスルーホールに金属ペーストが塗布、充填されたセラミックグリーンシートを積層し、これを還元雰囲気中もしくは中性雰囲気中で、適切な温度で焼成することによって絶縁基板１が作製される。
【００２０】
なお、絶縁基板１は、窒化アルミニウム質焼結体で形成することから、窒化アルミニウム質焼結体の熱伝導率が４０Ｗ／ｍ・Ｋ以上と高いため、絶縁基板１の上面に接着固定される光半導体素子５が駆動時に熱を発してもその熱は絶縁基板１自体を介して下方や側方に良好に伝達されるため、光半導体素子５を長時間にわたり正常かつ安定的に作動させることが可能となる。
【００２２】
焼成後の絶縁基板１の上下面は、アルミナ等の砥粒を用いて、上面と内層接地導体層１ｂ間の厚みが所定の値になるまで、また上面と下面との厚みが所定の値になるまで研磨することができる。
【００２３】
絶縁基板１の上面に被着される搭載部２ａ、線路導体２ｂおよび接地導体層２ｃは、蒸着法，スパッタリング法，ＣＶＤ法等の薄膜形成法により形成され、フォトリソグラフィ法、エッチング法、リフトオフ法等によってパターン加工される。
【００２４】
この搭載部２ａ、線路導体２ｂおよび接地導体層２ｃは、例えば密着金属層、拡散防止層、主導体層の３層構造であってもよい。
【００２５】
この場合、密着金属層は、例えばＴｉ、Ｃｒ、Ｔａ、Ｎｂ、Ｎｉ−Ｃｒ合金またはＴａ₂Ｎ等のうち少なくとも１種より成り、拡散防止層は、例えばＰｔ、Ｐｄ、Ｒｈ、Ｒｕ、Ｎｉ、Ｎｉ−Ｃｒ合金またはＴｉ−Ｗ合金等のうち少なくとも１種より成る。
【００２６】
密着金属層の厚さは０．０１〜０．２μｍ程度が良い。０．０１μｍ未満では、強固に密着することが困難となり、０．２μｍを超えると、成膜時の内部応力によって剥離が生じ易くなる。また、拡散防止層の厚さは０．０５〜１μｍ程度が良く、０．０５μｍ未満ではピンホール等の欠陥のために拡散防止層としての機能を果たしにくくなり、１μｍを超えると成膜時の内部応力により剥離が生じ易くなる。
【００２７】
主導体層はＡｕ、ＡｇまたはＣｕ等のうち少なくとも１種から成り、その厚みは０．１〜５μｍ程度が良い。０．１μｍ未満では、電気抵抗が大きくなる傾向にあり、５μｍを超えると成膜時の内部応力により剥離を生じ易くなり、またＡｕを用いた場合は貴金属で高価であることから、薄く形成される傾向にある。Ｃｕを用いた場合は酸化防止のためにＮｉメッキおよびＡｕメッキが表面に被着されるのがよい。
【００２８】
ロウ材層３は、Ａｕ−Ｓｎ合金、Ａｕ−Ｓｉ合金、Ａｕ−Ｇｅ合金、Ｐｂ−Ｓｎ合金、Ｉｎ−Ｐｂ合金またはＩｎ−Ｓｎ合金等のうち少なくとも１種より成り、その厚みは１〜５μｍ程度が良い。１μｍ未満では光半導体素子５を十分強固に接続しにくくなり、５μｍを超えると成膜時の内部応力により剥離が生じ易くなり、また光半導体素子５の光出射高さを一定に保つのが困難になる。
【００２９】
配線基板１１に形成する線路導体２ｂは、配線基板１１の上面だけでなく、配線基板１１の側面に形成してもよい。
【００３０】
本発明の段差部４は、絶縁基板１の端部を上面から少なくとも最下層の絶縁層１ｃを残して端部下方に位置する内層接地導体層１ｂと共に切り欠いたものであり、スライシング装置等による切削加工により、または大きさの異なる複数のセラミック層を積層させることにより形成される。
【００３１】
段差部４の深さは０．０５〜３ｍｍが好ましく、０．０５ｍｍ未満では、段差部４の深さが浅いので、段差部４に搭載するＰＤ、レンズまたはフィルター等の部品の位置合わせが困難になり、３ｍｍを超えると、段差部の付け根部にクラックが入りやすくなる。段差部４の幅は０．１〜５ｍｍが好ましく、０．１ｍｍ未満では、段差部４に部品を搭載するのに十分でなく、５ｍｍを超えると、段差部の付け根部にクラックが入りやすくなり、配線基板１１全体の大きさも大きくなるため不適である。
【００３２】
また、本発明においては、内層接地導体層１ｂ中に窒化アルミニウム質焼結体の粒子が１３〜１７重量％含まれているが、１３重量％未満では、内層接地導体層１ｂと絶縁層１ａとの熱膨張係数差に起因する熱ストレスによって、絶縁層１ａにクラックや割れ等が生じやすくなり、１７重量％を超えると、内層接地導体層１ｂの電気抵抗が高くなり、ジュール熱の発生が大きくなり、搭載する半導体素子５に悪影響を及ぼすこととなる。
【００３３】
この焼結体の粒子の平均粒径は３μｍ以下がよく、３μｍを超えると、セラミックグリーンシートの所定の位置に形成したスルーホール内に導体ペーストを充填させる際、充填性が悪くなる傾向にある。
【００３４】
本発明の配線基板１１は、周波数が１〜５０ＧＨｚ程度の高周波信号を効率良く入出力させ得るものであり、従って１〜５０ＧＨｚ程度の周波数帯域で用いられるのが好適である。
【００３５】
かくして、本発明は、接地導体層と内層接地導体層とを貫通導体を介して電気的に接続し、線路導体の直下に接地電位部を形成するとともに、線路導体と内層接地導体層との間の絶縁層の厚みを、高周波信号を効率良く伝送し得る特性インピーダンスに整合させた厚みとすることで、高周波信号の伝送特性が向上する。
【００３６】
また、接地導体層と内層接地導体層との間の絶縁層の厚みや層数を変えることにより、配線基板の全体の厚みを自在にコントロールできる。その結果、光半導体素子で入出射される光が光ファイバの端面に効率よく結合するように、光半導体素子の光軸高さを調節することができる。
【００３７】
さらに、内層接地導体層と絶縁基板との熱膨張係数差が小さくなるため、絶縁基板の端部をスライシング装置等によって切削加工して段差部を形成する際、加工による摩擦ストレスおよび摩擦熱による内層接地導体層と絶縁層との熱膨張係数差に起因する熱ストレスによって、絶縁層にクラックや割れ等が生じにくくなる。
【００３８】
【実施例】
本発明の実施例を以下に説明する。
【００３９】
（実施例）
図１の配線基板１１を以下の工程［１］〜［６］により作製した。
【００４０】
［１］窒化アルミニウム質焼結体より成るセラミックグリーンシートの所定の個所に貫通導体１ｄ形成用のスルーホール加工を行い、タングステン粉末に下記表１に示される各種含有量の窒化アルミニウム質焼結体の粒子を添加した固形分を含む導体ペーストをスクリーン印刷法により塗布し、内層接地導体層１ｂや貫通導体１ｄを形成したものを複数作製した。得られた複数のセラミックグリーンシートを積層圧着し、約１８００℃の窒素雰囲気中で焼成し、絶縁基板１を多数個形成できる母基板を作製した。母基板の寸法は縦約５０ｍｍ×横約５０ｍｍ×厚さ約０．６ｍｍとした。
【００４１】
［２］絶縁基板１が多数個取りされる母基板の絶縁層１aの厚みが０．１ｍｍ、絶縁基板１の全体の厚さが０．５ｍｍとなるように、母基板の上下面を研磨した。
【００４２】
［３］母基板を洗浄後、その上面にフォトリソグラフィ法によりレジストパターンを形成し、真空蒸着法により、厚さが０．１μｍのＴｉより成る密着金属層、厚さが０．２μｍのＰｔより成る拡散防止層、厚さが０．５μｍのＡｕより成る主導体層を順次積層させ、従来公知のリフトオフ法によって、搭載部２ａと線路導体２ｂを形成した。また、母基板の下面にも上面と同じ金属薄膜から成る接地導体層２ｃを被着した。
【００４３】
［４］搭載部２ａ、線路導体２ｂと同様の形成方法により、Ａｕ−Ｓｎ合金よりなるロウ材層３を搭載部２ａの上面に被着形成させた。
【００４４】
［５］０．１ｍｍの厚さの切削用のブレードによって、母基板の上面に対して垂直方向に０．２ｍｍの深さまで切り込みを入れて、段差部４の内側面を形成後、０．８ｍｍの厚さのブレードによって、母基板の上面に対して略平行となる段差部４の底面を形成した。
【００４５】
［６］ダイシング装置を用いて、母基板から各絶縁基板１を切り出して個片化し、平面視における外形寸法が縦３ｍｍ×横４ｍｍの配線基板１１を作製した。
【００４６】
このようにして得られた、表１の試料番号１〜６について各１００個の配線基板に関し、絶縁層１ａのクラック、欠けおよび剥離の発生数の確認と、搭載部２ａと接地導体層２ｃとの間の電気抵抗の測定を行った。判定については、絶縁層１ａのクラック、欠けおよび剥離の発生数について０個であり、電気抵抗値については１００ｍΩ以下の場合に○とし、それ以外の場合に×とした。
【００４７】
【表１】

【００４８】
表１の結果から、最適な内層接地導体層１ｂ中の窒化アルミニウム質焼結体の粒子の含有率は１３〜１７重量％の範囲であることがわかった。即ち、１３重量％未満では、絶縁層１ａのクラック、欠け、剥離が発生し、１７重量％を超えると、搭載部２ａと接地導体層２ｃとの間の電気抵抗が増大した。
【００４９】
なお、本発明は上記実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲内において種々の変更を行うことは何等差し支えない。
【００５０】
【発明の効果】
本発明は、絶縁層を複数積層して成り、窒化アルミニウム質焼結体より成る絶縁基板の上面に半導体素子を搭載する搭載部と半導体素子に電気的に接続される線路導体とが設けられ、内部に、タングステン粉末に窒化アルミニウム質焼結体の粒子を添加した内層接地導体層が形成され、かつ下面に接地導体層が形成されており、搭載部と内層接地導体層および接地導体層が貫通導体を介して接続されている配線基板であって、絶縁基板の端部を上面から少なくとも最下層の絶縁層を残して端部下方に位置する内層接地導体層と共に切り欠いた段差部が形成されており、内層接地導体層中に窒化アルミニウム質焼結体の粒子が１３〜１７重量％含まれていることにより、配線基板の端部をスライシング装置等によって切削して段差部を形成する際、絶縁層にクラック、欠けおよび剥離を発生させず、電気抵抗値の極端な上昇に伴う問題、例えば高周波信号の伝送特性が劣化したり、ジュール熱の発生が大きくなりＬＤ等の光半導体素子に悪影響を及ぼしたりすることを防ぐことができる。
【００５１】
また、接地導体層と内層接地導体層との間の絶縁層の厚みや層数を変えることによって、配線基板の全体の厚みを自在にコントロールできる。従って、光半導体素子から出射される光が光ファイバの端面に効率よく入射されるように、光半導体素子の光軸の高さを調節することができる。
【００５２】
さらに、内層接地導体層中に絶縁基板と実質的に同じ材料から成る焼結体の粒子が１３〜１７重量％含まれていることにより、内層接地導体層と絶縁基板との熱膨張係数差が小さくなる。その結果、内層接地導体層を含む絶縁基板の端部をスライシング装置等によって切削加工して段差部を形成する際、加工による摩擦ストレスおよび摩擦熱による内層接地導体層と絶縁層との熱膨張係数差に起因する熱ストレスによって、絶縁層にクラックや割れ等が生じにくくなる。
【００５３】
また、内層接地導体層は信号伝送部ではなく接地電位部として機能するため、焼結体の含有率は従来よりも多くなってもよく、本発明の含有量で良好な接地電位を形成し、高周波信号の伝送特性を向上させ得る。
【図面の簡単な説明】
【図１】（ａ）は本発明の配線基板の上面図、（ｂ）は側断面図、（ｃ）は（ａ）のＢ−Ｂ’線における断面図である。
【図２】（ａ）は従来の配線基板の上面図、（ｂ）は側断面図、（ｃ）は（ａ）のＡ−Ａ’線における断面図である。
【符号の説明】
１：絶縁基板
１ａ：絶縁層
１ｂ：内層接地導体層
１ｃ：絶縁層
１ｄ：貫通導体
２ａ：搭載部
２ｂ：線路導体
２ｃ：接地導体層
３：ロウ材層
４：段差部[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a wiring board for mounting a semiconductor element such as an optical semiconductor element such as a semiconductor laser (laser diode: LD) or a photodiode (PD).
[0002]
[Prior art]
A wiring substrate 10 for mounting a conventional semiconductor element is shown in FIG. 2A is a top view of the wiring board 10, FIG. 2B is a side sectional view of the wiring board 10, and FIG. 2C is a sectional view taken along the line AA ′ in FIG.
[0003]
In FIG. 2, 1 is an insulating substrate formed by laminating a plurality of insulating layers made of an aluminum nitride (AlN) -based sintered body, and 2a is an optical semiconductor element 5 such as an LD or PD formed on the upper surface of the insulating substrate 1. 2b is a line conductor whose end is electrically connected to the optical semiconductor element 5, 2c is a ground conductor layer formed on the entire lower surface of the insulating substrate, and 3 is for bonding the optical semiconductor element 5. The brazing material layer 4 is a step formed by cutting with a slicing device or the like.
[0004]
Such a wiring substrate 10 is used for an optical semiconductor module or the like incorporating an optical semiconductor element 5 or an optical fiber (not shown), etc., and the optical semiconductor element 5 is mounted on the mounting portion 2a via the brazing material layer 3, The optical semiconductor element 5 and the line conductor 2b are connected by wire bonding 6 or the like, and used to input a drive signal to the optical semiconductor element 5 or to output a photoelectrically converted electric signal from the optical semiconductor element 5.
[0005]
In addition, by setting the thickness of the insulating substrate 1 in accordance with the mounting position of the optical fiber so that the light emitted from the mounted optical semiconductor element 5 such as an LD is efficiently incident on the input / output end face of the optical fiber. The height of the optical axis of the optical semiconductor element 5 is adjusted.
[0006]
The step portion 4 of the wiring board 10 is equipped with a PD or the like that receives light emitted from the optical semiconductor element 5 such as an LD, or condenses, splits, splits, etc. the light emitted from the optical semiconductor element 5. Used to mount a lens, filter, etc. Further, the stepped portion 4 is formed by a method such as cutting using a slicing device or the like.
[0007]
[Problems to be solved by the invention]
However, in contrast to recent high-speed communication using high-frequency signals and optical signals in the GHz band, the conventional optical semiconductor module using the wiring substrate 10 has a problem that it cannot cope with high-speed signals. This is because when the high-frequency signal transmitted through the line conductor 2b is increased in speed, that is, when the frequency is increased, the reflected signal increases due to impedance mismatching and the like, resulting in an increase in transmission loss and a malfunction of the optical semiconductor module. It is because of that.
[0008]
Further, the aluminum nitride sintered body having an inner conductor layer that can be suitably used for an optical semiconductor package, a circuit board, etc., the content of the sintered body forming the wiring board contained in the inner conductor layer is 3 to 3. 10% by weight has been proposed (see Japanese Patent Application Laid-Open No. 4-83783).
[0009]
However, when the content of the sintered body forming the insulating substrate in the composition of the inner ground conductor layer is 3 to 10% by weight, the difference in thermal expansion coefficient between the inner ground conductor layer and the insulating substrate is large. When forming the stepped portion by cutting the end of the insulating substrate including the layer with a slicing device or the like, the thermal stress caused by the friction stress due to the processing and the thermal expansion coefficient difference between the inner ground conductor layer and the insulating layer due to frictional heat As a result, cracks and cracks are likely to occur in the insulating layer.
[0010]
If it exceeds 10% by weight, the electrical resistance of the inner ground conductor layer becomes high, and it is not suitable as an inner ground conductor layer for an optical semiconductor package, a circuit board or the like. If the content of the sintered body is further increased, the electric resistance of the inner ground conductor layer is further increased, the generation of Joule heat is increased, and the temperature-sensitive optical semiconductor element such as an LD is adversely affected. Become.
[0011]
Therefore, the present invention has been completed in view of the above circumstances, and an object of the present invention is to construct an optical semiconductor module capable of transmitting a high-frequency signal with good transmission efficiency. An object of the present invention is to provide a wiring board capable of easily aligning axes.
[0012]
[Means for Solving the Problems]
Wiring board of the present invention, Ri formed by an insulating layer is stacked, lines to be electrically connected to the semiconductor element and the mounting portion for mounting a semiconductor element on the upper surface of the formed Ru insulating substrate of aluminum nitride sintered body An inner ground conductor layer formed by adding particles of the aluminum nitride sintered body to tungsten powder, and a ground conductor layer is formed on the lower surface, and the mounting portion and the inner layer are provided. A wiring board in which a ground conductor layer and the ground conductor layer are connected via a through conductor, and an end portion of the insulating substrate is positioned below the end portion, leaving at least the lowermost insulating layer from the upper surface A stepped portion is formed together with the inner ground conductor layer, and the inner ground conductor layer contains 13 to 17% by weight of particles of the aluminum nitride sintered body.
[0013]
According to the present invention, with the above-described configuration, the insulating substrate is multilayered, and the ground conductor layer formed on the lower surface and the inner ground conductor layer provided inside are electrically connected via the through conductor, and the line conductor For example, a thickness in which the thickness of the insulating layer between the line conductor for high-frequency signal transmission and the inner ground conductor layer is matched with a characteristic impedance capable of efficiently transmitting a high-frequency signal. By doing so, a high-frequency signal is transmitted with high transmission efficiency. That is, a microstrip structure in which the line conductor and the inner ground conductor layer are disposed to face each other can be obtained.
[0014]
Further, the entire thickness of the wiring board can be freely controlled by changing the thickness and the number of insulating layers between the ground conductor layer on the lower surface and the inner ground conductor layer. For this reason, the height of the optical axis of the optical semiconductor element can be adjusted so that the light emitted from the mounted optical semiconductor element is efficiently incident on the end face of the optical fiber.
[0015]
Furthermore, since the inner ground conductor layer contains 13 to 17% by weight of sintered particles made of substantially the same material as the insulating substrate, the difference in thermal expansion coefficient between the inner ground conductor layer and the insulating substrate is increased. Get smaller. As a result, when the edge portion of the insulating substrate including the inner ground conductor layer is cut by a slicing device or the like to form a stepped portion, the thermal expansion coefficient between the inner ground conductor layer and the insulating layer due to friction stress and friction heat due to the processing. The problem that the insulating layer is cracked or broken due to thermal stress due to the difference is solved.
[0016]
In addition, since the inner ground conductor layer functions as a ground potential portion instead of a signal transmission portion, the content of the sintered body may be higher than the conventional one, and even if it is 13 to 17% by weight, a good ground potential can be obtained. Can be formed.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
The wiring board of the present invention will be described in detail below. 1A is a top view of the wiring board 11 of the present invention, FIG. 1B is a side sectional view of the wiring board 11, and FIG. 1C is a sectional view taken along line BB ′ of FIG. In the figure, 1 is an insulating substrate formed by laminating a plurality of insulating layers, 1a and 1c are insulating layers, 1b is an inner ground conductor layer, 1d is a through conductor, 2a is a mounting portion made of a thin film on which the optical semiconductor element 5 is mounted. 2b is a line conductor whose end is electrically connected to the optical semiconductor element 5, 2c is a ground conductor layer made of a thin film formed on the entire lower surface of the insulating substrate 1, and 3 is for bonding the optical semiconductor element 5 The brazing material layer 4 is a step formed by cutting with a slicing device or the like.
[0018]
Insulating substrate 1 of the present invention consists Ri by nitrided aluminum (AlN) Shitsushoyui body are fabricated by ceramic multilayer technology and thick film technology such as screen printing of, specifically created in the following manner The
[0019]
For the aluminum nitride sintered body, forming first, a suitable organic binder to the nitrided aluminum powder, plasticizer, solvent and admixed with mud漿状. A plurality of ceramic green sheets (ceramic green sheets) are obtained by adopting a tape forming technique such as a doctor blade method or a calender roll method, which is conventionally known. A through hole for the through conductor 1d is formed at a predetermined position of each ceramic green sheet by a drilling method. Next, a conductive paste containing a solid content obtained by adding 13 to 17% by weight of an aluminum nitride powder to a high melting point metal powder such as tungsten (W) or molybdenum (Mo) is printed and applied in a predetermined pattern on the surface of the ceramic green sheet. And fill the through hole. Finally, a ceramic green sheet coated and filled with a metal paste on the surface and through holes is laminated, and this is fired at an appropriate temperature in a reducing atmosphere or a neutral atmosphere, whereby the insulating substrate 1 is produced. .
[0020]
The insulating substrate 1 from Rukoto be formed of aluminum nitride sintered bodies, thermal conductivity of an aluminum nitride sintered body is as high as 40W / m · K or higher, is adhesively fixed to the upper surface of the insulating substrate 1 Even if the optical semiconductor element 5 generates heat during driving, the heat is well transmitted downward and laterally through the insulating substrate 1 itself, so that the optical semiconductor element 5 operates normally and stably for a long time. It becomes possible.
[0022]
The upper and lower surfaces of the insulating substrate 1 after firing are made of abrasive grains such as alumina until the thickness between the upper surface and the inner ground conductor layer 1b reaches a predetermined value, and the thickness between the upper surface and the lower surface reaches a predetermined value. It can be polished until.
[0023]
The mounting portion 2a, the line conductor 2b, and the ground conductor layer 2c to be attached to the upper surface of the insulating substrate 1 are formed by a thin film forming method such as a vapor deposition method, a sputtering method, a CVD method, and the like, a photolithography method, an etching method, and a lift-off method. The pattern is processed by the above.
[0024]
The mounting portion 2a, the line conductor 2b, and the ground conductor layer 2c may have, for example, a three-layer structure including an adhesion metal layer, a diffusion prevention layer, and a main conductor layer.
[0025]
In this case, the adhesion metal layer is made of at least one of Ti, Cr, Ta, Nb, Ni—Cr alloy, Ta ₂ N, or the like, and the diffusion prevention layer is made of, for example, Pt, Pd, Rh, Ru, Ni, It consists of at least 1 sort (s) among Ni-Cr alloy or Ti-W alloy.
[0026]
The thickness of the adhesion metal layer is preferably about 0.01 to 0.2 μm. If it is less than 0.01 μm, it is difficult to firmly adhere to it, and if it exceeds 0.2 μm, peeling tends to occur due to internal stress during film formation. Further, the thickness of the diffusion preventing layer is preferably about 0.05 to 1 μm, and if it is less than 0.05 μm, it is difficult to function as a diffusion preventing layer due to defects such as pinholes. Peeling is likely to occur due to internal stress.
[0027]
The main conductor layer is made of at least one of Au, Ag, Cu and the like, and its thickness is preferably about 0.1 to 5 μm. If the thickness is less than 0.1 μm, the electric resistance tends to increase, and if it exceeds 5 μm, peeling is likely to occur due to internal stress during film formation. Tend to. When Cu is used, Ni plating and Au plating are preferably deposited on the surface to prevent oxidation.
[0028]
The brazing material layer 3 is made of at least one of an Au—Sn alloy, an Au—Si alloy, an Au—Ge alloy, a Pb—Sn alloy, an In—Pb alloy, an In—Sn alloy, etc., and has a thickness of 1 to 5 μm. Good degree. If it is less than 1 μm, it is difficult to connect the optical semiconductor element 5 sufficiently firmly, and if it exceeds 5 μm, peeling is likely to occur due to internal stress during film formation, and it is difficult to keep the light emission height of the optical semiconductor element 5 constant. become.
[0029]
The line conductor 2 b formed on the wiring substrate 11 may be formed not only on the upper surface of the wiring substrate 11 but also on the side surface of the wiring substrate 11.
[0030]
The step portion 4 of the present invention is formed by cutting out the end portion of the insulating substrate 1 together with the inner ground conductor layer 1b positioned below the end portion, leaving at least the lowermost insulating layer 1c from the upper surface. It is formed by cutting or laminating a plurality of ceramic layers having different sizes.
[0031]
The depth of the stepped portion 4 is preferably 0.05 to 3 mm, and if it is less than 0.05 mm, the depth of the stepped portion 4 is shallow, so that it is difficult to align parts such as PD, lens or filter mounted on the stepped portion 4 When the thickness exceeds 3 mm, cracks are likely to enter the base of the stepped portion. The width of the stepped portion 4 is preferably 0.1 to 5 mm. If the width is less than 0.1 mm, it is not sufficient to mount a part on the stepped portion 4, and if it exceeds 5 mm, the base of the stepped portion is likely to crack. This is unsuitable because the entire size of the wiring board 11 also increases.
[0032]
Further, in the present invention, the inner ground conductor layer 1b contains 13 to 17% by weight of aluminum nitride sintered particles. However, if it is less than 13% by weight, the inner ground conductor layer 1b and the insulating layer 1a Due to the thermal stress caused by the difference in thermal expansion coefficient, the insulating layer 1a is likely to be cracked or cracked, and if it exceeds 17% by weight, the electrical resistance of the inner ground conductor layer 1b is increased and Joule heat is greatly generated. This adversely affects the semiconductor element 5 to be mounted.
[0033]
The average particle size of the sintered body particles is preferably 3 μm or less, and if it exceeds 3 μm, the filling property tends to deteriorate when the conductor paste is filled into the through hole formed at a predetermined position of the ceramic green sheet. .
[0034]
The wiring substrate 11 of the present invention can efficiently input and output a high-frequency signal having a frequency of about 1 to 50 GHz, and is therefore preferably used in a frequency band of about 1 to 50 GHz.
[0035]
Thus, according to the present invention, the ground conductor layer and the inner ground conductor layer are electrically connected via the through conductor to form a ground potential portion immediately below the line conductor, and between the line conductor and the inner ground conductor layer. By setting the thickness of the insulating layer to a thickness that matches the characteristic impedance capable of efficiently transmitting a high-frequency signal, the transmission characteristic of the high-frequency signal is improved.
[0036]
In addition, by changing the thickness and the number of insulating layers between the ground conductor layer and the inner ground conductor layer, the entire thickness of the wiring board can be freely controlled. As a result, the optical axis height of the optical semiconductor element can be adjusted so that the light incident / exited by the optical semiconductor element is efficiently coupled to the end face of the optical fiber.
[0037]
Furthermore, since the difference in thermal expansion coefficient between the inner ground conductor layer and the insulating substrate is reduced, when the step portion is formed by cutting the end portion of the insulating substrate with a slicing device or the like, the inner layer due to friction stress and friction heat due to processing is formed. Due to the thermal stress caused by the difference in thermal expansion coefficient between the ground conductor layer and the insulating layer, the insulating layer is less likely to be cracked or broken.
[0038]
【Example】
Examples of the present invention will be described below.
[0039]
(Example)
The wiring board 11 of FIG. 1 was produced by the following steps [1] to [6].
[0040]
[1] A through-hole process for forming a through conductor 1d is performed at a predetermined portion of a ceramic green sheet made of an aluminum nitride sintered body, and the aluminum nitride sintered body having various contents shown in Table 1 below is formed on the tungsten powder. A plurality of conductor pastes containing a solid content added with the above particles were applied by screen printing to form the inner grounded conductor layer 1b and the through conductor 1d. The obtained plurality of ceramic green sheets were laminated and pressure-bonded and baked in a nitrogen atmosphere at about 1800 ° C. to produce a mother substrate on which a large number of insulating substrates 1 can be formed. The size of the mother substrate was about 50 mm long × about 50 mm wide × about 0.6 mm thick.
[0041]
[2] The upper and lower surfaces of the mother substrate are polished so that the thickness of the insulating layer 1a of the mother substrate from which a large number of insulating substrates 1 are taken is 0.1 mm, and the total thickness of the insulating substrate 1 is 0.5 mm. .
[0042]
[3] After cleaning the mother substrate, a resist pattern is formed on the upper surface by photolithography, and an adhesive metal layer made of Ti having a thickness of 0.1 μm and a Pt having a thickness of 0.2 μm by vacuum deposition. The diffusion preventing layer and the main conductor layer made of Au having a thickness of 0.5 μm were sequentially laminated, and the mounting portion 2a and the line conductor 2b were formed by a conventionally known lift-off method. A ground conductor layer 2c made of the same metal thin film as the upper surface was also deposited on the lower surface of the mother board.
[0043]
[4] The brazing material layer 3 made of an Au—Sn alloy was deposited on the upper surface of the mounting portion 2a by the same formation method as the mounting portion 2a and the line conductor 2b.
[0044]
[5] A cutting blade having a thickness of 0.1 mm is cut to a depth of 0.2 mm in a direction perpendicular to the upper surface of the mother substrate to form an inner surface of the stepped portion 4, and then 0.8 mm The bottom surface of the stepped portion 4 that is substantially parallel to the top surface of the mother substrate was formed by a blade having a thickness of.
[0045]
[6] Using a dicing apparatus, each insulating substrate 1 was cut out from the mother substrate and separated into individual pieces, thereby producing a wiring substrate 11 having an external dimension of 3 mm in length and 4 mm in width in plan view.
[0046]
For each of 100 wiring boards obtained for sample numbers 1 to 6 in Table 1, confirmation of the number of occurrences of cracks, chips and peeling of the insulating layer 1a, and the mounting portion 2a and the ground conductor layer 2c The electrical resistance was measured during. Regarding the determination, the number of occurrences of cracks, chips and peelings in the insulating layer 1a was 0, and the electrical resistance value was evaluated as ◯ when it was 100 mΩ or less, and was evaluated as x in other cases.
[0047]
[Table 1]

[0048]
From the results of Table 1, it was found that the optimal content of particles of the aluminum nitride sintered body in the inner ground conductor layer 1b was in the range of 13 to 17% by weight. That is, if the amount is less than 13% by weight, cracking, chipping and peeling of the insulating layer 1a occur, and if the amount exceeds 17% by weight, the electrical resistance between the mounting portion 2a and the ground conductor layer 2c increases.
[0049]
Note that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.
[0050]
【The invention's effect】
The present invention, Ri formed by an insulating layer is stacked, and a line conductor which is electrically connected to the mounting portion and the semiconductor element for mounting a semiconductor element on the upper surface of the formed Ru insulating substrate of aluminum nitride sintered body provided An inner ground conductor layer in which particles of an aluminum nitride sintered body are added to tungsten powder, and a ground conductor layer is formed on the lower surface, and the mounting portion, the inner ground conductor layer, and the ground conductor layer Is a wiring board connected through a through conductor, and the stepped portion is formed by cutting the end portion of the insulating substrate together with the inner ground conductor layer located below the end portion, leaving at least the lowermost insulating layer from the upper surface. are formed, the particles of the inner layer ground conductor layer on the aluminum nitride sintered body by contained 13 to 17 wt%, and cutting to form a stepped portion end portion of the wiring substrate by slicing machine such as Insulating layer does not cause cracks, chipping and peeling, and problems associated with an extreme increase in electrical resistance, for example, the transmission characteristics of high-frequency signals deteriorate or the generation of Joule heat increases, resulting in an optical semiconductor element such as an LD. It can prevent adverse effects.
[0051]
Further, the total thickness of the wiring board can be freely controlled by changing the thickness and the number of layers of the insulating layer between the ground conductor layer and the inner ground conductor layer. Therefore, the height of the optical axis of the optical semiconductor element can be adjusted so that the light emitted from the optical semiconductor element is efficiently incident on the end face of the optical fiber.
[0052]
Furthermore, since the inner ground conductor layer contains 13 to 17% by weight of sintered particles made of substantially the same material as the insulating substrate, the difference in thermal expansion coefficient between the inner ground conductor layer and the insulating substrate is increased. Get smaller. As a result, when the edge portion of the insulating substrate including the inner ground conductor layer is cut by a slicing device or the like to form a stepped portion, the thermal expansion coefficient between the inner ground conductor layer and the insulating layer due to friction stress and friction heat due to the processing. Due to the thermal stress resulting from the difference, the insulating layer is less likely to crack or break.
[0053]
In addition, since the inner ground conductor layer functions as a ground potential portion instead of a signal transmission portion, the content of the sintered body may be higher than the conventional one, and a good ground potential is formed with the content of the present invention. High-frequency signal transmission characteristics can be improved.
[Brief description of the drawings]
FIG. 1A is a top view of a wiring board of the present invention, FIG. 1B is a side sectional view, and FIG. 1C is a sectional view taken along line BB ′ in FIG.
2A is a top view of a conventional wiring board, FIG. 2B is a side sectional view, and FIG. 2C is a sectional view taken along line AA ′ in FIG.
[Explanation of symbols]
1: Insulating substrate 1a: Insulating layer 1b: Inner layer ground conductor layer 1c: Insulating layer 1d: Through conductor 2a: Mounting portion 2b: Line conductor 2c: Ground conductor layer 3: Brazing material layer 4: Stepped portion

Claims

絶縁層を複数積層して成り、窒化アルミニウム質焼結体より成る絶縁基板の上面に半導体素子を搭載する搭載部と前記半導体素子に電気的に接続される線路導体とが設けられ、内部に、タングステン粉末に前記窒化アルミニウム質焼結体の粒子を添加した内層接地導体層が形成され、かつ下面に接地導体層が形成されており、前記搭載部と前記内層接地導体層および前記接地導体層が貫通導体を介して接続されている配線基板であって、前記絶縁基板の端部を上面から少なくとも最下層の前記絶縁層を残して前記端部下方に位置する前記内層接地導体層と共に切り欠いた段差部が形成されており、前記内層接地導体層中に前記窒化アルミニウム質焼結体の粒子が１３〜１７重量％含まれていることを特徴とする配線基板。 Ri formed by an insulating layer is stacked, and the line conductor which is electrically connected to the semiconductor element and the mounting portion for mounting a semiconductor element on the upper surface of the formed Ru insulating substrate of aluminum nitride sintered body is provided inside Further, an inner ground conductor layer obtained by adding particles of the aluminum nitride sintered body to tungsten powder is formed, and a ground conductor layer is formed on the lower surface, and the mounting portion, the inner ground conductor layer, and the ground conductor are formed. A wiring board in which layers are connected through a through conductor, and an end portion of the insulating substrate is cut from the upper surface together with the inner ground conductor layer positioned below the end portion, leaving at least the lowermost insulating layer. A wiring board, wherein a stepped portion lacking is formed, and particles of the aluminum nitride sintered body are contained in the inner ground conductor layer in an amount of 13 to 17% by weight.