JP4631406B2 - Structure for extracting electrical signal of semiconductor component and manufacturing method thereof - Google Patents

Structure for extracting electrical signal of semiconductor component and manufacturing method thereof Download PDF

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JP4631406B2
JP4631406B2 JP2004336828A JP2004336828A JP4631406B2 JP 4631406 B2 JP4631406 B2 JP 4631406B2 JP 2004336828 A JP2004336828 A JP 2004336828A JP 2004336828 A JP2004336828 A JP 2004336828A JP 4631406 B2 JP4631406 B2 JP 4631406B2
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thin film
conductive thin
insulating substrate
substrate
manufacturing
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JP2006147892A (en
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英一 古久保
澄夫 赤井
浩司 境
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Panasonic Corp
Panasonic Electric Works Co Ltd
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Matsushita Electric Works Ltd
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Description

本発明は、加速度を検出できる加速度センサを含む半導体部品の電気信号取り出し部構造とその製造方法に関する。   The present invention relates to an electrical signal extraction portion structure of a semiconductor component including an acceleration sensor capable of detecting acceleration and a method for manufacturing the same.

従来から、この種、半導体部品の電気信号取り出し部構造として、例えば、特許文献１に示されるように、半導体基板に積層した絶縁板にコンタクトホールを開口させ、このホール内壁面に導電性膜を形成することが知られている。   Conventionally, as an electrical signal extraction part structure of this type of semiconductor component, for example, as shown in Patent Document 1, a contact hole is opened in an insulating plate laminated on a semiconductor substrate, and a conductive film is formed on the inner wall surface of the hole. It is known to form.

このような半導体部品の電気信号取り出し部構造について、図６を参照して説明する。ここでは、加速度の変化を、静電容量素子間の静電容量変化に基づき検出する静電容量型加速度センサの例を示す。この加速度センサ１０１は、シリコン基板に微細加工を施して加速度センサデバイスを形成した半導体基板１０２と、その上下面（図では上面のみ示す）に接合される絶縁性基板としてのガラス基板１０３とから成り、静電容量ギャップ 部への異物混入を防ぐためにセンサ自体を機密にしている。半導体基板１０２とガラス基板１０３の接合前に、ガラス基板１０３には、電気信号取り出しのための貫通孔１０４（ガラススルーホール）がブラスト加工等により形成され、接合後に、この貫通孔１０４の内壁面に導電性薄膜１０５が成膜される。   Such an electrical signal extraction portion structure of a semiconductor component will be described with reference to FIG. Here, an example of a capacitive acceleration sensor that detects a change in acceleration based on a change in capacitance between capacitive elements is shown. The acceleration sensor 101 includes a semiconductor substrate 102 on which an acceleration sensor device is formed by finely processing a silicon substrate, and a glass substrate 103 as an insulating substrate bonded to the upper and lower surfaces (only the upper surface is shown in the figure). In order to prevent foreign matter from entering the capacitance gap, the sensor itself is kept secret. Before the semiconductor substrate 102 and the glass substrate 103 are joined, a through hole 104 (glass through hole) for extracting an electric signal is formed in the glass substrate 103 by blasting or the like. A conductive thin film 105 is formed on the substrate.

この導電性薄膜１０５は、ガラス基板１０３の半導体基板１０２との対向面に形成された固定極１０６を露出させることなく、外部にリードする金属引き出し線として機能するものであり、半導体基板１０２に形成したＳｉＯ２層１０７の上に設けた電極取り出しパット用のアルミ導電層１０８を介して固定極１０６と導通される。
特開平０５−３４３５３６号公報 The conductive thin film 105 functions as a metal lead wire that leads to the outside without exposing the fixed electrode 106 formed on the surface of the glass substrate 103 facing the semiconductor substrate 102, and is formed on the semiconductor substrate 102. The electrode is electrically connected to the fixed electrode 106 through an aluminum conductive layer 108 for electrode extraction pad provided on the SiO 2 layer 107.
JP 05-343536 A

しかしながら、上述したような従来構成からなる加速度センサの電気信号取り出し部構成においては、その製造に際して、ガラス基板１０３に貫通孔１０４を形成するときに、貫通孔１０４の下縁にガラス欠け部１０９（チッピング部）が発生しやすく、このガラス欠け部１０９のところで導電性薄膜１０５が断線状態となることがあり、歩留りの低下や引き出し線導通の信頼性に欠けるといった問題があった。   However, in the configuration of the electrical signal extraction portion of the acceleration sensor having the conventional configuration as described above, when the through hole 104 is formed in the glass substrate 103 during the manufacture, the glass chipped portion 109 ( The chipping portion) is likely to occur, and the conductive thin film 105 may be disconnected at the glass notch portion 109, resulting in a problem that yield is lowered and reliability of lead wire conduction is lacking.

本発明は、上述した従来の問題を解消するものであり、半導体部品の製造上の歩留り向上が図れると共に、引き出し線の安定、かつ確実な導通を確保でき、信頼性の高い半導体部品の電気信号取り出し部構造とその製造方法を提供することを目的とする。   The present invention solves the above-described conventional problems, and can improve the yield in the manufacture of semiconductor components, and can ensure stable and reliable conduction of lead wires, and highly reliable electrical signals of semiconductor components. It is an object of the present invention to provide an extraction portion structure and a method for manufacturing the same.

請求項１の発明は、半導体素子を形成した基板と、この半導体基板に接合される絶縁性基板とを備え、前記絶縁性基板には、前記半導体素子からの電気信号取り出しのための貫通孔が形成されると共に、この貫通孔に電気信号取り出し用の導電性薄膜を成膜して成り、前記絶縁性基板に貫通孔を形成するための除去加工に際して除去加工を行う側の面とは反対側に生じた絶縁性基板の欠け部に導電性薄膜を形成し、前記欠け部に形成した導電性薄膜の上からさらに前記電気信号取り出し用の導電性薄膜を形成して成る半導体部品の電気信号取り出し部の製造方法であって、前記貫通孔形成のための除去加工の後で、基板と絶縁性基板とを接合する前に、絶縁性基板の裏面から導電性薄膜を成膜し、これを研磨することを特徴とするものである。 The invention of claim 1 includes a substrate on which a semiconductor element is formed and an insulating substrate bonded to the semiconductor substrate, and the insulating substrate has a through hole for taking out an electric signal from the semiconductor element. while being formed, opposite to the surface on the side to make this the through hole by forming a conductive thin film for electric signal output Ri formed, removal processing upon removal processing to form a through hole in the insulating substrate An electrical signal of a semiconductor component formed by forming a conductive thin film on a chipped portion of an insulating substrate formed on the side, and further forming the conductive thin film for extracting the electric signal from the conductive thin film formed on the chipped portion A method of manufacturing a take-out part, comprising: forming a conductive thin film from the back surface of the insulating substrate after the removal process for forming the through hole and before bonding the substrate and the insulating substrate; is characterized in that the polishing

請求項２の発明は、上記において、前記欠け部に形成される導電性薄膜の成膜材料として、半導体素子を形成した基板と絶縁性基板との接合温度よりも融点が低いものを使用するものである。   The invention of claim 2 uses a material having a melting point lower than the bonding temperature between the substrate on which the semiconductor element is formed and the insulating substrate as the material for forming the conductive thin film formed in the chipped portion. It is.

請求項３の発明は、上記において、基板と絶縁性基板とを接合した後、電気信号取り出し用の導電性薄膜を成膜し、その導電性薄膜の上に、さらに、めっきを施すものである。   According to a third aspect of the present invention, in the above method, after the substrate and the insulating substrate are joined, a conductive thin film for extracting an electric signal is formed, and plating is further performed on the conductive thin film. .

請求項４の発明は、前記欠け部に導電性薄膜を成膜する時に固定極パターンも形成するものである。 According to a fourth aspect of the present invention, a fixed electrode pattern is also formed when a conductive thin film is formed on the chipped portion.

請求項５の発明は、貫通孔形成のための除去加工はブラスト加工を用いるものである。 In the invention of claim 5 , the removal processing for forming the through hole uses blast processing.

請求項１の発明によれば、貫通孔に成膜した電気信号取り出し用の導電性薄膜とは別に、貫通孔の加工成形時に生じた絶縁性基板の欠け部に導電性薄膜を形成しているので、両導電性薄膜の導通により電気信号取り出し用の導電性薄膜に断線が生じることが防止され、半導体部品の製造歩留まりが改善され、ひいては、半導体素子基板と絶縁性基板との接合信頼性が向上する。そして、半導体基板と絶縁性基板との接合前に、絶縁性基板の欠け部に導電性薄膜を形成しているので、接合信頼性が向上する。 According to the first aspect of the present invention, the conductive thin film is formed in the chipped portion of the insulating substrate generated when the through hole is formed, separately from the conductive thin film for extracting the electric signal formed in the through hole. Therefore, it is possible to prevent disconnection of the conductive thin film for extracting electrical signals due to the conduction between the two conductive thin films, improve the manufacturing yield of the semiconductor component, and consequently improve the bonding reliability between the semiconductor element substrate and the insulating substrate. To improve . And since the conductive thin film is formed in the chip | tip part of the insulating board | substrate before joining of a semiconductor substrate and an insulating board | substrate, joining reliability improves.

請求項２の発明によれば、半導体基板と絶縁性基板との接合により、欠け部に形成される導電性薄膜と電気信号取り出し用の導電性薄膜とが溶着して、接合信頼性が高まる。   According to the second aspect of the present invention, the bonding reliability between the semiconductor substrate and the insulating substrate is increased by welding the conductive thin film formed in the chipped portion and the conductive thin film for extracting electric signals.

請求項３の発明によれば、めっき処理により接合信頼性が上がり、封止構造も確実になる。   According to the invention of claim 3, the bonding reliability is improved by the plating process, and the sealing structure is also ensured.

請求項４の発明によれば、半導体基板と絶縁性基板との接合前に、絶縁性基板の欠け部に導電性薄膜を形成しているので、接合信頼性が向上する。   According to the invention of claim 4, since the conductive thin film is formed in the chipped portion of the insulating substrate before the bonding of the semiconductor substrate and the insulating substrate, the bonding reliability is improved.

請求項４の発明によれば、プロセスが減るため、製造コストが低減する。 According to the invention of claim 4 , since the number of processes is reduced, the manufacturing cost is reduced.

請求項５の発明によれば、貫通孔形成が容易となり、製造コストが安くなる。 According to invention of Claim 5 , formation of a through-hole becomes easy and manufacturing cost becomes cheap.

以下、本発明に係る半導体部品の電気信号取り出し部構造とその製造方法について、静電容量型加速度センサに実施した形態について説明する。図１は静電容量型加速度センサの一部を示し、図２及び図３は、その製造工程を示す。加速度センサ１（半導体部品）は、シリコン基板上に半導体素子デバイスを形成した半導体基板２と、この半導体基板２を挟み込むように該基板２の上下面に接合されたガラス基板で成る絶縁性基板３１，３２とを備える。半導体基板２には、乾式又は湿式のエッチング技術等にて形成したビーム２ａにより支持された加速度センサ用の重錘体２ｂ（可動構造体）と凹部２ｃが作製されている。絶縁性基板３１には、この重錘体２ｂに対向して容量ギャップをおいて固定極６が設けられ、また、半導体素子デバイスからの電気信号取り出しのための貫通孔４が形成されている。貫通孔４には、固定極６を外部に露出させることなく、外部にリードする金属引き出し線として機能する電気信号取り出し用の導電性薄膜５が成膜される。   In the following, a description will be given of an embodiment implemented in a capacitance-type acceleration sensor for an electrical signal extraction portion structure of a semiconductor component and a manufacturing method thereof according to the present invention. FIG. 1 shows a part of a capacitive acceleration sensor, and FIGS. 2 and 3 show the manufacturing process. The acceleration sensor 1 (semiconductor component) includes an insulating substrate 31 formed of a semiconductor substrate 2 in which a semiconductor element device is formed on a silicon substrate, and glass substrates bonded to the upper and lower surfaces of the substrate 2 so as to sandwich the semiconductor substrate 2. , 32. In the semiconductor substrate 2, a weight body 2b (movable structure) for an acceleration sensor and a recess 2c supported by a beam 2a formed by a dry or wet etching technique or the like are formed. The insulating substrate 31 is provided with a fixed pole 6 with a capacitance gap facing the weight body 2b, and a through hole 4 for taking out an electric signal from the semiconductor element device. A conductive thin film 5 for extracting an electric signal that functions as a metal lead wire that leads to the outside is formed in the through hole 4 without exposing the fixed electrode 6 to the outside.

絶縁性基板３１に貫通孔４をサンドブラスト加工等により形成する際に、絶縁性基板３１の除去加工を行う側の面とは反対側に欠け部９が生じ易いが、この欠け部９には導電性薄膜１１を形成しておき、この導電性薄膜１１の上からさらに前記の導電性薄膜５が形成される。この導電性薄膜５は、半導体基板２に形成したＳｉＯ２層７の上に設けた電極取り出し用アルミ導電層８を介して固定極６と導通される。そして、１つの重錘体２ｂに対して２つの固定極６が配置されることで静電容量検出が可能となり、加速度検出が可能なデバイスとなる。   When the through hole 4 is formed in the insulating substrate 31 by sandblasting or the like, the chipped portion 9 is likely to be formed on the side opposite to the surface on which the insulating substrate 31 is removed. The conductive thin film 11 is formed, and the conductive thin film 5 is further formed on the conductive thin film 11. The conductive thin film 5 is electrically connected to the fixed electrode 6 through an electrode extraction aluminum conductive layer 8 provided on the SiO 2 layer 7 formed on the semiconductor substrate 2. Then, by disposing two fixed poles 6 for one weight body 2b, it becomes possible to detect capacitance and to be a device capable of detecting acceleration.

次に、上記構成の加速度センサ１の製造方法を図２及び図３を参照して説明する。まず、絶縁性基板３１に貫通孔４を形成する工程について説明する。図２（ａ）に示すように、絶縁性基板３１の上面に貫通孔４形成部分を除いて保護層１０を形成し、その状態で上面よりサンドブラスト加工により貫通孔４を形成する。このとき、絶縁性基板３１には、貫通孔４の加工を行う側の面とは反対側のエッジに欠け部９が生じ易い。そこで、図２（ｂ）に示すように、絶縁性基板３１の下面（裏面）に導電性薄膜１１を成膜する。これにより、欠け部９内にも導電性薄膜１１が形成される。その後、図２（ｃ）に示すように、絶縁性基板３１の裏面を研磨して導電性薄膜１１を欠け部９内のものを除いて除去する。導電性薄膜１１は、Ｔｉ，Ｃｒ，Ａｌ，Ｃｕなどの材料をスパッタリングや蒸着により成膜すればよい。   Next, a method for manufacturing the acceleration sensor 1 having the above configuration will be described with reference to FIGS. First, the process of forming the through hole 4 in the insulating substrate 31 will be described. As shown in FIG. 2A, the protective layer 10 is formed on the upper surface of the insulating substrate 31 except for the portion where the through holes 4 are formed, and in this state, the through holes 4 are formed by sandblasting from the upper surface. At this time, in the insulating substrate 31, the chipped portion 9 tends to occur at the edge opposite to the surface on the side where the through hole 4 is processed. Therefore, as shown in FIG. 2B, the conductive thin film 11 is formed on the lower surface (back surface) of the insulating substrate 31. Thereby, the conductive thin film 11 is also formed in the chipped portion 9. Thereafter, as shown in FIG. 2C, the back surface of the insulating substrate 31 is polished to remove the conductive thin film 11 except for the portion in the chipped portion 9. The conductive thin film 11 may be formed by sputtering or vapor deposition of a material such as Ti, Cr, Al, or Cu.

次いで、図３（ｄ）に示すように、絶縁性基板３１の裏面に固定極６のパターンを形成する。さらに、図３（ｅ）に示したように、別途に作成しておいた半導体素子デバイスを持つ半導体基板２の上（表）面に、前記により作成された絶縁性基板３１を、下（裏）面に、別途に作成された絶縁性基板３２を、それぞれ熱溶着等により接合する。このとき、絶縁性基板３１の固定極６のパターンと半導体基板２の半導体素子デバイスの重錘体２ｂとが容量ギャップを介して対向するように位置合わせされ、また、固定極６のパターンとアルミ導電層８とは導通状態とされる。その後、図３（ｆ）に示すように、絶縁性基板３１の表面側から貫通孔４領域に電気信号取り出し用の金属引き出し線となる導電性薄膜５を成膜する。この導電性薄膜５は、アルミ導電層８を介して固定極６のパターンと導通したものとなる。   Next, as shown in FIG. 3D, a pattern of the fixed electrode 6 is formed on the back surface of the insulating substrate 31. Further, as shown in FIG. 3 (e), the insulating substrate 31 prepared as described above is placed on the upper (front) surface of the semiconductor substrate 2 having the semiconductor element device prepared separately. ) Insulating substrates 32 separately prepared are bonded to the surface by thermal welding or the like. At this time, the pattern of the fixed pole 6 of the insulating substrate 31 and the weight 2b of the semiconductor element device of the semiconductor substrate 2 are aligned so as to face each other through the capacitance gap. The conductive layer 8 is in a conductive state. Thereafter, as shown in FIG. 3F, a conductive thin film 5 serving as a metal lead-out line for extracting an electric signal is formed in the through hole 4 region from the surface side of the insulating substrate 31. The conductive thin film 5 is electrically connected to the pattern of the fixed electrode 6 through the aluminum conductive layer 8.

上記の構成及び製造方法によれば、絶縁性基板３への貫通孔４形成時に貫通孔４の下縁に欠け部９が発生しても、この欠け部９に導電性薄膜１１が形成されているので、導電性薄膜５を成膜したとき、金属引き出し線となる導電性薄膜５が断線状態となることがなく、固定極６のパターンとの導通が確実なものとなり、製造歩留まりが改善され、ひいては、半導体基板２と絶縁性基板３１との接合信頼性が向上する。   According to the above-described configuration and manufacturing method, even when the chip 9 is generated at the lower edge of the through hole 4 when the through hole 4 is formed in the insulating substrate 3, the conductive thin film 11 is formed in the chip 9. Therefore, when the conductive thin film 5 is formed, the conductive thin film 5 serving as the metal lead-out line is not disconnected, and the conduction with the pattern of the fixed electrode 6 is ensured, and the manufacturing yield is improved. As a result, the bonding reliability between the semiconductor substrate 2 and the insulating substrate 31 is improved.

また、貫通孔４形成のための除去加工の後で、半導体基板２と絶縁性基板３１とを接合する前に、絶縁性基板３１の裏面から導電性薄膜１１を成膜し、これを研磨するが、絶縁性基板３１の欠け部９に導電性薄膜１１が残留していることで、接合の信頼性が良いものとなる。   In addition, after the removal process for forming the through hole 4 and before joining the semiconductor substrate 2 and the insulating substrate 31, the conductive thin film 11 is formed from the back surface of the insulating substrate 31 and polished. However, since the conductive thin film 11 remains in the chipped portion 9 of the insulating substrate 31, the bonding reliability is improved.

また、欠け部９に形成される導電性薄膜１１の成膜材料としては、半導体基板２と絶縁性基板３１との接合温度よりも融点が低いもの、例えば、金、スズ、半田などを使用することが望ましい。これにより、半導体基板２と絶縁性基板３１との接合により、欠け部９に形成された導電性薄膜１１と導電性薄膜５とが溶着して、接合信頼性が高まる。   In addition, as a material for forming the conductive thin film 11 formed in the chipped portion 9, a material having a melting point lower than the bonding temperature between the semiconductor substrate 2 and the insulating substrate 31, for example, gold, tin, solder, or the like is used. It is desirable. As a result, the bonding between the semiconductor substrate 2 and the insulating substrate 31 causes the conductive thin film 11 and the conductive thin film 5 formed in the chipped portion 9 to be welded, thereby increasing the bonding reliability.

次に、加速度センサ１の上記とは別の製造方法を、図４を用いて説明する。図４（ａ）に示す絶縁性基板３１にブラスト加工により貫通孔４を形成する工程は、前述の図２（ａ）と同等である。その後の図４（ｂ）に示す裏面成膜では、固定極６のパターンを形成する。このとき、欠け部９にも固定極６のパターンによる導電性薄膜が形成される。次の図４（ｃ）（ｄ）に示す接合、及び金属引き出し線成膜は、前述の図３（ｅ）（ｆ）と同等である。この製造方法によれば、欠け部９に導電性薄膜を成膜する時に固定極６のパターンも形成することになるので、歩留まりが向上すると共に、プロセスが減り、製造コストを低減できる。   Next, another method for manufacturing the acceleration sensor 1 will be described with reference to FIG. The process of forming the through hole 4 in the insulating substrate 31 shown in FIG. 4A by blasting is the same as that in FIG. In the subsequent backside film formation shown in FIG. 4B, the pattern of the fixed electrode 6 is formed. At this time, a conductive thin film having a pattern of the fixed electrode 6 is also formed on the chipped portion 9. Next, the bonding and metal lead wire film formation shown in FIGS. 4C and 4D are the same as those in FIGS. 3E and 3F described above. According to this manufacturing method, since the pattern of the fixed electrode 6 is also formed when the conductive thin film is formed in the chipped portion 9, the yield is improved, the process is reduced, and the manufacturing cost can be reduced.

次に、加速度センサ１の上記とはさらに別の製造方法を、図５、図６を用いて説明する。図５（ａ）に示すように、保護層１０を形成している絶縁性基板３１に導電性薄膜である裏面補強膜１３を形成した状態で、図５（ｂ）に示すように、上面からブラスト加工により貫通孔４を形成する。その後、図５（ｃ）に示すように、裏面補強膜１３を除去する。その後の、図６（ｄ）（ｅ）（ｆ）に示した、固定極パターン形成、接合、及び金属引き出し線成膜は、前述の図４（ｂ）（ｃ）（ｄ）と同等である。このようにしても、上述の製造方法と同様の作用効果が得られる。   Next, another method for manufacturing the acceleration sensor 1 will be described with reference to FIGS. As shown in FIG. 5A, in a state where the back surface reinforcing film 13 which is a conductive thin film is formed on the insulating substrate 31 on which the protective layer 10 is formed, as shown in FIG. The through hole 4 is formed by blasting. Thereafter, as shown in FIG. 5C, the back surface reinforcing film 13 is removed. Subsequent fixed pole pattern formation, bonding, and metal lead wire film formation shown in FIGS. 6D, 6E, and 6F are equivalent to the above-described FIGS. 4B, 4C, and 4D. . Even if it does in this way, the effect similar to the above-mentioned manufacturing method is acquired.

その他の実施形態として、半導体基板２と絶縁性基板３１とを接合した後、電気信号取り出し用の導電性薄膜５を成膜し、その導電性薄膜５の上に、さらに、めっき層を形成してもよい。めっき層形成により接合信頼性が向上し、確実な封止構造が得られる。また、貫通孔４の形成にブラスト加工を用いることで、加工が容易となり、製造コストが安くなるが、この方法に限られるものではない。   As another embodiment, after joining the semiconductor substrate 2 and the insulating substrate 31, a conductive thin film 5 for extracting an electric signal is formed, and a plating layer is further formed on the conductive thin film 5. May be. By forming the plating layer, the bonding reliability is improved and a reliable sealing structure is obtained. Further, by using blasting to form the through-holes 4, processing becomes easy and manufacturing costs are reduced, but the method is not limited to this method.

なお、上記の図示した構成は、センサ１個分を示しているが、製造に際しては所要寸法のガラス基板や半導体基板に多数個分のパターニングを行い、組立て一体化後に所要のチップに切断分離することにより、静電容量型加速度センサを得ることができる。   The above-described configuration shows one sensor. However, in manufacturing, a large number of glass substrates or semiconductor substrates having the required dimensions are patterned, and after assembling and integrated, the chips are cut and separated. Thus, a capacitive acceleration sensor can be obtained.

本発明は、上記実施例の構成に限られることなく、発明の趣旨を変更しない範囲で種々の変形が可能である。例えば、上記では、半導体部品として静電容量型加速度センサを示したが、その他のデバイスでも同等に適用可能である。   The present invention is not limited to the configuration of the above embodiment, and various modifications can be made without departing from the spirit of the invention. For example, in the above description, a capacitive acceleration sensor is shown as a semiconductor component, but other devices can be equally applied.

本発明の一実施形態に係る加速度センサの一部構成を示す断面図。1 is a cross-sectional view showing a partial configuration of an acceleration sensor according to an embodiment of the present invention. 同上センサの製造工程を示す図。The figure which shows the manufacturing process of a sensor same as the above. 同上製造工程の続きを示す図。The figure which shows the continuation of a manufacturing process same as the above. 同上センサの上記とは別の製造工程を示す図。The figure which shows the manufacturing process different from the above of a sensor same as the above. 同上センサの上記とはさらに別の製造工程を示す図。The figure which shows another manufacturing process different from the above of a sensor same as the above. 同上製造工程の続きを示す図。The figure which shows the continuation of a manufacturing process same as the above. 従来の加速度センサの一部構成を示す断面図。Sectional drawing which shows a partial structure of the conventional acceleration sensor.

符号の説明Explanation of symbols

１ 加速度センサ（半導体部品）
２ 半導体基板
３１，３２ 絶縁性基板
４ 貫通孔
５ 導電性薄膜
６ 固定極
９ 欠け部
１１ 導電性薄膜 1 Acceleration sensor (semiconductor component)
2 Semiconductor substrate 31, 32 Insulating substrate 4 Through-hole 5 Conductive thin film 6 Fixed pole 9 Notch 11 Conductive thin film

Claims (6)

半導体素子を形成した基板と、この半導体基板に接合される絶縁性基板とを備え、前記絶縁性基板には、前記半導体素子からの電気信号取り出しのための貫通孔が形成されると共に、この貫通孔に電気信号取り出し用の導電性薄膜を成膜して成り、前記絶縁性基板に貫通孔を形成するための除去加工に際して除去加工を行う側の面とは反対側に生じた絶縁性基板の欠け部に導電性薄膜を形成し、前記欠け部に形成した導電性薄膜の上からさらに前記電気信号取り出し用の導電性薄膜を形成して成る半導体部品の電気信号取り出し部の製造方法であって、
前記貫通孔形成のための除去加工の後で、基板と絶縁性基板とを接合する前に、絶縁性基板の裏面から導電性薄膜を成膜し、これを研磨することを特徴とする半導体部品の電気信号取り出し部の製造方法。 A substrate on which a semiconductor element is formed and an insulating substrate bonded to the semiconductor substrate are provided. The insulating substrate has a through hole for taking out an electric signal from the semiconductor element, and the through hole Ri formed by depositing a conductive thin film for electric signals taken out hole, said the side of the surface for removing machining upon removal processing to form a through hole in the insulating substrate produced on the opposite side insulating substrate A method of manufacturing an electrical signal extraction portion of a semiconductor component, comprising forming a conductive thin film at a chipped portion of the semiconductor component and further forming the conductive thin film for extracting the electric signal from the conductive thin film formed at the chipped portion. And
A semiconductor component characterized by forming a conductive thin film from the back surface of the insulating substrate and polishing it after the removal processing for forming the through hole and before joining the substrate and the insulating substrate. Manufacturing method of the electrical signal extraction part. 前記欠け部に形成される導電性薄膜の成膜材料として、半導体素子を形成した基板と絶縁性基板との接合温度よりも融点が低いものを使用したことを特徴とする請求項１記載の製造方法。 2. The manufacturing method according to claim 1, wherein a material having a melting point lower than a bonding temperature between the substrate on which the semiconductor element is formed and the insulating substrate is used as a material for forming the conductive thin film formed in the chipped portion. Method. 基板と絶縁性基板とを接合した後、電気信号取り出し用の導電性薄膜を成膜し、その導電性薄膜の上に、さらに、めっきを施したことを特徴とする請求項１記載の製造方法。 2. The manufacturing method according to claim 1, wherein after the substrate and the insulating substrate are joined, a conductive thin film for extracting an electric signal is formed, and plating is further performed on the conductive thin film. . 前記欠け部に導電性薄膜を成膜する時に固定極パターンも形成することを特徴とする請求項１記載の製造方法。 The process according to claim 1, wherein the fixing the pole pattern is also formed when forming the conductive thin film prior Symbol chipping unit. 貫通孔形成のための除去加工はブラスト加工を用いることを特徴とする請求項１乃至請求項３のいずれかに記載の製造方法。 The process according to any one of claims 1 to 3 removing processing for transmural hole formation is characterized by using the blasting. 請求項１乃至５のいずれかに記載の製造方法により製造された半導体部品の電気信号取り出し部構造。  An electrical signal extraction portion structure of a semiconductor component manufactured by the manufacturing method according to claim 1.
JP2004336828A 2004-11-22 2004-11-22 Structure for extracting electrical signal of semiconductor component and manufacturing method thereof Expired - Fee Related JP4631406B2 (en)

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JP2003098026A (en) * 2001-09-25 2003-04-03 Matsushita Electric Works Ltd Manufacturing method of capacitance type pressure sensor and capacitance type pressure sensor

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JP2000261002A (en) * 1999-03-05 2000-09-22 Murata Mfg Co Ltd Small-sized electronic component and its manufacture
JP2003098026A (en) * 2001-09-25 2003-04-03 Matsushita Electric Works Ltd Manufacturing method of capacitance type pressure sensor and capacitance type pressure sensor

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