JP4617985B2 - 符号装置および符号化方法 - Google Patents

符号装置および符号化方法 Download PDF

Info

Publication number
JP4617985B2
JP4617985B2 JP2005125965A JP2005125965A JP4617985B2 JP 4617985 B2 JP4617985 B2 JP 4617985B2 JP 2005125965 A JP2005125965 A JP 2005125965A JP 2005125965 A JP2005125965 A JP 2005125965A JP 4617985 B2 JP4617985 B2 JP 4617985B2
Authority
JP
Japan
Prior art keywords
matrix
bit
ram
sum
product
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005125965A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006304132A (ja
Inventor
峰志 横川
真紀子 山本
美沙 中根
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2005125965A priority Critical patent/JP4617985B2/ja
Priority to US11/912,485 priority patent/US8010870B2/en
Priority to CN2006800139056A priority patent/CN101164241B/zh
Priority to KR1020077024428A priority patent/KR101217335B1/ko
Priority to EP06745483A priority patent/EP1876717A4/fr
Priority to PCT/JP2006/308302 priority patent/WO2006115166A1/fr
Publication of JP2006304132A publication Critical patent/JP2006304132A/ja
Application granted granted Critical
Publication of JP4617985B2 publication Critical patent/JP4617985B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6561—Parallelized implementations

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
JP2005125965A 2005-04-25 2005-04-25 符号装置および符号化方法 Expired - Fee Related JP4617985B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2005125965A JP4617985B2 (ja) 2005-04-25 2005-04-25 符号装置および符号化方法
US11/912,485 US8010870B2 (en) 2005-04-25 2005-04-25 Coding apparatus and coding method
CN2006800139056A CN101164241B (zh) 2005-04-25 2006-04-20 编码设备和编码方法
KR1020077024428A KR101217335B1 (ko) 2005-04-25 2006-04-20 부호화 장치 및 부호화 방법
EP06745483A EP1876717A4 (fr) 2005-04-25 2006-04-20 Appareil et procede d'encodage
PCT/JP2006/308302 WO2006115166A1 (fr) 2005-04-25 2006-04-20 Appareil et procede d'encodage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005125965A JP4617985B2 (ja) 2005-04-25 2005-04-25 符号装置および符号化方法

Publications (2)

Publication Number Publication Date
JP2006304132A JP2006304132A (ja) 2006-11-02
JP4617985B2 true JP4617985B2 (ja) 2011-01-26

Family

ID=37214784

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005125965A Expired - Fee Related JP4617985B2 (ja) 2005-04-25 2005-04-25 符号装置および符号化方法

Country Status (6)

Country Link
US (1) US8010870B2 (fr)
EP (1) EP1876717A4 (fr)
JP (1) JP4617985B2 (fr)
KR (1) KR101217335B1 (fr)
CN (1) CN101164241B (fr)
WO (1) WO2006115166A1 (fr)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2888061A1 (fr) * 2005-07-01 2007-01-05 France Telecom Procede et systeme d'encodage d'une sequence de donnees
KR100975696B1 (ko) * 2007-04-05 2010-08-12 삼성전자주식회사 통신 시스템에서 부호화 장치 및 방법
US8225165B2 (en) * 2007-10-12 2012-07-17 Industrial Technology Research Institute Methods and devices for encoding data in communication systems
US8291283B1 (en) * 2008-06-06 2012-10-16 Marvell International Ltd. Layered quasi-cyclic LDPC decoder with reduced-complexity circular shifter
FR2941829B1 (fr) * 2009-01-30 2012-06-01 Get Enst Bretagne Groupe Des Ecoles Des Telecomm Ecole Nationale Superieure Des Telecomm Bretagne Procede de codage de donnees a au moins deux etapes d'encodage a et au moins une etape de permutation, dispositif de codage, programme d'ordinateur et signal correspondants.
JP5387211B2 (ja) * 2009-07-30 2014-01-15 ソニー株式会社 線形性改善回路、σδａ／ｄ変換器、および受信装置
US8560604B2 (en) 2009-10-08 2013-10-15 Hola Networks Ltd. System and method for providing faster and more efficient data communication
IL210169A0 (en) * 2010-12-22 2011-03-31 Yehuda Binder System and method for routing-based internet security
CN103391104A (zh) * 2012-05-10 2013-11-13 中兴通讯股份有限公司 低密度奇偶校验码ldpc编码处理方法及装置
US9241044B2 (en) 2013-08-28 2016-01-19 Hola Networks, Ltd. System and method for improving internet communication by using intermediate nodes
US9281840B2 (en) * 2013-12-30 2016-03-08 Saankhya Labs Private Limited System and method for multi standard programmable LDPC decoder
JPWO2015133095A1 (ja) * 2014-03-04 2017-04-06 日本電気株式会社 パリティ検査符号生成装置、符号化方法、符号化装置および制御プログラム
US11057446B2 (en) 2015-05-14 2021-07-06 Bright Data Ltd. System and method for streaming content from multiple servers
US10389387B2 (en) 2015-05-19 2019-08-20 Sony Semiconductor Solutions Corporation Coding device and coding method for a DVB-like LDPC code and a LDPC code in an ETRI format
JP6798004B2 (ja) 2016-07-20 2020-12-09 ホアウェイ・テクノロジーズ・カンパニー・リミテッド Ｌｄｐｃ符号の符号化および復号化のための方法およびシステム
CN111341330B (zh) * 2020-02-10 2023-07-25 科大讯飞股份有限公司 音频编解码方法、存取方法及其相关设备及存储装置
JP7030932B2 (ja) * 2020-11-18 2022-03-07 ホアウェイ・テクノロジーズ・カンパニー・リミテッド Ｌｄｐｃ符号の符号化および復号化のための方法およびシステム

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004364233A (ja) * 2003-05-13 2004-12-24 Sony Corp 復号装置および復号方法、並びにプログラム
JP2005051469A (ja) * 2003-07-28 2005-02-24 Sony Corp 符号化装置および符号化方法、並びにプログラム

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3234130B2 (ja) * 1995-05-30 2001-12-04 三菱電機株式会社 誤り訂正符号復号化方法およびこの方法を用いる回路
US6898248B1 (en) * 1999-07-12 2005-05-24 Hughes Electronics Corporation System employing threaded space-time architecture for transporting symbols and receivers for multi-user detection and decoding of symbols
US7415061B2 (en) * 1999-08-31 2008-08-19 Broadcom Corporation Cancellation of burst noise in a communication system with application to S-CDMA
US6633856B2 (en) * 2001-06-15 2003-10-14 Flarion Technologies, Inc. Methods and apparatus for decoding LDPC codes
US6895547B2 (en) * 2001-07-11 2005-05-17 International Business Machines Corporation Method and apparatus for low density parity check encoding of data
US7349478B2 (en) * 2001-12-06 2008-03-25 Pulse-Link, Inc. Ultra-wideband communication apparatus and methods
US7406647B2 (en) * 2001-12-06 2008-07-29 Pulse-Link, Inc. Systems and methods for forward error correction in a wireless communication network
US6757122B1 (en) * 2002-01-29 2004-06-29 Seagate Technology Llc Method and decoding apparatus using linear code with parity check matrices composed from circulants
WO2004019268A1 (fr) 2002-08-20 2004-03-04 Flarion Technologies, Inc. Procédés et appareil permettant de coder des codes ldpc
JP4224777B2 (ja) * 2003-05-13 2009-02-18 ソニー株式会社 復号方法および復号装置、並びにプログラム
JP2005051461A (ja) 2003-07-28 2005-02-24 Sony Corp 直流電流と低周波信号と高周波信号の重畳伝送方式
KR100809619B1 (ko) * 2003-08-26 2008-03-05 삼성전자주식회사 이동 통신 시스템에서 블록 저밀도 패러티 검사 부호부호화/복호 장치 및 방법
US7395494B2 (en) * 2003-12-22 2008-07-01 Electronics And Telecommunications Research Institute Apparatus for encoding and decoding of low-density parity-check codes, and method thereof
US7260763B2 (en) * 2004-03-11 2007-08-21 Nortel Networks Limited Algebraic low-density parity check code design for variable block sizes and code rates
US7181676B2 (en) * 2004-07-19 2007-02-20 Texas Instruments Incorporated Layered decoding approach for low density parity check (LDPC) codes
EP1790083B1 (fr) 2004-08-13 2011-01-12 Dtvg Licensing, Inc Ameliorations de conception de code et de mise en oeuvre pour des codes de verification de parite a faible densite de canaux a entrees multiples et a sorties multiples
US7543212B2 (en) * 2004-09-13 2009-06-02 Idaho Research Foundation, Inc. Low-density parity-check (LDPC) encoder

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004364233A (ja) * 2003-05-13 2004-12-24 Sony Corp 復号装置および復号方法、並びにプログラム
JP2005051469A (ja) * 2003-07-28 2005-02-24 Sony Corp 符号化装置および符号化方法、並びにプログラム

Also Published As

Publication number Publication date
WO2006115166A1 (fr) 2006-11-02
EP1876717A1 (fr) 2008-01-09
JP2006304132A (ja) 2006-11-02
EP1876717A4 (fr) 2010-04-28
CN101164241B (zh) 2012-05-30
CN101164241A (zh) 2008-04-16
KR101217335B1 (ko) 2012-12-31
KR20080005511A (ko) 2008-01-14
US20090217122A1 (en) 2009-08-27
US8010870B2 (en) 2011-08-30

Similar Documents

Publication Publication Date Title
JP4617985B2 (ja) 符号装置および符号化方法
KR100641052B1 (ko) Ｌｄｐｃ 부호기 및 복호기, 및 ｌｄｐｃ 부호화 방법 및복호화 방법
KR101405962B1 (ko) Ｌｄｐｃ 코드를 이용한 복호화 방법
US7484159B2 (en) Encoding method and encoding apparatus
US7395494B2 (en) Apparatus for encoding and decoding of low-density parity-check codes, and method thereof
Xu et al. Construction of low-density parity-check codes by superposition
US7607075B2 (en) Method and apparatus for encoding and decoding data
JP4622654B2 (ja) 復号装置および復号方法
US8627172B2 (en) Error correction encoding apparatus, decoding apparatus, encoding method, decoding method, and programs thereof
JP4293172B2 (ja) 復号装置および復号方法
JP2006157926A (ja) 低密度パリティ検査符号の生成方法及び装置
KR100918741B1 (ko) 이동 통신 시스템에서 채널 부호화 장치 및 방법
JP2007036776A (ja) 復号装置および復号方法
JP2005051469A (ja) 符号化装置および符号化方法、並びにプログラム
KR101147768B1 (ko) 채널 코드를 이용한 복호화 방법 및 장치
JP2008526086A (ja) チャネルコードを用いた復号化装置及び方法
KR101370903B1 (ko) Ｌｄｐｃ 코드를 이용한 부호화 및 복호화 방법
JP5160904B2 (ja) 符号化方法、符号化器、復号器
EP1820275A1 (fr) Codeur et decodeur ldpc et procedes de codage et de decodage ldpc
WO2016185911A1 (fr) Dispositif de codage et procédé de codage
EP2951926B1 (fr) Design de code de ldpc code et dispositif de codage pour l'application
JP4729964B2 (ja) 復号装置および復号方法
JP2010028408A (ja) 情報処理装置、情報処理方法、およびプログラム
JP4288582B2 (ja) 復号装置および復号方法、並びにプログラム
KR100678521B1 (ko) 비균일 저밀도 패리티 검사 부호의 부호화 장치 및 방법

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080129

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100715

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100908

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100928

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20101011

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131105

Year of fee payment: 3

R151 Written notification of patent or utility model registration

Ref document number: 4617985

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131105

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees