JP4576381B2 - 応力が加わる系のための基板アセンブリ - Google Patents
応力が加わる系のための基板アセンブリ Download PDFInfo
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- JP4576381B2 JP4576381B2 JP2006518168A JP2006518168A JP4576381B2 JP 4576381 B2 JP4576381 B2 JP 4576381B2 JP 2006518168 A JP2006518168 A JP 2006518168A JP 2006518168 A JP2006518168 A JP 2006518168A JP 4576381 B2 JP4576381 B2 JP 4576381B2
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- 239000000758 substrate Substances 0.000 title claims description 126
- 238000000034 method Methods 0.000 claims description 33
- 239000000463 material Substances 0.000 claims description 18
- 229910052710 silicon Inorganic materials 0.000 claims description 18
- 239000010703 silicon Substances 0.000 claims description 18
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 15
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 13
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 10
- 229910052594 sapphire Inorganic materials 0.000 claims description 10
- 239000010980 sapphire Substances 0.000 claims description 10
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 8
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 8
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 8
- 229910002601 GaN Inorganic materials 0.000 claims description 7
- 239000010453 quartz Substances 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 7
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 5
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 5
- 229910052732 germanium Inorganic materials 0.000 claims description 5
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 5
- 239000011521 glass Substances 0.000 claims description 5
- 238000001534 heteroepitaxy Methods 0.000 claims description 4
- 238000005468 ion implantation Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 239000012528 membrane Substances 0.000 claims description 3
- 230000000737 periodic effect Effects 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 2
- 238000004026 adhesive bonding Methods 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 238000000926 separation method Methods 0.000 claims 1
- 239000010409 thin film Substances 0.000 description 9
- 239000010408 film Substances 0.000 description 7
- 230000000694 effects Effects 0.000 description 5
- 238000010521 absorption reaction Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 238000004377 microelectronic Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 239000007943 implant Substances 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910021426 porous silicon Inorganic materials 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910008310 Si—Ge Inorganic materials 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000010297 mechanical methods and process Methods 0.000 description 1
- 230000005226 mechanical processes and functions Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 230000037303 wrinkles Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
- H01L21/86—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
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- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Micromachines (AREA)
- Laminated Bodies (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Structure Of Printed Boards (AREA)
- Measurement Of Force In General (AREA)
Description
第2基板の組み合わせ面および/または組み合わせ面とは反対側の第2基板の面から、第2基板にモチーフが形成、作製または蝕刻されている構造を提供する。
第1材料によって構成された第1基板と、第2材料によって構成された第2基板とを、先に述べたように、共に組み合わせる工程と、
基板の一方の一部を分離または分割して、他方の基板上に膜を残す工程と、を含む方法を提供する。
この図は、例えば石英基板(膨張係数5×10−7K−1)または砒化ガリウム(膨張係数6×10−6K−1)、およびシリコン基板(膨張係数2.5×10−6K−1)といった、異なる熱膨張係数c0およびc2を有する、2つの基板40,42を共に組み合わせることに関係している。
Claims (15)
- 第1熱膨張係数および前記第1熱膨張係数とは異なる第2熱膨張係数をそれぞれ有し、且つ第1および第2組み合わせ面(81,83)をそれぞれ有する、膜と基板(85,82)とが組み合わされてなり、
前記第2組み合わせ面(83)が平坦であり、
前記基板(82)には、前記第2組み合わせ面(83)とは反対側の面からモチーフが形成され、
前記モチーフは、前記反対側の面に蝕刻された周期的かつ幾何学的なモチーフであって、組み合わせ界面において発生した熱弾性応力を吸収する機械的な系を形成するように、前記第1および第2組み合わせ面と平行な平面において、弾力性または柔軟性があり、
前記膜が、以下の材料:砒化ガリウム、サファイア、ゲルマニウム、窒化ガリウム、シリコン、シリコン−ゲルマニウム(SiGe)、燐化インジウム、窒化アルミニウムおよび炭化ケイ素の1つによって構成されており、
前記基板が、以下の材料:シリコン、石英、サファイア、炭化ケイ素およびガラスの1つによって構成されている、構造。 - 第1熱膨張係数および前記第1熱膨張係数とは異なる第2熱膨張係数をそれぞれ有し、且つ第1および第2組み合わせ面(81,83)をそれぞれ有する、膜と基板(85,82)とが組み合わされてなり、
前記第2組み合わせ面(83)が平坦であり、
前記基板(82)には、前記第2組み合わせ面(83)とは反対側の面からモチーフが形成され、
前記モチーフは、鋲、トレンチまたは鋸の切り口の形状であって、組み合わせ界面において発生した熱弾性応力を吸収する機械的な系を形成するように、前記第1および第2組み合わせ面と平行な平面において、弾力性または柔軟性があり、
前記膜が、以下の材料:砒化ガリウム、サファイア、ゲルマニウム、窒化ガリウム、シリコン、シリコン−ゲルマニウム(SiGe)、燐化インジウム、窒化アルミニウムおよび炭化ケイ素の1つによって構成されており、
前記基板が、以下の材料:シリコン、石英、サファイア、炭化ケイ素およびガラスの1つによって構成されている、構造。 - 前記膜および前記基板が、雰囲気温度において少なくとも10%異なる熱膨張係数を有する、請求項1または請求項2に記載の構造。
- 前記膜が、薄層(85)の形状である、請求項1ないし請求項3のいずれか1項に記載の構造。
- 前記薄層の厚さが、0.1μm〜2μmの範囲にある、請求項4に記載の構造。
- ヘテロエピタキシーによって材料を堆積させるためのデバイスであって、請求項1ないし請求項5のいずれか1項に記載の構造を含む、デバイス。
- 第1材料から形成された膜を第2材料から形成された基板上に製造するための方法であって、
それぞれ第1熱膨張係数および前記第1熱膨張係数とは異なる第2熱膨張係数を有し、且つそれぞれ第1および第2組み合わせ面(81,83)を有する、第1および第2基板(80,82)を共に組み合わせる工程と、
前記基板の一方の一部を分離し、または前記基板の一方を減厚して、他方の基板上に膜(85)を残す工程と、を含み、
前記第2組み合わせ面(83)が平坦であり、
前記第2基板(82)には、前記第2組み合わせ面(83)とは反対側の面からモチーフが形成されており、前記モチーフは、前記反対側の面に蝕刻された周期的かつ幾何学的なモチーフであって、組み合わせ界面において発生した熱弾性応力を吸収する機械的な系を形成するように、前記第1および第2組み合わせ面と平行な平面において、弾力性または柔軟性があり、
前記第1基板が、以下の材料:砒化ガリウム、サファイア、ゲルマニウム、窒化ガリウム、シリコン、シリコン−ゲルマニウム(SiGe)、燐化インジウム、窒化アルミニウムおよび炭化ケイ素の1つによって構成されており、
前記第2基板が、以下の材料:シリコン、石英、サファイア、炭化ケイ素およびガラスの1つによって構成されている、方法。 - 第1材料から形成された膜を第2材料から形成された基板上に製造するための方法であって、
それぞれ第1熱膨張係数および前記第1熱膨張係数とは異なる第2熱膨張係数を有し、且つそれぞれ第1および第2組み合わせ面(81,83)を有する、第1および第2基板(80,82)を共に組み合わせる工程と、
前記基板の一方の一部を分離し、または前記基板の一方を減厚して、他方の基板上に膜(85)を残す工程と、を含み、
前記第2組み合わせ面(83)が平坦であり、
前記第2基板(82)には、前記第2組み合わせ面(83)とは反対側の面からモチーフが形成されており、前記モチーフは、鋲、トレンチまたは鋸の切り口の形状であって、組み合わせ界面において発生した熱弾性応力を吸収する機械的な系を形成するように、前記第1および第2組み合わせ面と平行な平面において、弾力性または柔軟性があり、
前記第1基板が、以下の材料:砒化ガリウム、サファイア、ゲルマニウム、窒化ガリウム、シリコン、シリコン−ゲルマニウム(SiGe)、燐化インジウム、窒化アルミニウムおよび炭化ケイ素の1つによって構成されており、
前記第2基板が、以下の材料:シリコン、石英、サファイア、炭化ケイ素およびガラスの1つによって構成されている、方法。 - 前記2つの共に組み合わされた基板の組が、当該方法の期間内に温度上昇の段階を経る、請求項7または請求項8に記載の方法。
- 前記2つの基板が、ウェーハ結合(wafer bonding)、分子接触(molecular contact)または接着性結合(adhesive bonding)によって、共に組み合わされている、請求項7ないし請求項9のいずれか1項に記載の方法。
- 前記第1基板(80)が、脆弱領域(87)を含む、請求項7ないし請求項9のいずれか1項に記載の方法。
- 前記第2基板(80)が、脆弱領域(87)を含む、請求項7ないし請求項9のいずれか1項に記載の方法。
- 前記脆弱領域が、多孔質層の形成によって作製されている、請求項11または請求項12に記載の方法。
- 前記脆弱領域が、イオン注入を行うことによって作製されている、請求項11または請求項12に記載の方法。
- 前記基板の一方の分離または減厚が、研磨またはエッチングによって実施される、請求項7または請求項8に記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0308447A FR2857502B1 (fr) | 2003-07-10 | 2003-07-10 | Substrats pour systemes contraints |
PCT/EP2004/007632 WO2005006419A2 (en) | 2003-07-10 | 2004-07-08 | Substrate assembly for stressed systems |
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JP2007527108A JP2007527108A (ja) | 2007-09-20 |
JP4576381B2 true JP4576381B2 (ja) | 2010-11-04 |
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JP2006518168A Expired - Lifetime JP4576381B2 (ja) | 2003-07-10 | 2004-07-08 | 応力が加わる系のための基板アセンブリ |
Country Status (8)
Country | Link |
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US (2) | US7067393B2 (ja) |
EP (1) | EP1644967A2 (ja) |
JP (1) | JP4576381B2 (ja) |
KR (1) | KR100863081B1 (ja) |
CN (1) | CN1816897B (ja) |
FR (1) | FR2857502B1 (ja) |
TW (1) | TWI310212B (ja) |
WO (1) | WO2005006419A2 (ja) |
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US7723224B2 (en) * | 2006-06-14 | 2010-05-25 | Freescale Semiconductor, Inc. | Microelectronic assembly with back side metallization and method for forming the same |
US9019830B2 (en) | 2007-05-15 | 2015-04-28 | Imagine Communications Corp. | Content-based routing of information content |
JP5123573B2 (ja) * | 2007-06-13 | 2013-01-23 | ローム株式会社 | 半導体発光素子およびその製造方法 |
DE102007054856A1 (de) * | 2007-11-16 | 2009-05-20 | Osram Gesellschaft mit beschränkter Haftung | Beleuchtungsvorrichtung mit einer Substratplatte und einem Kühlkörper |
FR2942911B1 (fr) | 2009-03-09 | 2011-05-13 | Soitec Silicon On Insulator | Procede de realisation d'une heterostructure avec adaptation locale de coefficient de dilatation thermique |
FR2966285B1 (fr) * | 2010-10-14 | 2013-09-06 | St Microelectronics Crolles 2 | Procédé de formation de circuits intégrés sur substrat semi conducteur contraint |
FR2977069B1 (fr) | 2011-06-23 | 2014-02-07 | Soitec Silicon On Insulator | Procede de fabrication d'une structure semi-conductrice mettant en oeuvre un collage temporaire |
CN102420582A (zh) * | 2011-11-29 | 2012-04-18 | 浙江大学 | 基于柔性衬底的声表面波器件的结构及其制造方法 |
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FR3039003B1 (fr) * | 2015-07-17 | 2017-07-28 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat |
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DE3231062A1 (de) | 1982-08-20 | 1984-02-23 | Bayer Ag, 5090 Leverkusen | Verfahren zur herstellung von beschichtungsmassen, waessrige dispersionen von pu-reaktiv-systemen und ihre verwendung zur beschichtung |
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FR2715501B1 (fr) * | 1994-01-26 | 1996-04-05 | Commissariat Energie Atomique | Procédé de dépôt de lames semiconductrices sur un support. |
MY112145A (en) * | 1994-07-11 | 2001-04-30 | Ibm | Direct attachment of heat sink attached directly to flip chip using flexible epoxy |
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US5759753A (en) * | 1995-07-19 | 1998-06-02 | Matsushita Electric Industrial Co., Ltd. | Piezoelectric device and method of manufacturing the same |
EP0996967B1 (de) * | 1997-06-30 | 2008-11-19 | Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V. | Verfahren zur Herstellung von schichtartigen Gebilden auf einem Halbleitersubstrat, Halbleitersubstrat sowie mittels des Verfahrens hergestellte Halbleiterbauelemente |
JP3809733B2 (ja) * | 1998-02-25 | 2006-08-16 | セイコーエプソン株式会社 | 薄膜トランジスタの剥離方法 |
EP1043770B1 (en) | 1999-04-09 | 2006-03-01 | STMicroelectronics S.r.l. | Formation of buried cavities in a monocrystalline semiconductor wafer and a wafer |
US6455924B1 (en) * | 2001-03-22 | 2002-09-24 | International Business Machines Corporation | Stress-relieving heatsink structure and method of attachment to an electronic package |
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FR2837981B1 (fr) | 2002-03-28 | 2005-01-07 | Commissariat Energie Atomique | Procede de manipulation de couches semiconductrices pour leur amincissement |
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- 2004-01-08 US US10/755,006 patent/US7067393B2/en not_active Expired - Lifetime
- 2004-07-08 CN CN2004800193314A patent/CN1816897B/zh not_active Expired - Lifetime
- 2004-07-08 EP EP04740898A patent/EP1644967A2/en not_active Withdrawn
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- 2004-07-08 JP JP2006518168A patent/JP4576381B2/ja not_active Expired - Lifetime
- 2004-07-08 KR KR1020067000232A patent/KR100863081B1/ko active IP Right Grant
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KR20060034685A (ko) | 2006-04-24 |
EP1644967A2 (en) | 2006-04-12 |
WO2005006419A2 (en) | 2005-01-20 |
KR100863081B1 (ko) | 2008-10-13 |
FR2857502B1 (fr) | 2006-02-24 |
US20060192269A1 (en) | 2006-08-31 |
JP2007527108A (ja) | 2007-09-20 |
CN1816897A (zh) | 2006-08-09 |
US20050006740A1 (en) | 2005-01-13 |
WO2005006419A3 (en) | 2005-02-10 |
TW200509217A (en) | 2005-03-01 |
TWI310212B (en) | 2009-05-21 |
US7067393B2 (en) | 2006-06-27 |
US7279779B2 (en) | 2007-10-09 |
CN1816897B (zh) | 2010-06-23 |
FR2857502A1 (fr) | 2005-01-14 |
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