JP4428124B2 - Temperature compensated oscillator - Google Patents
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本発明は水晶等の圧電素子を使用した発振器に関し、特に簡単な回路構成によって周波数の温度補償が可能で、ＩＣ化に適した温度補償発振器に関する。 The present invention relates to an oscillator using a piezoelectric element such as a crystal, and more particularly, to a temperature compensated oscillator that can be temperature-compensated for frequency with a simple circuit configuration and is suitable for an IC.
近年、圧電素子、例えば水晶振動子を使用した発振器では周波数安定度は勿論のこと、小型化、低価格化等の要求が厳しく、更には、通信方式のデジタル化が進むにつれて、従来問題とならなかった雑音比特性（Ｃ／Ｎ特性）の向上が望まれている。発振器の出力周波数は種々の要因で変化するが、比較的周波数の安定度が高い水晶発振器においても、周囲温度、電源電圧及び出力負荷等の条件変化による周波数変動があり、これ等に対応する手段は種々のものが講じられている。例えば温度変化に関しては水晶発振器に温度補償回路を付加し、この温度補償水晶発振器（以下、ＴＣＸＯと称す）の発振ループ中の負荷容量を変化させて、水晶振動子固有の温度−周波数特性を相殺するように前記負荷容量を温度変化に対して制御するものがある。 In recent years, an oscillator using a piezoelectric element, for example, a crystal resonator, has not only a frequency stability but also a severe demand for downsizing and cost reduction. It is desired to improve noise ratio characteristics (C / N characteristics) that have not been obtained. The output frequency of the oscillator changes due to various factors. Even in a crystal oscillator with relatively high frequency stability, there are frequency fluctuations due to changes in conditions such as ambient temperature, power supply voltage, and output load. Various things are taken. For example, for temperature changes, a temperature compensation circuit is added to the crystal oscillator, and the load capacitance in the oscillation loop of this temperature compensated crystal oscillator (hereinafter referred to as TCXO) is changed to cancel the temperature-frequency characteristics unique to the crystal oscillator. In some cases, the load capacity is controlled with respect to temperature changes.
そのひとつに直接型補償というものがあり、それは図１２に示すように温度補償回路を水晶振動子と直列に接続することにより構成したもので、一般的に温度補償回路はチップサーミスタとチップ容量素子とを並列に接続したものを基本構成とする高温部補償回路と低温部補償回路とを直列に接続したものである。この方式は構成が単純で、小型化が容易であることから携帯電話等の分野で広く用いられている。しかしこの方式においては、サーミスタの抵抗値が発振ループに挿入されることになるので、本来水晶振動子が有する高いＱは劣化し、また温度によってサーミスタの抵抗値が変化することから、発振出力レベルもこれに伴い大幅に変動してしまう。 One of these is direct compensation, which is configured by connecting a temperature compensation circuit in series with a crystal resonator as shown in FIG. 12, and generally includes a chip thermistor and a chip capacitance element. Are connected in series with a high-temperature part compensation circuit and a low-temperature part compensation circuit. This method is widely used in the field of mobile phones and the like because of its simple configuration and easy miniaturization. However, in this method, since the resistance value of the thermistor is inserted into the oscillation loop, the high Q inherently possessed by the crystal resonator is deteriorated, and the resistance value of the thermistor changes depending on the temperature. Will also fluctuate significantly with this.
これに対し図１３に示す様な間接型補償というものもある。これは例えば図１４に示す様に、温度に対して曲線的に変化する水晶振動子の周波数特性に対して、同様に変化する制御電圧信号を、発振ループ中に挿入したバリキャップダイオードやＭＯＳ容量素子等の高感度な可変容量回路に供給することにより温度補償するものである。そしてこの間接型補償で、携帯電話等の分野で利用する為に温度補償回路をＩＣ化して小型化したものがある。これは供給すべき制御電圧信号をデジタルデータとしてＲＯＭ等に記憶しておき、温度変化に応じてデータを読み出し制御電圧信号を生成している。
しかしこの方式において、デジタル信号特有の雑音等がこの制御電圧信号に重畳してしまうと、そのまま発振信号として出力されＣ／Ｎ特性が著しく劣化してしまう。
そこでこの供給すべき制御電圧信号をアナログ的に導出するといったものもある。これは複雑なロジック回路をＩＣ化技術を駆使して実現している上に、基本的には高感度な可変容量回路を使用するので、制御電圧信号に混入する雑音信号の徹底した排除が必要であり、Ｃ／Ｎ特性の改善には問題を残していると言える。
On the other hand, there is also indirect compensation as shown in FIG. For example, as shown in FIG. 14, a variable voltage diode or MOS capacitor in which a control voltage signal that similarly changes with respect to the frequency characteristic of a crystal resonator that changes in a curve with respect to temperature is inserted in the oscillation loop. The temperature is compensated by supplying it to a highly sensitive variable capacitance circuit such as an element. In this indirect type compensation, there is a type in which the temperature compensation circuit is made into an IC and is miniaturized for use in the field of mobile phones and the like. In this method, a control voltage signal to be supplied is stored in a ROM or the like as digital data, and the data is read according to a temperature change to generate a control voltage signal.
However, in this method, if noise or the like peculiar to a digital signal is superimposed on this control voltage signal, it is output as it is as an oscillation signal and the C / N characteristics are remarkably deteriorated.
Therefore, there is a method of analogly deriving the control voltage signal to be supplied. In addition to realizing complex logic circuits using IC technology, basically a highly sensitive variable capacitance circuit is used, so thorough elimination of noise signals mixed in the control voltage signal is necessary. Therefore, it can be said that there is a problem in improving the C / N characteristics.
そこでこれらの問題を解決したものが、本出願人により出願された特開２００１−６０８２８に開示されている。これはＭＯＳ容量素子の本来有する曲線的な容量変化を利用した直接型ＴＣＸＯである。以下に図を基にその原理を詳細に説明する。いま、図１４に示す様な温度周波数特性をもった水晶発振器の温度補償を考える。これは、常温（基準温度：例えば２５℃）以下の低温部においては周波数が曲線的に低下し、常温近傍において周波数の変位は小さく、常温以上の高温では周波数が曲線的に上昇するという３次関数曲線である。 Therefore, a solution to these problems is disclosed in Japanese Patent Application Laid-Open No. 2001-60828 filed by the present applicant. This is a direct type TCXO that utilizes a curvilinear capacitance change inherent in a MOS capacitance element. The principle will be described below in detail with reference to the drawings. Consider temperature compensation of a crystal oscillator having temperature frequency characteristics as shown in FIG. This is a third order in which the frequency drops in a low temperature part at room temperature (reference temperature: for example, 25 ° C.) or less, the frequency shift is small near the room temperature, and the frequency rises in a curve at a high temperature above the room temperature. It is a function curve.
そこで図１５に示すような容量変化を呈するＭＯＳ容量素子の特性に着目した。これはＭＯＳ容量素子のアノード電圧を基準としたゲート電圧（以下単にゲート電圧と称す）と、ＭＯＳ容量素子の両端に現れる容量値との関係であり、ゲート電圧が低いＶａにおいては容量値は高く、その変化は僅少でり、ゲート電圧が高くなるにつれ急減に減少し、Ｖｂにおいて容量値は低く、その変化は僅少になる。ここで、ＭＯＳ容量素子の容量特性は、変化傾斜がこれとは逆方向のものや、変化曲線が横軸方向に平行移動したもの等々種々のものが知られているので、これは一例である。今、同図の様にＶａ’からＶａに向かってゲート電圧を変化させたとき、容量値は急激に増加し、ゲート電圧が低くなるに従って容量値は大きくその変化は僅少となる。この曲線部分を（Ａ）とする。一方ＶｂからＶｂ’に向かってゲート電圧を変化させたとき、容量値は小さくその変化は僅少であったものが、ゲート電圧が低くなるに従って急激に大きくなる。この曲線部分を（Ｂ）とする。 Therefore, attention is focused on the characteristics of the MOS capacitor element that exhibits a capacitance change as shown in FIG. This is the relationship between the gate voltage based on the anode voltage of the MOS capacitor element (hereinafter simply referred to as the gate voltage) and the capacitance value appearing at both ends of the MOS capacitor element. The capacitance value is high at Va where the gate voltage is low. The change is small, and it decreases rapidly as the gate voltage becomes high. The capacitance value is low at Vb, and the change becomes small. Here, the capacitance characteristics of the MOS capacitance element are known in various ways, such as those having a change slope in the opposite direction and those in which the change curve is translated in the horizontal axis direction. . Now, when the gate voltage is changed from Va 'to Va as shown in the figure, the capacitance value increases rapidly, and the capacitance value increases and the change becomes small as the gate voltage decreases. This curved portion is defined as (A). On the other hand, when the gate voltage is changed from Vb to Vb ′, the capacitance value is small and the change is small, but it rapidly increases as the gate voltage decreases. Let this curved line part be (B).
ここで前記特性をもつＭＯＳ容量素子を二つ使用し、低温から高温になるにつれ一方はゲート電圧をＶａ’からＶａへ、他方はＶｂからＶｂ’へと、夫々直線的に変化するよう加えた場合において、その両者の温度／容量値特性を重ね書きすると図１５の様になる。そしてこの一方の曲線部分（Ａ）を低温部補償回路として、また他方の曲線部分（Ｂ）を高温部補償回路として、夫々発振回路の負荷容量の一部に組込めば、図１４に示す３次関数曲線の温度特性をもつ水晶振動子の温度補償が可能となる。 Here, two MOS capacitance elements having the above characteristics are used, and one is added so that the gate voltage changes linearly from Va ′ to Va and the other from Vb to Vb ′ as the temperature goes from low to high. In this case, when the temperature / capacitance characteristics of both are overwritten, the result is as shown in FIG. Then, if this one curve portion (A) is used as a low-temperature portion compensation circuit and the other curve portion (B) is used as a high-temperature portion compensation circuit, each is incorporated in a part of the load capacity of the oscillation circuit, as shown in FIG. It is possible to compensate the temperature of a crystal resonator having a temperature characteristic of a quadratic function curve.
以下にこのＭＯＳ容量素子を利用した温度温度補償回路の例をもとにその動作について説明する。図１７は増幅器に水晶振動子とＭＯＳ容量素子を用いた高温部補償回路と低温部補償回路とを直列に接続したものである。高温用ＭＯＳ容量素子ＭＨと低温用ＭＯＳ容量素子ＭＬとは共に同一極性の向きに直列接続され、また低温用ＭＯＳ容量素子ＭＬには感度調整用固定容量素子Ｃｆ１が直列に、高温用ＭＯＳ容量素子ＭＨには感度調整用固定容量素子Ｃｆ２が並列に接続されている。そして前記二つのＭＯＳ容量素子には入力抵抗Ｒを介して温度補償制御電圧信号ＶＬ、ＶＨが温度センサと制御回路とから供給され、前記二つのＭＯＳ容量素子の接続点には入力抵抗Ｒを介して基準電圧信号Ｖｒｅｆが供給されるように構成されている。 The operation will be described below based on an example of a temperature-temperature compensation circuit using this MOS capacitance element. FIG. 17 shows a configuration in which a high-temperature part compensation circuit and a low-temperature part compensation circuit using a crystal resonator and a MOS capacitor as an amplifier are connected in series. The high-temperature MOS capacitor element MH and the low-temperature MOS capacitor element ML are both connected in series in the same polarity direction, and the low-temperature MOS capacitor element ML has a sensitivity adjustment fixed capacitor element Cf1 in series, and the high-temperature MOS capacitor element A fixed capacitor Cf2 for sensitivity adjustment is connected to MH in parallel. Then, temperature compensation control voltage signals VL and VH are supplied to the two MOS capacitor elements from the temperature sensor and the control circuit via the input resistor R, and the connection point of the two MOS capacitor elements is connected to the two MOS capacitor elements via the input resistor R. The reference voltage signal Vref is supplied.
この補償回路において、温度が低温から高温まで変化するのに対応して、低温用ＭＯＳ容量素子ＭＬのアノード電圧を基準としたゲート電圧をＶａ’からＶａへ、また高温用ＭＯＳ容量素子ＭＨのアノード電圧を基準としたゲート電圧をＶｂからＶｂ’へと直線的に変化させることを考える。するとここでは、低温用ＭＯＳ容量素子ＭＬのゲート端子にはＶｒｅｆが供給されているので、アノード端子には（Ｖｒｅｆ−Ｖａ’）から（Ｖｒｅｆ−Ｖａ）へと直線的に増加する制御電圧信号ＶＬを供給し、一方高温用ＭＯＳ容量素子ＭＨのアノード端子にはＶｒｅｆが供給されているので、ゲート端子には（Ｖｒｅｆ＋Ｖｂ）から（Ｖｒｅｆ＋Ｖｂ’）へと直線的に減少する制御電圧信号ＶＨを供給する。 すると、前記図１５のに示す温度／容量特性曲線（Ａ）及び（Ｂ）の直列合成容量が発振ループに挿入される事になり、図１４に示すような３次関数曲線を有する水晶振動子の温度補償をすることが可能となる。 In this compensation circuit, the gate voltage based on the anode voltage of the low-temperature MOS capacitor element ML is changed from Va ′ to Va and the anode of the high-temperature MOS capacitor element MH in response to the temperature changing from low temperature to high temperature. Consider changing the gate voltage based on the voltage linearly from Vb to Vb ′. In this case, since Vref is supplied to the gate terminal of the low-temperature MOS capacitor element ML, the control voltage signal VL linearly increases from (Vref−Va ′) to (Vref−Va) at the anode terminal. On the other hand, since Vref is supplied to the anode terminal of the high-temperature MOS capacitor element MH, the control voltage signal VH that linearly decreases from (Vref + Vb) to (Vref + Vb ′) is supplied to the gate terminal. . Then, the series combined capacitance of the temperature / capacitance characteristic curves (A) and (B) shown in FIG. 15 is inserted into the oscillation loop, and the crystal resonator having a cubic function curve as shown in FIG. Temperature compensation can be performed.
ここで、感度調整用固定容量素子Ｃｆ１、Ｃｆ２は夫々の補償特性曲線形状を任意に設定出来る様に自由度を与えたものであり、これは直並列の合成容量値の性質を利用したものである。いま低温部補償回路において、例えば常温における固定容量素子Ｃｆ１と低温用ＭＯＳ容量素子ＭＬとの値がほぼ同じ場合を想定し、この直列合成容量値の振る舞いを検討する。ＭＯＳ容量素子の値は、低温から常温にかけて小さい値から増加し、常温及び常温以上の温度において大きくなる。よってこの直列合成容量値は、低温においてＭＯＳ容量素子の値の変化が支配的となり、一方常温及び常温以上の温度においてはＭＯＳ容量素子の値は大きくなるので、この直列合成容量値は、固定容量素子の値に制限されてその変化は僅少となる。これとは逆に、高温部補償回路においては、常温における固定容量素子Ｃｆ２と高温用ＭＯＳ容量素子ＭＨとの値がほぼ同じ場合を想定すると、ＭＯＳ容量素子の値が低温から常温にかけて小さい値のとき、固定容量素子の値が支配的でその変化は僅少となり、常温以上の温度においてＭＯＳ容量素子の値が大きくなるにつれ、ＭＯＳ容量素子の変化が支配的となる。この様な性質を利用して夫々の感度調整用固定容量素子Ｃｆ１、Ｃｆ２の値を調整すれば、より水晶振動子の曲線に適合した温度補償容量曲線を得ることが可能となる。 Here, the fixed capacitors Cf1 and Cf2 for sensitivity adjustment are given a degree of freedom so that the shape of each compensation characteristic curve can be arbitrarily set, and this utilizes the property of the series-parallel composite capacitance value. is there. Now, in the low-temperature part compensation circuit, for example, assuming that the fixed capacitance element Cf1 and the low-temperature MOS capacitance element ML are substantially the same at normal temperature, the behavior of this series composite capacitance value is examined. The value of the MOS capacitance element increases from a small value from a low temperature to a normal temperature, and increases at a normal temperature and a temperature higher than the normal temperature. Therefore, the series composite capacitance value is dominated by the change in the value of the MOS capacitor element at a low temperature, while the value of the MOS capacitor element becomes large at room temperature and above room temperature. The change is limited by the value of the element. On the contrary, in the high-temperature portion compensation circuit, assuming that the fixed capacitance element Cf2 and the high-temperature MOS capacitance element MH have substantially the same value at normal temperature, the value of the MOS capacitance element is a small value from low temperature to normal temperature. When the value of the fixed capacitance element is dominant and the change is small, the change of the MOS capacitance element becomes dominant as the value of the MOS capacitance element increases at a temperature higher than room temperature. By adjusting the values of the sensitivity-adjusting fixed capacitance elements Cf1 and Cf2 using such properties, it is possible to obtain a temperature compensation capacitance curve more suitable for the curve of the crystal resonator.
以上説明したように、この原理を用いれば、従来の間接型補償と比較した場合、水晶振動子の３次曲線補償のためにこれに近似した制御電圧信号を生成すること無く、単に直線的な温度／電圧信号を発生すればよいので、補償回路が極めて簡単になる。またＣ／Ｎ特性においては、制御電圧信号にデジタル信号を含まないことと、最も使用頻度の高い常温近辺において発振ループ中に含まれるＭＯＳ容量素子の電圧感度をほとんどゼロに設定できるので、極めて良好な特性となる。また従来の直接型補償と比較した場合は、ＩＣ化が容易に可能となることによる小型化のメリットは勿論のこと、発振ループ中にサーミスタの抵抗成分を含まないので、水晶振動子の良好なＱ値をそのまま維持できる為、更にＣ／Ｎ特性を良好に保つことが可能であり、また発振維持に必要な消費電力を少なくできる上、温度による出力レベルの変動もない。この様にＭＯＳ容量素子を利用した直接型温度補償方式は、従来の間接型補償、直接型補償方式に比較して何重もの利点を有する。
そこで、現在最も優れた温度補償方式と考えられる特開２００１−６０８２８に開示された補償原理を利用し、更なる小型化・ローコスト化を追求し、発振器としてもより多くの要求仕様に対応できる具体的な回路構成が望まれていた。 Therefore, by utilizing the compensation principle disclosed in Japanese Patent Laid-Open No. 2001-60828, which is considered to be the most excellent temperature compensation method at present, the pursuit of further miniaturization and cost reduction, and an oscillator capable of responding to more required specifications Circuit configuration is desired.
前記課題を解決する為に請求項１に記載の発明は、周波数温度補償回路と、圧電振動子と、を直列に接続した構造の温度補償発振器であって、前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備え、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
In order to solve the above-mentioned problem, the invention according to
請求項２に記載の発明は、コルピッツ発振回路と、周波数温度補償回路と、圧電振動子と、を直列に接続した構造の温度補償発振器であって、前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記コルピッツ発振回路が、トランジスタと、該トランジスタのベースにバイアス電圧を供給する為のバイアス回路とを少なくとも備えており、前記トランジスタのベースとバイアス回路との接続点と、接地に一方端子が接続された２つの固定容量素子からなる直列回路の他方端子との間に直流阻止用固定容量素子を挿入接続した構成であって、前記２つの固定容量素子からなる直列回路と前記直流阻止用固定容量素子との接続点が、前記周波数温度補償回路と接続されており、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。The invention according to
請求項３に記載の発明は、コルピッツ発振回路と、周波数温度補償回路と、圧電振動子と、を直列に接続した構造の温度補償発振器であって、前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子を接続し、該第１のＭＯＳ容量素子のゲート端子には第２のＭＯＳ容量素子のアノード端子を接続した直列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記コルピッツ発振回路が、トランジスタと、該トランジスタのベースにバイアス電圧を供給する為のバイアス回路とを少なくとも備えており、前記トランジスタのベースとバイアス回路との接続点と、接地に一方端子が接続された２つの固定容量素子からなる直列回路の他方端子との間に直流阻止用固定容量素子を挿入接続した構成であって、前記２つの固定容量素子からなる直列回路と前記直流阻止用固定容量素子との接続点が、前記周波数温度補償回路と接続され、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to claim 3 is a temperature compensated oscillator having a structure in which a Colpitts oscillation circuit, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series, wherein the frequency temperature compensation circuit is a first MOS. A fixed circuit is connected to the anode terminal of the capacitive element, and the anode terminal of the second MOS capacitive element is connected to the gate terminal of the first MOS capacitive element. A reference voltage signal having a constant voltage value is supplied to a connection point between a gate terminal and the anode terminal of the second MOS capacitor element, and a first control voltage signal is supplied to the anode terminal of the first MOS capacitor element. The Colpitts oscillation circuit is configured to supply a second control voltage signal to the gate terminal of the second MOS capacitor element. A bias circuit for supplying a source voltage, a connection point between the base of the transistor and the bias circuit, and the other terminal of a series circuit composed of two fixed capacitance elements having one terminal connected to ground. A DC blocking fixed capacitance element is inserted between and connected, and a connection point between the series circuit composed of the two fixed capacitance elements and the DC blocking fixed capacitance element is connected to the frequency temperature compensation circuit. The first MOS capacitor element is a MOS capacitor element for temperature compensation of a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation of a high temperature above room temperature. It is a feature.
請求項４に記載の発明は、発振回路と、周波数温度補償回路と、圧電振動子と、を直列に接続した構造の温度補償発振器であって、前記発振回路が、トランジスタと、該トランジスタのベースにバイアス電圧を供給する為のバイアス回路とを少なくとも備えており、前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に前記発振回路を構成する前記バイアス回路のバイアス電圧信号を供給するように構成し、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to claim 4 is a temperature compensated oscillator having a structure in which an oscillation circuit, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series, wherein the oscillation circuit includes a transistor and a base of the transistor. A bias circuit for supplying a bias voltage to the first MOS capacitor element, and the frequency temperature compensation circuit includes a series circuit in which one terminal of the fixed capacitor element is connected to the anode terminal of the first MOS capacitor element and the second MOS transistor. And a capacitor connected in parallel so that the anode terminal of the second MOS capacitor element is connected to the gate terminal of the first MOS capacitor element, and the anode terminal of the first MOS capacitor element is connected to the anode terminal of the first MOS capacitor element. 1 having a configuration for supplying a first control voltage signal and supplying a second control voltage signal to a gate terminal of the second MOS capacitor element. Configured to provide a bias voltage signal of the bias circuit constituting the oscillator circuit to a connection point between the gate terminal and the anode terminal of the second MOS capacitance element, the first MOS capacitance element normal temperature following It is a MOS capacitance element for temperature compensation of a low temperature, and the second MOS capacitance element is a MOS capacitance element for temperature compensation of a high temperature equal to or higher than room temperature.
請求項５に記載の発明は、発振回路と、周波数温度補償回路と、圧電振動子と、周波数外部電圧制御回路と、を直列に接続した構造の温度補償発振器であって、前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記周波数外部電圧制御回路が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給する構成、或いはＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給すると共にＭＯＳ容量素子のアノード端子に電圧値が一定である基準電圧信号を供給する構成と、前記ＭＯＳ容量素子のゲート端子を前記圧電振動子に接続した構成と、からなり、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする。
The invention according to claim 5 is a temperature compensated oscillator having a structure in which an oscillation circuit, a frequency temperature compensation circuit, a piezoelectric vibrator, and a frequency external voltage control circuit are connected in series, and the frequency temperature compensation circuit The second MOS capacitor element is connected to a series circuit in which one terminal of the fixed capacitor element is connected to the anode terminal of the first MOS capacitor element, and the anode terminal of the second MOS capacitor element is the first MOS capacitor element. A reference voltage having a constant voltage value at a connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element. A configuration for supplying a signal, supplying a first control voltage signal to an anode terminal of the first MOS capacitor element, and supplying a second control voltage signal to a gate terminal of the second MOS capacitor element; Also , And the said frequency external voltage control circuit, and supplied to the external control voltage signal to the gate terminal of the MOS capacitor element, or to the anode terminal of the MOS capacitor element supplies an external control voltage signal to the gate terminal of the MOS capacitor element A configuration in which a reference voltage signal having a constant voltage value is supplied and a configuration in which the gate terminal of the MOS capacitor element is connected to the piezoelectric vibrator, and the first MOS capacitor element has a low temperature below room temperature. It is a MOS capacitance element for compensating, and the second MOS capacitance element is a MOS capacitance element for temperature compensation at a high temperature of room temperature or higher.
請求項６に記載の発明は、発振回路と、周波数温度補償回路と、圧電振動子と、周波数外部電圧制御回路と、を直列に接続した構造の温度補償発振器であって、前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子を接続し、該第１のＭＯＳ容量素子のゲート端子には第２のＭＯＳ容量素子のアノード端子を接続した直列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記周波数外部電圧制御回路が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給する構成、或いはＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給すると共にＭＯＳ容量素子のアノード端子に電圧値が一定である基準電圧信号を供給する構成と、前記ＭＯＳ容量素子のゲート端子を前記圧電振動子に接続した構成と、からなり、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to claim 6 is a temperature compensated oscillator having a structure in which an oscillation circuit, a frequency temperature compensation circuit, a piezoelectric vibrator, and a frequency external voltage control circuit are connected in series, and the frequency temperature compensation circuit Is a series circuit in which a fixed capacitive element is connected to the anode terminal of the first MOS capacitive element, and the anode terminal of the second MOS capacitive element is connected to the gate terminal of the first MOS capacitive element, A reference voltage signal having a constant voltage value is supplied to a connection point between the gate terminal of one MOS capacitor element and the anode terminal of the second MOS capacitor element, and a first voltage is supplied to the anode terminal of the first MOS capacitor element. The control voltage signal is supplied to the gate terminal of the second MOS capacitor element, and the frequency external voltage control circuit is connected to the gate terminal of the MOS capacitor element. A structure for supplying an external control voltage signal to the MOS capacitor element, a structure for supplying an external control voltage signal to the gate terminal of the MOS capacitor element, and a reference voltage signal having a constant voltage value to the anode terminal of the MOS capacitor element, and the MOS The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature of room temperature or lower, and the second MOS capacitor element is configured by connecting a gate terminal of a capacitor element to the piezoelectric vibrator. Is a MOS capacitor element for compensating temperature at a temperature higher than room temperature.
請求項７に記載の発明は、発振回路と、周波数外部電圧制御回路と、固定容量素子と、周波数温度補償回路と、圧電振動子と、を直列に接続した構造の温度補償発振器であって、前記発振回路が、トランジスタと、該トランジスタのベースにバイアス電圧を供給する為のバイアス回路とを少なくとも備えており、前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記周波数外部電圧制御回路が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給し、ＭＯＳ容量素子のアノード端子に前記発振回路に接続することにより前記トランジスタのバイアス電圧信号を供給したものであり、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to
請求項８に記載の発明は、発振回路と、周波数外部電圧制御回路と、固定容量素子と、周波数温度補償回路と、圧電振動子と、を直列に接続した構造の温度補償発振器であって、前記発振回路が、トランジスタと、該トランジスタのベースにバイアス電圧を供給する為のバイアス回路とを少なくとも備えており、前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子を接続し、該第１のＭＯＳ容量素子のゲート端子には第２のＭＯＳ容量素子のアノード端子を接続した直列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記周波数外部電圧制御回路が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給し、ＭＯＳ容量素子のアノード端子に前記発振回路に接続することにより前記トランジスタのバイアス電圧信号を供給したものであり、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to
請求項９に記載の発明は、発振回路と、固定容量素子と、周波数温度補償回路と周波数外部電圧制御回路とを並列接続した並列回路又は該周波数温度補償回路と該周波数外部電圧制御回路とを直列接続した直列回路と、圧電振動子と、を直列に接続した構造の温度補償発振器であって、前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記周波数外部電圧制御回路が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給し、ＭＯＳ容量素子のアノード端子に前記周波数温度補償回路の前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点を接続することにより、前記周波数温度補償回路の前記基準電圧信号を供給したものであり、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to claim 9 includes an oscillation circuit, a fixed capacitor, a parallel circuit in which a frequency temperature compensation circuit and a frequency external voltage control circuit are connected in parallel, or the frequency temperature compensation circuit and the frequency external voltage control circuit. A temperature compensated oscillator having a structure in which a series circuit connected in series and a piezoelectric vibrator are connected in series, wherein the frequency temperature compensation circuit has one terminal of a fixed capacitor element connected to an anode terminal of a first MOS capacitor element. A parallel circuit in which a connected series circuit and a second MOS capacitive element are connected in parallel so that an anode terminal of the second MOS capacitive element is connected to a gate terminal of the first MOS capacitive element; A reference voltage signal having a constant voltage value is supplied to a connection point between the gate terminal of the MOS capacitor element and the anode terminal of the second MOS capacitor element, and the anode terminal of the first MOS capacitor element The first control voltage signal is supplied to the gate terminal of the second MOS capacitor element, and the second control voltage signal is supplied to the gate terminal of the second MOS capacitor element. An external control voltage signal is supplied to the gate terminal of the MOS capacitor element, and the node between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element of the frequency temperature compensation circuit is connected to the anode terminal of the MOS capacitor element. Is connected to the reference voltage signal of the frequency temperature compensation circuit, and the first MOS capacitor element is a MOS capacitor element for temperature-compensating a low temperature below room temperature, and the second The MOS capacitor element is a MOS capacitor element for temperature compensation at a temperature higher than room temperature.
請求項１０に記載の発明は、発振回路と、周波数温度補償回路と周波数外部電圧制御回路とを並列接続した並列回路と、圧電振動子と、を直列に接続した構造の温度補償発振器であって、前記発振回路が、トランジスタと、該トランジスタのベースにバイアス電圧を供給する為のバイアス回路とを少なくとも備えており、 前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記周波数外部電圧制御回路が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給し、ＭＯＳ容量素子のアノード端子に前記周波数温度補償回路の前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点を接続し、更に、該接続点を前記発振回路に接続することにより前記トランジスタのバイアス電圧信号を供給したものであり、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to claim 10 is a temperature compensated oscillator having a structure in which an oscillation circuit, a parallel circuit in which a frequency temperature compensation circuit and a frequency external voltage control circuit are connected in parallel, and a piezoelectric vibrator are connected in series. The oscillation circuit includes at least a transistor and a bias circuit for supplying a bias voltage to the base of the transistor, and the frequency temperature compensation circuit is connected to a fixed capacitor element at an anode terminal of the first MOS capacitor element. And a second MOS capacitor element connected in parallel so that the anode terminal of the second MOS capacitor element is connected to the gate terminal of the first MOS capacitor element. Supplying a first control voltage signal to the anode terminal of the first MOS capacitor element and supplying a second control voltage signal to the gate terminal of the second MOS capacitor element. The frequency external voltage control circuit supplies an external control voltage signal to the gate terminal of the MOS capacitor element, and the first MOS of the frequency temperature compensation circuit is connected to the anode terminal of the MOS capacitor element. A connection point between the gate terminal of the capacitive element and the anode terminal of the second MOS capacitive element is connected, and further, the bias voltage signal of the transistor is supplied by connecting the connection point to the oscillation circuit. The first MOS capacitor element is a MOS capacitor element for temperature compensation of a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation of a high temperature above room temperature. It is a feature.
請求項１１に記載の発明は、コルピッツ発振回路と、圧電振動子と、周波数温度補償回路と、固定容量素子と、を直列に接続した構造の温度補償発振器であって、前記周波数温度補償回路は、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記コルピッツ発振回路が、トランジスタのベースとエミッタとの間に接続された第１の容量回路と、前記エミッタとアースとの間に接続された第２の容量回路とを少なくとも備えており、前記第１の容量回路がＭＯＳ容量素子を利用した外部電圧制御回路を備え、該ＭＯＳ容量素子のゲート端子に制御電圧信号を供給することによって、前記第１の容量回路の容量値を可変したものであって、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to claim 11 is a temperature compensated oscillator having a structure in which a Colpitts oscillation circuit, a piezoelectric vibrator, a frequency temperature compensation circuit, and a fixed capacitance element are connected in series, wherein the frequency temperature compensation circuit comprises: The second MOS capacitor element is connected to the series circuit in which one terminal of the fixed capacitor element is connected to the anode terminal of the first MOS capacitor element, and the anode terminal of the second MOS capacitor element is connected to the first MOS capacitor element. A reference voltage signal having a constant voltage value at a connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element. , A first control voltage signal is supplied to the anode terminal of the first MOS capacitor element, and a second control voltage signal is supplied to the gate terminal of the second MOS capacitor element. The Colpitts oscillation circuit includes at least a first capacitance circuit connected between a base and an emitter of a transistor, and a second capacitance circuit connected between the emitter and the ground. The first capacitance circuit includes an external voltage control circuit using a MOS capacitance element, and the capacitance value of the first capacitance circuit is varied by supplying a control voltage signal to the gate terminal of the MOS capacitance element. The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. It is characterized by being.
請求項１２に記載の発明は、コルピッツ発振回路と、圧電振動子と、周波数温度補償回路と、固定容量素子と、を直列に接続した構造の温度補償発振器であって、前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子を接続し、該第１のＭＯＳ容量素子のゲート端子には第２のＭＯＳ容量素子のアノード端子を接続した直列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、
前記コルピッツ発振回路が、トランジスタのベースとエミッタとの間に接続された第１の容量回路と、前記エミッタとアースとの間に接続された第２の容量回路とを少なくとも備えており、前記第１の容量回路がＭＯＳ容量素子を利用した外部電圧制御回路を備え、該ＭＯＳ容量素子のゲート端子に制御電圧信号を供給することによって、前記第１の容量回路の容量値を可変し、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to claim 12 is a temperature compensated oscillator having a structure in which a Colpitts oscillation circuit, a piezoelectric vibrator, a frequency temperature compensation circuit, and a fixed capacitance element are connected in series, wherein the frequency temperature compensation circuit comprises: A series circuit in which a fixed capacitor is connected to the anode terminal of the first MOS capacitor, and an anode terminal of the second MOS capacitor is connected to the gate terminal of the first MOS capacitor, A reference voltage signal having a constant voltage value is supplied to a connection point between the gate terminal of the MOS capacitor element and the anode terminal of the second MOS capacitor element, and a first voltage is supplied to the anode terminal of the first MOS capacitor element. A configuration in which a control voltage signal is supplied and a second control voltage signal is supplied to the gate terminal of the second MOS capacitor;
The Colpitts oscillation circuit includes at least a first capacitance circuit connected between a base and an emitter of a transistor, and a second capacitance circuit connected between the emitter and the ground, The first capacitance circuit includes an external voltage control circuit using a MOS capacitance element. By supplying a control voltage signal to the gate terminal of the MOS capacitance element, the capacitance value of the first capacitance circuit is varied, and the first capacitance circuit One MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. .
請求項１３に記載の発明は、コルピッツ発振回路と、周波数温度補償回路と、圧電振動子と、を直列に接続した構造の温度補償発振器であって、前記周波数温度補償回路は、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記コルピッツ発振回路が、トランジスタのベースとエミッタとの間に接続された第１の容量回路と、前記エミッタとアースとの間に接続された第２の容量回路とを少なくとも備えており、前記第２の容量回路がＭＯＳ容量素子を利用した外部電圧制御回路を備え、該ＭＯＳ容量素子のゲート端子に制御電圧信号を供給することによって、前記第１の容量回路の容量値を可変したものでって、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to claim 13 is a temperature compensated oscillator having a structure in which a Colpitts oscillation circuit, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series, wherein the frequency temperature compensation circuit is a first MOS. A series circuit in which one terminal of a fixed capacitive element is connected to an anode terminal of the capacitive element and a second MOS capacitive element are connected to an anode terminal of the second MOS capacitive element and a gate terminal of the first MOS capacitive element. A parallel circuit connected in parallel, and supplying a reference voltage signal having a constant voltage value to a connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element, A first control voltage signal is supplied to the anode terminal of the first MOS capacitor element, and a second control voltage signal is supplied to the gate terminal of the second MOS capacitor element; The Lupitz oscillation circuit includes at least a first capacitive circuit connected between a base and an emitter of a transistor, and a second capacitive circuit connected between the emitter and the ground, and the second capacitive circuit The capacitance circuit includes an external voltage control circuit using a MOS capacitance element, and the capacitance value of the first capacitance circuit is varied by supplying a control voltage signal to the gate terminal of the MOS capacitance element. The first MOS capacitor element is a MOS capacitor element for temperature compensation of a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation of a high temperature above room temperature. It is a feature.
請求項１４に記載の発明は、コルピッツ発振回路と、周波数温度補償回路と、圧電振動子と、を直列に接続した構造の温度補償発振器であって、前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子を接続し、該第１のＭＯＳ容量素子のゲート端子には第２のＭＯＳ容量素子のアノード端子を接続した直列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記コルピッツ発振回路が、トランジスタのベースとエミッタとの間に接続された第１の容量回路と、前記エミッタとアースとの間に接続された第２の容量回路とを少なくとも備えており、前記第２の容量回路がＭＯＳ容量素子を利用した外部電圧制御回路を備え、該ＭＯＳ容量素子のゲート端子に制御電圧信号を供給することによって、前記第１の容量回路の容量値を可変したものであって、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to claim 14 is a temperature compensated oscillator having a structure in which a Colpitts oscillation circuit, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series, wherein the frequency temperature compensation circuit is a first MOS. A fixed circuit is connected to the anode terminal of the capacitive element, and the anode terminal of the second MOS capacitive element is connected to the gate terminal of the first MOS capacitive element. A reference voltage signal having a constant voltage value is supplied to a connection point between a gate terminal and the anode terminal of the second MOS capacitor element, and a first control voltage signal is supplied to the anode terminal of the first MOS capacitor element. And a second control voltage signal is supplied to the gate terminal of the second MOS capacitor element, and the Colpitts oscillation circuit is connected between the base and emitter of the transistor. At least a first capacitor circuit and a second capacitor circuit connected between the emitter and the ground, and the second capacitor circuit includes an external voltage control circuit using a MOS capacitor element. And a capacitance value of the first capacitor circuit is varied by supplying a control voltage signal to the gate terminal of the MOS capacitor element, and the first MOS capacitor element has a low temperature of room temperature or lower. It is a MOS capacitance element for compensation, and the second MOS capacitance element is a MOS capacitance element for temperature compensation of a high temperature above room temperature.
請求項１５に記載の発明は、前記周波数温度補償回路を構成する各ＭＯＳ容量素子のうち第１のＭＯＳ容量素子には直列に固定容量素子を、また第２のＭＯＳ容量素子には並列に固定容量素子を接続したことを特徴としている。 According to a fifteenth aspect of the present invention, among the MOS capacitor elements constituting the frequency temperature compensation circuit, a fixed capacitor element is fixed in series with the first MOS capacitor element and fixed in parallel with the second MOS capacitor element. It is characterized by connecting a capacitive element.
請求項１６に記載の発明は、前記周波数温度補償回路を構成する各ＭＯＳ容量素子の極性をいずれも逆としたことを特徴としている。 The invention described in claim 16 is characterized in that the polarities of the MOS capacitors constituting the frequency temperature compensation circuit are all reversed.
請求項１７に記載の発明は、前記周波数外部電圧制御回路又は、外部電圧制御回路を構成するＭＯＳ容量素子の極性を逆としたことを特徴とする請求項５乃至１４のいずれかに記載の温度補償発振器。 The invention described in claim 17 is characterized in that the frequency external voltage control circuit or the polarity of the MOS capacitance element constituting the external voltage control circuit is reversed. Compensation oscillator.
請求項１８に記載の発明は、圧電発振器の発振ループ中に挿入接続して周波数温度補償を行うための周波数温度補償回路であって、該周波数温度補償回路は、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えており、前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴としている。
The invention according to claim 18 is a frequency temperature compensation circuit for performing frequency temperature compensation by being inserted into an oscillation loop of a piezoelectric oscillator, wherein the frequency temperature compensation circuit is an anode of the first MOS capacitor element. A series circuit in which one terminal of the fixed capacitor is connected to the terminal and the second MOS capacitor are connected in parallel such that the anode terminal of the second MOS capacitor is connected to the gate terminal of the first MOS capacitor. A reference voltage signal having a constant voltage value is supplied to a connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element. supplying a first control voltage signal to the anode terminal of the capacitor, the gate terminal of the second MOS capacitance element has a structure for supplying a second control voltage signal, the first MOS capacitance element A MOS capacitance element for temperature compensation to temperatures below room temperature, and wherein the second MOS capacitance element is a MOS capacitance element for temperature compensation a temperature above room temperature.
請求項１９に記載の発明は、前記周波数温度補償回路を構成する各ＭＯＳ容量素子の極性をいずれも逆としたことを特徴としている。 The invention according to claim 19 is characterized in that the polarities of the MOS capacitors constituting the frequency temperature compensation circuit are all reversed.
請求項２０に記載の発明は、前記周波数温度補償回路と直列に１次温度補償用可変容量素子を接続し、温度に対して直線的に電圧が変化する１次温度補償電圧源からの電圧を前記１次温度補償用可変容量素子に対して印加したことを特徴している。 According to a twentieth aspect of the present invention, a primary temperature compensation variable capacitance element is connected in series with the frequency temperature compensation circuit, and a voltage from a primary temperature compensation voltage source whose voltage changes linearly with respect to temperature is obtained. It is applied to the primary temperature compensating variable capacitance element.
以上説明したように、特開２００１−６０８２８に開示された補償原理を利用した温度補償発振器において、更なる小型化・ローコスト化を追求しつつ、ＭＯＳ容量素子利用した様々な回路構成を提案することにより、より多くの要求仕様に対応できる温度補償発振器の実現を可能とした。 As described above, in the temperature compensated oscillator using the compensation principle disclosed in Japanese Patent Laid-Open No. 2001-60828, various circuit configurations using MOS capacitance elements are proposed while further miniaturization and low cost are pursued. This makes it possible to realize a temperature-compensated oscillator that can handle more required specifications.
以下、図示した実施例に基づいて本発明を詳細に説明する。
図１は、本発明の第一の実施例を示す回路図である。この例に示すＴＣＸＯは、コルピッツ発振回路Ｏｓ１に、直流阻止用固定容量素子Ｃ３と、温度補償回路Ｃｏ１と、水晶振動子Ｘとを直列に接続したもので、典型的なコルピッツ型水晶発振器に本発明を適用したものである。
Hereinafter, the present invention will be described in detail based on illustrated embodiments.
FIG. 1 is a circuit diagram showing a first embodiment of the present invention. The TCXO shown in this example is a Colpitts oscillation circuit Os1 connected to a DC blocking fixed capacitor C3, a temperature compensation circuit Co1 and a crystal resonator X in series. The invention is applied.
このコルピッツ発振回路Ｏｓ１は、発振増幅用トランジスタＴＲ１のコレクタは電源に接続され、バイパスコンデンサＣｃを介して高周波的に接地され、ベースには抵抗Ｒ１、Ｒ２によって適宜バイアスされており、ベースとエミッタ間に第一の固定容量素子Ｃ１が接続されると共に、エミッタと接地間にはエミッタ抵抗Ｒｅと第二の固定容量素子Ｃ２とが並列接続され、発振出力は前記エミッタから直流阻止用固定容量素子Ｃｏを介して取り出すように構成されている。更に、前記トランジスタＴＲ１のベースには直流阻止用固定容量素子Ｃ３を介して温度補償回路Ｃｏ１と水晶振動子Ｘが接続されている。
この温度補償回路Ｃｏ１は、低温部補償用ＭＯＳ容量素子ＭＬと感度調整用固定容量素子Ｃ４との直列接続回路と、高温部補償用ＭＯＳ容量素子ＭＨとの並列接続からなっており、低温用ＭＯＳ容量素子ＭＬと高温用ＭＯＳ容量素子ＭＨが互いに異なる極性の向きとなっている。
In this Colpitts oscillation circuit Os1, the collector of the oscillation amplifying transistor TR1 is connected to a power supply, and is grounded in high frequency via a bypass capacitor Cc. The first fixed capacitance element C1 is connected to the emitter, and an emitter resistor Re and the second fixed capacitance element C2 are connected in parallel between the emitter and the ground. The oscillation output is output from the emitter to the DC blocking fixed capacitance element Co. It is comprised so that it may take out via. Further, a temperature compensation circuit Co1 and a crystal resonator X are connected to the base of the transistor TR1 via a DC blocking fixed capacitor C3.
This temperature compensation circuit Co1 is composed of a series connection circuit of a low-temperature part compensation MOS capacitor element ML and a sensitivity adjustment fixed capacitor element C4 and a parallel connection of a high-temperature part compensation MOS capacitor element MH. The capacitive element ML and the high-temperature MOS capacitive element MH have different polarities.
また、低温用ＭＯＳ容量素子ＭＬのアノード端子側と固定容量素子Ｃ４との接続中点には、低温部制御電圧信号ＶＬが入力抵抗Ｒ４を介して供給されていて、高温用ＭＯＳ容量素子ＭＨのゲート端子側には入力抵抗Ｒ５を介して高温部制御電圧信号ＶＨが供給されている。そして、この低温用ＭＯＳ容量素子ＭＬのゲート端子側と高温用ＭＯＳ容量素子ＭＨのアノード端子側には基準電圧信号Ｖｒｅｆが入力抵抗Ｒ６を介して供給されている。 In addition, a low temperature part control voltage signal VL is supplied via the input resistor R4 to the midpoint of connection between the anode terminal side of the low temperature MOS capacitor ML and the fixed capacitor C4, and the high temperature MOS capacitor MH The high temperature part control voltage signal VH is supplied to the gate terminal side via the input resistor R5. A reference voltage signal Vref is supplied to the gate terminal side of the low-temperature MOS capacitor element ML and the anode terminal side of the high-temperature MOS capacitor element MH via the input resistor R6.
このコルピッツ発振回路Ｏｓ１の動作については既に周知であるから説明を省略し、本発明の特徴である温度補償回路Ｃｏ１について詳細に説明する。ＭＯＳ容量素子の特性を温度補償回路に利用する原理は、前述の従来技術でべた通りであり、この実施例は従来例にくらべて、各補償回路を並列にした点と、感度調整用固定容量素子Ｃ４を低温部補償用と高温部補償用とを共通にしたことにより１つ削除した点が異なる。 Since the operation of the Colpitts oscillation circuit Os1 is already well known, a description thereof will be omitted, and the temperature compensation circuit Co1 that is a feature of the present invention will be described in detail. The principle of utilizing the characteristics of the MOS capacitance element in the temperature compensation circuit is as described in the above-described conventional technology. This embodiment is different from the conventional example in that each compensation circuit is arranged in parallel, and a fixed capacitor for sensitivity adjustment. The difference is that one element C4 is deleted because the low temperature portion compensation and the high temperature portion compensation are made common.
まず、各補償回路を直列に接続した場合と並列に接続した場合との違いについて説明する。直並列の合成容量値の性質を考えると、複数の容量素子を直列接続した場合には小さい容量値の変化が支配的となり、並列接続した場合には大きい容量値の変化が支配的となることは周知の通りである。よって、前記従来技術で説明した図１５の様な容量特性をもつＭＯＳ容量素子を使用した場合、ほとんどの温度範囲において低温部補償回路の容量値が高温部補償回路の容量値より大きいので、これらを直列に接続した場合は高温部補償回路の容量変化が大きく影響し、よって補償回路全体として高温部の補償感度が大きくなる傾向を示す。また逆にこれらを並列に接続した場合は、低温部補償回路の容量変化が大きく影響し、低温部の補償感度が大きくなる傾向を示す。
しかしここで、補償回路全体の負荷容量を一定とした場合は、低温部補償回路と高温部補償回路とを並列に接続すると、各補償回路の容量値を小さく設計できることになる。よって直列に接続した場合に比べ、夫々のＭＯＳ容量素子の容量値、及び感度調整用固定容量素子の値を小さく設計できるのでＩＣの小型化が可能となる。また感度調整用固定容量素子Ｃ４は、低温部補償用ＭＯＳ容量素子ＭＬに対しては直列に、また高温部補償用ＭＯＳ容量素子ＭＨに対しては並列に接続されているので、前述の従来技術で説明した低温部と高温部における感度調整を１つの容量素子で同時に行うことができる。この為ＩＣ化する際に最も占有面積の大きい固定容量素子を１つ削除することができ、更なるＩＣの小型化が可能となる。
更に又、ＭＯＳ容量素子は制御電圧信号に重畳される交流成分の振幅に比例して電圧可変感度が劣化してしまうという特性をもつ。ここで各補償回路を並列に接続し交流成分を分流した場合、夫々のＭＯＳ容量素子の各制御電圧信号に重畳される交流成分の振幅は下がることになる為、夫々のＭＯＳ容量素子の電圧可変感度の劣化を緩和することが可能となる。
First, the difference between the case where the compensation circuits are connected in series and the case where they are connected in parallel will be described. Considering the properties of series-parallel composite capacitance values, small capacitance values change when multiple capacitors are connected in series, and large capacitance values change when parallel devices are connected in parallel. Is well known. Therefore, when the MOS capacitance element having the capacitance characteristic as shown in FIG. 15 described in the prior art is used, the capacitance value of the low temperature compensation circuit is larger than the capacitance value of the high temperature compensation circuit in most temperature ranges. When these are connected in series, the capacitance change of the high-temperature part compensation circuit has a large influence, and thus the compensation sensitivity of the high-temperature part as a whole tends to increase. On the contrary, when these are connected in parallel, the capacitance change of the low temperature part compensation circuit has a great influence, and the compensation sensitivity of the low temperature part tends to increase.
However, here, when the load capacity of the entire compensation circuit is constant, the capacitance value of each compensation circuit can be designed to be small by connecting the low temperature part compensation circuit and the high temperature part compensation circuit in parallel. Therefore, compared with the case where they are connected in series, the capacitance value of each MOS capacitor element and the value of the fixed capacitor element for sensitivity adjustment can be designed to be small, so that the IC can be miniaturized. The sensitivity adjusting fixed capacitance element C4 is connected in series to the low temperature portion compensation MOS capacitance element ML and in parallel to the high temperature portion compensation MOS capacitance element MH. The sensitivity adjustment in the low temperature part and the high temperature part described in the above can be performed simultaneously with one capacitive element. For this reason, when making an IC, one fixed capacitance element having the largest occupation area can be deleted, and the IC can be further miniaturized.
Furthermore, the MOS capacitor element has a characteristic that the voltage variable sensitivity is deteriorated in proportion to the amplitude of the AC component superimposed on the control voltage signal. Here, when each compensation circuit is connected in parallel and the alternating current component is shunted, the amplitude of the alternating current component superimposed on each control voltage signal of each MOS capacitive element is lowered, so that the voltage of each MOS capacitive element can be varied. Sensitivity degradation can be mitigated.
ここで増幅器のバイアス回路は、ここでは電流帰還型の固定バイアス回路を例に説明したが、これに限らず自己バイアス回路や単なる固定バイアス回路を用いても、そしてカスコード型としても良く、またインバーター発振回路を使用しても良い。また前述の様に、各ＭＯＳ容量素子ＭＬ、ＭＨはその特性が逆のもの存在するので、これらの極性の向きは共に逆であっても良い。またここで、水晶振動子Ｘと固定容量素子Ｃ３の配置を入換えても、また温度補償回路Ｃｏ１の向きを逆にしてもこの温度補償回路の効果は変らない。 Here, the bias circuit of the amplifier has been described by taking a current feedback type fixed bias circuit as an example. However, the present invention is not limited to this, and a self-bias circuit, a simple fixed bias circuit may be used, and a cascode type may be used. An oscillation circuit may be used. Further, as described above, since the MOS capacitative elements ML and MH have reverse characteristics, both polar directions may be reversed. Here, even if the arrangement of the crystal unit X and the fixed capacitance element C3 is switched or the direction of the temperature compensation circuit Co1 is reversed, the effect of the temperature compensation circuit does not change.
図２（Ａ）は本発明の第二の実施例を示す回路図であり、コルピッツ発振回路Ｏｓ２に、温度補償回路Ｃｏ１と、水晶振動子Ｘとを直列に接続したものである。この温度補償回路Ｃｏ１は第一の実施例で説明したものと同様の、並列接続の温度補償回路である。またこの回路図は第一の実施例に比べて、直流阻止用固定容量素子Ｃ３の位置が異なる。すなわち、前記コルピッツ発振回路Ｏｓ１を構成するトランジスタＴＲ１のベースに接続されたバイアス抵抗Ｒ１とＲ２との接続点１と、この接続点１より温度補償回路Ｃｏ１側に設けた、固定容量素子Ｃ１と前記ベースとの接続点２との間に、前記直流阻止用、すなわちベースバイアスと前記温度補償回路Ｃｏに供給された各制御電圧信号の直流成分とを阻止する為の固定容量素子Ｃ３を挿入したものである。（簡単のため、以下この直流阻止用固定容量素子Ｃ３を含めてコルピッツ発振回路Ｏｓ２と称す。）
この様に固定容量素子Ｃ３を発振ループの中の負荷容量から外すことで、温度補償回路Ｃｏ１の補償感度は増加し、全体の負荷容量を小さく設計できるのでＩＣの小型化が可能となる。
この固定容量素子Ｃ３は、前述の様にトランジスタＴＲ１のベースとバイアス抵抗との接続点１とベースと固定容量素子Ｃ１との接続点２との間に挿入するので、前記トランジスタＴＲ１のベースとエミッタ間の容量Ｃｂｃに直列に接続されることになる。ここで、固定容量素子Ｃ３は発振信号を増幅器に入力する為に出来るだけ大きい値が好ましいが、ＩＣの小型化を考慮して現在数十ｐＦ程度を想定している。一方このＣｂｃは通常数ｐＦと小さい値であるので、Ｃ３とＣｂｃとの直列合成容量値も小さな値となる。よってこれらと並列に接続されている固定容量素子Ｃ１への影響は非常に小さい。
またこの効果はこの例に限らず、図２（Ａ）中の温度補償回路Ｃｏ１を、図２（Ｂ）に示すような、従来技術で説明した直列温度補償回路とした場合においても同様の効果があり、また後述する外部制御回路等を付加した場合において、各制御電圧信号等の直流信号分を阻止するための固定容量素子を接続する必要性がある回路構成において有効である。
FIG. 2A is a circuit diagram showing a second embodiment of the present invention, in which a temperature compensation circuit Co1 and a crystal resonator X are connected in series to a Colpitts oscillation circuit Os2. The temperature compensation circuit Co1 is a parallel-connected temperature compensation circuit similar to that described in the first embodiment. In addition, this circuit diagram differs from the first embodiment in the position of the DC blocking fixed capacitor C3. That is, the
By removing the fixed capacitor C3 from the load capacitance in the oscillation loop in this way, the compensation sensitivity of the temperature compensation circuit Co1 increases, and the overall load capacitance can be designed to be small, so that the IC can be miniaturized.
Since the fixed capacitance element C3 is inserted between the
This effect is not limited to this example, and the same effect can be obtained when the temperature compensation circuit Co1 in FIG. 2A is the series temperature compensation circuit described in the related art as shown in FIG. 2B. In addition, when an external control circuit or the like to be described later is added, it is effective in a circuit configuration in which it is necessary to connect a fixed capacitance element for blocking a DC signal component such as each control voltage signal.
図３は本発明の第三の実施例を示す回路図であり、コルピッツ発振回路Ｏｓ１に、温度補償回路Ｃｏ２と、水晶振動子Ｘとを直列に接続したものである。
この温度補償回路Ｃｏ１は、低温部補償用ＭＯＳ容量素子ＭＬと感度調整用固定容量素子Ｃ４との直列接続回路と、高温部補償用ＭＯＳ容量素子ＭＨとの並列接続からなっており、低温用ＭＯＳ容量素子ＭＬと高温用ＭＯＳ容量素子ＭＨが互いに異なる極性の向きとなっている。
また、低温用ＭＯＳ容量素子ＭＬのアノード端子側と固定容量素子Ｃ４との接続中点には、低温部制御電圧信号ＶＬが入力抵抗Ｒ４を介して供給されていて、高温用ＭＯＳ容量素子ＭＨのゲート端子側には入力抵抗Ｒ５を介して高温部制御電圧信号ＶＨが供給されている。ここでこの温度補償回路Ｃｏ２の低温用ＭＯＳ容量素子ＭＬのゲート端子と高温用ＭＯＳ容量素子ＭＨのアノード端子との接続点を、コルピッツ発振回路Ｏｓ１の入力となるトランジスタＴＲ１のベースに接続することにより、基準電圧信号を供給している。これは第一の実施例に比べて、電圧値が一定である基準電圧信号Ｖｒｅｆの値を前記トランジスタＴＲ１のベースバイアスに設定することにより、基準電圧信号Ｖｒｅｆと直流阻止用固定容量素子Ｃ３とを削除した点が異なる。（以下簡単の為に、基準電圧信号Ｖｒｅｆを削除し、直流阻止用固定容量素子Ｃ３を必要としないこの温度補償回路を、温度補償回路Ｃｏ２と称す。）これにより補償電圧信号発生回路の簡素化及び省電力化、そしてＩＣの小型化が可能となり、また固定容量素子Ｃ３をなくしたことによるＩＣの小型化の効果も大きい。
FIG. 3 is a circuit diagram showing a third embodiment of the present invention, in which a temperature compensation circuit Co2 and a crystal resonator X are connected in series to a Colpitts oscillation circuit Os1.
This temperature compensation circuit Co1 is composed of a series connection circuit of a low-temperature part compensation MOS capacitor element ML and a sensitivity adjustment fixed capacitor element C4 and a parallel connection of a high-temperature part compensation MOS capacitor element MH. The capacitive element ML and the high-temperature MOS capacitive element MH have different polarities.
In addition, a low temperature part control voltage signal VL is supplied via the input resistor R4 to the midpoint of connection between the anode terminal side of the low temperature MOS capacitor ML and the fixed capacitor C4, and the high temperature MOS capacitor MH The high temperature part control voltage signal VH is supplied to the gate terminal side via the input resistor R5. Here, the connection point between the gate terminal of the low-temperature MOS capacitor element ML and the anode terminal of the high-temperature MOS capacitor element MH of the temperature compensation circuit Co2 is connected to the base of the transistor TR1 serving as the input of the Colpitts oscillation circuit Os1. The reference voltage signal is supplied. As compared with the first embodiment, the reference voltage signal Vref and the fixed capacitance element C3 for blocking DC are connected by setting the value of the reference voltage signal Vref having a constant voltage value to the base bias of the transistor TR1. Deleted points are different. (Hereinafter, for the sake of simplicity, this temperature compensation circuit that deletes the reference voltage signal Vref and does not require the DC blocking fixed capacitance element C3 is referred to as a temperature compensation circuit Co2.) This simplifies the compensation voltage signal generation circuit. In addition, power saving and IC miniaturization are possible, and the effect of miniaturizing the IC due to the elimination of the fixed capacitance element C3 is great.
図４は本発明の第四の実施例を示す回路図であり、コルピッツ発振回路Ｏｓ１に、直流阻止用固定容量素子Ｃ３と、温度補償回路Ｃｏ１と、水晶振動子Ｘと、外部制御回路Ｖｃ１とを直列に接続したものである。この外部制御回路Ｖｃ１はＭＯＳ容量素子ＭＡのゲート端子側に入力抵抗Ｒ７を介して外部制御電圧信号Ｖａｆｃを供給すると共に、水晶振動子Ｘと接続し、一方のアノード端子側は接地している。これは第一の実施例に比べて、外部制御回路Ｖｃ１を付加した点が異なり、ＭＯＳ容量素子ＭＡの高可変感度で直線性の優れた電圧／容量特性を利用すれば、直線性の優れた周波数外部可変が可能となる。（又は直線性の優れたＡＦＣ：Ａｕｔｏｍａｔｉｃ Ｆｒｅｑｕｅｎｃｙ Ｃｏｎｔｒｏｌ機能を付加したともいえる。）またこの外部制御回路Ｖｃ１は図５（Ａ）に示す外部制御回路Ｖｃ２ように、前記ＭＯＳ容量素子のアノード電極に入力抵抗Ｒ８を介して基準電圧信号Ｖａｒｅｆを供給し調整することにより、このＭＯＳ容量素子ＭＡの容量特性の任意の曲線部分を周波数制御に利用することが可能となり、各ＭＯＳ容量素子ＭＡの曲線の製造誤差を補正することも可能となる。更にまた、この外部制御回路Ｖｃ１及びＶｃ２の構成を並列に接続したものを利用すれば、より精度よく周波数調整を行うことができるので、中心周波数の微調整なども可能となる。ここで、ＩＣの製作工程においては固定容量素子の製作よりもＭＯＳ容量素子の製作の方が容易であるので、外部制御回路Ｖｃ１及びＶｃ２の両端子に供給する制御電圧信号を夫々一定電圧とするか、又は一方端子を一定電圧とし他方端子を接地することにより、ＭＯＳ容量素子ＭＡを固定容量素子として利用することも出来る。また、図４中の温度補償回路Ｃｏ１を、図２（Ｂ）に示すような従来技術で説明した直列温度補償回路とした場合においても前述と同様の効果がある。 FIG. 4 is a circuit diagram showing a fourth embodiment of the present invention. A Colpitts oscillation circuit Os1, a DC blocking fixed capacitance element C3, a temperature compensation circuit Co1, a crystal resonator X, an external control circuit Vc1, Are connected in series. The external control circuit Vc1 supplies an external control voltage signal Vafc to the gate terminal side of the MOS capacitor element MA via the input resistor R7, and is connected to the crystal resonator X, and one anode terminal side is grounded. This is different from the first embodiment in that an external control circuit Vc1 is added. If the voltage / capacitance characteristic having high linearity and high linearity of the MOS capacitor element MA is used, the linearity is excellent. The frequency can be changed externally. (Also, it can be said that an AFC (Automatic Frequency Control function) having excellent linearity is added.) The external control circuit Vc1 is input to the anode electrode of the MOS capacitor element like the external control circuit Vc2 shown in FIG. By supplying and adjusting the reference voltage signal Varef via the resistor R8, it becomes possible to use an arbitrary curve portion of the capacitance characteristic of the MOS capacitor element MA for frequency control, and manufacture of the curve of each MOS capacitor element MA. It is also possible to correct the error. Furthermore, if the external control circuits Vc1 and Vc2 are connected in parallel, the frequency can be adjusted with higher accuracy, so that the center frequency can be finely adjusted. Here, in the manufacturing process of the IC, it is easier to manufacture the MOS capacitor element than to manufacture the fixed capacitor element. Therefore, the control voltage signals supplied to both terminals of the external control circuits Vc1 and Vc2 are set to constant voltages. Alternatively, the MOS capacitor MA can be used as a fixed capacitor by setting one terminal to a constant voltage and grounding the other terminal. Further, when the temperature compensation circuit Co1 in FIG. 4 is the series temperature compensation circuit described in the related art as shown in FIG. 2B, the same effect as described above can be obtained.
図６は本発明の第五の実施例を示す回路図であり、コルピッツ発振回路Ｏｓ１に、外部制御回路Ｖｃ１と、直流阻止用固定容量素子Ｃ５と、温度補償回路Ｃｏ１と、水晶振動子Ｘとを直列に接続したものである。これはＭＯＳ容量素子ＭＡのアノード端子に基準電圧信号としてトランジスタＴＲ１のベースバイアスを供給したもので、外部制御回路Ｖｃ２の様な調整機能を有したうえで、基準電圧信号Ｖａｒｅｆと直流阻止用固定容量素子Ｃ３を削除する効果がある。また、図６中の温度補償回路Ｃｏ１を、図２（Ｂ）に示すような従来技術で説明した直列温度補償回路とした場合においても前述と同様の効果がある。更にここで、この構成の水晶振動子Ｘの両端に印加される電圧に注目すると、前記第４の実施例の図４においては、この水晶振動子の両端に温度補償回路の基準電圧信号Ｖｒｅｆと外部制御電圧信号Ｖａｆｃとが印加されている。この外部制御電圧信号Ｖａｆｃの電圧は客先での使用時に個別に設定される為に、水晶振動子Ｘの両端に印加される電圧は設計時には決定されない。一方この第五の実施例の図６（及び前述の図１、図２）の場合、温度補償回路の基準電圧信号Ｖｒｅｆと接地との間に水晶振動子Ｘが挿入されている。ここで前記基準電圧信号数Ｖｒｅｆが数Ｖに設定されていると仮定すると、このＴＣＸＯの電源投入時には水晶振動子Ｘの両端には数Ｖの電圧がかかることになり、これは初期振動子電流を増加させ、しいては発振回路の起動特性を早くする効果、及び外部制御電圧信号Ｖａｆｃの値によらず常に安定させるという効果がある。この効果はこの例に限らず、発振回路と、温度補償回路と、水晶振動子と、外部制御回路とを、直流信号が互いに干渉しない範囲において、水晶振動子の両端にかかる電圧が電源投入時に高く、そして安定した値となるように並べて構成すれば良い。例えば、この温度補償回路の高温部制御電圧信号ＶＨと低温部制御電圧信号ＶＬとは、常温近辺の温度範囲においてほぼ０Ｖとなる様に設定したとする。一方図５（Ａ）に示す外部制御回路Ｖｃ２の基準電圧信号Ｖａｒｅｆは数Ｖとなる様に設計した場合においては、この高温部制御電圧信号ＶＨ又は低温部制御電圧信号ＶＬと外部制御回路Ｖｃ２の基準電圧信号Ｖａｒｅｆとの間に水晶振動子Ｘが挿入される様な回路配置にすれば、常温近辺の温度範囲において前述と同様の効果が期待できる。
FIG. 6 is a circuit diagram showing a fifth embodiment of the present invention. The Colpitts oscillation circuit Os1, an external control circuit Vc1, a DC blocking fixed capacitance element C5, a temperature compensation circuit Co1, a crystal oscillator X, and Are connected in series. This is the one in which the base bias of the transistor TR1 is supplied as a reference voltage signal to the anode terminal of the MOS capacitor element MA, and has the adjustment function like the external control circuit Vc2, and then the reference voltage signal Varef and the DC blocking fixed capacitor. There is an effect of deleting the element C3. In addition, when the temperature compensation circuit Co1 in FIG. 6 is a series temperature compensation circuit described in the related art as shown in FIG. Furthermore Here, focusing on the voltages applied to both ends of the quartz crystal resonator X of this arrangement, the in FIG. 4 of the fourth embodiment, the reference voltage signal Vref temperature compensation circuit to both ends of the crystal oscillator is externally controlled voltage signal Vafc Togashirushi pressurized with. Since the voltage of the external control voltage signal Vafc is individually set at the time of use at the customer, the voltage applied to both ends of the crystal unit X is not determined at the time of design. On the other hand, in the case of FIG. 6 (and FIGS. 1 and 2 described above) of the fifth embodiment, a crystal resonator X is inserted between the reference voltage signal Vref of the temperature compensation circuit and the ground. Assuming that the reference voltage signal number Vref is set to several V, when the TCXO is turned on, a voltage of several volts is applied to both ends of the crystal resonator X, which is the initial transducer current. Is increased, and the start-up characteristic of the oscillation circuit is accelerated, and it is always stabilized regardless of the value of the external control voltage signal Vafc. This effect is not limited to this example, and the voltage applied to both ends of the crystal resonator is limited when the power is turned on so that the DC signal does not interfere with the oscillation circuit, temperature compensation circuit, crystal resonator, and external control circuit. What is necessary is just to arrange | position side by side so that it may become a high and stable value. For example, it is assumed that the high-temperature part control voltage signal VH and the low-temperature part control voltage signal VL of this temperature compensation circuit are set to be approximately 0 V in the temperature range near room temperature. On the other hand, when the reference voltage signal Varef of the external control circuit Vc2 shown in FIG. 5A is designed to be several V, the high-temperature part control voltage signal VH or the low-temperature part control voltage signal VL and the external control circuit Vc2 If the circuit arrangement is such that the crystal resonator X is inserted between the reference voltage signal Varef and the same effect as described above can be expected in the temperature range near room temperature.
図７は本発明の第六の実施例を示す回路図であり、コルピッツ発振回路Ｏｓ１に、直流阻止用固定容量素子Ｃ３と、温度補償回路Ｃｏ１と、外部制御回路Ｖｃ２と、水晶振動子Ｘとを直列に接続したものである。このコルピッツ発振回路Ｏｓ１と、外部制御回路Ｖｃ２と、温度補償回路Ｃｏ１の構成は前述の通りであるが、外部制御回路Ｖｃ２のＭＯＳ容量素子ＭＡのアノード電極は、温度補償回路Ｃｏ１のＭＯＳ容量素子ＭＬのゲート電極とＭＨのアノード電極との接続点に接続することにより、温度補償回路Ｃｏ１の基準電圧信号Ｖｒｅｆを供給していて、一方のＭＯＳ容量素子ＭＡのゲート端子には入力抵抗Ｒ７を介して制御電圧信号Ｖａｆｃが供給され、水晶振動子Ｘに接続されている。これは第四の実施例に比べて、外部制御回路Ｖｃ２の基準電圧信号Ｖａｒｅｆを、温度補償回路Ｃｏ１の基準電圧信号Ｖｒｅｆに調整し、共通化したことが異なる。これにより、外部制御回路又は温度補償回路に供給する基準電圧信号を一つ削除することが可能となる。 FIG. 7 is a circuit diagram showing a sixth embodiment of the present invention. A Colpitts oscillation circuit Os1, a DC blocking fixed capacitance element C3, a temperature compensation circuit Co1, an external control circuit Vc2, a crystal oscillator X, and Are connected in series. The Colpitts oscillation circuit Os1, the external control circuit Vc2, and the temperature compensation circuit Co1 are configured as described above. The anode electrode of the MOS capacitor element MA of the external control circuit Vc2 is the MOS capacitor element ML of the temperature compensation circuit Co1. The reference voltage signal Vref of the temperature compensation circuit Co1 is supplied by connecting to the connection point between the gate electrode of MH and the anode electrode of MH, and the gate terminal of one MOS capacitor element MA is connected via the input resistor R7. A control voltage signal Vafc is supplied and connected to the crystal unit X. This is different from the fourth embodiment in that the reference voltage signal Varef of the external control circuit Vc2 is adjusted to the reference voltage signal Vref of the temperature compensation circuit Co1 and shared. Thereby, one reference voltage signal supplied to the external control circuit or the temperature compensation circuit can be deleted.
図８は本発明の第七の実施例を示す回路図であり、コルピッツ発振回路Ｏｓ１に、外部制御回路Ｖｃ１と直流阻止用固定容量素子Ｃ５との直列接続回路と、温度補償回路Ｃｏ２との並列接続した回路を接続し、更に水晶振動子Ｘとを直列に接続したものである。この外部制御回路Ｖｃ１と温度補償回路Ｃｏ２の構成は前述の通りであり、外部制御回路Ｖｃ１のＭＯＳ容量素子ＭＡのアノード電極は、温度補償回路Ｃｏ２のＭＯＳ容量素子ＭＬのゲート電極とＭＨのアノード電極との接続点に接続し、更にコルピッツ発振回路Ｏｓ１の入力となるトランジスタＴＲ１のベースと接続している。これは、前記温度補償回路Ｃｏ２の基準電圧信号Ｖｒｅｆと、外部制御回路Ｖｃ１の基準電圧信号Ｖａｒｅｆとを、共にトランジスタＴＲ１のベースバイアスに等しく調整することにより可能となる。この構成により、温度補償回路Ｃｏ２と外部制御回路Ｖｃ１の二つの基準電圧信号と、二つの直流阻止用固定容量素子を削除することが可能となる。またこの構成は、前記第四、第五の実施例の様に外部制御回路Ｖｃ１を温度補償回路Ｃｏ２と直列に接続する場合と比較して、発振ループ全体の負荷容量値を下げる効果があり、結果としてこの温度補償回路Ｃｏ２と外部制御回路Ｖｃ１の各ＭＯＳ容量素子と固定容量素子の値を下げることができ、ＩＣの小型化が可能となる。更に又、第一の実施例で説明したように、夫々の回路を並列接続することで、夫々のＭＯＳ容量素子に流れる交流成分が分流される結果、夫々の制御電圧信号に重畳される交流成分の振幅は下がることになる為、夫々のＭＯＳ容量素子の電圧可変感度の劣化を緩和することが可能となる。またここでは、前記温度補償回路Ｃｏ２と前記外部制御回路Ｖｃ１との並列回路で説明したが、前記温度補償回路Ｃｏ２は図２（Ｂ）に示す直列補償回路としても、また前記外部制御回路Ｖｃ１を前記外部制御回路Ｖｃ２としても、前述の並列接続による効果、すなわち発振ループ全体の負荷容量値を下げる効果と、夫々のＭＯＳ容量素子の電圧可変感度の劣化を緩和する効果がある。 FIG. 8 is a circuit diagram showing a seventh embodiment of the present invention, in which a Colpitts oscillation circuit Os1 is connected in parallel with a series connection circuit of an external control circuit Vc1 and a DC blocking fixed capacitance element C5 and a temperature compensation circuit Co2. A connected circuit is connected, and a crystal resonator X is further connected in series. The configurations of the external control circuit Vc1 and the temperature compensation circuit Co2 are as described above. The anode electrode of the MOS capacitor element MA of the external control circuit Vc1 is the gate electrode of the MOS capacitor element ML of the temperature compensation circuit Co2 and the anode electrode of MH. Is further connected to the base of the transistor TR1 which is the input of the Colpitts oscillation circuit Os1. This can be achieved by adjusting both the reference voltage signal Vref of the temperature compensation circuit Co2 and the reference voltage signal Varef of the external control circuit Vc1 to be equal to the base bias of the transistor TR1. With this configuration, it is possible to delete the two reference voltage signals of the temperature compensation circuit Co2 and the external control circuit Vc1, and the two DC blocking fixed capacitance elements. Further, this configuration has an effect of lowering the load capacitance value of the entire oscillation loop as compared with the case where the external control circuit Vc1 is connected in series with the temperature compensation circuit Co2 as in the fourth and fifth embodiments. As a result, the values of the MOS capacitance elements and the fixed capacitance elements of the temperature compensation circuit Co2 and the external control circuit Vc1 can be lowered, and the IC can be miniaturized. Furthermore, as described in the first embodiment, by connecting the respective circuits in parallel, the alternating current component flowing through each MOS capacitor element is shunted, and as a result, the alternating current component superimposed on each control voltage signal. Therefore, the deterioration of the voltage variable sensitivity of each MOS capacitor element can be alleviated. Here, the parallel circuit of the temperature compensation circuit Co2 and the external control circuit Vc1 has been described. However, the temperature compensation circuit Co2 may be configured as a series compensation circuit shown in FIG. The external control circuit Vc2 also has the effect of the parallel connection described above, that is, the effect of reducing the load capacitance value of the entire oscillation loop and the effect of alleviating the deterioration of the voltage variable sensitivity of each MOS capacitor element.
図９（Ａ）は本発明の第八の実施例を示す回路図であり、コルピッツ発振回路Ｏｓ３、すなわち前記コルピッツ発振回路Ｏｓ２の固定容量素子Ｃ１に代えて外部制御回路Ｖｃ１を構成するＭＯＳ容量素子ＭＡを配置すると共に、水晶振動子Ｘと、温度補償回路Ｃｏ１と、直流阻止用固定容量素子Ｃ５とを直列に接続したものである。コルピッツ発振回路Ｏｓ３は前記第二の実施例で説明したコルピッツ発振回路Ｏｓ２と同様に、直流阻止用固定容量素子Ｃ３が内部に組込まれている。またこの実施例では、第二の実施例で説明したコルピッツ発振回路の固定容量素子Ｃ１の代わりに、ＭＯＳ容量素子ＭＡをそのゲート電極が振動子Ｘと直流阻止用固定容量素子Ｃ３との接続中点に接続する向きに挿入されている。そしてこのゲート電極には入力抵抗Ｒ７を介して、外部制御電圧信号Ｖａｆｃが供給されており、周波数の調整を可能とするとともに、このコルピッツ発振回路Ｏｓ３の負性抵抗の調整を可能としている。これは異なる周波数帯の水晶振動子を同一のＩＣで使用する際に有効な手段となる。一方このＭＯＳ容量素子ＭＡのアノード電極はトランジスタＴＲ１のエミッタに接続されているので、エミッタ電圧を調整することが可能な範囲において、このＭＯＳ容量素子ＭＡの基準電圧を調整することができ、任意の容量特性曲線を利用することも可能である。また図９（Ｂ）は、同図（Ａ）に示す温度補償回路Ｃｏ１のＶｒｅｆを０Ｖに設定し、低温部制御電圧信号ＶＬと高温部制御電圧信号ＶＨの接続点を接地した場合の図である。これにより固定容量素子Ｃ５、入力抵抗Ｒ６、そして基準電圧信号Ｖｒｅｆを削除することが可能となる。 FIG. 9A is a circuit diagram showing an eighth embodiment of the present invention, and is a Colpitts oscillation circuit Os3, that is, a MOS capacitance element constituting the external control circuit Vc1 instead of the fixed capacitance element C1 of the Colpitts oscillation circuit Os2. In addition to the arrangement of the MA, the crystal unit X, the temperature compensation circuit Co1, and the DC blocking fixed capacitor C5 are connected in series. The Colpitts oscillation circuit Os3 has a DC blocking fixed capacitor C3 incorporated therein as in the Colpitts oscillation circuit Os2 described in the second embodiment. In this embodiment, instead of the fixed capacitance element C1 of the Colpitts oscillation circuit described in the second embodiment, the MOS capacitance element MA is connected to the vibrator X and the DC blocking fixed capacitance element C3. Inserted in the direction to connect to the point. The gate electrode is supplied with an external control voltage signal Vafc via an input resistor R7, thereby enabling adjustment of the frequency and adjustment of the negative resistance of the Colpitts oscillation circuit Os3. This is an effective means for using crystal resonators of different frequency bands in the same IC. On the other hand, since the anode electrode of the MOS capacitor element MA is connected to the emitter of the transistor TR1, the reference voltage of the MOS capacitor element MA can be adjusted within a range in which the emitter voltage can be adjusted. It is also possible to use a capacity characteristic curve. FIG. 9B is a diagram in the case where Vref of the temperature compensation circuit Co1 shown in FIG. 9A is set to 0 V and the connection point between the low temperature part control voltage signal VL and the high temperature part control voltage signal VH is grounded. is there. As a result, the fixed capacitor C5, the input resistor R6, and the reference voltage signal Vref can be deleted.
図１０は本発明の第九の実施例を示す回路図であり、コルピッツ発振回路Ｏｓ４、すなわち前記コルピッツ発振回路Ｏｓ２の固定容量素子Ｃ２に代えて外部制御回路Ｖｃ１を構成するＭＯＳ容量素子ＭＡを配置すると共に、温度補償回路Ｃｏ１と、水晶振動子Ｘとを直列に接続したものである。コルピッツ発振回路Ｏｓ４は前記第二の実施例で説明したものと同様に、直流阻止用固定容量素子Ｃ３が内部に組込まれている。またこの実施例では、前記第二の実施例で説明したコルピッツ発振回路の固定容量素子Ｃ２の代わりに、ＭＯＳ容量素子ＭＡをそのアノード電極がトランジスタＴＲ１のエミッタに接続する向きに挿入されている。そしてこのゲート電極には入力抵抗Ｒ７を介して、外部制御電圧信号Ｖａｆｃが供給さるとともに、直流阻止用固定容量素子Ｃ５を介して接地されている。これは前記第八の実施例と同様の効果をもち、すなわち、周波数の調整を可能とするとともに、このコルピッツ発振回路Ｏｓ２の負性抵抗の調整を可能としていて、異なる周波数帯の水晶振動子を同一のＩＣで使用する際に有効な手段となる。またこの場合もＭＯＳ容量素子ＭＡのアノード電極はトランジスタＴＲ1のエミッタに接続されているので、エミッタ電圧を調整できる範囲において、ＭＯＳ容量素子ＭＡの基準電圧を調整すれば、任意の容量特性曲線を利用することも可能である。 FIG. 10 is a circuit diagram showing a ninth embodiment of the present invention. A Colpitts oscillation circuit Os4, that is, a MOS capacitance element MA constituting the external control circuit Vc1 is arranged in place of the fixed capacitance element C2 of the Colpitts oscillation circuit Os2. In addition, the temperature compensation circuit Co1 and the crystal unit X are connected in series. The Colpitts oscillation circuit Os4 has a DC blocking fixed capacitor C3 incorporated therein as in the case described in the second embodiment. In this embodiment, instead of the fixed capacitance element C2 of the Colpitts oscillation circuit described in the second embodiment, a MOS capacitance element MA is inserted so that its anode electrode is connected to the emitter of the transistor TR1. The gate electrode is supplied with an external control voltage signal Vafc through an input resistor R7 and is grounded through a DC blocking fixed capacitor C5. This has the same effect as in the eighth embodiment, that is, the frequency can be adjusted and the negative resistance of the Colpitts oscillation circuit Os2 can be adjusted. This is an effective means when used with the same IC. Also in this case, since the anode electrode of the MOS capacitor element MA is connected to the emitter of the transistor TR1, an arbitrary capacitance characteristic curve can be used by adjusting the reference voltage of the MOS capacitor element MA within a range in which the emitter voltage can be adjusted. It is also possible to do.
図１１は本発明の第十の実施例を示す回路図であり、コルピッツ発振回路Ｏｓ５、すなわち前記コルピッツ発振回路Ｏｓ２の固定容量素子Ｃ２に代えて外部制御回路Ｖｃ１を構成するＭＯＳ容量素子ＭＡを配置すると共に、温度補償回路Ｃｏ１と、水晶振動子Ｘとを直列に接続したものである。コルピッツ発振回路Ｏｓ５は前記第二の実施例で説明したものと同様に、直流阻止用固定容量素子Ｃ３が内部に組込まれている。またこの実施例では、前記第九の実施例と同様に、コルピッツ発振回路の固定容量素子Ｃ２の代わりに、ＭＯＳ容量素子ＭＡをそのアノード電極がトランジスタＴＲ１のエミッタに接続する向きに挿入されている。そしてこのゲート電極には入力抵抗Ｒ７を介して、外部制御電圧信号Ｖａｆｃが供給さるとともに、直流阻止用固定容量素子Ｃ５を介して接地されていて、更に水晶振動子Ｘの温度補償回路Ｃｏ１と接続された端子と逆側の端子と接続されている。これは前記第八の実施例と同様の効果をもち、すなわち、周波数の調整を可能とするとともに、このコルピッツ発振回路Ｏｓ５の負性抵抗の調整を可能としていて、異なる周波数帯の水晶振動子Ｘを同一のＩＣで使用する際に有効な手段となる。またこの場合もＭＯＳ容量素子ＭＡのアノード電極はトランジスタＴＲ1のエミッタに接続されているので、エミッタ電圧が調整可能な範囲においてＭＯＳ容量素子ＭＡの基準電圧を調整すれば、任意の容量特性曲線を利用することも可能である。この実施例は前記第八の実施例と比較して、直流阻止用固定容量素子Ｃ５を発振ループから外した点が異なり、その結果全体の負荷容量を下げることが可能となり、よって全体の夫々のＭＯＳ容量素子、固定容量素子の値を下げることによるＩＣの小型化が可能となる。 FIG. 11 is a circuit diagram showing a tenth embodiment of the present invention. A Colpitts oscillation circuit Os5, that is, a MOS capacitance element MA constituting the external control circuit Vc1 is arranged in place of the fixed capacitance element C2 of the Colpitts oscillation circuit Os2. In addition, the temperature compensation circuit Co1 and the crystal unit X are connected in series. The Colpitts oscillation circuit Os5 has a DC blocking fixed capacitor C3 incorporated therein as in the case described in the second embodiment. In this embodiment, as in the ninth embodiment, instead of the fixed capacitance element C2 of the Colpitts oscillation circuit, the MOS capacitance element MA is inserted in the direction in which the anode electrode is connected to the emitter of the transistor TR1. . The gate electrode is supplied with an external control voltage signal Vafc via an input resistor R7, and is grounded via a DC blocking fixed capacitance element C5, and further connected to the temperature compensation circuit Co1 of the crystal unit X. Is connected to the opposite terminal. This has the same effect as the eighth embodiment, that is, the frequency can be adjusted and the negative resistance of the Colpitts oscillation circuit Os5 can be adjusted. This is an effective means when using the same IC. Also in this case, since the anode electrode of the MOS capacitor element MA is connected to the emitter of the transistor TR1, any capacitance characteristic curve can be used by adjusting the reference voltage of the MOS capacitor element MA within the adjustable range of the emitter voltage. It is also possible to do. This embodiment differs from the eighth embodiment in that the direct-current blocking fixed capacitor C5 is removed from the oscillation loop, and as a result, the overall load capacity can be reduced. It is possible to reduce the size of the IC by lowering the values of the MOS capacitor element and the fixed capacitor element.
また、前記第八、第九、第十の実施例においては発振ループ中の容量回路としては前述のようなコルピッツ発振回路Ｏｓ３、Ｏｓ４、Ｏｓ５に含む容量回路を除いて並列温度補償回路Ｃｏ１のみを記したが、これは図２（Ｂ）に示す直列温度補償回路に入れ替えてもよく、また前述の外部制御回路Ｖｃ１又はＶｃ２を、これらの温度補償回路に任意に直列又は並列に接続した容量回路としても、前述のようなコルピッツ発振回路Ｏｓ３、Ｏｓ４、Ｏｓ５による効果に変わりはない。また前記第１乃至第十の実施例において、夫々のＭＯＳ容量素子の極性の向きは一例であり、ＭＯＳ容量素子の容量／電圧特性によっては逆向きにした場合であっても同様の効果が得られる。 In the eighth, ninth, and tenth embodiments, only the parallel temperature compensation circuit Co1 is used as the capacitance circuit in the oscillation loop except for the capacitance circuits included in the Colpitts oscillation circuits Os3, Os4, and Os5 as described above. As described above, this may be replaced with the series temperature compensation circuit shown in FIG. 2B, and the external control circuit Vc1 or Vc2 described above is arbitrarily connected in series or in parallel to these temperature compensation circuits. However, the effects of the Colpitts oscillation circuits Os3, Os4, and Os5 as described above remain unchanged. In the first to tenth embodiments, the direction of the polarity of each MOS capacitor element is an example, and the same effect can be obtained even if the polarity is reversed depending on the capacitance / voltage characteristics of the MOS capacitor element. It is done.
ところで、これまでは図１４に示すように常温近傍に於いて温度周波数特性の傾きが比較的緩やかなものを対象として説明してきたが、図１８に示すように常温近傍に於いて温度周波数特性が急峻に変化する水晶振動子を使用せざるを得ない場合がある。
このとき、上述した温度補償回路だけでは常温近傍の温度周波数特性の傾き、即ち１次成分を補償しきれないという事態も起こり得る。
そこで、図１９（ａ）に示すように温度補償回路Ｃｏ１と水晶振動子Ｘとの間に１次温度補償用可変容量素子Ｍ１（この例ではＭＯＳ容量素子を用いている）を直列に接続し、温度に対して直線的に電圧が変化する１次温度補償電圧源（図示しない）からの電圧Ｖｆを供給することによって、常温近傍に於いて温度周波数特性が急峻に変化する場合でもこれを補償することを可能とした。
このとき電圧Ｖｆは図１９（ｂ）示すように温度に対して直線的に変化し、図１９（ｂ）に示す電圧Ｖｆと発振周波数との関係から温度周波数特性の１次成分を補償することができる。
図１９（ａ）の回路は図１の回路の変形例であるが、他の実施形態例にもこの１次温度補償用可変容量素子Ｍ１を用いた補償を適用しても同様の効果が得られる。
また、この１次温度補償用可変容量素子Ｍ１を、図４乃至図１１に記載された周波数調整用のＭＯＳ容量素子ＭＡと共用してもよく、このときは周波数調整用の電圧と１次成分を補償するための電圧とを加算して印加すればよいのである。
更に、１次温度補償電圧源にＡＦＣ回路を組み合わせて、発振器の外部から周波数制御用の電圧を供給するようにしても良い。
尚、１次成分の傾きが±０．２ｐｐｍ／゜Ｃ程度までであれば、１次成分を補償するための電圧Ｖｆの傾きを小さく抑えることができるので、１次温度補償電圧源のゲインを大きくする必要はなくノイズの発生を少なくできるので位相雑音が劣化しにくい。
Up to now, the description has been made on the case where the slope of the temperature frequency characteristic is relatively gentle near the normal temperature as shown in FIG. 14, but the temperature frequency characteristic is near the normal temperature as shown in FIG. In some cases, a crystal unit that changes sharply must be used.
At this time, there may be a situation in which the above-described temperature compensation circuit alone cannot compensate for the gradient of the temperature frequency characteristic near room temperature, that is, the primary component.
Therefore, as shown in FIG. 19A, a primary temperature compensating variable capacitance element M1 (in this example, a MOS capacitance element is used) is connected in series between the temperature compensation circuit Co1 and the crystal resonator X. By supplying a voltage Vf from a primary temperature compensation voltage source (not shown) whose voltage changes linearly with respect to temperature, this is compensated even when the temperature frequency characteristic changes sharply in the vicinity of room temperature. Made it possible to do.
At this time, the voltage Vf changes linearly with respect to the temperature as shown in FIG. 19B, and the primary component of the temperature frequency characteristic is compensated from the relationship between the voltage Vf and the oscillation frequency shown in FIG. 19B. Can do.
The circuit of FIG. 19A is a modification of the circuit of FIG. 1, but the same effect can be obtained by applying the compensation using the primary temperature compensating variable capacitance element M1 to other embodiments. It is done.
The primary temperature compensating variable capacitance element M1 may be shared with the frequency adjustment MOS capacitance element MA shown in FIGS. 4 to 11. In this case, the frequency adjustment voltage and the primary component are used. It is sufficient to add and apply a voltage for compensating for the above.
Further, an AFC circuit may be combined with the primary temperature compensation voltage source to supply a frequency control voltage from the outside of the oscillator.
If the slope of the primary component is up to about ± 0.2 ppm / ° C, the slope of the voltage Vf for compensating the primary component can be kept small, so the gain of the primary temperature compensation voltage source can be reduced. It is not necessary to increase the size, and the generation of noise can be reduced, so that the phase noise is unlikely to deteriorate.
Ｃ１、Ｃ２、Ｃ３、Ｃ４、Ｃ５、Ｃｏ、Ｃｃ、Ｃ・・・固定容量素子、Ｒ１、Ｒ２、Ｒ３、Ｒ４、Ｒ５、Ｒ６、Ｒ７、Ｒ８、Ｒｅ、Ｒ・・・固定抵抗素子、ＭＬ、ＭＨ、ＭＡ、Ｍ１・・・ＭＯＳ容量素子、ＶＬ、ＶＨ、Ｖｒｅｆ、Ｖａｒｅｆ・・・制御電圧信号、Ｖｃｃ・・・電源、ＯＵＴ・・・出力端子、ＴＲ１・・・トランジスタ、Ｘ・・・水晶振動子。
C1, C2, C3, C4, C5, Co, Cc, C... Fixed capacitance element, R1, R2, R3, R4, R5, R6, R7, R8, Re, R... Fixed resistance element, ML, MH, MA, M1... MOS capacitor element, VL, VH, Vref, Varef ... control voltage signal, Vcc ... power supply, OUT ... output terminal, TR1 ... transistor, X ... crystal Vibrator.
Claims (20)
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A temperature compensated oscillator having a structure in which an oscillation circuit, a DC blocking fixed capacitor element, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series, wherein the frequency temperature compensation circuit is a first MOS capacitor element. A series circuit in which one terminal of the fixed capacitor is connected to the anode terminal of the second MOS capacitor and the second MOS capacitor so that the anode terminal of the second MOS capacitor is connected to the gate terminal of the first MOS capacitor. A parallel circuit connected in parallel, supplying a reference voltage signal having a constant voltage value to a connection point between a gate terminal of the first MOS capacitor element and an anode terminal of the second MOS capacitor element; A first control voltage signal is supplied to the anode terminal of the MOS capacitor element, and a second control voltage signal is supplied to the gate terminal of the second MOS capacitor element,
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、
前記コルピッツ発振回路が、トランジスタと、該トランジスタのベースにバイアス電圧を供給する為のバイアス回路とを少なくとも備えており、前記トランジスタのベースとバイアス回路との接続点と、接地に一方端子が接続された２つの固定容量素子からなる直列回路の他方端子との間に直流阻止用固定容量素子を挿入接続した構成であって、
前記２つの固定容量素子からなる直列回路と前記直流阻止用固定容量素子との接続点が、前記周波数温度補償回路と接続されており、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A temperature compensated oscillator having a structure in which a Colpitts oscillation circuit, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series,
The frequency temperature compensation circuit includes a series circuit in which one terminal of a fixed capacitor element is connected to an anode terminal of a first MOS capacitor element and a second MOS capacitor element, and the anode terminal of the second MOS capacitor element is the first MOS capacitor element. A parallel circuit connected in parallel so as to be connected to the gate terminal of one MOS capacitor element, and a voltage value is applied to a connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element. A constant reference voltage signal is supplied, a first control voltage signal is supplied to the anode terminal of the first MOS capacitor element, and a second control voltage signal is supplied to the gate terminal of the second MOS capacitor element With a configuration to
The Colpitts oscillation circuit includes at least a transistor and a bias circuit for supplying a bias voltage to the base of the transistor, and one terminal is connected to a connection point between the base of the transistor and the bias circuit and ground. A DC blocking fixed capacitance element is inserted and connected between the other terminal of the series circuit composed of two fixed capacitance elements,
A connection point between the series circuit composed of the two fixed capacitance elements and the DC blocking fixed capacitance element is connected to the frequency temperature compensation circuit,
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記コルピッツ発振回路が、トランジスタと、該トランジスタのベースにバイアス電圧を供給する為のバイアス回路とを少なくとも備えており、前記トランジスタのベースとバイアス回路との接続点と、接地に一方端子が接続された２つの固定容量素子からなる直列回路の他方端子との間に直流阻止用固定容量素子を挿入接続した構成であって、
前記２つの固定容量素子からなる直列回路と前記直流阻止用固定容量素子との接続点が、前記周波数温度補償回路と接続され、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A temperature compensated oscillator having a structure in which a Colpitts oscillation circuit, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series, wherein the frequency temperature compensation circuit is connected to an anode terminal of a first MOS capacitor element as a fixed capacitor element Are connected in series, and the gate terminal of the first MOS capacitor element is connected to the anode terminal of the second MOS capacitor element, and the gate terminal of the first MOS capacitor element and the second MOS capacitor A reference voltage signal having a constant voltage value is supplied to a connection point with the anode terminal of the element, a first control voltage signal is supplied to the anode terminal of the first MOS capacitor element, and the second MOS capacitor element The second control voltage signal is supplied to the gate terminal of
The Colpitts oscillation circuit includes at least a transistor and a bias circuit for supplying a bias voltage to the base of the transistor, and one terminal is connected to a connection point between the base of the transistor and the bias circuit and ground. A DC blocking fixed capacitance element is inserted and connected between the other terminal of the series circuit composed of two fixed capacitance elements,
A connection point between the series circuit composed of the two fixed capacitance elements and the DC blocking fixed capacitance element is connected to the frequency temperature compensation circuit,
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A temperature compensated oscillator having a structure in which an oscillation circuit, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series, wherein the oscillation circuit supplies a bias voltage to a transistor and a base of the transistor. At least one circuit, and the frequency temperature compensation circuit includes a second circuit and a series circuit in which one terminal of the fixed capacitor is connected to the anode terminal of the first MOS capacitor and the second MOS capacitor. A parallel circuit connected in parallel so that an anode terminal of the capacitive element is connected to a gate terminal of the first MOS capacitive element; and supplying a first control voltage signal to the anode terminal of the first MOS capacitive element; A second control voltage signal is supplied to the gate terminal of the second MOS capacitor element; and the gate terminal of the first MOS capacitor element and the second MOS capacitor element Configured to provide a bias voltage signal of the bias circuit constituting the oscillator circuit to a connection point between the anode terminal of the OS capacitive element,
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記周波数外部電圧制御回路が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給する構成、或いはＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給すると共にＭＯＳ容量素子のアノード端子に電圧値が一定である基準電圧信号を供給する構成と、前記ＭＯＳ容量素子のゲート端子を前記圧電振動子に接続した構成と、からなり、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 An oscillator circuit having a structure in which an oscillation circuit, a frequency temperature compensation circuit, a piezoelectric vibrator, and a frequency external voltage control circuit are connected in series, wherein the frequency temperature compensation circuit includes a first MOS capacitor element. A series circuit in which one terminal of the fixed capacitor is connected to the anode terminal and the second MOS capacitor are connected in parallel so that the anode terminal of the second MOS capacitor is connected to the gate terminal of the first MOS capacitor. A connected parallel circuit, supplying a reference voltage signal having a constant voltage value to a connection point between a gate terminal of the first MOS capacitor element and an anode terminal of the second MOS capacitor element; A configuration in which a first control voltage signal is supplied to an anode terminal of a MOS capacitor element and a second control voltage signal is supplied to a gate terminal of the second MOS capacitor element;
The frequency external voltage control circuit supplies an external control voltage signal to the gate terminal of the MOS capacitive element, or supplies an external control voltage signal to the gate terminal of the MOS capacitive element and a voltage value is applied to the anode terminal of the MOS capacitive element. A configuration for supplying a constant reference voltage signal, and a configuration in which the gate terminal of the MOS capacitance element is connected to the piezoelectric vibrator,
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記周波数外部電圧制御回路が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給する構成、或いはＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給すると共にＭＯＳ容量素子のアノード端子に電圧値が一定である基準電圧信号を供給する構成と、前記ＭＯＳ容量素子のゲート端子を前記圧電振動子に接続した構成と、からなり、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 An oscillator circuit having a structure in which an oscillation circuit, a frequency temperature compensation circuit, a piezoelectric vibrator, and a frequency external voltage control circuit are connected in series, wherein the frequency temperature compensation circuit includes a first MOS capacitor element. A series circuit in which a fixed capacitor is connected to an anode terminal, and an anode terminal of a second MOS capacitor is connected to a gate terminal of the first MOS capacitor; and a gate terminal of the first MOS capacitor A reference voltage signal having a constant voltage value is supplied to a connection point with the anode terminal of the second MOS capacitor element, a first control voltage signal is supplied to the anode terminal of the first MOS capacitor element, and Comprising a configuration for supplying a second control voltage signal to the gate terminal of the second MOS capacitive element;
The frequency external voltage control circuit supplies an external control voltage signal to the gate terminal of the MOS capacitive element, or supplies an external control voltage signal to the gate terminal of the MOS capacitive element and a voltage value is applied to the anode terminal of the MOS capacitive element. A configuration for supplying a constant reference voltage signal, and a configuration in which the gate terminal of the MOS capacitance element is connected to the piezoelectric vibrator,
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記周波数外部電圧制御回路が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給し、ＭＯＳ容量素子のアノード端子に前記発振回路に接続することにより前記トランジスタのバイアス電圧信号を供給したものであり、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A temperature compensated oscillator having a structure in which an oscillation circuit, a frequency external voltage control circuit, a fixed capacitor, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series, the oscillation circuit comprising a transistor, And at least a bias circuit for supplying a bias voltage to the base of the transistor,
The frequency temperature compensation circuit includes a series circuit in which one terminal of a fixed capacitor element is connected to an anode terminal of a first MOS capacitor element, and a second MOS capacitor element. The anode terminal of the second MOS capacitor element is connected to the first MOS capacitor element. A parallel circuit connected in parallel so as to be connected to the gate terminal of one MOS capacitor element, and a voltage value is applied to a connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element. A constant reference voltage signal is supplied, a first control voltage signal is supplied to the anode terminal of the first MOS capacitor element, and a second control voltage signal is supplied to the gate terminal of the second MOS capacitor element The frequency external voltage control circuit supplies an external control voltage signal to the gate terminal of the MOS capacitor element, and connects the oscillator terminal to the anode terminal of the MOS capacitor element . The bias voltage signal of the transistor is supplied by
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
あり、前記周波数外部電圧制御回路が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給し、ＭＯＳ容量素子のアノード端子に前記発振回路に接続することにより前記トランジスタのバイアス電圧信号を供給したものであり、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A temperature compensated oscillator having a structure in which an oscillation circuit, a frequency external voltage control circuit, a fixed capacitor, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series, the oscillation circuit comprising a transistor, A bias circuit for supplying a bias voltage to the base of the transistor, wherein the frequency temperature compensation circuit connects a fixed capacitor to the anode terminal of the first MOS capacitor, and the first MOS capacitor A series circuit in which an anode terminal of a second MOS capacitor element is connected to a gate terminal of the element, and a voltage is applied to a connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element. A reference voltage signal having a constant value is supplied, a first control voltage signal is supplied to an anode terminal of the first MOS capacitor element, and a gate of the second MOS capacitor element is supplied. Are those having a structure for supplying a second control voltage signal to the child, the frequency external voltage control circuit supplies an external control voltage signal to the gate terminal of the MOS capacitor element, the anode terminal of the MOS capacitance element The bias voltage signal of the transistor is supplied by connecting to an oscillation circuit,
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記周波数外部電圧制御回路
が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給し、ＭＯＳ容量素子のアノード端子に前記周波数温度補償回路の前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点を接続することにより、前記周波数温度補償回路の前記基準電圧信号を供給したものであり、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 An oscillation circuit, a fixed capacitance element, a parallel circuit in which a frequency temperature compensation circuit and a frequency external voltage control circuit are connected in parallel, or a series circuit in which the frequency temperature compensation circuit and the frequency external voltage control circuit are connected in series, and piezoelectric vibration A temperature-compensated oscillator having a structure in which a child is connected in series,
The frequency temperature compensation circuit includes a series circuit in which one terminal of a fixed capacitor element is connected to an anode terminal of a first MOS capacitor element, and a second MOS capacitor element. The anode terminal of the second MOS capacitor element is connected to the first MOS capacitor element. A parallel circuit connected in parallel so as to be connected to the gate terminal of one MOS capacitor element, and a voltage value is applied to a connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element. A constant reference voltage signal is supplied, a first control voltage signal is supplied to the anode terminal of the first MOS capacitor element, and a second control voltage signal is supplied to the gate terminal of the second MOS capacitor element The frequency external voltage control circuit supplies an external control voltage signal to the gate terminal of the MOS capacitor element, and the frequency temperature compensation circuit to the anode terminal of the MOS capacitor element. The reference voltage signal of the frequency temperature compensation circuit is supplied by connecting a connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element on the path,
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記周波数温度補償回路が、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、前記周波数外部電圧制御回路が、ＭＯＳ容量素子のゲート端子に外部制御電圧信号を供給し、ＭＯＳ容量素子のアノード端子に前記周波数温度補償回路の前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点を接続し、更に、該接続点を前記発振回路に接続することにより前記トランジスタのバイアス電圧信号を供給したものであり、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A temperature-compensated oscillator having a structure in which an oscillation circuit, a parallel circuit in which a frequency temperature compensation circuit and a frequency external voltage control circuit are connected in parallel, and a piezoelectric vibrator are connected in series, the oscillation circuit including a transistor, And at least a bias circuit for supplying a bias voltage to the base of the transistor,
The frequency temperature compensation circuit includes a series circuit in which one terminal of a fixed capacitor element is connected to an anode terminal of a first MOS capacitor element and a second MOS capacitor element, and the anode terminal of the second MOS capacitor element is the first MOS capacitor element. A parallel circuit connected in parallel so as to be connected to the gate terminal of one MOS capacitive element, supplying a first control voltage signal to the anode terminal of the first MOS capacitive element, The second external control circuit supplies a second control voltage signal to the gate terminal, and the frequency external voltage control circuit supplies the external control voltage signal to the gate terminal of the MOS capacitor, and the anode terminal of the MOS capacitor. A connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element of the frequency temperature compensation circuit is connected, and the connection point is further connected to the oscillation circuit. To supply a bias voltage signal of the transistor by connecting to
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記周波数温度補償回路は、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、
前記コルピッツ発振回路が、トランジスタのベースとエミッタとの間に接続された第１の容量回路と、前記エミッタとアースとの間に接続された第２の容量回路とを少なくとも備えており、
前記第１の容量回路がＭＯＳ容量素子を利用した外部電圧制御回路を備え、該ＭＯＳ容量素子のゲート端子に制御電圧信号を供給することによって、前記第１の容量回路の容量値を可変したものであって、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A temperature compensated oscillator having a structure in which a Colpitts oscillation circuit, a piezoelectric vibrator, a frequency temperature compensation circuit, and a fixed capacitance element are connected in series,
The frequency temperature compensation circuit includes a series circuit in which one terminal of a fixed capacitor element is connected to an anode terminal of a first MOS capacitor element, and a second MOS capacitor element. The anode terminal of the second MOS capacitor element is connected to the first MOS capacitor element. A parallel circuit connected in parallel so as to be connected to the gate terminal of one MOS capacitor element, and a voltage value is applied to a connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element. A constant reference voltage signal is supplied, a first control voltage signal is supplied to the anode terminal of the first MOS capacitor element, and a second control voltage signal is supplied to the gate terminal of the second MOS capacitor element With a configuration to
The Colpitts oscillation circuit includes at least a first capacitor circuit connected between a base and an emitter of a transistor, and a second capacitor circuit connected between the emitter and the ground,
The first capacitive circuit includes an external voltage control circuit using a MOS capacitive element, and the capacitance value of the first capacitive circuit is varied by supplying a control voltage signal to the gate terminal of the MOS capacitive element Because
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記コルピッツ発振回路が、トランジスタのベースとエミッタとの間に接続された第１の容量回路と、前記エミッタとアースとの間に接続された第２の容量回路とを少なくとも備えており、
前記第１の容量回路がＭＯＳ容量素子を利用した外部電圧制御回路を備え、該ＭＯＳ容量素子のゲート端子に制御電圧信号を供給することによって、前記第１の容量回路の容量値を可変したものであって、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A temperature compensated oscillator having a structure in which a Colpitts oscillation circuit, a piezoelectric vibrator, a frequency temperature compensation circuit, and a fixed capacitance element are connected in series, wherein the frequency temperature compensation circuit is an anode of a first MOS capacitance element. A fixed capacitance element is connected to the terminal, and a gate terminal of the first MOS capacitance element is connected to an anode terminal of the second MOS capacitance element, and the gate terminal of the first MOS capacitance element and the gate terminal of the first MOS capacitance element A reference voltage signal having a constant voltage value is supplied to a connection point with the anode terminal of the second MOS capacitor element, a first control voltage signal is supplied to the anode terminal of the first MOS capacitor element, and Comprising a configuration for supplying a second control voltage signal to the gate terminal of the second MOS capacitor element;
The Colpitts oscillation circuit includes at least a first capacitor circuit connected between a base and an emitter of a transistor, and a second capacitor circuit connected between the emitter and the ground,
The first capacitive circuit includes an external voltage control circuit using a MOS capacitive element, and the capacitance value of the first capacitive circuit is varied by supplying a control voltage signal to the gate terminal of the MOS capacitive element Because
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記周波数温度補償回路は、第１のＭＯＳ容量素子のアノード端子に固定容量素子の一方端子を接続した直列回路と第２のＭＯＳ容量素子とを該第２のＭＯＳ容量素子のアノード端子が前記第１のＭＯＳ容量素子のゲート端子と接続するように並列接続した並列回路であり、前記第１のＭＯＳ容量素子のゲート端子と前記第２のＭＯＳ容量素子のアノード端子との接続点に電圧値が一定である基準電圧信号を供給し、前記第１のＭＯＳ容量素子のアノード端子に第１の制御電圧信号を供給し、前記第２のＭＯＳ容量素子のゲート端子に第２の制御電圧信号を供給する構成を備えたものであり、
前記コルピッツ発振回路が、トランジスタのベースとエミッタとの間に接続された第１の容量回路と、前記エミッタとアースとの間に接続された第２の容量回路とを少なくとも備えており、
前記第２の容量回路がＭＯＳ容量素子を利用した外部電圧制御回路を備え、該ＭＯＳ容量素子のゲート端子に制御電圧信号を供給することによって、前記第１の容量回路の容量値を可変したものであって、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A temperature compensated oscillator having a structure in which a Colpitts oscillation circuit, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series,
The frequency temperature compensation circuit includes a series circuit in which one terminal of a fixed capacitor element is connected to an anode terminal of a first MOS capacitor element, and a second MOS capacitor element. The anode terminal of the second MOS capacitor element is connected to the first MOS capacitor element. A parallel circuit connected in parallel so as to be connected to the gate terminal of one MOS capacitor element, and a voltage value is applied to a connection point between the gate terminal of the first MOS capacitor element and the anode terminal of the second MOS capacitor element. A constant reference voltage signal is supplied, a first control voltage signal is supplied to the anode terminal of the first MOS capacitor element, and a second control voltage signal is supplied to the gate terminal of the second MOS capacitor element With a configuration to
The Colpitts oscillation circuit includes at least a first capacitor circuit connected between a base and an emitter of a transistor, and a second capacitor circuit connected between the emitter and the ground,
The second capacitance circuit includes an external voltage control circuit using a MOS capacitance element, and the capacitance value of the first capacitance circuit is varied by supplying a control voltage signal to the gate terminal of the MOS capacitance element. Because
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記コルピッツ発振回路が、トランジスタのベースとエミッタとの間に接続された第１の容量回路と、前記エミッタとアースとの間に接続された第２の容量回路とを少なくとも備えており、
前記第２の容量回路がＭＯＳ容量素子を利用した外部電圧制御回路を備え、該ＭＯＳ容量素子のゲート端子に制御電圧信号を供給することによって、前記第１の容量回路の容量値を可変したものであって、
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A temperature compensated oscillator having a structure in which a Colpitts oscillation circuit, a frequency temperature compensation circuit, and a piezoelectric vibrator are connected in series, wherein the frequency temperature compensation circuit is connected to an anode terminal of a first MOS capacitor element as a fixed capacitor element Are connected in series, and the gate terminal of the first MOS capacitor element is connected to the anode terminal of the second MOS capacitor element, and the gate terminal of the first MOS capacitor element and the second MOS capacitor A reference voltage signal having a constant voltage value is supplied to a connection point with the anode terminal of the element, a first control voltage signal is supplied to the anode terminal of the first MOS capacitor element, and the second MOS capacitor element The second control voltage signal is supplied to the gate terminal of
The Colpitts oscillation circuit includes at least a first capacitor circuit connected between a base and an emitter of a transistor, and a second capacitor circuit connected between the emitter and the ground,
The second capacitance circuit includes an external voltage control circuit using a MOS capacitance element, and the capacitance value of the first capacitance circuit is varied by supplying a control voltage signal to the gate terminal of the MOS capacitance element. Because
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
前記第１のＭＯＳ容量素子が常温以下の低温を温度補償するためのＭＯＳ容量素子であり、前記第２のＭＯＳ容量素子が常温以上の高温を温度補償するためのＭＯＳ容量素子であることを特徴とする温度補償発振器。 A frequency temperature compensation circuit for performing frequency temperature compensation by inserting and connecting in an oscillation loop of a piezoelectric oscillator, the frequency temperature compensation circuit having one terminal of a fixed capacitor element connected to an anode terminal of a first MOS capacitor element A parallel circuit in which a connected series circuit and a second MOS capacitive element are connected in parallel so that an anode terminal of the second MOS capacitive element is connected to a gate terminal of the first MOS capacitive element; A reference voltage signal having a constant voltage value is supplied to a connection point between the gate terminal of the MOS capacitor element and the anode terminal of the second MOS capacitor element, and a first voltage is supplied to the anode terminal of the first MOS capacitor element. A structure for supplying a control voltage signal and supplying a second control voltage signal to the gate terminal of the second MOS capacitor;
The first MOS capacitor element is a MOS capacitor element for temperature compensation at a low temperature below room temperature, and the second MOS capacitor element is a MOS capacitor element for temperature compensation at a high temperature above room temperature. A temperature compensated oscillator.
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| JP4670406B2 (en) | 2005-03-09 | 2011-04-13 | エプソントヨコム株式会社 | Temperature compensated piezoelectric oscillator |
| JP5034772B2 (en) * | 2007-01-29 | 2012-09-26 | セイコーエプソン株式会社 | Temperature compensated piezoelectric oscillator |
| US7986194B2 (en) | 2007-01-30 | 2011-07-26 | Epson Toyocom Corporation | Oscillator |
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