JP4351198B2 - ボンドパッド構造のトップビアパターン - Google Patents
ボンドパッド構造のトップビアパターン Download PDFInfo
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- JP4351198B2 JP4351198B2 JP2005233374A JP2005233374A JP4351198B2 JP 4351198 B2 JP4351198 B2 JP 4351198B2 JP 2005233374 A JP2005233374 A JP 2005233374A JP 2005233374 A JP2005233374 A JP 2005233374A JP 4351198 B2 JP4351198 B2 JP 4351198B2
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
12 Mtop−1金属層(第一金属層)
14 IMD層(絶縁層)
16 Mtop金属層(第二金属層)
18 第一ビア群
18a、18b、18c ラインビア(第一ラインビア)
20 第二ビア群
20a、20b、20c ラインビア(第二ラインビア)
22 トップビアパターン(金属ビアパターン)
26 パッドウィンドウ
Claims (8)
- 第一金属層と、
前記第一金属層の上の第二金属層と、
前記第一金属層と前記第二金属層との間の絶縁層と、
前記絶縁層の中に位置し、前記第一金属層と前記第二金属層とを電気的に接続する金属ビアパターンとを備え、前記金属ビアパターンは、マトリクス配列に配置されており、且つマトリクス配列の各列においても各行においても交互に配置された、複数の第一ビア群と、複数の第二ビア群とを備え、
前記第一ビア群は、第一方向に延伸した少なくとも二つの第一ラインビアを備え、前記第二ビア群は、前記第一方向と異なる第二方向に延伸した少なくとも二つの第二ラインビアを備え、前記第一ラインビアは、前記第二ラインビアに交差しないことを特徴とするボンドパッド構造。 - 前記第一ビア群の形状は、略正方形であることを特徴とする請求項1に記載のボンドパッド構造。
- 前記第二ビア群の形状は、略正方形であることを特徴とする請求項1に記載のボンドパッド構造。
- 前記第一ラインビアと前記第二ラインビアは、同一寸法であることを特徴とする請求項1に記載のボンドパッド構造。
- 更に、前記ボンドパッド構造の下に位置する集積回路を備えたことを特徴とする請求項1に記載のボンドパッド構造。
- 第一金属層を有する集積回路基板を準備する工程と、
前記第一金属層の上に、絶縁層を形成する工程と、
前記絶縁層に金属ビアパターンを形成し、前記第一金属層と電気的に接続する工程とを備え、
前記金属ビアパターンは、マトリクス配列に配置されており、且つマトリクス配列の各列においても各行においても交互に配置された、複数の第一ビア群と、複数の第二ビア群とを備え、
前記第一ビア群は、第一方向に延伸した少なくとも二つの第一ラインビアを備え、前記第二ビア群は、前記第一方向と異なる第二方向に延伸した少なくとも二つの第二ラインビアを備え、前記第一ラインビアは、前記第二ラインビアに交差しないことを特徴とするボンドパッド構造の形成方法。 - 前記第一方向は、前記第二方向に垂直であることを特徴とする請求項6に記載の形成方法。
- 更に、前記絶縁層と前記金属ビアパターンの上の第二金属層を形成する工程を備え、前記第二金属層は、前記金属ビアパターンを通じて前記第一金属層と電気的に接続されることを特徴とする請求項6に記載の形成方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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US11/081,704 US7323784B2 (en) | 2005-03-17 | 2005-03-17 | Top via pattern for bond pad structure |
Publications (2)
Publication Number | Publication Date |
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JP2006261631A JP2006261631A (ja) | 2006-09-28 |
JP4351198B2 true JP4351198B2 (ja) | 2009-10-28 |
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Application Number | Title | Priority Date | Filing Date |
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JP2005233374A Active JP4351198B2 (ja) | 2005-03-17 | 2005-08-11 | ボンドパッド構造のトップビアパターン |
Country Status (4)
Country | Link |
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US (1) | US7323784B2 (ja) |
JP (1) | JP4351198B2 (ja) |
CN (1) | CN100463154C (ja) |
TW (1) | TWI323493B (ja) |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
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US7091124B2 (en) | 2003-11-13 | 2006-08-15 | Micron Technology, Inc. | Methods for forming vias in microelectronic devices, and methods for packaging microelectronic devices |
US8084866B2 (en) | 2003-12-10 | 2011-12-27 | Micron Technology, Inc. | Microelectronic devices and methods for filling vias in microelectronic devices |
US20050247894A1 (en) | 2004-05-05 | 2005-11-10 | Watkins Charles M | Systems and methods for forming apertures in microfeature workpieces |
US7232754B2 (en) | 2004-06-29 | 2007-06-19 | Micron Technology, Inc. | Microelectronic devices and methods for forming interconnects in microelectronic devices |
US7083425B2 (en) | 2004-08-27 | 2006-08-01 | Micron Technology, Inc. | Slanted vias for electrical circuits on circuit boards and other substrates |
US7300857B2 (en) | 2004-09-02 | 2007-11-27 | Micron Technology, Inc. | Through-wafer interconnects for photoimager and memory wafers |
US7271482B2 (en) | 2004-12-30 | 2007-09-18 | Micron Technology, Inc. | Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods |
US7795134B2 (en) | 2005-06-28 | 2010-09-14 | Micron Technology, Inc. | Conductive interconnect structures and formation methods using supercritical fluids |
US7262134B2 (en) | 2005-09-01 | 2007-08-28 | Micron Technology, Inc. | Microfeature workpieces and methods for forming interconnects in microfeature workpieces |
US7622377B2 (en) * | 2005-09-01 | 2009-11-24 | Micron Technology, Inc. | Microfeature workpiece substrates having through-substrate vias, and associated methods of formation |
US7863187B2 (en) | 2005-09-01 | 2011-01-04 | Micron Technology, Inc. | Microfeature workpieces and methods for forming interconnects in microfeature workpieces |
US7687925B2 (en) * | 2005-09-07 | 2010-03-30 | Infineon Technologies Ag | Alignment marks for polarized light lithography and method for use thereof |
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