JP4347075B2 - Electroplating method and electroplating apparatus - Google Patents

Electroplating method and electroplating apparatus Download PDF

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JP4347075B2
JP4347075B2 JP2004021101A JP2004021101A JP4347075B2 JP 4347075 B2 JP4347075 B2 JP 4347075B2 JP 2004021101 A JP2004021101 A JP 2004021101A JP 2004021101 A JP2004021101 A JP 2004021101A JP 4347075 B2 JP4347075 B2 JP 4347075B2
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anode
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久幸 矢澤
吉弘 金田
英俊 黒河
直樹 坂詰
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Description

本発明は、主基板とその周囲に設けられた補助基板とを有し、特に所定のメッキ層をメッキ形成した後、メッキ液を排液する前にスイッチング制御及び出力制御を適切に行うことで、前記メッキ層の形成終了後に前記主基板と補助基板間にサージ電流等の大電流が流れるのを防止し、前記メッキ層の品質を良好に保つことが可能な電気メッキ方法及び電気メッキ装置に関する。   The present invention includes a main substrate and an auxiliary substrate provided around the main substrate, and particularly by appropriately performing switching control and output control after plating a predetermined plating layer and before draining the plating solution. The present invention relates to an electroplating method and an electroplating apparatus capable of preventing a large current such as a surge current from flowing between the main substrate and the auxiliary substrate after the formation of the plated layer and maintaining a good quality of the plated layer. .

下記の特許文献1には、磁気記録装置用磁気ヘッドの薄膜部を形成する際に用いられる電気メッキ装置及びその電気メッキ方法について開示されている。   Patent Document 1 below discloses an electroplating apparatus and an electroplating method used when forming a thin film portion of a magnetic head for a magnetic recording apparatus.

特許文献1における電気メッキ装置にはこの公報の図1に示すように、陰極2(カソード、主基板)と補助陰極3とが設けられ、陽極1(アノード)と陰極2間、及び陽極1と補助陰極3間には定電流源5,6が接続されている。また前記陰極2と補助陰極3間はスイッチ8を介して繋がれている。   As shown in FIG. 1 of this publication, the electroplating apparatus in Patent Document 1 is provided with a cathode 2 (cathode, main substrate) and an auxiliary cathode 3, and between the anode 1 (anode) and the cathode 2, and between the anode 1 and Constant current sources 5 and 6 are connected between the auxiliary cathodes 3. The cathode 2 and the auxiliary cathode 3 are connected via a switch 8.

この公報の[0018]欄や[0019]欄に記載されているように、前記スイッチ8は、前記陰極2と補助陰極3がメッキ液に接触したらONにし、前記メッキ液の液面17が上昇し、陽極1と接触したら前記スイッチ8を開放して前記補助陰極3から陰極2に流れる電流を遮断するとされている。   As described in the columns [0018] and [0019] of this publication, the switch 8 is turned on when the cathode 2 and the auxiliary cathode 3 come into contact with the plating solution, and the liquid level 17 of the plating solution rises. When contacted with the anode 1, the switch 8 is opened to cut off the current flowing from the auxiliary cathode 3 to the cathode 2.

前記スイッチ8をONにして前記陰極2と補助陰極3間に電流を供給するのは、図5に示す下地膜2bがメッキ液に溶解されないためであると記載されている。   It is described that the switch 8 is turned on to supply current between the cathode 2 and the auxiliary cathode 3 because the base film 2b shown in FIG. 5 is not dissolved in the plating solution.

しかしこの公報には、メッキ層を形成した後、メッキ液を排液するまでの間における、陰極2と補助陰極3間、陽極1と陰極2間、及び陽極1と補助陰極3間の出力制御やスイッチング制御に関し詳しい記述はない。
特開平10−152799号公報
However, in this publication, output control between the cathode 2 and the auxiliary cathode 3, between the anode 1 and the cathode 2, and between the anode 1 and the auxiliary cathode 3 after the plating layer is formed and before the plating solution is discharged. There is no detailed description on switching control.
JP-A-10-152799

上記した特許文献1の図1に示すように、陰極2と補助陰極3間にも別電源を設けて、メッキ液の排液時に、前記陰極2と補助陰極3間を通電させておくことは、メッキ層の溶解を抑制する上で有益である。前記メッキ液は排液されるまでにある程度の時間(例えば数秒から数十秒程度)がかかるから、この間、メッキ液に曝されたメッキ層は、前記メッキ層やメッキ液の材質及びpH等にもよるが、溶解しやすい状態にあるため、特許文献1のように、メッキ液の排液の際に、陰極2と補助陰極3を通電させておけば、メッキ層の溶解を緩和できることは理解できる。   As shown in FIG. 1 of Patent Document 1 described above, it is possible to provide a separate power source between the cathode 2 and the auxiliary cathode 3 so that the cathode 2 and the auxiliary cathode 3 are energized when the plating solution is drained. This is useful for suppressing dissolution of the plating layer. Since the plating solution takes a certain amount of time (for example, about several seconds to several tens of seconds) to be drained, the plating layer exposed to the plating solution during this time is adjusted to the material and pH of the plating layer and the plating solution. However, since it is easy to dissolve, it is understood that the dissolution of the plating layer can be alleviated if the cathode 2 and the auxiliary cathode 3 are energized when draining the plating solution as in Patent Document 1. it can.

しかし、特許文献1の図1に示す構成の場合、スイッチ8を繋げるタイミング等を適切に制御しなければ、前記陰極2と補助陰極3間には大電流(サージ電流等)が流れ、前記メッキ層の品質が劣化することが、下記に記す実験によって証明された。   However, in the case of the configuration shown in FIG. 1 of Patent Document 1, a large current (surge current or the like) flows between the cathode 2 and the auxiliary cathode 3 unless the timing for connecting the switch 8 or the like is appropriately controlled. It was proved by the experiment described below that the quality of the layer deteriorated.

特許文献1の図1に示す構成では、電源5,6を切り替えて、前記陽極1と陰極2間、及び陽極1と補助陰極3間を電気的に切断すると共に、前記スイッチ8をONにして前記陰極2と補助陰極3間を電気的に接続した瞬間、前記陰極2と補助陰極3間にサージ電流等の大電流が流れやすい。   In the configuration shown in FIG. 1 of Patent Document 1, the power sources 5 and 6 are switched to electrically disconnect between the anode 1 and the cathode 2 and between the anode 1 and the auxiliary cathode 3, and the switch 8 is turned on. At the moment when the cathode 2 and the auxiliary cathode 3 are electrically connected, a large current such as a surge current easily flows between the cathode 2 and the auxiliary cathode 3.

また図13は特許文献1の図1とは異なる回路構成を有する電気メッキ装置であるが、特許文献1と同様に、主基板(特許文献1の「陰極2」と同じ)と、補助基板(特許文献1の「補助陰極3」と同じ)間もスイッチ50を介して接続されている。メッキ層の形成時は、前記主基板とアノード(特許文献1の「陽極1」と同じ)間、及び前記補助基板とアノード間はスイッチ51,スイッチ52により電気的に接続された状態であり、一方、前記主基板と補助基板はスイッチ50により電気的に切断された状態になっている。   FIG. 13 shows an electroplating apparatus having a circuit configuration different from that of FIG. 1 of Patent Document 1, but similarly to Patent Document 1, a main substrate (same as “cathode 2” of Patent Document 1) and an auxiliary substrate ( The same as “auxiliary cathode 3” of Patent Document 1 is also connected through the switch 50. When the plating layer is formed, the main substrate and the anode (same as “Anode 1” in Patent Document 1), and the auxiliary substrate and the anode are electrically connected by the switch 51 and the switch 52, On the other hand, the main board and the auxiliary board are electrically disconnected by the switch 50.

なお前記主基板とアノード間に接続されているメイン電源及び、前記補助基板とアノード間に接続されているサブ電源には共にパルス電源を用いることがある。特に薄膜磁気ヘッドのインダクティブヘッド等の磁性層をメッキ形成するとき、レジストで囲まれた狭い空間内に、高い飽和磁束密度を確保するために高いFe量を有するメッキ層をメッキ形成することがあるが、従来のように直流電流を用いた電気メッキ方法では、適切にFe量を大きくできず所定の組成比を有する磁性層をメッキ形成できないといった不具合が生じていた。これに対しパルス電流を用いると、攪拌効果が高まる等の理由により、Fe量の大きい磁性層をメッキ形成できることがわかっている(例えば特開2002−280217号公報を参照されたい)。   A pulse power source may be used for both the main power source connected between the main substrate and the anode and the sub power source connected between the auxiliary substrate and the anode. In particular, when a magnetic layer such as an inductive head of a thin film magnetic head is formed by plating, a plating layer having a high Fe amount may be formed in a narrow space surrounded by a resist to ensure a high saturation magnetic flux density. However, the conventional electroplating method using a direct current has a problem that the amount of Fe cannot be increased appropriately and a magnetic layer having a predetermined composition ratio cannot be formed by plating. On the other hand, when a pulse current is used, it has been found that a magnetic layer with a large amount of Fe can be formed by plating, for example, because the stirring effect is enhanced (see, for example, JP-A-2002-280217).

上記のようにパルス電流を用いた電気メッキ法では、直流電流を用いた電気メッキ法よりも高い電流値(パルスのピーク時)を、アノードと主基板間に供給するのが一般的である。   As described above, the electroplating method using a pulse current generally supplies a higher current value (at the peak of the pulse) between the anode and the main substrate than the electroplating method using a direct current.

そして前記メッキ層のメッキ形成後、メッキ液を排液する前に、まず、前記スイッチ51,52を開放して、前記アノードと主基板間、及びアノードと補助基板間を電気的に切断し、一方、前記スイッチ50をONして、前記主基板と補助基板間を電気的に接続する。そして前記メイン電源を大きなパルス電流値から微弱電流値に出力制御し、微弱電流が前記主基板と補助基板間に流れるようにする。   After the plating layer is formed and before draining the plating solution, first, the switches 51 and 52 are opened, and the anode and the main substrate and the anode and the auxiliary substrate are electrically disconnected. On the other hand, the switch 50 is turned on to electrically connect the main board and the auxiliary board. The main power supply is output-controlled from a large pulse current value to a weak current value so that the weak current flows between the main substrate and the auxiliary substrate.

しかし、上記のスイッチの切替時に、前記主基板と補助基板間にはサージ電流が流れてしまう。また特にパルス電流を用いた電気メッキ法では、前記パルス電流は非常に大きな電流値(ピーク時)を有して流れているため、前記メイン電源の出力制御とスイッチング制御が適切に行われないと、前記スイッチ50をONにして主基板と補助基板間を電気的に接続した瞬間、大きな積算電流が前記主基板と補助基板間に供給されてしまう。   However, when the switch is switched, a surge current flows between the main board and the auxiliary board. In particular, in the electroplating method using a pulse current, since the pulse current flows with a very large current value (peak time), the output control and switching control of the main power supply are not properly performed. At the moment when the switch 50 is turned on and the main board and the auxiliary board are electrically connected, a large integrated current is supplied between the main board and the auxiliary board.

上記の結果、前記主基板上に形成されたメッキ層の品質は劣化し、例えば前記メッキ層の表面に、前記メッキ層とは異質(組成元素や結晶粒等)なメッキ層が堆積してしまう等の不具合が生じてしまう。   As a result, the quality of the plating layer formed on the main substrate deteriorates, and for example, a plating layer different from the plating layer (composition element, crystal grain, etc.) is deposited on the surface of the plating layer. Such problems will occur.

図14は、図13に示す電気メッキ装置を使用して複数のメッキ層を積層し、その積層メッキ層の断面状態を写したSIM(スキャンニング イオン マイクロスコープ)写真、図15は図14に示すSIM写真の一部分の部分模式図である。上記した積層メッキ層は、後述する図11の磁極部32に該当する部分である。すなわち前記積層メッキ層は、薄膜磁気ヘッドのインダクティブヘッドの磁極部を構成し、下から下部磁極層(FeNi合金)、ギャップ層(NiP合金)、上部磁極層(FeNi合金)の積層構造である。   FIG. 14 is a SIM (scanning ion microscope) photograph in which a plurality of plating layers are laminated using the electroplating apparatus shown in FIG. 13 and the cross-sectional state of the laminated plating layer is copied, and FIG. 15 is shown in FIG. It is a partial schematic diagram of a part of a SIM photograph. The laminated plating layer described above is a portion corresponding to a magnetic pole portion 32 of FIG. That is, the laminated plating layer constitutes the magnetic pole part of the inductive head of the thin film magnetic head and has a laminated structure of a lower magnetic pole layer (FeNi alloy), a gap layer (NiP alloy), and an upper magnetic pole layer (FeNi alloy) from the bottom.

図14及び図15に示すように、下部磁極層とギャップ層間には、明らかに結晶粒径が粗大化した異質なメッキ層が形成されていることがわかった。   As shown in FIGS. 14 and 15, it was found that a heterogeneous plating layer having a clearly enlarged crystal grain size was formed between the lower magnetic pole layer and the gap layer.

前記異質なメッキ層は、前記下部磁極層の形成後(下部磁極層の形成時のメイン電源はパルス)、メッキ液の排液時に、前記主基板と補助基板間に大電流が流れたことによって形成されたメッキ層であるものと考えられる。前記異質なメッキ層は前記上部磁極層の表面にも見られ、主基板上から見ると異質なメッキ層は変色して見えることがわかった。   The heterogeneous plating layer is formed by a large current flowing between the main substrate and the auxiliary substrate after the lower magnetic pole layer is formed (the main power supply is pulsed when the lower magnetic pole layer is formed) and the plating solution is drained. It is considered that the formed plating layer. The extraneous plating layer was also found on the surface of the upper magnetic pole layer, and it was found that the extraneous plating layer appeared discolored when viewed from the main substrate.

このように前記ギャップ層と下部磁極層間に異質なメッキ層が形成されてしまうと、この異質なメッキ層を後に除去することは不可能であるから、このように異質なメッキ層を有するインダクティブヘッドは製品不良となりやすく、歩留りの低下が問題となった。   If a different plating layer is formed between the gap layer and the lower magnetic pole layer in this way, it is impossible to remove the different plating layer later. Thus, the inductive head having such a different plating layer is used. Was prone to product defects, and yield reduction became a problem.

そこで本発明は上記従来の課題を解決するためのものであり、特に所定のメッキ層をメッキ形成した後、メッキ液を排液する前にスイッチング制御及び出力制御を適切に行うことで、前記メッキ層の形成終了後に前記主基板と補助基板間にサージ電流等の大電流が流れるのを防止し、前記メッキ層の品質を良好に保つことが可能な電気メッキ方法及び電気メッキ装置を提供することを目的としている。   Therefore, the present invention is to solve the above-described conventional problems, and in particular, by appropriately performing switching control and output control after plating a predetermined plating layer and before draining the plating solution, the plating is performed. To provide an electroplating method and an electroplating apparatus capable of preventing a large current such as a surge current from flowing between the main substrate and the auxiliary substrate after completion of layer formation and maintaining a good quality of the plating layer. It is an object.

本発明は、メッキ槽と、前記メッキ槽内に設けられたカソードである主基板と、前記主基板と所定距離離して対向させたアノードと、前記主基板の周囲に設けられた補助基板と、を有し、
前記メッキ槽内にメッキ液を充填し、前記主基板とアノード間、及び前記補助基板とアノード間に電流を供給して前記主基板上に所定のメッキ層を形成し、前記メッキ層を形成した後、前記メッキ液を排液する電気メッキ方法において、前記メッキ層を形成した後、以下の工程を用いて前記メッキ液の排液を行うことを特徴とするものである。
The present invention includes a plating tank, a main substrate that is a cathode provided in the plating tank, an anode that is opposed to the main substrate by a predetermined distance, an auxiliary substrate that is provided around the main substrate, Have
The plating tank is filled with a plating solution, and a current is supplied between the main substrate and the anode and between the auxiliary substrate and the anode to form a predetermined plating layer on the main substrate, and the plating layer is formed. Thereafter, in the electroplating method for draining the plating solution, the plating solution is drained using the following steps after the plating layer is formed.

(a) 前記主基板とアノード間、及び前記補助基板とアノード間の電気的な接続を維持して、前記主基板とアノード間及び前記補助基板とアノード間に、前記メッキ層のメッキ形成時に供給された電流値よりも低い微弱電流を供給するか、あるいは前記主基板及びアノード間、及び前記補助基板とアノード間に供給される電流値をゼロにする工程と、
(b) 前記主基板とアノード間、及び補助基板とアノード間を電気的に切断すると共に、前記主基板と補助基板間を電気的に接続する工程と、
(c) 前記主基板と補助基板間に所定の微弱電流を供給して前記主基板と補助基板間を通電させる工程と、
(d) 前記メッキ液を排液する工程。
(A) Maintaining electrical connection between the main substrate and the anode and between the auxiliary substrate and the anode, and supplying the plating layer between the main substrate and the anode and between the auxiliary substrate and the anode when the plating layer is formed. Supplying a weak current lower than the generated current value, or making the current value supplied between the main substrate and the anode and between the auxiliary substrate and the anode zero,
(B) electrically cutting between the main substrate and the anode and between the auxiliary substrate and the anode and electrically connecting the main substrate and the auxiliary substrate;
(C) supplying a predetermined weak current between the main substrate and the auxiliary substrate to energize the main substrate and the auxiliary substrate;
(D) A step of draining the plating solution.

上記のようにまず前記(b)工程のスイッチング制御よりも前に、主基板とアノード間に供給される電流値を微弱電流に落とすかあるいは電流値をゼロに制御する。これにより回路内における電流チャージを低減でき、前記(b)のスイッチングの際に、サージ電流等の大電流が前記主基板と補助基板間に流れるのを抑制でき、前記(c)工程で、前記主基板と補助基板間に所定の大きさの微弱電流を供給できる。この結果、前記メッキ液の排液の際に、主基板上にメッキ形成されたメッキ層の溶解を抑制すると共に、前記メッキ層の品質の劣化を抑制することが可能になる。   As described above, before the switching control in the step (b), the current value supplied between the main substrate and the anode is reduced to a weak current or the current value is controlled to zero. Thereby, the current charge in the circuit can be reduced, and at the time of switching in (b), it is possible to suppress a large current such as a surge current from flowing between the main substrate and the auxiliary substrate, and in the step (c), A weak current of a predetermined magnitude can be supplied between the main board and the auxiliary board. As a result, at the time of draining the plating solution, it is possible to suppress dissolution of the plating layer formed on the main substrate and to suppress deterioration of the quality of the plating layer.

また本発明では、前記(c)工程で供給される微弱電流を直流電流とすることが好ましい。これにより前記(d)工程のメッキ液の排液時に、常に前記補助基板と主基板間には微弱電流が流れることになり、前記メッキ層の溶解を適切に抑制することが出来る。   In the present invention, the weak current supplied in the step (c) is preferably a direct current. Thereby, a weak current always flows between the auxiliary substrate and the main substrate when the plating solution is drained in the step (d), and dissolution of the plating layer can be appropriately suppressed.

なお本発明では、前記メッキ層の形成時に少なくとも前記アノードと主基板間に供給される電流をパルス電流とすることが好ましい。   In the present invention, it is preferable that a current supplied at least between the anode and the main substrate when forming the plating layer is a pulse current.

本発明では、上記のようにメッキ層の形成時にパルス電流を用いた場合でも、前記(b)工程のスイッチング制御の際に、前記アノードと主基板間に流れていたパルス電流が主基板と補助基板間の回路上に乗って、前記補助基板と主基板間に流れるのを防止できる。よって本発明では従来に比べて効果的に前記メッキ層の品質を良好に保つことが出来る。   In the present invention, even when the pulse current is used when forming the plating layer as described above, the pulse current flowing between the anode and the main substrate at the time of the switching control in the step (b) is supplemented with the main substrate and the auxiliary substrate. It can be prevented that it rides on the circuit between the substrates and flows between the auxiliary substrate and the main substrate. Therefore, in the present invention, the quality of the plating layer can be effectively maintained as compared with the conventional case.

また本発明では、前記(c)工程で、前記主基板と補助基板間に電流を供給するための電源を、前記主基板とアノード間に電流供給するための電源と同一にし、前記(a)工程で前記主基板とアノード間に微弱電流を供給したとき、その微弱電流をそのまま前記(c)工程で、前記主基板と補助基板間に供給することが好ましい。これにより、前記主基板と補助基板間に微弱電流を供給する前記(c)工程を簡単且つ適切に行うことが出来る。ただし前記(a)工程で、前記主基板とアノード間に供給される電流値をゼロにした場合には、前記(c)工程で、再びメイン電源を立ち上げて微弱電流を流す制御が必要となる。   In the present invention, in the step (c), a power source for supplying a current between the main substrate and the auxiliary substrate is the same as a power source for supplying a current between the main substrate and the anode. When a weak current is supplied between the main substrate and the anode in the step, the weak current is preferably supplied as it is between the main substrate and the auxiliary substrate in the step (c). Thus, the step (c) for supplying a weak current between the main substrate and the auxiliary substrate can be performed easily and appropriately. However, when the current value supplied between the main substrate and the anode is set to zero in the step (a), it is necessary to control the flow of weak current by starting the main power source again in the step (c). Become.

また本発明では、前記(c)工程で、前記主基板と補助基板間に供給される電流の電源を、前記主基板とアノード間、及び前記補助基板とアノード間に電流供給するための電源と別に設けてもよい。   Further, in the present invention, in the step (c), a power source for supplying current between the main substrate and the auxiliary substrate, a power source for supplying current between the main substrate and the anode, and between the auxiliary substrate and the anode, It may be provided separately.

また本発明では、前記所定のメッキ層は、複数のメッキ層を積層した構造であり、少なくとも最上層よりも下側に形成されるメッキ層をメッキ形成した後、上記(a)工程ないし前記(d)工程を行うことが好ましい。かかる場合、前記メッキ層の表面に結晶粒や組成比、組成元素等が前記メッキ層とは異なる異質なメッキ層がメッキ形成されるのを抑制でき、前記メッキ層とその上に形成されるメッキ層の界面をきれいな状態に形成することが出来る。   In the present invention, the predetermined plating layer has a structure in which a plurality of plating layers are laminated. After the plating layer formed at least below the uppermost layer is formed by plating, the steps (a) to ( It is preferable to perform step d). In this case, it is possible to suppress the formation of a plating layer having a different crystal grain, composition ratio, composition element, etc. from the plating layer on the surface of the plating layer, and the plating layer and the plating formed thereon The interface of the layer can be formed in a clean state.

また本発明は、メッキ槽と、前記メッキ槽内に設けられたカソードである主基板と、前記主基板と所定距離離して対向させたアノードと、前記主基板の周囲に設けられた補助基板と、を有し、
前記メッキ槽内にメッキ液が充填され、前記主基板とアノード間、及び前記補助基板とアノード間に電流が供給されて前記主基板上に所定のメッキ層が形成され、前記メッキ層が形成された後、前記メッキ液が排液される電気メッキ装置において、
少なくとも、前記主基板とアノード間に設けられたメイン電源と、前記補助基板とアノード間に設けられたサブ電源と、前記主基板、アノード及びメイン電源間を接続する第1の回路部に設けられた第1の切替手段と、前記補助基板、アノード及びサブ電源間を接続する第2の回路部に設けられた第2の切替手段と、前記主基板と補助基板間を接続する第3の回路部に設けられた第3の切替手段と、制御手段とを有し、
前記メッキ層の形成時、第1の回路部、及び第2の回路部を前記第1の切替手段及び第2の切替手段を用いて電気的に接続すると共に、第3の回路部を前記第3の切替手段を用いて電気的に切断し、前記アノードと主基板間、及びアノードと補助基板間に電流を供給して前記主基板上に所定の前記メッキ層を形成し、
前記メッキ層の形成後、前記第1の回路部及び第2の回路部の電気的な接続状態と、第3の回路部の電気的な切断状態を維持して、前記制御手段により、前記メイン電源から流される電流値を、前記メッキ形成時の電流値よりも下げるか、あるいは前記電流値をゼロにすると共に、前記サブ電源から流される電流値を、前記メッキ形成時の電流値よりも下げるか、あるいは前記電流値をゼロにして、前記アノードと主基板間及び前記アノードと補助基板間に供給される電流値を微弱電流かあるいはゼロに制御し、
前記制御手段により、前記第1の切替部及び第2の切替部を切り替えて、前記第1の回路部及び第2の回路部を電気的に切断状態にすると共に、前記第3の切替部を切り替えて、前記第3の回路部を電気的に接続状態にし、
前記制御手段により、前記第3の回路部に所定の微弱電流を供給して前記補助基板と主基板間を通電させ、その後、前記メッキ液の排液を行うことを特徴とするものである。
The present invention also includes a plating tank, a main substrate that is a cathode provided in the plating tank, an anode that is opposed to the main substrate by a predetermined distance, and an auxiliary substrate that is provided around the main substrate. Have
A plating solution is filled in the plating tank, and a current is supplied between the main substrate and the anode and between the auxiliary substrate and the anode to form a predetermined plating layer on the main substrate, and the plating layer is formed. Then, in the electroplating apparatus in which the plating solution is drained,
At least a main power source provided between the main substrate and the anode, a sub power source provided between the auxiliary substrate and the anode, and a first circuit unit connecting the main substrate, the anode and the main power source are provided. The first switching means, the second switching means provided in the second circuit portion for connecting the auxiliary substrate, the anode and the sub power source, and the third circuit for connecting the main substrate and the auxiliary substrate A third switching means provided in the section, and a control means,
When forming the plating layer, the first circuit unit and the second circuit unit are electrically connected using the first switching unit and the second switching unit, and the third circuit unit is connected to the first circuit unit. Electrically disconnecting using the switching means of 3 and supplying a current between the anode and the main substrate and between the anode and the auxiliary substrate to form the predetermined plating layer on the main substrate,
After the plating layer is formed, the main circuit unit maintains the electrical connection state of the first circuit unit and the second circuit unit and the electrical disconnection state of the third circuit unit, and the control unit controls the main circuit unit. The current value flowing from the power supply is made lower than the current value at the time of plating formation, or the current value is made zero, and the current value supplied from the sub power supply is made lower than the current value at the time of plating formation. Or the current value is set to zero, and the current value supplied between the anode and the main substrate and between the anode and the auxiliary substrate is controlled to be weak current or zero,
The control means switches the first switching unit and the second switching unit to electrically disconnect the first circuit unit and the second circuit unit, and the third switching unit Switch to bring the third circuit portion into an electrically connected state,
The control means supplies a predetermined weak current to the third circuit portion to energize the auxiliary substrate and the main substrate, and then drains the plating solution.

本発明では、上記のようにメッキ層を形成した後、メイン電源及びサブ電源の出力制御や、第1,第2及び第3の各切替部の制御を行うことで、第1の回路部と第2の回路部とを電気的に切断状態にし、第3の回路部を電気的に接続状態にしたときに、前記主基板と補助基板間にサージ電流等の大電流が流れるのを抑制でき、前記第3の回路部から前記主基板と補助基板間に供給される微弱電流により前記主基板上に形成されたメッキ層の溶解を抑制でき、この結果、前記メッキ層の品質を良好に保つことが可能になる。   In the present invention, after the plating layer is formed as described above, the output of the main power supply and the sub power supply and the control of each of the first, second, and third switching units are performed, whereby the first circuit unit and When the second circuit portion is electrically disconnected and the third circuit portion is electrically connected, a large current such as a surge current can be prevented from flowing between the main substrate and the auxiliary substrate. Further, it is possible to suppress dissolution of the plating layer formed on the main substrate by the weak current supplied between the main substrate and the auxiliary substrate from the third circuit unit, and as a result, the quality of the plating layer is kept good. It becomes possible.

また本発明では、前記メイン電源は、前記第1の回路部と第3の回路部の共通電源として用いられることが好ましい。これにより回路構成を簡単にすることが出来る。   In the present invention, it is preferable that the main power source is used as a common power source for the first circuit unit and the third circuit unit. As a result, the circuit configuration can be simplified.

なお、前記第3の回路部にはメイン電源及びサブ電源とは別の予備電源が設けられていてもよい。かかる場合、前記予備電源は直流電源であることが好ましい。前記予備電源を直流電源にすることで、前記メッキ液の排液時に、前記補助基板と主基板間に常に微弱電流が流れる状態となり、効果的に前記メッキ層の溶解を抑制でき、前記メッキ層の品質を良好に保つことが出来る。   Note that a spare power supply different from the main power supply and the sub power supply may be provided in the third circuit portion. In such a case, the standby power source is preferably a direct current power source. By making the reserve power source a DC power source, when the plating solution is drained, a weak current always flows between the auxiliary substrate and the main substrate, so that the dissolution of the plating layer can be effectively suppressed, and the plating layer Can maintain good quality.

また本発明では、少なくとも前記メイン電源は、メッキ層の形成終了後、微弱電流を供給する直流電源に制御されることが好ましい。   In the present invention, it is preferable that at least the main power source is controlled by a DC power source that supplies a weak current after the formation of the plating layer.

また本発明では、少なくとも前記メイン電源は、メッキ層の形成時、パルス電源に制御されることが好ましい。これにより直流電流を用いた電気メッキ法では成し得なかった組成比を有するメッキ層をメッキ形成しやすくなる。また、メッキ層の形成時に前記メイン電源からパルス電流を流しても、後のスイッチング制御の際に、パルス電流が前記第3の回路部上に乗って主基板と補助基板間に流れてしまうといった従来の不具合は生じなく、前記メッキ層の品質を効果的に良好に保つことが出来る。   In the present invention, it is preferable that at least the main power source is controlled by a pulse power source when the plating layer is formed. As a result, a plating layer having a composition ratio that cannot be achieved by electroplating using a direct current can be easily formed by plating. In addition, even if a pulse current is supplied from the main power source when forming the plating layer, the pulse current rides on the third circuit unit and flows between the main board and the auxiliary board during the subsequent switching control. The conventional defect does not occur, and the quality of the plating layer can be effectively kept good.

本発明では、メッキ層を形成後、メッキ液を排液する前に、主基板とアノード間に供給される電流値を微弱電流に落とすかあるいは電流値をゼロに制御する。これにより回路内における電流チャージを低減でき、次に主基板と補助基板間を電気的に接続させるスイッチングの際に、サージ電流等の大電流が前記主基板と補助基板間に流れるのを抑制でき、前記主基板と補助基板間に所定の大きさの微弱電流を供給できる。この結果、前記メッキ液の排液の際に、主基板上にメッキ形成されたメッキ層の溶解を抑制すると共に、前記メッキ層の品質の劣化を抑制することが可能になる。   In the present invention, after the plating layer is formed and before the plating solution is drained, the current value supplied between the main substrate and the anode is reduced to a weak current or the current value is controlled to zero. As a result, the current charge in the circuit can be reduced, and then, when switching to electrically connect the main board and the auxiliary board, large current such as surge current can be suppressed from flowing between the main board and the auxiliary board. A weak current of a predetermined magnitude can be supplied between the main board and the auxiliary board. As a result, at the time of draining the plating solution, it is possible to suppress dissolution of the plating layer formed on the main substrate and to suppress deterioration of the quality of the plating layer.

図1は本発明の電気メッキ装置の部分断面図、図2は主基板及び補助基板を真上から見た平面図、図3ないし図6は本発明における電気メッキ装置の電気系統を説明するための回路構成図であり、回路の時間的な連動関係について説明するための図、図7ないし図9は、図3ないし図6とは異なる本発明における電気メッキ装置の電気系統を説明するための回路構成図であり、回路の時間的な連動関係について説明するための図、図10はメッキ通電から排液までのフローチャート図、図11は、所定の部位をメッキ形成して形成された薄膜磁気ヘッド(完成品)の部分正面図、図12は図11に示す薄膜磁気ヘッド(完成品)の部分縦断面図である。   FIG. 1 is a partial cross-sectional view of an electroplating apparatus of the present invention, FIG. 2 is a plan view of a main substrate and an auxiliary substrate viewed from directly above, and FIGS. 3 to 6 are diagrams for explaining an electric system of the electroplating apparatus of the present invention. FIG. 7 to FIG. 9 are diagrams for explaining the temporal interlocking relationship of the circuits, and FIG. 7 to FIG. 9 are for explaining the electric system of the electroplating apparatus in the present invention different from FIG. 3 to FIG. FIG. 10 is a circuit configuration diagram, and is a diagram for explaining a temporal interlocking relationship of the circuit, FIG. 10 is a flowchart diagram from plating energization to drainage, and FIG. 11 is a thin film magnet formed by plating a predetermined portion. FIG. 12 is a partial longitudinal sectional view of the thin film magnetic head (completed product) shown in FIG. 11.

図1に示す符号1はメッキ槽であり、前記メッキ槽1内には、アノード2と、カソードである主基板3、及び補助基板4が設けられている。図1に示すように、前記メッキ槽1の底面には、略円形状の穴部1aが設けられており、前記主基板3は、前記メッキ槽1の底面の下方から前記穴部1aに当接されて、前記穴部1aが前記主基板3により塞がれた状態になっている。   Reference numeral 1 shown in FIG. 1 denotes a plating tank. In the plating tank 1, an anode 2, a main substrate 3 serving as a cathode, and an auxiliary substrate 4 are provided. As shown in FIG. 1, a substantially circular hole 1 a is provided on the bottom surface of the plating tank 1, and the main substrate 3 contacts the hole 1 a from below the bottom surface of the plating tank 1. In contact therewith, the hole 1a is closed by the main substrate 3.

前記主基板3は台7上に載置され、前記台7は上下に駆動できるようになっている(図には矢印で示されている)。まだ前記メッキ槽1内にメッキ液5が注入されていない段階で、前記メッキ槽1よりも下方に位置している台7を上方に駆動させて前記主基板3を前記メッキ槽1の底面に設けられた穴1aに当接させる。   The main board 3 is placed on a table 7, which can be driven up and down (indicated by arrows in the figure). At a stage where the plating solution 5 has not yet been poured into the plating tank 1, the base 7 positioned below the plating tank 1 is driven upward to bring the main substrate 3 to the bottom surface of the plating tank 1. It is made to contact | abut to the provided hole 1a.

図1に示すように前記アノード2は、前記メッキ槽1内において前記主基板3と高さ方向に所定距離離れた位置で対向している。   As shown in FIG. 1, the anode 2 faces the main substrate 3 in the plating tank 1 at a position separated by a predetermined distance in the height direction.

図1に示すように、前記メッキ槽1の底面には前記補助基板4が設けられている。図2に示すように前記主基板3は例えば円盤状であり、前記主基板3の周囲に略リング状の補助基板4が設けられている。前記主基板3と前記補助基板4間は、絶縁された状態にあり、前記主基板3と前記補助基板4間が通電しないようにされている。   As shown in FIG. 1, the auxiliary substrate 4 is provided on the bottom surface of the plating tank 1. As shown in FIG. 2, the main substrate 3 has a disk shape, for example, and a substantially ring-shaped auxiliary substrate 4 is provided around the main substrate 3. The main board 3 and the auxiliary board 4 are insulated from each other, and the main board 3 and the auxiliary board 4 are not energized.

図1に示すように、前記メッキ槽1内にはメッキ液(電解液)5が充填される。前記アノード2は前記メッキ液5に浸されている。前記メッキ液5は、供給口6から前記メッキ槽1内部に注入されるとともに、排出口60から排液され、常に新しいメッキ液5が前記メッキ槽1の内部を循環するようになっている。前記メッキ液5の循環は攪拌効果を高めて濃度分極を低減させるために行われる。   As shown in FIG. 1, the plating tank 1 is filled with a plating solution (electrolytic solution) 5. The anode 2 is immersed in the plating solution 5. The plating solution 5 is injected into the plating tank 1 from the supply port 6 and discharged from the discharge port 60, so that a new plating solution 5 is always circulated in the plating tank 1. The plating solution 5 is circulated in order to increase the stirring effect and reduce the concentration polarization.

なお前記メッキ液5は、前記主基板1上に所定のメッキ層をメッキ形成した後、前記排出口60から排液され、全てのメッキ液5を排液した後、前記台7を下方に駆動させ、前記台7上に載置された主基板3を取り出す。   The plating solution 5 is drained from the outlet 60 after a predetermined plating layer is formed on the main substrate 1, and after the plating solution 5 has been drained, the base 7 is driven downward. The main board 3 placed on the table 7 is taken out.

図3は、前記主基板3上に所定のメッキ層をメッキ形成する際(図10におけるステップa)の回路構成図である。   FIG. 3 is a circuit configuration diagram when a predetermined plating layer is formed by plating on the main substrate 3 (step a in FIG. 10).

図3に示すように、前記アノード2には共通配線8が接続され、この共通配線8から分岐した配線9,10が設けられ、一方の配線9は主基板3に、もう一方の配線10は補助基板4に接続されている。図3に示すように前記主基板3とアノード2間を繋ぐ第1の回路部17にはメイン電源15と第1のスイッチ(第1の切替部)12が設けられ、前記補助基板4と前記アノード2間を繋ぐ第2の回路部18には、サブ電源16と第2のスイッチ(第2の切替部)13が設けられている。   As shown in FIG. 3, a common wiring 8 is connected to the anode 2 and wirings 9 and 10 branched from the common wiring 8 are provided. One wiring 9 is connected to the main board 3 and the other wiring 10 is connected to the anode 2. It is connected to the auxiliary substrate 4. As shown in FIG. 3, the first circuit unit 17 that connects the main substrate 3 and the anode 2 is provided with a main power source 15 and a first switch (first switching unit) 12. A sub power source 16 and a second switch (second switching unit) 13 are provided in the second circuit unit 18 that connects the anodes 2.

また図3に示すように配線9,10間を繋ぐ配線14を設けて、前記補助基板4と主基板3間に前記メイン電源15を含む第3の回路部19が形成されている。前記第3の回路部19には第3のスイッチ(第3の切替部)20が設けられている。   As shown in FIG. 3, a wiring 14 that connects the wirings 9 and 10 is provided, and a third circuit portion 19 including the main power supply 15 is formed between the auxiliary substrate 4 and the main substrate 3. The third circuit unit 19 is provided with a third switch (third switching unit) 20.

図1に示すように前記メッキ液5が前記メッキ槽1内を所定高さ満たしたら、前記主基板3上に所定のメッキ層をメッキ形成する。図3に示すように、前記メッキ形成時は、前記第1のスイッチ12と第2のスイッチ13をONの状態にし、一方、第3のスイッチ20を開放した状態にする。これにより前記第1の回路部17と第2の回路部18とが電気的に接続された状態になり、一方、前記第3の回路部19は電気的に切断された状態になる。   As shown in FIG. 1, when the plating solution 5 fills the plating tank 1 with a predetermined height, a predetermined plating layer is formed on the main substrate 3 by plating. As shown in FIG. 3, when the plating is formed, the first switch 12 and the second switch 13 are turned on, while the third switch 20 is opened. As a result, the first circuit portion 17 and the second circuit portion 18 are electrically connected, while the third circuit portion 19 is electrically disconnected.

そして前記メイン電源15及びサブ電源16からパルス電流を、前記第1の回路部17及び第2の回路部18を通して前記アノード2と主基板3間、及び前記アノード2と補助基板4間に供給する。   A pulse current is supplied from the main power source 15 and the sub power source 16 through the first circuit portion 17 and the second circuit portion 18 between the anode 2 and the main substrate 3 and between the anode 2 and the auxiliary substrate 4. .

前記補助基板4は、前記主基板3上に形成されるメッキ層の膜厚の均一化を促進させるべく設けられたものである。前記補助基板4が設けられていないと、前記アノード2から前記主基板3に向けて流れるパルス電流の電流密度が、前記主基板3上の各部位でより不均一になる。特に前記主基板3の中央と端とで前記電流密度の差は非常に大きくなり、この結果、前記主基板3上にメッキ形成されるメッキ層の膜厚がより不均一になりやすい。前記補助基板3を設けないと前記主基板3の中央よりも端にメッキ形成されるメッキ層の膜厚が厚くなることがわかっている。このような電流密度の不均一性を抑制すべく前記主基板3の周囲に別電源に接続された補助基板4を設け、前記補助基板4とアノード2間も通電させることで、出来る限り前記主基板3上の電流密度の均一化が促進されるようにする。前記補助基板4を設けることで、前記主基板3上にメッキ形成されるメッキ層の膜厚を、前記補助基板4を設けない場合に比べてより均一な膜厚に近づけることが出来る。   The auxiliary substrate 4 is provided in order to promote the uniform thickness of the plating layer formed on the main substrate 3. If the auxiliary substrate 4 is not provided, the current density of the pulse current flowing from the anode 2 toward the main substrate 3 becomes more uneven at each part on the main substrate 3. In particular, the difference in the current density between the center and the end of the main substrate 3 becomes very large. As a result, the thickness of the plating layer formed on the main substrate 3 tends to be more uneven. It is known that if the auxiliary substrate 3 is not provided, the thickness of the plating layer formed by plating at the end rather than the center of the main substrate 3 is increased. In order to suppress such non-uniformity of current density, an auxiliary substrate 4 connected to another power source is provided around the main substrate 3, and the main substrate 3 and the anode 2 are energized, so that the main substrate can be energized as much as possible. Uniformity of the current density on the substrate 3 is promoted. By providing the auxiliary substrate 4, the thickness of the plating layer plated on the main substrate 3 can be made closer to a uniform film thickness compared to the case where the auxiliary substrate 4 is not provided.

また本発明では前記メイン電源15をパルス電源とする。すなわち前記主基板3とアノード2間にパルス電流を流すわけであるが、このようにパルス電流を用いる利点は、特にレジスト等で囲まれた非常に狭い空間内にメッキ層を所定の組成比で効果的にメッキ形成できる点にある。   In the present invention, the main power source 15 is a pulse power source. That is, a pulse current is caused to flow between the main substrate 3 and the anode 2, and the advantage of using the pulse current in this way is that the plating layer has a predetermined composition ratio in a very narrow space surrounded by resist or the like. This is in that plating can be formed effectively.

例えば図11,図12に示す薄膜磁気ヘッドを構成する磁性メッキ層を図1に示す電気メッキ装置を用いて形成する。図11は、前記薄膜磁気ヘッドの一部分の正面図、図12は前記薄膜磁気ヘッドの部分縦断面図である。なお図11及び図12に示す薄膜磁気ヘッドはメッキ法やスパッタ法等の所定の成膜方法によって形成され、所定の加工が施された後の完成品の構成であり、主基板3上には製造過程中の薄膜磁気ヘッドが多数形成された状態になっている。   For example, the magnetic plating layer constituting the thin film magnetic head shown in FIGS. 11 and 12 is formed using the electroplating apparatus shown in FIG. FIG. 11 is a front view of a part of the thin film magnetic head, and FIG. 12 is a partial longitudinal sectional view of the thin film magnetic head. The thin film magnetic head shown in FIG. 11 and FIG. 12 is a completed product structure formed by a predetermined film forming method such as a plating method or a sputtering method and subjected to predetermined processing. Many thin-film magnetic heads in the manufacturing process are formed.

図12に示すように、浮上式ヘッドを構成するセラミック材のスライダ(図1の主基板3を所定形状に切断加工したものである)21のトレーリング側端面21a上にはMRヘッドh1と、書込み用のインダクティブヘッドh2とが積層されている。   As shown in FIG. 12, the MR head h1 is formed on the trailing side end face 21a of the ceramic slider (the main substrate 3 of FIG. 1 is cut into a predetermined shape) 21 constituting the floating head. The inductive head h2 for writing is laminated.

図12に示すように、スライダ21のトレーリング側端面21a上にAl膜22を介してNiFe等からなる磁性材料製の下部シールド層23が形成され、さらにその上に絶縁材料製の下部ギャップ層24が形成されている。 As shown in FIG. 12, a lower shield layer 23 made of a magnetic material made of NiFe or the like is formed on the trailing end surface 21a of the slider 21 via an Al 2 O 3 film 22, and further made of an insulating material. A lower gap layer 24 is formed.

下部ギャップ層24上には記録媒体との対向面からハイト方向(図示Y方向)に向けて、異方性磁気抵抗効果(AMR)素子、巨大磁気抵抗効果(GMR)素子あるいはトンネル型磁気抵抗効果(TMR)素子などの磁気抵抗効果素子25が形成され、さらに磁気抵抗効果素子25及び下部ギャップ層24上には絶縁材料製の上部ギャップ層26が形成されている。さらに上部ギャップ層26の上にNiFe等の磁性材料で形成された上部シールド層27が形成されている。MRヘッドh1は、下部シールド層23から上部シールド層27までの積層膜で構成されている。   An anisotropic magnetoresistive effect (AMR) element, giant magnetoresistive effect (GMR) element or tunnel magnetoresistive effect is formed on the lower gap layer 24 from the surface facing the recording medium in the height direction (Y direction in the figure). A magnetoresistive effect element 25 such as a (TMR) element is formed, and an upper gap layer 26 made of an insulating material is formed on the magnetoresistive effect element 25 and the lower gap layer 24. Further, an upper shield layer 27 made of a magnetic material such as NiFe is formed on the upper gap layer 26. The MR head h1 is composed of a laminated film from the lower shield layer 23 to the upper shield layer 27.

上部シールド層27上には、Alなどからなる分離層28を介して、インダクティブヘッドh2の下部コア層30が積層されている。下部コア層30は、NiFeなどによって形成される。下部コア層30上には、Gd決め層31が形成され、Gd決め層31は例えば絶縁材料などで形成される。 On the upper shield layer 27, a lower core layer 30 of the inductive head h2 is laminated via a separation layer 28 made of Al 2 O 3 or the like. The lower core layer 30 is made of NiFe or the like. A Gd determining layer 31 is formed on the lower core layer 30, and the Gd determining layer 31 is formed of an insulating material, for example.

また、記録媒体との対向面からGd決め層31上にかけて、上部コア層よりトラック幅方向寸法が小さい磁極部32が形成されている。   Further, a magnetic pole portion 32 having a smaller dimension in the track width direction than the upper core layer is formed from the surface facing the recording medium to the Gd determining layer 31.

磁極部32は下から下部磁極層33、非磁性のギャップ層34、及び上部磁極層35が積層されている。   In the magnetic pole part 32, a lower magnetic pole layer 33, a nonmagnetic gap layer 34, and an upper magnetic pole layer 35 are laminated from the bottom.

下部磁極層33は、下部コア層30上に直接メッキ形成されている。また下部磁極層33の上に形成されたギャップ層34はNiP等のメッキ形成可能な非磁性金属材料で形成されている。さらにギャップ層34の上に形成された上部磁極層35は、その上に形成される上部コア層36と磁気的に接続される。   The lower magnetic pole layer 33 is directly plated on the lower core layer 30. The gap layer 34 formed on the bottom pole layer 33 is made of a nonmagnetic metal material such as NiP that can be plated. Further, the upper magnetic pole layer 35 formed on the gap layer 34 is magnetically connected to the upper core layer 36 formed thereon.

前記磁極部32のトラック幅方向(図示X方向)の両側及びハイト方向後方(図示Y方向)にはAlやSiOなどの無機材料からなる絶縁層37(絶縁層37a及び絶縁層37bからなる)が形成されている。絶縁層37の上面は磁極部32の上面と同一平面とされる。 Insulating layers 37 (insulating layer 37a and insulating layer 37b) made of an inorganic material such as Al 2 O 3 or SiO 2 are provided on both sides of the magnetic pole portion 32 in the track width direction (X direction in the drawing) and on the rear in the height direction (Y direction in the drawing). Is formed). The upper surface of the insulating layer 37 is flush with the upper surface of the magnetic pole part 32.

図12に示すように、絶縁層37の内部及び絶縁層37上に、コイル層38が2層構造となるようにパターン形成されている。またコイル層38の上層は有機絶縁材料製の絶縁層39によって覆われている。   As shown in FIG. 12, the coil layer 38 is patterned in a two-layer structure inside the insulating layer 37 and on the insulating layer 37. The upper layer of the coil layer 38 is covered with an insulating layer 39 made of an organic insulating material.

磁極部32上から絶縁層39上にかけて上部コア層36が例えばフレームメッキ法によりパターン形成されている。   The upper core layer 36 is patterned by, for example, frame plating from the magnetic pole portion 32 to the insulating layer 39.

上部コア層36の基端部36bは、下部コア層30上に形成された、NiFeなどの磁性材料製の接続層(バックギャップ層)40上に直接接続されている。   The base end portion 36 b of the upper core layer 36 is directly connected to a connection layer (back gap layer) 40 made of a magnetic material such as NiFe formed on the lower core layer 30.

図11に示すように、磁極部32はトラック幅方向(図示X方向)における幅寸法がトラック幅Twで形成されている。   As shown in FIG. 11, the magnetic pole portion 32 is formed with a track width Tw in the track width direction (X direction in the drawing).

本発明では、図11及び図12に示す磁極部32やその他のメッキ層を図1に示す電気メッキ装置を用いてメッキ形成する。   In the present invention, the magnetic pole portion 32 and other plating layers shown in FIGS. 11 and 12 are formed by plating using the electroplating apparatus shown in FIG.

このとき、特に前記磁極層32のメッキ形成は、メイン電源15からアノード2と主基板3間にパルス電流を供給しながら行うことが好ましい。   At this time, the magnetic pole layer 32 is preferably plated while supplying a pulse current from the main power source 15 between the anode 2 and the main substrate 3.

前記下部磁極層33や上部磁極層35は例えばFeNi合金あるいはFeNiCo合金等の磁性材料で形成される。特に前記下部磁極層33や上部磁極層35には高い飽和磁束密度(例えば2.0T以上)等の所定の特性が求められる。このような高い飽和磁束密度を得るには前記下部磁極層33及び上部磁極層35として構成される磁性層中にFe量が多く含まれることが必要である。   The lower magnetic pole layer 33 and the upper magnetic pole layer 35 are formed of a magnetic material such as FeNi alloy or FeNiCo alloy. In particular, the lower magnetic pole layer 33 and the upper magnetic pole layer 35 are required to have predetermined characteristics such as a high saturation magnetic flux density (for example, 2.0 T or more). In order to obtain such a high saturation magnetic flux density, it is necessary that the magnetic layer constituted as the lower magnetic pole layer 33 and the upper magnetic pole layer 35 contains a large amount of Fe.

図11に示すように磁極部32は非常に細い幅(トラック幅Tw)の直立形状で形成される。メッキ形成時には前記磁極部32の形状にレジストをパターン形成し、前記パターン形成内に前記磁極部32を構成する各層をメッキ形成する。   As shown in FIG. 11, the magnetic pole portion 32 is formed in an upright shape having a very narrow width (track width Tw). At the time of plating formation, a resist is patterned in the shape of the magnetic pole portion 32, and each layer constituting the magnetic pole portion 32 is formed by plating within the pattern formation.

パルス電流を用いた電気メッキ法を用いると、電流を流さない時間を設けることが出来るため、前記下部磁極層33及び上部磁極層35を、少しずつメッキ形成でき、そしてメッキ浴中のFeイオンの濃度を増やしても、直流電流を用いた場合に比べメッキ形成時における電流密度の分布の偏りを緩和することが可能になっている。また前記パルス電流を用いることで、磁極部32形状に形成されたレジストパターンのように非常に狭い空間内をメッキ形成するときでも攪拌効果を高めることができる。この結果、直流電流による電解メッキ法に比べて前記下部磁極層33及び上部磁極層35に含まれるFe含有量を従来よりも効果的に増やすことが可能になる。   When an electroplating method using a pulse current is used, a time during which no current flows can be provided. Therefore, the lower magnetic pole layer 33 and the upper magnetic pole layer 35 can be formed little by little, and Fe ions in the plating bath can be formed. Even if the concentration is increased, it is possible to alleviate the uneven distribution of the current density during plating compared to the case where a direct current is used. Further, by using the pulse current, the stirring effect can be enhanced even when a very narrow space such as a resist pattern formed in the shape of the magnetic pole portion 32 is plated. As a result, it is possible to increase the Fe content contained in the lower magnetic pole layer 33 and the upper magnetic pole layer 35 more effectively than in the prior art as compared with the electrolytic plating method using a direct current.

なおパルス電流は、例えば数秒サイクルでON/OFFを繰返し、デューティ比を0.1〜0.5程度にすることが好ましい。   It is preferable that the pulse current is repeatedly turned ON / OFF in a cycle of several seconds, for example, and the duty ratio is set to about 0.1 to 0.5.

またパルス電流値(ピーク時における)は1A〜5Aの範囲内であることが好ましい。
なお本発明では、前記メイン電源15をパルス電源としたとき、前記サブ電源16もパルス電源とした方が好ましい。
The pulse current value (at the peak time) is preferably in the range of 1A to 5A.
In the present invention, when the main power source 15 is a pulse power source, the sub power source 16 is preferably a pulse power source.

以上のように電源の出力制御やスイッチング制御をして、所定のメッキ層をメッキ形成した後(図10のステップa,b)、次に説明する電源の出力制御やスイッチング制御を施して図1に示すメッキ液5の排液を行う。   After the power supply output control and switching control are performed as described above to form a predetermined plating layer (steps a and b in FIG. 10), the power supply output control and switching control described below are performed and FIG. The plating solution 5 shown in FIG.

以下、本発明の特徴的部分について説明する。本発明では前記メッキ層のメッキ形成が終了した後(図10のステップa,b)、まず図4に示すように、前記第1のスイッチ12及び第2のスイッチ13をONの状態にしておき、一方、第3のスイッチ20を開放した状態にしたまま、前記メイン電源15及びサブ電源16から流れる電流値を、前記メッキ層の形成時における電流値よりも十分に小さい微弱電流に制御するか、あるいは電流値をゼロに制御する(図10のステップc)。   Hereinafter, characteristic portions of the present invention will be described. In the present invention, after the plating formation of the plating layer is completed (steps a and b in FIG. 10), first, as shown in FIG. 4, the first switch 12 and the second switch 13 are turned on. On the other hand, whether the current value flowing from the main power supply 15 and the sub power supply 16 is controlled to be a weak current sufficiently smaller than the current value at the time of forming the plating layer while the third switch 20 is kept open. Alternatively, the current value is controlled to zero (step c in FIG. 10).

図4に示すように前記電気メッキ装置には制御部62が設けられ、前記制御部62から信号S1,S2が前記メイン電源15及びサブ電源16に伝送され、これにより前記メイン電源15及びサブ電源16から流される電流値を微弱にするかあるいはゼロに制御できる。なお前記メイン電源15及びサブ電源16にプログラマブル電源を用いれば上記した制御をより簡単に行うことが出来る。   As shown in FIG. 4, the electroplating apparatus is provided with a control unit 62, and signals S1 and S2 are transmitted from the control unit 62 to the main power source 15 and the sub power source 16, whereby the main power source 15 and the sub power source 16 are transmitted. The current value flowing from 16 can be weakened or controlled to zero. If a programmable power supply is used for the main power supply 15 and the sub power supply 16, the above control can be performed more easily.

ここで微弱電流値は、数十mA程度である。具体的には、10mA〜100mA程度である。   Here, the weak current value is about several tens of mA. Specifically, it is about 10 mA to 100 mA.

また前記メイン電源15から前記主基板3とアノード2間に微弱電流を流すときは直流電流であることが好ましい。メッキ層のメッキ形成終了から、次の図5で説明するスイッチング制御、及び主基板3と補助基板4間の通電まで、多少時間がかかるので、その間も前記主基板上に形成されたメッキ層は前記メッキ液5に曝されて若干溶解される可能性があるが、前記メイン電源15から微弱電流を供給するとともにそれを直流電流にすれば、主基板3と補助基板4間が通電状態になるまで常に微弱電流が流れつづけるので前記メッキ層の溶解を適切に抑制できる。   Further, when a weak current is allowed to flow from the main power supply 15 between the main substrate 3 and the anode 2, a direct current is preferable. Since it takes some time from the end of the plating formation to the switching control described in FIG. 5 and the energization between the main board 3 and the auxiliary board 4, the plating layer formed on the main board during that time Although it may be slightly dissolved by being exposed to the plating solution 5, if a weak current is supplied from the main power supply 15 and is made a direct current, the main substrate 3 and the auxiliary substrate 4 are energized. Since a weak current continues to flow all the time, dissolution of the plating layer can be appropriately suppressed.

次に図5では、前記第1のスイッチ12及び第2のスイッチ13を開放し、前記第1の回路部17及び第2の回路部18を電気的に切断すると共に、前記第3のスイッチ20をON状態にして、前記第3の回路部19を電気的に接続する(図9のステップd)。   Next, in FIG. 5, the first switch 12 and the second switch 13 are opened, the first circuit portion 17 and the second circuit portion 18 are electrically disconnected, and the third switch 20. Is turned on to electrically connect the third circuit portion 19 (step d in FIG. 9).

上記したスイッチング制御を前記制御部62を用いて行う。前記制御部62からは、前記信号S1,S2をメイン電源15及びサブ電源16に伝送した後、所定の時間を置いて前記第1のスイッチ12及び第2のスイッチ13に対しスイッチを開放せよとする命令信号S3,S4を伝送し、一方、前記第32のスイッチ20に対しスイッチをONにせよとする命令信号S5を伝送する。   The above switching control is performed using the control unit 62. The controller 62 transmits the signals S1 and S2 to the main power supply 15 and the sub power supply 16, and then opens the switches for the first switch 12 and the second switch 13 after a predetermined time. Command signals S3 and S4 to be transmitted, and a command signal S5 to turn on the switch is transmitted to the thirty-second switch 20.

なお図6のように制御部62とは別に検知手段63を設けておき、前記検知手段63が前記メイン電源15及びサブ電源16の電流値を検知し(検知信号S8,S9)、微弱電流かあるいは電流値がゼロになったことを検知したら、前記制御部62に信号S7を伝送し、その後、前記制御部62から各スイッチに対し上記した信号S3,S4,S5を伝送するようにしても良い。   As shown in FIG. 6, a detection means 63 is provided separately from the control unit 62, and the detection means 63 detects the current values of the main power supply 15 and the sub power supply 16 (detection signals S8 and S9). Alternatively, when it is detected that the current value has become zero, the signal S7 is transmitted to the control unit 62, and then the signals S3, S4, and S5 described above are transmitted from the control unit 62 to each switch. good.

上記した図5,図6でのスイッチング制御を行うと、第3の回路部19が電気的に接続されるので、前記主基板3と補助基板4間が通電可能な状態になる。ここで図4の工程で前記メイン電源15から微弱電流を流している場合には、その電流値をそのまま利用して前記主基板3と補助基板4間に前記微弱電流を供給することが出力制御を簡単に出来て好ましい(図9のステップe)。   When the switching control shown in FIGS. 5 and 6 is performed, the third circuit unit 19 is electrically connected, so that the main board 3 and the auxiliary board 4 can be energized. Here, when a weak current is flowing from the main power supply 15 in the step of FIG. 4, the weak current is supplied between the main board 3 and the auxiliary board 4 using the current value as it is. Is preferable (step e in FIG. 9).

また前記メイン電源15から流れる電流値を図4の工程でゼロに制御した(電源を落とした)場合には、上記の図5,図6でのスイッチング制御の後、前記制御部62から前記メイン電源15に電源を立ち上げよとする命令信号を伝送すると共に、前記メイン電源15から所定の大きさの微弱電流が出力されるように制御して、前記主基板3と補助基板4間に微弱電流を供給する(図9のステップe)。   When the value of the current flowing from the main power supply 15 is controlled to zero (the power supply is turned off) in the process of FIG. 4, after the switching control in FIG. 5 and FIG. A command signal for starting up the power supply is transmitted to the power supply 15, and a weak current of a predetermined magnitude is output from the main power supply 15 to control the weak current between the main board 3 and the auxiliary board 4. (Step e in FIG. 9).

前記主基板3と補助基板4間に流れる微弱電流は直流電流であることが好ましい。前記主基板3と補助基板4間に流す微弱電流を直流電流にすることで、次工程で行われるメッキ液5の排液中、常に前記主基板3と補助基板4間に電流が流れるので、前記主基板3上に形成されたメッキ層の溶解を排液中、効果的に抑制できる。   The weak current flowing between the main board 3 and the auxiliary board 4 is preferably a direct current. By making the weak current flowing between the main substrate 3 and the auxiliary substrate 4 into a direct current, the current always flows between the main substrate 3 and the auxiliary substrate 4 during the drainage of the plating solution 5 performed in the next process. Dissolution of the plating layer formed on the main substrate 3 can be effectively suppressed during drainage.

次に前記メッキ液5の排液を行う(図9のステップf)。前記メッキ液5の排液には数秒から十数秒程度かかる。この間中、前記主基板3上に形成されたメッキ層はメッキ液に曝されるので、前記メッキ層は溶解しやすい状態になっている。本発明では、前記メッキ液の5の排液時に、前記補助基板4と主基板3間が微弱通電しているため、前記メッキ層の溶解が抑制される。   Next, the plating solution 5 is drained (step f in FIG. 9). It takes about several seconds to several tens of seconds to drain the plating solution 5. During this time, the plating layer formed on the main substrate 3 is exposed to the plating solution, so that the plating layer is easily dissolved. In the present invention, since the sub-substrate 4 and the main substrate 3 are weakly energized when the plating solution 5 is drained, dissolution of the plating layer is suppressed.

例えば前記メッキ液のpHが3程度である場合、前記主基板3と補助基板4間に30mA〜40mA程度の微弱電流を流すと前記メッキ層が前記メッキ液5の排液中、ほとんど溶解されずに、良好な品質を適切に維持することが可能である。   For example, when the pH of the plating solution is about 3, when a weak current of about 30 mA to 40 mA is passed between the main substrate 3 and the auxiliary substrate 4, the plating layer is hardly dissolved in the drainage of the plating solution 5. In addition, it is possible to maintain good quality appropriately.

本発明は、上記したように、メッキ層のメッキ形成後、メッキ液5の排液前に、図4で説明したように、前記主基板3とアノード2間及び補助基板4とアノード2間を電気的に接続した状態に維持して、前記主基板3とアノード2間及び補助基板4とアノード2間に、前記メッキ層のメッキ形成時に供給されていた電流値よりも十分に小さい微弱電流を供給するかあるいは電流値をゼロに制御し、その後、図5,6で説明したように、前記主基板3とアノード2間、及び補助基板4とアノード2間を電気的に切断すると共に、前記主基板3と補助基板4間を電気的に接続する点に最大の特徴点がある。   As described above, according to the present invention, between the main substrate 3 and the anode 2 and between the auxiliary substrate 4 and the anode 2 as described with reference to FIG. Maintaining an electrically connected state, a weak current sufficiently smaller than the current value supplied at the time of forming the plating layer between the main substrate 3 and the anode 2 and between the auxiliary substrate 4 and the anode 2 is applied. Or the current value is controlled to zero, and then, as described with reference to FIGS. 5 and 6, the main substrate 3 and the anode 2 and the auxiliary substrate 4 and the anode 2 are electrically disconnected, and the The greatest characteristic point is that the main board 3 and the auxiliary board 4 are electrically connected.

図5,6のスイッチング制御前に、メイン電源15及びサブ電源16から流れる電流値を微弱状態か前記電流値をゼロに制御するので、各回路上において電流チャージが低減され、図5,6のスイッチングを行っても前記主基板3と補助基板4間にサージ電流等の大電流が流れるのを適切に抑制できる。   Before the switching control in FIGS. 5 and 6, the current value flowing from the main power supply 15 and the sub power supply 16 is controlled to be in a weak state or the current value is set to zero, so that the current charge is reduced on each circuit. Even when switching is performed, it is possible to appropriately suppress a large current such as a surge current from flowing between the main board 3 and the auxiliary board 4.

しかも本発明では、上記したようにメッキ層のメッキ形成時、メイン電源15及びサブ電源16にパルス電源を用いることが好ましいと説明したが、かかる場合、図4の工程を経る事無く、図5,6の工程に移行したとき、スイッチングのタイミングを誤ると、ピーク時の非常に大きいパルス電流が主基板4と補助基板3間の第3の回路部19上に乗ってしまい、前記補助基板4と主基板3間に非常に大きなパルス電流が流れてしまう可能性があった。しかし本発明では、図4工程で、メイン電源15及びサブ電源16から流れる電流値を微弱状態か、あるいは前記電流値をゼロに落とすので、図5,6のスイッチングの時に、前記第3の回路部19上に大きい電流値のパルス電流が乗ることは無く、よって大きな電流値のパルス電流が前記補助基板4と主基板3間に流れてしまうことを防止できる。   In addition, in the present invention, it has been described that it is preferable to use a pulse power source for the main power source 15 and the sub power source 16 when the plating layer is formed as described above. However, in such a case, the process of FIG. 6, if the switching timing is wrong, a very large pulse current at the peak rides on the third circuit portion 19 between the main board 4 and the auxiliary board 3, and the auxiliary board 4. And a very large pulse current may flow between the main substrates 3. However, in the present invention, the current value flowing from the main power supply 15 and the sub power supply 16 is weak or the current value is reduced to zero in the step of FIG. The pulse current having a large current value does not get on the portion 19, and therefore it is possible to prevent the pulse current having a large current value from flowing between the auxiliary substrate 4 and the main substrate 3.

以上のように本発明では、前記主基板3と補助基板4間を通電状態にした時には前記主基板3と補助基板4間には微弱電流しか流れないので前記主基板3上に形成されたメッキ層が大電流の影響を受けて、例えば前記メッキ層上に前記メッキ層とは異なる異質(例えば組成比や組成元素が異なっていたり、結晶粒が異常なほど粗大化するなど)な層が形成されてしまったりすることなく前記メッキ層とその上に形成される層間の界面状態をきれいな状態に維持でき、またメッキ液の排液中、適切に前記メッキ層の溶解をも抑制できるので、前記メッキ層の品質を良好な状態に保つことが可能になっている。   As described above, in the present invention, only a weak current flows between the main board 3 and the auxiliary board 4 when the main board 3 and the auxiliary board 4 are energized, so that the plating formed on the main board 3 is used. The layer is affected by a large current, and for example, a layer different from the plated layer (for example, the composition ratio or the composition element is different or the crystal grain is abnormally coarsened) is formed on the plated layer. The interface state between the plating layer and the layer formed thereon can be maintained in a clean state without being lost, and since the dissolution of the plating layer can be appropriately suppressed during the drainage of the plating solution, It is possible to keep the quality of the plating layer in a good state.

また図3ないし図6で説明した回路構成のように制御部62を設けることで、メイン電源15及びサブ電源16の出力値の制御と、スイッチングの時間的な制御とを簡単且つ適切に行うことが可能である。   Further, by providing the control unit 62 as in the circuit configuration described in FIGS. 3 to 6, the control of the output values of the main power supply 15 and the sub power supply 16 and the temporal control of switching can be performed easily and appropriately. Is possible.

特に図3ないし図6で説明した回路構成では、メイン電源15を第1の回路部17及び第3の回路部19の共通電源にしており、前記メイン電源15から流れる電流値を前記制御部62で適切に出力制御することで、前記メッキ層をメッキ形成する際の電流供給源にも、メッキ液5の排液の際の前記メッキ層の溶解防止電流源にもなり、回路構成を簡単なものに出来る。   In particular, in the circuit configuration described with reference to FIGS. 3 to 6, the main power supply 15 is used as a common power supply for the first circuit unit 17 and the third circuit unit 19, and the current value flowing from the main power supply 15 is set to the control unit 62. By properly controlling the output, the current supply source when the plating layer is formed by plating and the current source for preventing the dissolution of the plating layer when the plating solution 5 is discharged can be simplified. I can make it.

図7ないし図9は、図3ないし図6と異なって、前記主基板3と補助基板4間を接続する第3の回路部19上に別に予備電源22を設けた実施形態である。ただし前記第3の回路部19は、第1の回路部17及び第2の回路部18の一部と共通配線となっている。   FIGS. 7 to 9 are different from FIGS. 3 to 6 in an embodiment in which a spare power source 22 is provided on the third circuit portion 19 for connecting the main board 3 and the auxiliary board 4. However, the third circuit unit 19 is shared with a part of the first circuit unit 17 and the second circuit unit 18.

図7では、前記アノード2と主基板3間を繋ぐ第1の回路部17上に設けられた第1のスイッチ12をON状態にし前記第1の回路部17を電気的に接続し、前記アノード2と補助基板4間を繋ぐ第2の回路部18上に設けられた第2のスイッチ13をON状態にし前記第2の回路部18を電気的に接続する。また前記主基板3と補助基板4間を繋ぐ前記第3の回路部19上に設けられた第3のスイッチ20を開放し、前記第3の回路部19を電気的に切断する。   In FIG. 7, the first switch 12 provided on the first circuit unit 17 connecting the anode 2 and the main substrate 3 is turned on to electrically connect the first circuit unit 17, and the anode The second switch 13 provided on the second circuit unit 18 that connects between the second circuit board 2 and the auxiliary substrate 4 is turned on to electrically connect the second circuit unit 18. Further, the third switch 20 provided on the third circuit unit 19 connecting the main substrate 3 and the auxiliary substrate 4 is opened, and the third circuit unit 19 is electrically disconnected.

図7の回路構成の状態で、前記メイン電源15及びサブ電源16から前記アノード2と主基板3間、及びアノード2と補助基板4間に電流(好ましくはパルス電流)を供給し、前記主基板3上に所定のメッキ層をメッキ形成する。   In the state of the circuit configuration of FIG. 7, a current (preferably a pulse current) is supplied from the main power source 15 and the sub power source 16 between the anode 2 and the main substrate 3 and between the anode 2 and the auxiliary substrate 4. A predetermined plating layer is formed on 3 by plating.

前記メッキ層を形成した後、前記メッキ槽1内を満たすメッキ液5を排液する前に図8に示すように、各スイッチ12,13,20の状態はそのまま維持して、前記メイン電源15及びサブ電源16から流れる電流値をメッキ層をメッキ形成していたときよりも弱い微弱電流にし、あるいは前記電流値をゼロに制御する。微弱電流に出力変換する場合は微弱な直流電流を前記メイン電源15から流れるようにすることが好ましい。パルス電流であると出力がされない時にメッキ液に曝されているメッキ層の溶解を抑制できないが、前記アノード2と主基板3間に微弱な直流電流を流すと次の図7のスイッチング制御までの間、前記メッキ層の溶解を適切に抑制できる。   After forming the plating layer and before draining the plating solution 5 filling the plating tank 1, as shown in FIG. 8, the state of the switches 12, 13, 20 is maintained as it is, and the main power source 15 is maintained. The current value flowing from the sub power supply 16 is set to a weak current that is weaker than when the plating layer is formed by plating, or the current value is controlled to zero. In the case of output conversion to a weak current, it is preferable that a weak direct current flows from the main power supply 15. When the pulse current is not output, dissolution of the plating layer exposed to the plating solution cannot be suppressed. However, if a weak DC current is passed between the anode 2 and the main substrate 3, the process until the switching control shown in FIG. Meanwhile, dissolution of the plating layer can be appropriately suppressed.

なおメッキ層をメッキ形成していたときにメイン電源15及びサブ電源16から流されるパルス電流の値は1A〜5A程度であるのに対し、図7工程で、前記メイン電源15及びサブ電源16から微弱電流が出力されるように制御したときの前記微弱電流の値は数十mA程度である。具体的には10mA〜100mAの範囲内であることが好ましい。   The value of the pulse current that flows from the main power supply 15 and the sub power supply 16 when the plating layer is plated is about 1A to 5A, whereas in the process of FIG. The value of the weak current when it is controlled to output a weak current is about several tens of mA. Specifically, it is preferably within the range of 10 mA to 100 mA.

上記のようにメイン電源15及びサブ電源16の出力変換を行うには制御部61から電流値を低減あるいはゼロにせよという命令信号S1,S2を前記メイン電源15及びサブ電源16に伝送し、この信号S1,S2を下に、前記メイン電源15及びサブ電源16の出力変換を行えば簡単且つ適切に前記出力変換を行うことが出来る。なお前記メイン電源15及びサブ電源16はプログラマブル電源であることが適切且つ簡単に出力制御を行うことが出来て好ましい。   In order to perform output conversion of the main power supply 15 and the sub power supply 16 as described above, command signals S1 and S2 for reducing or reducing the current value from the control unit 61 are transmitted to the main power supply 15 and the sub power supply 16. If the output conversion of the main power supply 15 and the sub power supply 16 is performed with the signals S1 and S2 below, the output conversion can be performed easily and appropriately. The main power source 15 and the sub power source 16 are preferably programmable power sources because output control can be performed appropriately and easily.

次に図9に示すように、第1の回路部17上及び第2の回路部18上にある第1のスイッチ12及び第2のスイッチ13を開放すると共に、前記第3の回路部19上にある第3のスイッチ20をON状態にするスイッチング制御を行う。このスイッチング制御は制御部62から各スイッチ12,13,20に伝送される信号S3,S4,S5に基づいて行う。例えば図8で説明した信号S1,S2をメイン電源15及びサブ電源16に入力した後、所定の時間経過後に前記信号S3,S4及びS5が各スイッチ12,13,20に送られるようにするか、あるいは前記メイン電源15及びサブ電源16から所定の微弱電流値が出力されたかあるいは前記メイン電源15及びサブ電源16からの電流値がゼロになったことを検知する検知手段を設け、この検知手段から前記制御部61に送られてくる信号を下に、各スイッチ12,13,20に前記信号S3,S4及びS5を伝送しても良い。信号S3,S4は、スイッチ12,13を開放せよという命令信号で、信号S5はスイッチ20をON状態にせよという命令信号である。   Next, as shown in FIG. 9, the first switch 12 and the second switch 13 on the first circuit unit 17 and the second circuit unit 18 are opened, and the third circuit unit 19 is also opened. Switching control is performed to turn on the third switch 20 at. This switching control is performed based on signals S3, S4, and S5 transmitted from the control unit 62 to the switches 12, 13, and 20. For example, after the signals S1 and S2 described in FIG. 8 are input to the main power supply 15 and the sub power supply 16, the signals S3, S4, and S5 are sent to the switches 12, 13, and 20 after a predetermined time has elapsed. Or a detecting means for detecting whether a predetermined weak current value is output from the main power supply 15 and the sub power supply 16 or that the current value from the main power supply 15 and the sub power supply 16 is zero, and this detecting means is provided. The signals S3, S4, and S5 may be transmitted to the switches 12, 13, and 20 below the signal sent from the control unit 61 to the control unit 61. Signals S3 and S4 are command signals for opening the switches 12 and 13, and signal S5 is a command signal for turning the switch 20 on.

上記スイッチング制御が終了した後、あるいは終了と同時に、前記制御部61から前記予備電源22に信号S6を伝送し、前記予備電源22の電源を立ち上げ、前記予備電源22から所定の微弱電流を前記補助基板4と主基板3間に供給する。前記微弱電流は数十mA程度である。具体的には10mA〜100mAの範囲内であることが好ましい。   After the switching control is completed or simultaneously with the termination, the control unit 61 transmits a signal S6 to the standby power source 22, the power source of the standby power source 22 is turned on, and a predetermined weak current is supplied from the standby power source 22. Supply between the auxiliary substrate 4 and the main substrate 3. The weak current is about several tens of mA. Specifically, it is preferably within the range of 10 mA to 100 mA.

図7ないし図9の回路構成においても、図3ないし図6の回路構成と同様に、メッキ層のメッキ形成後、メッキ液5の排液前に、図8で説明したように、前記主基板3とアノード2間及び前記補助基板4とアノード2間を電気的に接続した状態に維持して、前記主基板3とアノード2間及び前記補助基板4とアノード2間に、前記メッキ層のメッキ形成時に供給されていた電流値よりも低い微弱電流を供給するかあるいは電流値をゼロに制御し、その後、図9で説明したように、前記主基板3とアノード2間、及び補助基板4とアノード2間を電気的に切断すると共に、前記主基板3と補助基板4間を電気的に接続する点に最大の特徴点がある。   Also in the circuit configurations of FIGS. 7 to 9, as described with reference to FIG. 8, after the plating layer is formed and before the plating solution 5 is drained, as in the circuit configurations of FIGS. The plating layer is plated between the main substrate 3 and the anode 2 and between the auxiliary substrate 4 and the anode 2 while maintaining an electrical connection between the anode 3 and the anode 2 and between the auxiliary substrate 4 and the anode 2. A weak current lower than the current value supplied at the time of formation is supplied or the current value is controlled to zero, and then, as described with reference to FIG. 9, between the main substrate 3 and the anode 2 and the auxiliary substrate 4 The greatest characteristic point is that the anode 2 is electrically disconnected and the main substrate 3 and the auxiliary substrate 4 are electrically connected.

図8のスイッチング制御前に、メイン電源15及びサブ電源16から流れる電流値を微弱状態か前記電流値をゼロに制御するので、各回路上において電流チャージが低減され、図9のスイッチングを行っても前記主基板3と補助基板4間にサージ電流等の大電流が流れるのを適切に抑制できる。   Before the switching control of FIG. 8, the current value flowing from the main power supply 15 and the sub power supply 16 is controlled to be weak or the current value is controlled to zero, so that the current charge is reduced on each circuit, and the switching of FIG. In addition, it is possible to appropriately suppress a large current such as a surge current from flowing between the main board 3 and the auxiliary board 4.

また本発明では、図8工程で、メイン電源15及びサブ電源16から流れる電流値を微弱状態か、あるいは前記電流値をゼロに落とすので、図9のスイッチングの時に、前記第3の回路部19上に大きい電流値のパルス電流が乗ることは無く、よって従来のように大きな電流値のパルス電流が前記補助基板4と主基板3間に供給されることは無い。   In the present invention, since the current value flowing from the main power supply 15 and the sub power supply 16 is weak or the current value is reduced to zero in the step of FIG. 8, the third circuit portion 19 is switched at the time of switching of FIG. A pulse current having a large current value does not get on top, and therefore a pulse current having a large current value is not supplied between the auxiliary substrate 4 and the main substrate 3 as in the prior art.

以上のように本発明では、前記主基板3と補助基板4間を通電状態にした時には前記主基板3と補助基板4間には微弱電流しか流れないので前記主基板3上に形成されたメッキ層が大電流の影響を受けて、例えば前記メッキ層上に前記メッキ層とは異なる異質(例えば組成比や組成元素が異なっていたり、結晶粒が粗大化するなど)な層が形成されてしまったりすることなく前記メッキ層とその上に形成される層間の界面状態をきれいな状態に維持でき、またメッキ液の排液中、適切に前記メッキ層の溶解をも抑制できるので、前記メッキ層の品質を良好な状態に保つことが可能になっている。   As described above, in the present invention, only a weak current flows between the main board 3 and the auxiliary board 4 when the main board 3 and the auxiliary board 4 are energized, so that the plating formed on the main board 3 is used. When the layer is affected by a large current, for example, a layer different from the plated layer (for example, a composition ratio or a composition element is different or a crystal grain is coarsened) is formed on the plated layer. It is possible to maintain the interface state between the plating layer and the layer formed thereon without being loose, and to appropriately suppress dissolution of the plating layer during drainage of the plating solution. It is possible to keep the quality in good condition.

また図7ないし図9で説明した回路構成のように制御部62を設けることで、メイン電源15及びサブ電源16の出力値の制御と、スイッチングの時間的な制御とを簡単且つ適切に行うことが可能である。   Further, by providing the control unit 62 as in the circuit configuration described with reference to FIGS. 7 to 9, the control of the output values of the main power supply 15 and the sub power supply 16 and the temporal control of switching can be performed easily and appropriately. Is possible.

本発明の電気メッキ装置の部分断面図、Partial sectional view of the electroplating apparatus of the present invention, 主基板及び補助基板を真上から見た平面図、A plan view of the main board and the auxiliary board viewed from directly above, 図1に示す電気メッキ装置の電気系統を説明するための回路構成図(メッキ通電時)、FIG. 1 is a circuit configuration diagram for explaining the electrical system of the electroplating apparatus shown in FIG. 図1に示す電気メッキ装置の電気系統を説明するための回路構成図(微弱出力又は出力停止時)、1 is a circuit configuration diagram for explaining the electrical system of the electroplating apparatus shown in FIG. 1 (when weak output or output is stopped), 図1に示す電気メッキ装置の電気系統を説明するための回路構成図(スイッチング制御時、及び主基板と補助基板間の微弱通電時)、FIG. 1 is a circuit configuration diagram for explaining the electrical system of the electroplating apparatus shown in FIG. 1 (at the time of switching control and weakly energizing between the main board and the auxiliary board), 図5とは異なる回路構成であり、図1に示す電気メッキ装置の電気系統を説明するための回路構成図(スイッチング制御時、及び主基板と補助基板間の微弱通電時)、FIG. 5 is a circuit configuration different from FIG. 5, and is a circuit configuration diagram for explaining the electrical system of the electroplating apparatus shown in FIG. 1 (at the time of switching control and weakly energizing between the main board and the auxiliary board) 図3ないし図6とは異なる回路構成であり、図1に示す電気メッキ装置の電気系統を説明するための回路構成図(メッキ通電時)、FIG. 3 to FIG. 6 are different circuit configurations, and are circuit configuration diagrams for explaining the electrical system of the electroplating apparatus shown in FIG. 図3ないし図6とは異なる回路構成であり、図1に示す電気メッキ装置の電気系統を説明するための回路構成図(微弱出力又は出力停止時)、FIG. 3 to FIG. 6 are different circuit configurations, and a circuit configuration diagram for explaining the electrical system of the electroplating apparatus shown in FIG. 1 (weak output or output stop), 図3ないし図6とは異なる回路構成であり、図1に示す電気メッキ装置の電気系統を説明するための回路構成図(スイッチング制御時、及び主基板と補助基板間の微弱通電時)、FIG. 3 to FIG. 6 are different circuit configurations, and a circuit configuration diagram for explaining the electrical system of the electroplating apparatus shown in FIG. 1 (at the time of switching control and weakly energizing between the main board and the auxiliary board), メッキ通電からメッキ液の排液までの工程を示すフローチャート図、A flowchart showing the steps from plating energization to draining of the plating solution, 所定の部位をメッキ形成するために、図1に示す電気メッキ装置を用いて形成された薄膜磁気ヘッドの部分正面図(完成品)、A partial front view (finished product) of a thin film magnetic head formed by using the electroplating apparatus shown in FIG. 図11に示す薄膜磁気ヘッドの部分縦断面図(完成品)、FIG. 11 is a partial longitudinal sectional view (completed product) of the thin film magnetic head shown in FIG. 従来の電気メッキ装置の回路構成図、Circuit diagram of a conventional electroplating apparatus, 従来の電気メッキ装置で形成したインダクティブヘッドの磁極部のSIM写真、SIM photograph of magnetic pole part of inductive head formed by a conventional electroplating apparatus, 図14に示す写真の部分模式図、FIG. 14 is a partial schematic diagram of the photograph shown in FIG.

符号の説明Explanation of symbols

1 メッキ槽
2 アノード
3 主基板
4 補助基板
5 メッキ液
12 第1のスイッチ
13 第2のスイッチ
15 メイン電源
16 サブ電源
17 第1の回路部
18 第2の回路部
19 第3の回路部
20 第3のスイッチ
32 磁極部
33 下部磁極層
34 ギャップ層
35 上部磁極層
62 制御部
63 検知手段
DESCRIPTION OF SYMBOLS 1 Plating tank 2 Anode 3 Main board 4 Auxiliary board 5 Plating solution 12 1st switch 13 2nd switch 15 Main power supply 16 Sub power supply 17 1st circuit part 18 2nd circuit part 19 3rd circuit part 20 2nd 3 switch 32 magnetic pole part 33 lower magnetic pole layer 34 gap layer 35 upper magnetic pole layer 62 control part 63 detection means

Claims (12)

メッキ槽と、前記メッキ槽内に設けられたカソードである主基板と、前記主基板と所定距離離して対向させたアノードと、前記主基板の周囲に設けられた補助基板と、を有し、
前記メッキ槽内にメッキ液を充填し、前記主基板とアノード間、及び前記補助基板とアノード間に電流を供給して前記主基板上に所定のメッキ層を形成し、前記メッキ層を形成した後、前記メッキ液を排液する電気メッキ方法において、前記メッキ層を形成した後、以下の工程を用いて前記メッキ液の排液を行うことを特徴とする電気メッキ方法。
(a) 前記主基板とアノード間、及び前記補助基板とアノード間の電気的な接続を維持して、前記主基板とアノード間及び前記補助基板とアノード間に、前記メッキ層のメッキ形成時に供給された電流値よりも低い微弱電流を供給するか、あるいは前記主基板及びアノード間、及び前記補助基板とアノード間に供給される電流値をゼロにする工程と、
(b) 前記主基板とアノード間、及び補助基板とアノード間を電気的に切断すると共に、前記主基板と補助基板間を電気的に接続する工程と、
(c) 前記主基板と補助基板間に所定の微弱電流を供給して前記主基板と補助基板間を通電させる工程と、
(d) 前記メッキ液を排液する工程。
A plating tank, a main substrate which is a cathode provided in the plating tank, an anode which is opposed to the main substrate by a predetermined distance, and an auxiliary substrate which is provided around the main substrate,
The plating tank is filled with a plating solution, and a current is supplied between the main substrate and the anode and between the auxiliary substrate and the anode to form a predetermined plating layer on the main substrate, and the plating layer is formed. Thereafter, in the electroplating method for draining the plating solution, the plating solution is drained using the following steps after the plating layer is formed.
(A) Maintaining electrical connection between the main substrate and the anode and between the auxiliary substrate and the anode, and supplying the plating layer between the main substrate and the anode and between the auxiliary substrate and the anode when the plating layer is formed. Supplying a weak current lower than the generated current value, or making the current value supplied between the main substrate and the anode and between the auxiliary substrate and the anode zero,
(B) electrically cutting between the main substrate and the anode and between the auxiliary substrate and the anode and electrically connecting the main substrate and the auxiliary substrate;
(C) supplying a predetermined weak current between the main substrate and the auxiliary substrate to energize the main substrate and the auxiliary substrate;
(D) A step of draining the plating solution.
前記(c)工程で供給される微弱電流を直流電流とする請求項1記載の電気メッキ方法。   The electroplating method according to claim 1, wherein the weak current supplied in the step (c) is a direct current. 前記メッキ層の形成時に少なくとも前記アノードと主基板間に供給される電流をパルス電流とする請求項2記載の電気メッキ方法。   The electroplating method according to claim 2, wherein at least a current supplied between the anode and the main substrate when forming the plating layer is a pulse current. 前記(c)工程で、前記主基板と補助基板間に電流を供給するための電源を、前記主基板とアノード間に電流供給するための電源と同一にし、前記(a)工程で前記主基板とアノード間に微弱電流を供給したとき、その微弱電流をそのまま前記(c)工程で、前記主基板と補助基板間に供給する請求項1ないし3のいずれかに記載の電気メッキ方法。   In step (c), the power source for supplying current between the main substrate and the auxiliary substrate is the same as the power source for supplying current between the main substrate and the anode, and in step (a), the main substrate is used. 4. The electroplating method according to claim 1, wherein when a weak current is supplied between the main substrate and the anode, the weak current is supplied between the main substrate and the auxiliary substrate in the step (c). 前記(c)工程で、前記主基板と補助基板間に供給される電流の電源を、前記主基板とアノード間、及び前記補助基板とアノード間に電流供給するための電源と別に設ける請求項1ないし3のいずれかに記載の電気メッキ方法。   2. A power source for supplying current between the main substrate and the auxiliary substrate in the step (c) is provided separately from a power source for supplying current between the main substrate and the anode and between the auxiliary substrate and the anode. 4. The electroplating method according to any one of 3 to 3. 前記所定のメッキ層は、複数のメッキ層を積層した構造であり、少なくとも最上層よりも下側に形成されるメッキ層をメッキ形成した後、上記(a)工程ないし前記(d)工程を行う請求項1ないし5のいずれかに記載の電気メッキ方法。   The predetermined plating layer has a structure in which a plurality of plating layers are laminated. After the plating layer formed at least below the uppermost layer is formed by plating, the steps (a) to (d) are performed. The electroplating method according to claim 1. メッキ槽と、前記メッキ槽内に設けられたカソードである主基板と、前記主基板と所定距離離して対向させたアノードと、前記主基板の周囲に設けられた補助基板と、を有し、
前記メッキ槽内にメッキ液が充填され、前記主基板とアノード間、及び前記補助基板とアノード間に電流が供給されて前記主基板上に所定のメッキ層が形成され、前記メッキ層が形成された後、前記メッキ液が排液される電気メッキ装置において、
少なくとも、前記主基板とアノード間に設けられたメイン電源と、前記補助基板とアノード間に設けられたサブ電源と、前記主基板、アノード及びメイン電源間を接続する第1の回路部に設けられた第1の切替手段と、前記補助基板、アノード及びサブ電源間を接続する第2の回路部に設けられた第2の切替手段と、前記主基板と補助基板間を接続する第3の回路部に設けられた第3の切替手段と、制御手段とを有し、
前記メッキ層の形成時、第1の回路部、及び第2の回路部を前記第1の切替手段及び第2の切替手段を用いて電気的に接続すると共に、第3の回路部を前記第3の切替手段を用いて電気的に切断し、前記アノードと主基板間、及びアノードと補助基板間に電流を供給して前記主基板上に所定の前記メッキ層を形成し、
前記メッキ層の形成後、前記第1の回路部及び第2の回路部の電気的な接続状態と、第3の回路部の電気的な切断状態を維持して、前記制御手段により、前記メイン電源から流される電流値を、前記メッキ形成時の電流値よりも下げるか、あるいは前記電流値をゼロにすると共に、前記サブ電源から流される電流値を、前記メッキ形成時の電流値よりも下げるか、あるいは前記電流値をゼロにして、前記アノードと主基板間及び前記アノードと補助基板間に供給される電流値を微弱電流かあるいはゼロに制御し、
前記制御手段により、前記第1の切替部及び第2の切替部を切り替えて、前記第1の回路部及び第2の回路部を電気的に切断状態にすると共に、前記第3の切替部を切り替えて、前記第3の回路部を電気的に接続状態にし、
前記制御手段により、前記第3の回路部に所定の微弱電流を供給して前記補助基板と主基板間を通電させ、その後、前記メッキ液の排液を行うことを特徴とする電気メッキ装置。
A plating tank, a main substrate which is a cathode provided in the plating tank, an anode which is opposed to the main substrate by a predetermined distance, and an auxiliary substrate which is provided around the main substrate,
A plating solution is filled in the plating tank, and a current is supplied between the main substrate and the anode and between the auxiliary substrate and the anode to form a predetermined plating layer on the main substrate, and the plating layer is formed. Then, in the electroplating apparatus in which the plating solution is drained,
At least a main power source provided between the main substrate and the anode, a sub power source provided between the auxiliary substrate and the anode, and a first circuit unit connecting the main substrate, the anode and the main power source are provided. The first switching means, the second switching means provided in the second circuit portion for connecting the auxiliary substrate, the anode and the sub power source, and the third circuit for connecting the main substrate and the auxiliary substrate A third switching means provided in the section, and a control means,
When forming the plating layer, the first circuit unit and the second circuit unit are electrically connected using the first switching unit and the second switching unit, and the third circuit unit is connected to the first circuit unit. Electrically disconnecting using the switching means of 3 and supplying a current between the anode and the main substrate and between the anode and the auxiliary substrate to form the predetermined plating layer on the main substrate,
After the plating layer is formed, the main circuit unit maintains the electrical connection state of the first circuit unit and the second circuit unit and the electrical disconnection state of the third circuit unit, and the control unit controls the main circuit unit. The current value flowing from the power supply is made lower than the current value at the time of plating formation, or the current value is made zero, and the current value supplied from the sub power supply is made lower than the current value at the time of plating formation. Or the current value is set to zero, and the current value supplied between the anode and the main substrate and between the anode and the auxiliary substrate is controlled to be weak current or zero,
The control means switches the first switching unit and the second switching unit to electrically disconnect the first circuit unit and the second circuit unit, and the third switching unit Switch to bring the third circuit portion into an electrically connected state,
An electroplating apparatus characterized in that the control means supplies a predetermined weak current to the third circuit portion to energize the auxiliary substrate and the main substrate, and then drains the plating solution.
前記メイン電源は、前記第1の回路部と第3の回路部の共通電源として用いられる請求項7記載の電気メッキ装置。   The electroplating apparatus according to claim 7, wherein the main power source is used as a common power source for the first circuit unit and the third circuit unit. 前記第3の回路部にはメイン電源及びサブ電源とは別の予備電源が設けられている請求項7記載の電気メッキ装置。   The electroplating apparatus according to claim 7, wherein the third circuit unit is provided with a spare power source different from the main power source and the sub power source. 前記予備電源は、直流電源である請求項9記載の電気メッキ装置。   The electroplating apparatus according to claim 9, wherein the standby power source is a DC power source. 少なくとも前記メイン電源は、メッキ層の形成終了後、微弱電流を供給する直流電源に制御される請求項7ないし10のいずれかに記載の電気メッキ装置。   The electroplating apparatus according to claim 7, wherein at least the main power source is controlled by a DC power source that supplies a weak current after the formation of the plating layer. 少なくとも前記メイン電源は、メッキ層の形成時、パルス電源に制御される請求項7ないし11のいずれかに記載の電気メッキ装置。   12. The electroplating apparatus according to claim 7, wherein at least the main power source is controlled by a pulse power source when a plating layer is formed.
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