JP4068635B2 - 配線基板 - Google Patents
配線基板 Download PDFInfo
- Publication number
- JP4068635B2 JP4068635B2 JP2005287853A JP2005287853A JP4068635B2 JP 4068635 B2 JP4068635 B2 JP 4068635B2 JP 2005287853 A JP2005287853 A JP 2005287853A JP 2005287853 A JP2005287853 A JP 2005287853A JP 4068635 B2 JP4068635 B2 JP 4068635B2
- Authority
- JP
- Japan
- Prior art keywords
- auxiliary
- wiring
- protruding electrode
- semiconductor element
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004020 conductor Substances 0.000 claims description 90
- 239000004065 semiconductor Substances 0.000 claims description 60
- 239000000758 substrate Substances 0.000 claims description 33
- 229910000679 solder Inorganic materials 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 12
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 description 7
- 238000007747 plating Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0393—Flexible materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0367—Metallic bump or raised conductor not used as solder bump
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1545—Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/166—Alignment or registration; Control of registration
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Structure Of Printed Boards (AREA)
Description
本発明の第2の構成の配線基板は、第1の構成の配線基板における隣接する前記補助突起電極が互いに接合された構成に代えて、隣接する前記補助突起電極が互いに離間した構成としたものである。
本発明の実施の形態1における配線基板の平面図を、図1に示す。本実施の形態において、図5に示した従来例の配線基板の要素と同一の要素については、同一の参照符号を付して説明する。図1に示されるように、絶縁性のフィルム基材1の上に、多数本の導体配線2が整列して設けられている。導体配線2の端部には各々、突起電極3が設けられている。搭載されるべき半導体素子4が、一点鎖線で示されている。半導体素子4に形成された多数の電極パッド(不図示)は各々、突起電極3と対向し、接合されている。
本発明の実施の形態2における配線基板について、図2を参照して説明する。図2(a)は、本実施の形態における配線基板の要部を示す平面図、図2(b)は図2(a)のA−A線に沿った断面図である。図1に示した配線基板の要素と同一の要素については、同一の参照符号を付して説明の繰り返しを省略する。
本発明の実施の形態3における配線基板について、図3を参照して説明する。図3は、本実施の形態における配線基板の要部を示す平面図であり、フィルム基材1上のソルダーレジスト層5に設けられた位置合わせマーク開口5bの領域を示す。図2に示した配線基板の要素と同一の要素については、同一の参照符号を付して説明の繰り返しを省略する。
本発明の実施の形態4における配線基板について、図4を参照して説明する。図4は、本実施の形態における配線基板の要部を示す平面図であり、フィルム基材1上のソルダーレジスト層5に設けられた位置合わせマーク開口5bの領域を示す。図2に示した配線基板の要素と同一の要素については、同一の参照符号を付して説明の繰り返しを省略する。
本発明の実施の形態4における配線基板について、図5を参照して説明する。図5(a)は、本実施の形態における配線基板の要部を示す平面図であり、フィルム基材1上のソルダーレジスト層5に設けられた位置合わせマーク開口5bの領域を示す。図5(b)は、比較のために示した実施の形態2の構成であり、図2に示した配線基板と同じものである。
2 導体配線
3 突起電極
4 半導体素子
5 ソルダーレジスト層
5a 素子搭載部開口
5b 位置合わせマーク開口
6 スプロケットホール
7、8、9、12 位置合わせマーク
10、15 補助導体配線
11、13、14 補助突起電極
16 斜交部分
17 直行部
18 交差部
Claims (9)
- 可撓性絶縁基材と、
前記可撓性絶縁性基材上に整列して設けられた複数本の導体配線と、
前記各導体配線の半導体素子を搭載する領域に位置する端部に設けられた突起電極とを備え、
半導体素子に形成された電極パッドと前記突起電極とを接合させることにより、前記半導体素子を前記導体配線上に実装するように構成された配線基板において、
前記絶縁基材上に形成された補助導体配線と、
前記補助導体配線上に形成された補助突起電極と、
前記導体配線および前記補助導体配線を含む前記絶縁基材上を被覆して形成されたソルダーレジスト層を備え、
前記補助導体配線が複数本並列に配置して設けられ、前記複数の補助導体配線の各々に前記補助突起電極が並列に整列して形成され、隣接する前記補助突起電極が互いに接合され、
前記ソルダーレジスト層は、前記補助導体配線における前記補助突起電極が形成された端部領域に位置合わせ開口を有し、前記補助突起電極が前記位置合わせ開口から露出しており、
前記半導体素子を前記補助突起電極を基準として位置決めすることにより、前記半導体素子に形成された前記電極パッドを、前記導体配線上の前記突起電極に対して位置合わせすることができるように構成されたことを特徴とする配線基板。 - 可撓性絶縁基材と、
前記可撓性絶縁性基材上に整列して設けられた複数本の導体配線と、
前記各導体配線の半導体素子を搭載する領域に位置する端部に設けられた突起電極とを備え、
半導体素子に形成された電極パッドと前記突起電極とを接合させることにより、前記半導体素子を前記導体配線上に実装するように構成された配線基板において、
前記絶縁基材上に形成された補助導体配線と、
前記補助導体配線上に形成された補助突起電極と、
前記導体配線および前記補助導体配線を含む前記絶縁基材上を被覆して形成されたソルダーレジスト層を備え、
前記補助導体配線が複数本並列に配置して設けられ、前記複数の補助導体配線の各々に前記補助突起電極が並列に整列して形成され、隣接する前記補助突起電極が互いに離間し、
前記ソルダーレジスト層は、前記補助導体配線における前記補助突起電極が形成された端部領域に位置合わせ開口を有し、前記補助突起電極が前記位置合わせ開口から露出しており、
前記半導体素子を前記補助突起電極を基準として位置決めすることにより、前記半導体素子に形成された前記電極パッドを、前記導体配線上の前記突起電極に対して位置合わせすることができるように構成されたことを特徴とする配線基板。 - 前記突起電極と前記補助突起電極の高さが同じである請求項1または2に記載の配線基板。
- 前記突起電極の材料と前記突起電極の材料が同じである請求項1または2に記載の配線基板。
- 前記突起電極と前記補助突起電極が同時に形成されたものである請求項1または2に記載の配線基板。
- 前記補助突起電極は、前記突起電極が配置された領域から離間した外側領域に配置されている請求項1または2に記載の配線基板。
- 更に複数の補助突起電極が、前記並列に整列して形成された前記補助突起電極に対して前記複数の補助導体配線上において直列に整列して設けられた請求項1または2に記載の配線基板。
- 前記複数の補助導体配線は、前記補助突起電極の両側の領域において1本の補助導体配線に結合され、その結合部分が前記位置合わせ開口内に位置している請求項1または2に記載の配線基板。
- 前記複数の補助導体配線のうち少なくとも一部の前記補助導体配線は、前記位置合わせ開口の周縁に対して斜めに交差する斜交部分を有する請求項8に記載の配線基板。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005287853A JP4068635B2 (ja) | 2005-09-30 | 2005-09-30 | 配線基板 |
TW095132543A TW200730051A (en) | 2005-09-30 | 2006-09-04 | Wiring board |
US11/531,381 US7514802B2 (en) | 2005-09-30 | 2006-09-13 | Wiring board |
CNA2006101399870A CN1941354A (zh) | 2005-09-30 | 2006-09-28 | 布线基板 |
KR1020060094894A KR20070037361A (ko) | 2005-09-30 | 2006-09-28 | 배선 기판 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005287853A JP4068635B2 (ja) | 2005-09-30 | 2005-09-30 | 配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007103430A JP2007103430A (ja) | 2007-04-19 |
JP4068635B2 true JP4068635B2 (ja) | 2008-03-26 |
Family
ID=37901119
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005287853A Active JP4068635B2 (ja) | 2005-09-30 | 2005-09-30 | 配線基板 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7514802B2 (ja) |
JP (1) | JP4068635B2 (ja) |
KR (1) | KR20070037361A (ja) |
CN (1) | CN1941354A (ja) |
TW (1) | TW200730051A (ja) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007150089A (ja) * | 2005-11-29 | 2007-06-14 | Matsushita Electric Ind Co Ltd | 配線基板及びその製造方法ならびに半導体装置 |
JP4378387B2 (ja) * | 2007-02-27 | 2009-12-02 | Okiセミコンダクタ株式会社 | 半導体パッケージ及びその製造方法 |
KR100894179B1 (ko) | 2007-10-26 | 2009-04-22 | 삼성전기주식회사 | 기판 스트립 |
KR101594817B1 (ko) * | 2011-10-31 | 2016-02-17 | 가부시키가이샤 무라타 세이사쿠쇼 | 전자부품, 집합 기판 및 전자부품의 제조방법 |
JP2014049608A (ja) * | 2012-08-31 | 2014-03-17 | Ibiden Co Ltd | プリント配線板及びプリント配線板の製造方法 |
US8994898B2 (en) * | 2012-10-18 | 2015-03-31 | Shenzhen China Star Optoelectronics Technology Co., Ltd | COF base tape and manufacturing method thereof and liquid crystal display module comprising same |
JP5913063B2 (ja) * | 2012-11-27 | 2016-04-27 | 日本特殊陶業株式会社 | 配線基板 |
CN105474760B (zh) * | 2013-08-28 | 2019-03-08 | 3M创新有限公司 | 具有用于精确配准的基准标记的电子组件 |
EP3517308B1 (en) * | 2014-06-20 | 2022-03-16 | 3M Innovative Properties Company | Printing of multiple inks to achieve precision registration during subsequent processing |
CN105263258A (zh) * | 2015-11-06 | 2016-01-20 | 广东欧珀移动通信有限公司 | 柔性电路板及其定位标示的设置方法 |
TWI701451B (zh) * | 2019-08-21 | 2020-08-11 | 頎邦科技股份有限公司 | 軟性電路板之輔助量測線路 |
US11302614B2 (en) * | 2019-08-23 | 2022-04-12 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Chip on film and display device |
TWI754194B (zh) * | 2019-12-16 | 2022-02-01 | 頎邦科技股份有限公司 | 電路板 |
CN111540728B (zh) * | 2020-04-15 | 2021-07-02 | 东南大学 | 一种用于窄长器件精密对准的键合标记结构 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1012661A (ja) | 1996-06-19 | 1998-01-16 | Nec Corp | 半導体装置及びその製造方法 |
US6281450B1 (en) * | 1997-06-26 | 2001-08-28 | Hitachi Chemical Company, Ltd. | Substrate for mounting semiconductor chips |
US6965166B2 (en) * | 1999-02-24 | 2005-11-15 | Rohm Co., Ltd. | Semiconductor device of chip-on-chip structure |
JP3565835B1 (ja) * | 2003-04-28 | 2004-09-15 | 松下電器産業株式会社 | 配線基板およびその製造方法ならびに半導体装置およびその製造方法 |
JP3804649B2 (ja) * | 2003-09-19 | 2006-08-02 | 株式会社村田製作所 | 電子回路装置の製造方法および電子回路装置 |
-
2005
- 2005-09-30 JP JP2005287853A patent/JP4068635B2/ja active Active
-
2006
- 2006-09-04 TW TW095132543A patent/TW200730051A/zh unknown
- 2006-09-13 US US11/531,381 patent/US7514802B2/en active Active
- 2006-09-28 KR KR1020060094894A patent/KR20070037361A/ko not_active Application Discontinuation
- 2006-09-28 CN CNA2006101399870A patent/CN1941354A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
JP2007103430A (ja) | 2007-04-19 |
TW200730051A (en) | 2007-08-01 |
US7514802B2 (en) | 2009-04-07 |
KR20070037361A (ko) | 2007-04-04 |
US20070075426A1 (en) | 2007-04-05 |
CN1941354A (zh) | 2007-04-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4068635B2 (ja) | 配線基板 | |
US7294532B2 (en) | Method for manufacturing semiconductor device | |
JP5185885B2 (ja) | 配線基板および半導体装置 | |
US6664618B2 (en) | Tape carrier package having stacked semiconductor elements, and short and long leads | |
JP2008131035A (ja) | バンプ付き半導体チップ及びそれを備える半導体パッケージ | |
US6700208B1 (en) | Surface mounting substrate having bonding pads in staggered arrangement | |
JP2002124544A (ja) | Cof用テープキャリアおよびこれを用いて製造されるcof構造の半導体装置 | |
JP4641141B2 (ja) | 半導体装置、tcp型半導体装置、tcp用テープキャリア、プリント配線基板 | |
KR20060103123A (ko) | 가요성 회로 기판과 그 제조 방법 | |
JP4740708B2 (ja) | 配線基板、及び半導体装置 | |
JP2005079581A (ja) | テープ基板、及びテープ基板を用いた半導体チップパッケージ、及び半導体チップパッケージを用いたlcd装置 | |
US7183660B2 (en) | Tape circuit substrate and semicondutor chip package using the same | |
JP2008172228A (ja) | 半導体素子及び半導体素子のパッケージ | |
JP4773864B2 (ja) | 配線基板及びこれを用いた半導体装置並びに配線基板の製造方法 | |
KR20090084706A (ko) | 배선 회로 기판 및 그 제조 방법 | |
KR100196119B1 (ko) | 반도체장치 및 그 제조방법 및 전자 장치 | |
JP3867796B2 (ja) | 半導体装置及びその製造方法、回路基板並びに電子機器 | |
US8283779B2 (en) | Peel-resistant semiconductor device with improved connector density, and method of manufacturing the same | |
JP4712426B2 (ja) | 半導体装置 | |
JP2005109377A (ja) | 半導体装置およびその製造方法 | |
JPH10150065A (ja) | チップサイズパッケージ | |
KR100585143B1 (ko) | 반도체 칩이 탑재된 탭방식의 패키지 및 그 제조방법 | |
JP2012018988A (ja) | 半導体装置 | |
JP2006041328A (ja) | 半導体装置及びその製造方法、lcdドライバ用パッケージ | |
JP2014027126A (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070913 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070925 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20071121 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20071213 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20080110 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110118 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 Ref document number: 4068635 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110118 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120118 Year of fee payment: 4 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130118 Year of fee payment: 5 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130118 Year of fee payment: 5 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140118 Year of fee payment: 6 |
|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |