JP4065351B2 - Method for producing an insulating protective barrier film based on Ti-Si-N and Ti-BN with low defect density - Google Patents
Method for producing an insulating protective barrier film based on Ti-Si-N and Ti-BN with low defect density Download PDFInfo
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- JP4065351B2 JP4065351B2 JP30117997A JP30117997A JP4065351B2 JP 4065351 B2 JP4065351 B2 JP 4065351B2 JP 30117997 A JP30117997 A JP 30117997A JP 30117997 A JP30117997 A JP 30117997A JP 4065351 B2 JP4065351 B2 JP 4065351B2
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- 230000004888 barrier function Effects 0.000 title claims description 24
- 229910007991 Si-N Inorganic materials 0.000 title description 12
- 229910006294 Si—N Inorganic materials 0.000 title description 12
- 230000007547 defect Effects 0.000 title description 5
- 238000004519 manufacturing process Methods 0.000 title description 5
- 230000001681 protective effect Effects 0.000 title description 4
- 239000010408 film Substances 0.000 claims description 65
- 238000000034 method Methods 0.000 claims description 55
- 239000010410 layer Substances 0.000 claims description 53
- 229910052710 silicon Inorganic materials 0.000 claims description 42
- 239000010703 silicon Substances 0.000 claims description 40
- 239000010936 titanium Substances 0.000 claims description 33
- 229910052796 boron Inorganic materials 0.000 claims description 29
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 27
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 22
- 239000012298 atmosphere Substances 0.000 claims description 21
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 19
- 229910000077 silane Inorganic materials 0.000 claims description 19
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 18
- 229910052719 titanium Inorganic materials 0.000 claims description 18
- 229910052757 nitrogen Inorganic materials 0.000 claims description 12
- 239000002243 precursor Substances 0.000 claims description 11
- 239000011241 protective layer Substances 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 11
- 239000010409 thin film Substances 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 5
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 37
- 238000000151 deposition Methods 0.000 description 21
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 16
- 239000007789 gas Substances 0.000 description 16
- 238000001465 metallisation Methods 0.000 description 16
- 239000001301 oxygen Substances 0.000 description 16
- 229910052760 oxygen Inorganic materials 0.000 description 16
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 13
- 238000005229 chemical vapour deposition Methods 0.000 description 12
- 230000015572 biosynthetic process Effects 0.000 description 10
- 230000008021 deposition Effects 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 10
- 239000002184 metal Substances 0.000 description 10
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 8
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 7
- 238000010521 absorption reaction Methods 0.000 description 7
- 238000000137 annealing Methods 0.000 description 7
- 229910052799 carbon Inorganic materials 0.000 description 7
- 239000010949 copper Substances 0.000 description 6
- 239000000203 mixture Substances 0.000 description 5
- 239000002245 particle Substances 0.000 description 5
- 229910021529 ammonia Inorganic materials 0.000 description 4
- 238000010574 gas phase reaction Methods 0.000 description 4
- 238000010348 incorporation Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000012528 membrane Substances 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 238000004833 X-ray photoelectron spectroscopy Methods 0.000 description 3
- 239000000460 chlorine Substances 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000004151 rapid thermal annealing Methods 0.000 description 3
- 229910000838 Al alloy Inorganic materials 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 2
- 229910011208 Ti—N Inorganic materials 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 229910052801 chlorine Inorganic materials 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000000354 decomposition reaction Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 239000003085 diluting agent Substances 0.000 description 2
- 238000002003 electron diffraction Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000006911 nucleation Effects 0.000 description 2
- 238000010899 nucleation Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 238000005979 thermal decomposition reaction Methods 0.000 description 2
- 238000009736 wetting Methods 0.000 description 2
- 229910014559 C-Si-O Inorganic materials 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 241000321453 Paranthias colonus Species 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- 229910004339 Ti-Si Inorganic materials 0.000 description 1
- -1 TiNl Chemical compound 0.000 description 1
- 229910010978 Ti—Si Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000000637 aluminium metallisation Methods 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000635 electron micrograph Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 239000003701 inert diluent Substances 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000005382 thermal cycling Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229910052723 transition metal Inorganic materials 0.000 description 1
- 150000003624 transition metals Chemical class 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Description
【０００１】
【発明の属する技術分野】
本発明は集積回路構造体と製法に関する。
【０００２】
【従来の技術】
窒化チタン（ＴｉＮ）はコンタクト、バイアス（ｖｉａｓ）、トレンチ及び相互接続積層での拡散障壁とし通常用いられている。また、窒化チタンは化学的蒸着（ＣＶＤ）タングステン用の接着層として、ＣＶＤタングステン、ＣＶＤアルミニウムの核生成層としての役目を果すこともできる。良好な障壁層は、段部被覆法が良くて、無空隙プラグ形成を達成し、コンタクト／バイアス／トレンチの底部で充分な障壁厚を達成すること、拡散障壁性が良くてタングステン蒸着中の金属拡散を防止し、下層の金属又は珪素のＷＦ6 攻撃を防止すること。熱サイクル中隣接材料に不活性であり、低反応性であること、電気的性質が許容できること。例えばコンタクト／バイアスの抵抗が低いこと、接合漏れが低いことが必要である。更に、障壁層は出来るだけ薄くして相互接続積層の厚みを低下させることが必要である。
【０００３】
反応性スパッターＴｉｘとチタンの急速熱窒化で形成するＴｉＮは拡散障壁として伝統的に用いられてきた。最近はＰＶＤＴｉＮをＣＶＤＴｉＮに換えて０．３５μｍ以下のコンタクト、トレンチ及びバイアスに対する段部被覆性の要求を満たす傾向にある。ＣＶＤＴｉＮは金属の信頼性の問題と、ＰＶＤＴｉＮが関係する接合漏れの問題とを克服するもので、ＣＶＤＴｉＮは接触抵抗と漏れを低く維持しながら、５５０℃での熱応力に耐えることが出来る。更に、ＣＶＤＴｉＮは平行化ＰＶＤＴｉＮよりも潜在的にクリーンな方法である。
【０００４】
ＴｉＣ4 とＮＨ3 の反応で付着させるＣＶＤＴｉＮはこれまで利用されてきたが、幾つかの問題がある。問題のうちの幾つかは付着温度が高いこと、ＴｉＮｌのように塩素が取込まれること、気相中にＮＨ4 Ｃｌ粒子が生成することである。塩素汚染は低減できるが、このような方法では皆無とすることはできない。膜は４００℃よりも低い温度で付着させるときは、ＴｉＣ4 ／ＮＨ3 法は利用できないが、金属−有機前駆物質を用いることができる。通常用いられる２種の金属−有機前駆物質はテトラキスメチルアミノチタン（ＴＤＭＡＴ）とテトラキスジエチルアミノチタン（ＴＤＥＡＴ）である。ＴＤＭＡＴの熱分解に基づくＣＶＤＴｉＮの付着では段部被覆性がよく、粒子の計数が少ない層が形成するが、抵抗率の高い不安定な膜となる。抵抗率は金属−有機前駆物質とアンモニアを反応させて改善できるが、ＴＤＭＡＴとＮＨ3 の反応では段部被覆性の劣る膜ができ、気相反応の関係する潜在的な問題、例えば粒子生成がある。
【０００５】
アンモニアを用いずにＴＤＭＡＴ又はＴＤＥＡＴを用いてＴｉＮを付着させる可能性が文献で論じられているが、以下のことは教示されていない。即ち、アンモニアを用いずにＴＤＥＡＴ又はＴＤＭＡＴから付着させた膜は性質が極めて劣ると言われている。例えばスン（Sun ）とツァイ（Tsai）：「金属有機源からの低圧化学蒸着窒化チタンの特色」〔（ＥＳＳＤＥＲＣ’９４会報、第２９１−４頁）。この文献は言及することにより本明細書に取り入れる〕参照のこと。
【０００６】
Ｔｉ−Ｓｉ−Ｎ化合物はＴｉＮよりも更に良好な拡散障壁を提供するので、最新のメタライゼイションの応用にとって魅力がある。現在、Ｔｉ−Ｓｉ−Ｎ膜の製造上２つの主要な方法が研究中であり、両方とも顕著な制限がある。（Ｎ2 雰囲気でのＴｉ−Ｓｉターゲットの反応性スパッターはカリフォルニヤ工科大学（Ｃａｌ Ｔｅｃｈ）での広範囲の研究で代表されるようにもっとも確立された方法であるが、スパッター法の方向性により、付着膜の段部被覆性は、高アスペクト比のコンタクト、バイアス及びトレンチには極めて劣る。
【０００７】
シラン、アンモニア、ＴＤＥＡＴの混合物を用いる化学的蒸着法はサンディア国立研究所で研究中である、この方法は段部被覆性のより良い膜を提供できるが、ＴＤＥＡＴとＮＨ3 との気相反応では粒子が形成し、生成膜の欠陥密度は高い。
【０００８】
【発明が解決しようとする課題】
本発明の目的は前述の２つの方法での問題を解決する欠陥密度の低い絶縁保護性のＴｉ−Ｓｉ−Ｎ膜の革新的製法を提供することにある。
【０００９】
【課題を解決するための手段】
上記の目的は本発明の方法ではまずチタンと窒素を含有する多孔性障壁層を付着し、次いで付着後の処理を行って多孔性層の少なくとも最上面中に珪素を導入して、珪素濃度の高い表面を提供することにより達成される。（別の態様では付着後の処理は珪素の代わりに又は珪素に加えて硼素を導入する）。多孔性障壁層はまた好ましくは炭素をかなりの割合で含み、必要あれば付着後の処理前に珪素をかなりの割合で含む。
【００１０】
本発明の方法と構造体の長所としては、Ｔｉ−Ｓｉ−Ｎ膜表面はＳｉに富むため（又はＴｉ−Ｂ−Ｎ膜表面はＢに富むため）、膜中への酸素吸収が極小になり形成膜が安定化する。また、表面がＳｉに富むこと又はＢに富むことはＡｌのぬれとＣｕへの吸着向上に役立つため、最新のメタライゼイションの適用に有用である。スパッター法に較べて、本発明は段部被覆性が極めて良く、Ｓｉ／Ｔｉ比の制御が容易な膜の付着法が提供される。ＴＤＥＡＴ＋ＮＨ3 ＋ＳｉＨ4 法に較べて、本発明はＴｉ源とＮＨ3 間の気相反応を皆無にする本発明の方法は欠陥密度の低い絶縁保護性の膜を提供できる。本発明の方法は表面組成を含む化学組成の制御に融通性がある。本発明の方法は市販のＣＶＤ反応器で実施でき、実施が容易である。
【００１１】
【発明の実施の形態】
本発明を添付図に基づき説明する、添付図は本発明の重要な代表的な実施態様を示すもので、言及することで本明細書に組み入れる。
【００１２】
本発明の数多くの革新的な特徴を特に現在の好ましい態様に基づいて説明するが、ここに示すこれらの実施態様は革新的な特徴のもつ多くの有用な用途のうちの幾つかを示す実施例に過ぎないものである。一般に、本明細書の開示は請求項に記載の各種の発明のいずれの範囲を必ずしも限定するものではない。更に、幾つかの開示は本発明の幾つかの特徴についてのものであって、その他の特徴についてのものでない。
【００１３】
図１は本発明の１実施態様の工程の流れを示す流れ図である。本発明を用いるデバイスの製造出発点は多くのデバイスの加工と同じである。事実、標準的加工が中間レベルの誘電体の形成、バイアス／コンタクト用のトレンチ又は孔の形成に至る全部の工程に適用される。更に、標準的加工はＴｉＮ系層の形成後でも、本発明の発明的焼鈍工程の後でも追加的に利用できる。本発明の方法は、金属−有機化学的蒸着（ＭＯＣＶＤ）を行って窒化チタン膜を形成することが出発点である（工程１０４）。この膜は中間レベルの誘電体上、トレンチ又は孔の側壁上、トレンチ又は孔の底面、従来のＴｉＮが用いられてきた他の箇所に形成される。好ましくは、工程１０４はＴＤＭＡＴ、［（ＣＨ3 ）2 Ｎ］4 Ｔｉの熱分解により行う。ＴＤＭＡＴは液体であり、好ましくは例えばＨｅ又はＮ2 のような担体ガスを用いて反応器中に導入する。この分解は好ましくは温度が３００°〜５００℃の範囲、圧力が０．１〜５０ｔｏｒｒの範囲で行う。分解時間は目的の膜厚で変わる。別の実施態様では、Ｃ2 Ｈ5 をＣＨ3 の代りに用いて前駆物質を［（Ｃ2 Ｈ5 ）2 Ｎ］4 Ｔｉとすることができる。更に別の実施態様では前駆物質は好ましくは［（ＣＨ3 ）（Ｃ2 Ｈ5 ）Ｎ］4 Ｔｉである。
【００１４】
更に工程１０４では、前駆物質に露出させながらウェーハを加熱して前駆物質を熱分解させてウェーハ上に膜として付着させる。形成膜はＴｉ−Ｎ−Ｃから構成され、多孔性材料であって、容易にＯ2 を吸収する。Ｏ2 の吸収によりこの膜は抵抗が高くなり、極めて不安定になる。特に、この膜の抵抗率は膜を酸素含有空気に露出するにつれて大きく増加する（図２の曲線２０２参照のこと）。
【００１５】
次いで、加熱工程を行う（工程１０６）。この工程は好ましくは純シラン雰囲気又は稀釈シラン雰囲気、ジシラン雰囲気、Ｂ2 Ｈ6 雰囲気、又は膜中に珪素又は硼素を形成できる任意の他の雰囲気中で行う。好ましくは、この工程は約３５０°〜５００℃の温度、０．１〜５０ｔｏｒｒの圧力下で約１５〜２４０秒間行う。焼鈍工程１０６は付着工程１０４と同じ反応器内で行ってもよく、または同様の別の反応器で行ってもよい。若し、同一の反応器で行うときは、ＭＯＣＶＤ工程１０４と焼鈍工程１０６の両方で用いる温度は好ましくはほぼ同一である。若し、両工程を別々の同様の反応器で行うときは、工程１０４で形成した膜は工程１０２の前に酸素にさらしてはならない。工程１０６が完了したあとの膜は下記の構成をとる：Ｓｉ含有ガス使用時はＴｉ−Ｎ−Ｃ−Ｓｉ、Ｂ含有ガス使用時はＴｉ−Ｎ−Ｃ−Ｂ。膜内へのＳｉの取込みは図３ｂの曲線３０２から判る。
【００１６】
工程１０６を行った後、ウェーハを更に加工するか、又は酸素雰囲気にさらし（工程１０８）、次いで更に加工する。工程１０８を行うと、酸素は膜中に吸収されて膜は下記の構成をとる：Ｓｉ含有ガス使用時はＴｉ−Ｎ−Ｃ−Ｓｉ−Ｏ、Ｂ含有ガス使用時はＴｉ−Ｎ−Ｃ−Ｂ−Ｏ。しかし、ウェーハを酸素雰囲気に露出しないと、酸素の吸収は行われない。
【００１７】
上記は特にチタンベース障壁膜の形成に関するが、他の遷移金属をチタンの代りに使用してもよい。本発明の障壁層の形成に特に、タングステン、タンタル又はモリブデンをチタンの代りに用いることができる。
【００１８】
図２は２種の異なる膜のシート抵抗ＲS を示す。図２のＸ軸は膜の空気露出時間量（分）を表わし、Ｙ軸は膜のシート抵抗（オーム／□）を表わす。工程１０６を行わない膜はシート抵抗が高い。これは図２の曲線２０２で示される。更に、曲線２０２から判るように、工程１０６を行わないときの膜のシート抵抗は膜を酸素に露出した後でかなり増加するが、工程１０６を行った後では、シート抵抗は（曲線２０２と較べて）大きさが小さく、空気中での安定性が極めて良い。これは曲線２０４で示される。
【００１９】
更に、実験データとして２０ｎｍ膜のシート抵抗の比較を表１に示す。これら３種の試験での変数はシラン処理時間、急速熱焼鈍（ＲＴＡ）の有無、各種の実施温度である。
【００２０】
【表１】
図３ａ、図３ｂは炭素、酸素、窒素、チタン、珪素の種々の深さでの濃度を示すＸＰＳ深さ方向グラフである。各図のＸ軸はそれぞれの深さに対応する。スパッター時間の長さは深度距離を表わしている。これら両図のＹ軸は全合計基準原子濃度（Ａ．Ｃ．％）を表わす。図３ｂの曲線３０２から工程１０６処理の膜は珪素を含有しているが、工程１０６非処理の膜は珪素を含有していないことが判る（図３ａの曲線３０１では膜の最上面は０秒で、底部は約１６分で表示されている）。珪素取込みは空気中からの酸素の取込み量の低下にとって重要であり、これにより抵抗率は低下し、安定性は増す。珪素又は硼素の取込みはこの後Ｃｕ又はＡｌのメタライゼイションを行うときに有利となる。
【００２２】
図３ｂの曲線３０４は工程１０６と１０８処理後の膜中へ酸素吸収が限定されることを示す。
【００２３】
図４は透過型電子回折（ＴＥＭ）パターンである。図４は工程１０６（０及び１０８）処理膜は非晶質であることを示している。非晶質膜は障壁としての用途では好ましい（多結晶膜とは反対である）。これは多結晶構造では粒子境界中で金属拡散が速く進むからである。
【００２４】
図５は本発明の方法の第２の実施態様の流れ図である。この方法は、シラン・ガスをＭＯＣＶＤ工程で添加する以外は図１の方法と同じである。これにより珪素は層内により多く取込まれ、Ｓｉ／Ｔｉ比のより良い調整を容易にする。
【００２５】
図８はＴｉ−Ｓｉ−Ｎ付着膜のシート抵抗と、付着後のシラン焼鈍時間の関係を示すグラフである。
抵抗は２日間空気中に露出した後測定した。シート抵抗はシラン中で約３０秒焼鈍すると急激に低下することを明示している。
【００２６】
図９はＴｉ−Ｓｉ−Ｎ付着膜のシート抵抗と、Ｔｉ−Ｓｉ−Ｎ付着中のシラン流量の関係を示すグラフであり、測定は２日間空気漏出後に行った。これから判るように、シラン流量が増加すると膜のシート抵抗は増加し、従って珪素の取込みによる障壁層としての増加値は珪素による高抵抗値と均合わせる必要がある。
【００２７】
図１０は本発明の層の断面構造を示す電子顕微鏡写真であり、本方法は層の絶縁保護性が保持されていることを示している。
【００２８】
別の代表的付着法の実施態様
本実施態様は第１工程でＴＤＭＡＴを窒素の存在下熱分解してＴｉＮ層を形成する。付着後直ちにこの層をシラン雰囲気に露出して、シランとこの層を反応させて珪素をこの層内に取込ませて珪素に富む表面層を形成させる。珪素の存在により層劣化を招く酸素吸収を抑制する。
【００２９】
また、前駆物質としてＴＤＭＡＴを使用すると炭素を層内に高い百分率で取込むことができ、意外にも層内の炭素は別に問題にはならないと考えられ、むしろ層内の応力を低下させ、回路寿命には影響を与えないと考えられる。
【００３０】
【表２】
付着法の実施態様２
本態様は第１工程でＳｉＨ4 、ＴＤＭＡＴ、Ｎ2 （稀釈剤を組合せて障壁層を形成する、深さが充分となったところで、ＴＤＭＡＴとＮ2 の流れを停止させるが、ＳｉＨ4 は測定時間中連続して流す。記載の本実施態様は現在の好ましい実施態様である。
【００３２】
【表３】
付着法の実施態様３
ＳｉＨ4 を他のＳｉ源化合物、例えばＳｉ2 Ｈ6 に代替することができる。本実施態様は、第１工程でＳｉ2 Ｈ6 とＴＤＭＡＴを不活性Ｎ2 と一緒に流し、第２工程でＴＤＭＡＴとＮ2 の流れを停止させ、Ｓｉ2 Ｈ6 を流して、層表面中に珪素を余分に取込ませる。
【００３４】
付着法の実施態様４
ＴＤＭＡＴをＴＭＥＡＴ、即ちＴｉ（ＮＣＨ3 Ｃ2 Ｈ5 ）4 に代替させる、本実施例は、第１工程でシラン、ＴＭＥＡＴ、Ｎ2 を一緒に流す。第２工程では純シランを流して表面層中に珪素を追加的に取込ませる。
【００３５】
付着法の実施態様５
ＴＤＭＡＴをＴＤＥＡＴ、即ち、Ｔｉ（Ｎ（Ｃ2 Ｈ5 ）2 ）4 に代替させる。この場合、ＴＤＥＡＴ、シランをＮ2 又はその他の不活性稀釈剤と一緒に流してＳｉ−Ｎ−Ｔｉ層を付着させ、次の工程でシランだけを用いて上表面中の珪素濃度を増加させる。
【００３６】
付着法の実施態様６
本実施態様では、硼素源を用いてＴｉx Ｂy Ｎ膜を形成する。従って、硼素源成分（例えば、Ｂ2 Ｈ6 ）をＳｉ源成分の代りに多孔性ＴｉＮ膜の付着際に用いる。本実施例はＴＤＥＡＴとジボランをＮ2 又はその他の稀釈剤と一緒に流してＴｉ−Ｂ−Ｎ層を付着させ、次の工程でジボランのみを用いて上表面中の硼素濃度を増加させる。
【００３７】
代表的メタライゼイションの実施態様
本明細書に記載の本方法はメタライゼイションの適用、特に銅（Ｃｕ）のメタライゼイションで使用できる。例えば、図６に示す適用では、下部中間レベル誘電体５１５で包囲された導電層５１０（典型例としてアルミニウム合金）の下にあるトランジスター（図示せず）を含む半製品構造体を準備する。次いで、上部の中間レベル誘電体５２０（例えば、ＴＥＯＳ付着ＳｉＯ2 上のＢＰＳＧ）を付着させ、従来法（例えば、化学−機械的研磨又はＣＭＰ）で平坦化する。次いで、（ダマセン（damascene ）型式の方法で）中間レベルの誘電体５２０をパターン化とエッチング処理してメタライゼイションラインが所望されるスロット５３０を形成し、またバイアスが所望される（即ち、下部電導層への電気的接触が所望される）より深い孔５４０を形成する。次いで、上記の方法のうちの１つを用いて拡散障壁層５３０を付着させる。導電性の高い金属５５０（例えば銅）を従来法で全体に付着させ、（例えばＣＭＰを用いて）全体をエッチングして中間レベルの誘電体５２０の平坦表面を金属５５０が存在しない箇所で露出させる。
【００３８】
本実施態様では、本発明の障壁層は中間レベルの誘電体５２０の露出部上全部に形成される。即ち、金属５５０が中間レベルの誘電体５２０と直接接触する箇所は全然存在しない。これにより銅原子（又は寿命短縮剤、例えば金）が中間レベルの誘電体を介して半導体基板中に拡散する可能性が低減する。
【００３９】
代表的メタライゼイションの実施態様２
図７に示す別のメタライゼイションの実施態様はソース／ドレン拡散５６２方向に配列してポリサイド（ポリシリコン／シリサイド）ゲート５６０を有するトランジスターの形成を含む、次に、第１の中間レベルの誘電体層５６４を形成する（必要あれば、このあと図示しないが対応する複数の追加中間レベルの誘電体層を有する複数の追加層を多重に付着、パターン化処理することもよく行われる）。本明細書に開示の本発明の方法を用いて障壁層５７０を付着させる前にコンタクト箇所５６６をパターン化、エッチング処理する。次いで、金属層５８０を付着させ、パターン化処理する。本代表的実施態様では、金属層５８０はアルミニウム合金であり、これは（この好ましい実施態様ではフォースフィルTM（Force FillTM）法で）高圧下、コンタクトホール中に強制注入する。
【００４０】
開示される革新的実施態様は、（ａ）半導体材料の少なくとも１つの実質的にモノリシックな物体を含む基板を準備する工程と、（ｂ）チタンと窒素含有雰囲気中でＣＶＤで絶縁保護性層を付着させる工程と、（ｃ）上記絶縁保護性層を付着させたあとで、上記絶縁保護性層を珪素又は硼素含有雰囲気に露出させる工程とを含む薄膜形成法であって、前記工程（ｃ）により上記絶縁保護性層上に珪素又は硼素に富む表面を形成させる薄膜形成法を提供される。
【００４１】
開示される他の革新的実施態様は、チタンと窒素とを含有する薄い障壁層の膜から成る集積回路であって、上記薄膜は珪素又は硼素の組成が段階的に変化し、その第１表面では珪素又は硼素濃度が他に較べて高い集積回路を提供される。
【００４２】
改変と変更
当業者が認識するように、本明細書に記載の革新的概念は広範囲の用途にわたり改変と変更が可能であり、従って、本発明の主題の範囲は本明細書の特定の実施例の教示に限定されない。
【００４３】
ＣＶＤとメタライゼイションの一般的背景は下記刊行物に記載されており、これら刊行物はその改変と実施に就いて当業者の知識を示す一助となる：メタライゼイションと金属−半導体の界面（バトラ編１９８９）；ＶＬＳＩメタライゼイション：物理と技術（シエナイ編１９９１）；ムラルカ，「ＶＬＳＩとＵＬＳＩ用のメタライゼイション理論と実際（１９９３）」；集積回路用マルチレベル・メタライゼイションハンドブック（ウィルソン等編１９９３）；ラオ，「マルチレベル・インターコネクト技術（１９９３）」；化学蒸着（エム・エル・ヒッチマン編１９９３）；プラズマ加工に関する電気化学会の半年次学会会報；（これら全ての刊行物は言及することにより本明細書に組み入れる）。
【００４４】
以上の説明に関して更に以下の項を開示する。
（１）（ａ）半導体材料の少なくとも１つの実質的にモノリシックな物体を含む基板を準備する工程と、（ｂ）チタンと窒素を含む雰囲気中でＣＶＤで絶縁保護性層を付着させる工程と、（ｃ）上記絶縁保護性層を付着させたあとで、上記絶縁保護性層を珪素又は硼素を含有する雰囲気に露出させる工程とを含む薄膜形成法であって、前記工程（ｃ）により上記絶縁保護性層上に珪素又は硼素に富む表面を形成させる薄膜形成法。
（２）工程（ｃ）は、中間工程を介在させずに工程（ｂ）の後直ちに行う、第１項記載の形成法。
（３）工程（ｂ）は珪素又は硼素を含む雰囲気を用いる、第１項記載の形成法。
（４）工程（ｂ）はＳｉＨ４を含む雰囲気を用いる、第３項記載の形成法。
（５）工程（ｂ）はＴＤＭＡＴ、ＴＭＥＡＴ、ＴＤＥＡＴから成る群から選ばれたチタン源成分を含有する雰囲気を用いる、第１項記載の形成法。
（６）急速熱焼鈍を次工程として更に含む、第１項記載の形成法。
（７）チタンと窒素とを含有する薄い障壁層の膜から成る集積回路であって、上記薄膜は珪素又は硼素の組成が段階的に変化し、その第１の表面では珪素又は硼素濃度が他に較べて高い集積回路。
（８）薄膜は炭素を少なくとも１０％含有する、第７項記載の集積回路。
（９）薄膜は非晶質ＳｉＮＸとＴｉＮＸとから成る、第７項記載の集積回路。 （１０）薄膜はＴｉＮｘと硼素との非晶質の組合せである、第７項記載の集積回路。
（１１）珪素又は硼素に富むと上記薄膜中への酸素の吸収が低下する、第７項記載の集積回路。
（１２）基板上に障壁層を形成して、コンタクト／バイアスを接合させる方法において、下部構造体を準備する工程と、上記基板上に誘電体層を形成する工程と、上記基板中に開孔を形成して上記下部構造の少なくとも１部を露出させる工程（上記開口は側壁を有する）と、金属−有機前駆物質を用いて膜を形成する工程（上記膜は上記誘電体層上、上記開口側壁上、及び上記下部構造体の上記露出部上に形成する）と、活性ガス雰囲気中で加熱工程を行い、珪素又は硼素を上記膜中に取込む工程とを含む方法。
（１３）金属−有機前駆物が［（ＣＨ３）２Ｎ］４Ｔｉ、［（Ｃ２Ｈ５）２Ｎ］４Ｔｉ、［（ＣＨ３）（Ｃ２Ｈ５）Ｎ］４Ｔｉから成る群から選ばれた材料から成る、第１２項記載の方法。
（１４）活性ガスが上記金属−有機膜中に珪素又は硼素を取込ませる任意のガスから成る、第１２項記載の方法。
（１５）活性ガスがシラン、ジシラン、ジボラン又はこれらの任意の組合から成る群から選ばれる、第１２項に記載の方法。
（１６）下部構造体の基板である、第１２項記載の方法。
（１７）下部構造体は電導層である、第１２項記載の方法。
（１８）Ｔｉ−Ｓｉ−Ｎ又はＴｉ−Ｂ−Ｎ用ＣＶＤ法であって、単一供給ガス（好ましくはＴＤＭＡＴ）がチタンと窒素源の役割を果し、もう１つの供給ガスを珪素又は硼素源として用いる。これにより気相粒子核生成が回避され、一方、良好な絶縁保護性が得られる。所定の層厚が付着されたとき、チタン／窒素又はチタン／硼素源の流れを停止したのち、珪素又は硼素供給ガスをある期間連続して流す。これにより、欠陥密度の低く、Ｓｉ又はＢに富む、絶縁保護性のＴｉ−Ｎ膜が形成される。第２の実施態様では、単一供給ガス、例えばＴＤＭＡＴを熱分解してＴｉ−Ｎ層を形成させる。付着後の焼鈍を珪素又は硼素を供給するガス中で行い、これらの物質を層中に取込ませる。この層中への珪素又は硼素の取込みは膜中への酸素吸収を最小にし、従って形成膜を安定化させる。Ｓｉ又はＢに富む表面もＡｌのぬれとＣｕへの接着を向上させるのに役立ち、従って最新のメタライゼイションの適用に有用である。スパッター法に較べて、本発明は段部被覆性が極めて良好で、Ｓｉ／Ｔｉ比の制御が容易な膜の付着法を提供する。ＴＤＥＡＴ＋ＮＨ３＋ＳｉＨ４法に較べて、本発明はＴｉ源とＮＨ３との気相反応を皆無にする。
【図面の簡単な説明】
【図１】本発明の１実施態様を示す流れ図である。
【図２】先行技術の膜形成法を用いて形成した膜と本発明の１実施態様を用いて形成した膜の（空気露出時の関数としての）シート抵抗を示すグラフである。
【図３】ａ及びｂはそれぞれ、Ｘ線光電子分光法（ＸＰＳ）深さ方向断面解析から得たデータを示すグラフであり、ａは先行技術の方法を用いて形成した膜内の炭素、酸素、窒素、チタン、珪素の原子濃度を示し、ｂは本発明の方法を用いて形成した膜内の炭素、酸素、窒素、チタン、珪素の原子濃度を示す。
【図４】本発明の方法を用いて形成した膜の透過形電子回折図である。
【図５】本発明の第２の実施態様を示す流れ図である。
【図６】本発明の革新的方法で付着させた障壁膜層上でのメタライゼイションの例を示す。
【図７】本発明の革新的方法で付着させた障壁膜層上でのメタライゼイションの例を示す。
【図８】付着済みＴｉ−Ｓｉ−Ｎのシート抵抗と付着後のシラン焼鈍時間との関係を示すグラフである。
【図９】付着済みＴｉ−Ｓｉ−Ｎのシート抵抗と、Ｔｉ−Ｓｉ−Ｎの付着中のシラン流量との関係を示すグラフである。
【図１０】本発明の革新的な層の断面構造を示す顕微鏡写真（本発明の方法が層の絶縁保護性を保持していることを示す）である。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an integrated circuit structure and a manufacturing method.
[0002]
[Prior art]
Titanium nitride (TiN) is commonly used as a diffusion barrier in contacts, biases, trenches and interconnect stacks. Titanium nitride can also serve as a nucleation layer for CVD tungsten and CVD aluminum as an adhesion layer for chemical vapor deposition (CVD) tungsten. A good barrier layer has good step coverage, achieves void-free plug formation, achieves a sufficient barrier thickness at the bottom of the contact / bias / trench, has good diffusion barrier properties, and metal during tungsten deposition Prevent diffusion and prevent WF 6 attack of underlying metal or silicon. Inactive to adjacent materials during thermal cycling, low reactivity and acceptable electrical properties. For example, low contact / bias resistance and low junction leakage are required. Furthermore, it is necessary to make the barrier layer as thin as possible to reduce the thickness of the interconnect stack.
[0003]
TiN, formed by reactive thermal nitridation of Tix and Titanium, has traditionally been used as a diffusion barrier. Recently, PVDTinN has been replaced with CVDTiN and tends to satisfy the step coverage requirements for contacts, trenches and biases of 0.35 μm or less. CVDTiN overcomes the metal reliability problem and the joint leakage problem associated with PVDTinN, and CVDTiN can withstand thermal stresses at 550 ° C. while maintaining low contact resistance and leakage. Furthermore, CVDTiN is a potentially cleaner method than collimated PVDTin.
[0004]
CVDTiN deposited by the reaction of TiC 4 and NH 3 has been used so far, but has several problems. Some of the problems are high deposition temperatures, the incorporation of chlorine like TiNl, and the formation of NH 4 Cl particles in the gas phase. Although chlorine contamination can be reduced, such a method cannot be eliminated at all. When the film is deposited at temperatures below 400 ° C., the TiC 4 / NH 3 method cannot be used, but metal-organic precursors can be used. Two commonly used metal-organic precursors are tetrakismethylaminotitanium (TDMAT) and tetrakisdiethylaminotitanium (TDEAT). The deposition of CVDTiN based on the thermal decomposition of TDMAT results in good step coverage and forms a layer with a low particle count, but an unstable film with high resistivity. Resistivity can be improved by reacting metal-organic precursors with ammonia, but the reaction of TDMAT and NH 3 results in a film with poor step coverage and potential problems associated with gas phase reactions such as particle formation. is there.
[0005]
The possibility of depositing TiN using TDMAT or TDEAT without ammonia is discussed in the literature, but the following is not taught. That is, it is said that a film deposited from TDEAT or TDMAT without using ammonia has extremely poor properties. For example, Sun and Tsai: “Characteristics of Low Pressure Chemical Vapor Deposition Titanium Nitride from Metal Organic Sources” [(ESSDERC '94 Bulletin, pages 291-4). This document is incorporated herein by reference.]
[0006]
Ti-Si-N compounds provide an even better diffusion barrier than TiN and are attractive for modern metallization applications. Currently, two main methods for the production of Ti-Si-N films are under investigation, both of which have significant limitations. (Reactive sputtering of Ti-Si target in N 2 atmosphere is the most established method as represented by extensive research at California Institute of Technology (Cal Tech), but due to the direction of sputtering method, The step coverage of the deposited film is very poor for high aspect ratio contacts, biases and trenches.
[0007]
A chemical vapor deposition method using a mixture of silane, ammonia and TDEAT is under study at Sandia National Laboratories, which can provide a film with better step coverage, but in the gas phase reaction of TDEAT and NH 3 Particles are formed and the defect density of the resulting film is high.
[0008]
[Problems to be solved by the invention]
An object of the present invention is to provide an innovative method of manufacturing an insulating protective Ti—Si—N film having a low defect density, which solves the problems in the above two methods.
[0009]
[Means for Solving the Problems]
In the method of the present invention, the porous barrier layer containing titanium and nitrogen is first deposited, and then the post-deposition treatment is performed to introduce silicon into at least the uppermost surface of the porous layer. This is achieved by providing a high surface. (In another embodiment, the post-deposition treatment introduces boron instead of or in addition to silicon). The porous barrier layer also preferably contains a significant percentage of carbon and, if necessary, a significant percentage of silicon prior to post-treatment.
[0010]
As an advantage of the method and structure of the present invention, the surface of the Ti—Si—N film is rich in Si (or the surface of the Ti—B—N film is rich in B), so that oxygen absorption into the film is minimized. The formed film is stabilized. Further, the fact that the surface is rich in Si or rich in B is useful for the application of the latest metallization because it helps to improve the wetting of Al and the adsorption to Cu. Compared to the sputter method, the present invention provides a film deposition method that has a very good step coverage and an easy control of the Si / Ti ratio. Compared to the TDEAT + NH 3 + SiH 4 method, the present invention eliminates the gas phase reaction between the Ti source and NH 3 and can provide an insulating protective film having a low defect density. The method of the present invention is flexible in controlling chemical composition, including surface composition. The method of the present invention can be carried out in a commercially available CVD reactor and is easy to carry out.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
The invention will be described with reference to the accompanying drawings, which show important exemplary embodiments of the invention and are incorporated herein by reference.
[0012]
While the numerous innovative features of the present invention will be described with particular reference to presently preferred embodiments, these embodiments are examples that illustrate some of the many useful applications of the innovative features. It is only a thing. In general, the disclosure herein does not necessarily limit the scope of the various claimed inventions. Further, some disclosures are about some features of the invention, not others.
[0013]
FIG. 1 is a flowchart showing a process flow of one embodiment of the present invention. The starting point for manufacturing devices using the present invention is the same as the processing of many devices. In fact, standard processing applies to all processes leading to the formation of intermediate level dielectrics, bias / contact trenches or holes. Furthermore, standard processing can additionally be used both after the formation of the TiN-based layer and after the inventive annealing step of the present invention. The method of the present invention starts with a metal-organic chemical vapor deposition (MOCVD) to form a titanium nitride film (step 104). This film is formed on the intermediate level dielectric, on the sidewalls of the trench or hole, on the bottom of the trench or hole, and elsewhere where conventional TiN has been used. Preferably,
[0014]
Further, in
[0015]
Next, a heating process is performed (process 106). This step is preferably performed in a pure or diluted silane atmosphere, a disilane atmosphere, a B 2 H 6 atmosphere, or any other atmosphere that can form silicon or boron in the film. Preferably, this step is performed at a temperature of about 350 ° to 500 ° C. and a pressure of 0.1 to 50 torr for about 15 to 240 seconds. The annealing step 106 may be performed in the same reactor as the
[0016]
After performing step 106, the wafer is further processed or exposed to an oxygen atmosphere (step 108) and then further processed. When step 108 is performed, oxygen is absorbed into the film and the film has the following structure: Ti—N—C—Si—O when using a Si-containing gas, and Ti—N—C— when using a B-containing gas. B-O. However, oxygen absorption is not performed unless the wafer is exposed to an oxygen atmosphere.
[0017]
While the above specifically relates to the formation of a titanium-based barrier film, other transition metals may be used in place of titanium. In particular, tungsten, tantalum or molybdenum can be used in place of titanium in the formation of the barrier layer of the present invention.
[0018]
FIG. 2 shows the sheet resistance R S of two different films. The X axis in FIG. 2 represents the amount of air exposure time (minutes) of the membrane, and the Y axis represents the sheet resistance (ohms / square) of the membrane. A film not subjected to step 106 has a high sheet resistance. This is shown by
[0019]
Further, Table 1 shows a comparison of the sheet resistance of the 20 nm film as experimental data. The variables in these three tests are the silane treatment time, the presence or absence of rapid thermal annealing (RTA), and various implementation temperatures.
[0020]
[Table 1]
3a and 3b are XPS depth direction graphs showing concentrations of carbon, oxygen, nitrogen, titanium, and silicon at various depths. The X axis in each figure corresponds to the respective depth. The length of the sputter time represents the depth distance. The Y-axis in both figures represents the total total atomic concentration (AC%). It can be seen from the
[0022]
[0023]
FIG. 4 is a transmission electron diffraction (TEM) pattern. FIG. 4 shows that the processed film in step 106 (0 and 108) is amorphous. Amorphous films are preferred for use as barriers (as opposed to polycrystalline films). This is because in a polycrystalline structure, metal diffusion proceeds rapidly in the grain boundary.
[0024]
FIG. 5 is a flow diagram of a second embodiment of the method of the present invention. This method is the same as the method of FIG. 1 except that silane gas is added in the MOCVD process. This allows more silicon to be incorporated into the layer, facilitating better adjustment of the Si / Ti ratio.
[0025]
FIG. 8 is a graph showing the relationship between the sheet resistance of the Ti—Si—N deposited film and the silane annealing time after deposition.
Resistance was measured after exposure to air for 2 days. It is clearly shown that the sheet resistance rapidly decreases after annealing in silane for about 30 seconds.
[0026]
FIG. 9 is a graph showing the relationship between the sheet resistance of the Ti—Si—N deposited film and the silane flow rate during the deposition of Ti—Si—N, and the measurement was performed after air leakage for 2 days. As can be seen, as the silane flow rate increases, the sheet resistance of the film increases, so the increased value as a barrier layer due to the incorporation of silicon must be balanced with the high resistance value due to silicon.
[0027]
FIG. 10 is an electron micrograph showing the cross-sectional structure of the layer of the present invention, and this method shows that the insulation protection of the layer is maintained.
[0028]
Another exemplary deposition method embodiment In this embodiment, in the first step, TDMAT is pyrolyzed in the presence of nitrogen to form a TiN layer. Immediately after deposition, this layer is exposed to a silane atmosphere and the silane reacts with this layer to incorporate silicon into this layer to form a silicon rich surface layer. Oxygen absorption that causes layer degradation due to the presence of silicon is suppressed.
[0029]
In addition, when TDMAT is used as a precursor, carbon can be incorporated into the layer at a high percentage, and it is surprising that the carbon in the layer is not considered to be a problem. Expected to have no effect on lifespan.
[0030]
[Table 2]
In this embodiment, SiH 4 , TDMAT, and N 2 are combined in the first step to form a barrier layer by combining diluents. When the depth is sufficient, the flow of TDMAT and N 2 is stopped, but SiH 4 is measured. Flowing continuously over time, this embodiment described is the presently preferred embodiment.
[0032]
[Table 3]
Embodiment 3 of the adhesion method
SiH 4 can be replaced by other Si source compounds such as Si 2 H 6 . In this embodiment, Si 2 H 6 and TDMAT are caused to flow together with inert N 2 in the first step, and the flow of TDMAT and N 2 is stopped in the second step, and Si 2 H 6 is caused to flow in the layer surface. Incorporate extra silicon.
[0034]
Embodiment 4 of the deposition method
In this embodiment, TDMAT is replaced with TMEAT, that is, Ti (NCH 3 C 2 H 5 ) 4. In this embodiment, silane, TMEAT, and N 2 are flowed together in the first step. In the second step, pure silane is flowed to additionally incorporate silicon into the surface layer.
[0035]
TDMAT is replaced by TDEAT, that is, Ti (N (C 2 H 5 ) 2 ) 4 . In this case, TDEAT, silane is flowed together with N 2 or other inert diluent to deposit the Si—N—Ti layer, and the silicon concentration in the upper surface is increased using only silane in the next step.
[0036]
Embodiment 6 of the deposition method
In the present embodiment, to form a Ti x B y N film using boron source. Therefore, a boron source component (for example, B 2 H 6 ) is used when depositing the porous TiN film instead of the Si source component. This embodiment is adhered with Ti-B-N layer by flowing a TDEAT and diborane together with N 2 or other diluent, to increase the boron concentration in the upper surface by using only diborane in the next step.
[0037]
Exemplary Metallization Embodiments The methods described herein can be used in metallization applications, particularly copper (Cu) metallization. For example, the application shown in FIG. 6 provides a semi-finished structure that includes a transistor (not shown) under a conductive layer 510 (typically an aluminum alloy) surrounded by a lower
[0038]
In this embodiment, the barrier layer of the present invention is formed entirely on the exposed portion of the intermediate level dielectric 520. That is, there is no place where the metal 550 is in direct contact with the intermediate level dielectric 520. This reduces the possibility that copper atoms (or life shortening agents such as gold) will diffuse into the semiconductor substrate via intermediate level dielectrics.
[0039]
Another metallization embodiment shown in FIG. 7 includes the formation of a transistor having a polycide (polysilicon / silicide) gate 560 arranged in the direction of the source /
[0040]
The disclosed innovative embodiments include (a) providing a substrate comprising at least one substantially monolithic object of semiconductor material, and (b) providing an insulating protective layer by CVD in a titanium and nitrogen containing atmosphere. A method of forming a thin film, comprising: a step of adhering; and (c) exposing the insulating protective layer to an atmosphere containing silicon or boron after the insulating protective layer is attached, wherein the step (c) Provides a thin film forming method for forming a silicon or boron rich surface on the insulating protective layer.
[0041]
Another innovative embodiment disclosed is an integrated circuit comprising a thin barrier layer film containing titanium and nitrogen, wherein the thin film has a stepwise change in the composition of silicon or boron, and the first surface thereof. Provides an integrated circuit having a higher silicon or boron concentration than others.
[0042]
Modifications and Changes As those skilled in the art will appreciate, the innovative concepts described herein can be modified and changed over a wide range of applications, and thus the scope of the present subject matter is It is not limited to the teachings of any particular embodiment.
[0043]
The general background of CVD and metallization is described in the following publications, which help to show the knowledge of those skilled in the art of modification and implementation: metallization and metal-semiconductor interfaces ( VLSI Metallization: Physics and Technology (Siena 1991); Muralka, “Metalization Theory and Practice for VLSI and ULSI (1993)”; Multilevel Metallization Handbook for Integrated Circuits (Wilson) 1993); Lao, “Multilevel Interconnect Technology (1993)”; Chemical Vapor Deposition (ML Hitchman 1993); Bulletin of the Electrochemical Society of Plasma Processing; (All these publications mentioned) Which is incorporated herein by reference).
[0044]
The following items are further disclosed with respect to the above description.
(1) (a) providing a substrate comprising at least one substantially monolithic object of semiconductor material; (b) depositing an insulating protective layer by CVD in an atmosphere containing titanium and nitrogen; (C) a method of forming a thin film including a step of exposing the insulating protective layer to an atmosphere containing silicon or boron after attaching the insulating protective layer, wherein the insulating step is performed by the step (c). A thin film forming method in which a surface rich in silicon or boron is formed on a protective layer.
(2) The forming method according to
(3) The forming method according to
(4) The forming method according to item 3, wherein step (b) uses an atmosphere containing SiH 4 .
(5) The forming method according to
(6) The formation method according to
(7) An integrated circuit comprising a thin barrier layer film containing titanium and nitrogen, wherein the thin film has a stepwise change in the composition of silicon or boron, and the silicon or boron concentration is different on the first surface. Higher integrated circuit than
(8) The integrated circuit according to item 7, wherein the thin film contains at least 10% carbon.
(9) The integrated circuit according to item 7, wherein the thin film is made of amorphous SiN X and TiN X. (10) The integrated circuit according to item 7, wherein the thin film is an amorphous combination of TiN x and boron.
(11) The integrated circuit according to item 7, wherein the absorption of oxygen into the thin film decreases when rich in silicon or boron.
(12) In a method of forming a barrier layer on a substrate and bonding contacts / bias, a step of preparing a lower structure, a step of forming a dielectric layer on the substrate, and an opening in the substrate And exposing at least a part of the lower structure (the opening has a sidewall) and forming a film using a metal-organic precursor (the film is formed on the dielectric layer, the opening And a step of heating in an active gas atmosphere to incorporate silicon or boron into the film.
(13) The metal-organic precursor consists of [(CH 3 ) 2 N] 4 Ti, [(C 2 H 5 ) 2 N] 4 Ti, [(CH 3 ) (C 2 H 5 ) N] 4 Ti. 13. A method according to claim 12, comprising a material selected from the group.
(14) The method according to item 12, wherein the active gas comprises any gas that allows silicon or boron to be incorporated into the metal-organic film.
(15) The method according to item 12, wherein the active gas is selected from the group consisting of silane, disilane, diborane, or any combination thereof.
(16) The method according to item 12, which is a substrate of a lower structure.
(17) The method according to item 12, wherein the lower structure is a conductive layer.
(18) CVD method for Ti—Si—N or Ti—B—N, wherein a single supply gas (preferably TDMAT) serves as a source of titanium and nitrogen, and another supply gas is silicon or boron. Use as a source. This avoids gas phase particle nucleation, while providing good insulation protection. When the predetermined layer thickness is deposited, the flow of the titanium / nitrogen or titanium / boron source is stopped and then the silicon or boron feed gas is continuously flowed for a period of time. Thereby, an insulating protective Ti—N film having a low defect density and rich in Si or B is formed. In a second embodiment, a single feed gas, such as TDMAT, is pyrolyzed to form a Ti-N layer. Annealing after deposition is performed in a gas supplying silicon or boron, and these substances are incorporated into the layer. Incorporation of silicon or boron into this layer minimizes oxygen absorption into the film and thus stabilizes the formed film. Surfaces rich in Si or B also help to improve Al wetting and adhesion to Cu and are therefore useful in modern metallization applications. Compared to the sputtering method, the present invention provides a method for depositing a film that has a very good step coverage and an easy control of the Si / Ti ratio. Compared to the TDEAT + NH 3 + SiH 4 method, the present invention eliminates the gas phase reaction between the Ti source and NH 3 .
[Brief description of the drawings]
FIG. 1 is a flow diagram illustrating one embodiment of the present invention.
FIG. 2 is a graph showing sheet resistance (as a function of air exposure) for a film formed using a prior art film formation method and a film formed using one embodiment of the present invention.
FIGS. 3a and 3b are graphs showing data obtained from X-ray photoelectron spectroscopy (XPS) depth profile analysis, respectively, wherein a is carbon, oxygen in a film formed using a prior art method. , Nitrogen, titanium, and silicon, and b represents the atomic concentration of carbon, oxygen, nitrogen, titanium, and silicon in the film formed by the method of the present invention.
FIG. 4 is a transmission electron diffraction diagram of a film formed using the method of the present invention.
FIG. 5 is a flow chart showing a second embodiment of the present invention.
FIG. 6 shows an example of metallization on a barrier film layer deposited by the innovative method of the present invention.
FIG. 7 shows an example of metallization on a barrier film layer deposited by the innovative method of the present invention.
FIG. 8 is a graph showing the relationship between the sheet resistance of deposited Ti—Si—N and the silane annealing time after deposition.
FIG. 9 is a graph showing the relationship between the sheet resistance of deposited Ti—Si—N and the silane flow rate during deposition of Ti—Si—N.
FIG. 10 is a photomicrograph showing the cross-sectional structure of the innovative layer of the present invention (showing that the method of the present invention retains the insulating protection of the layer).
Claims (2)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US2879896P | 1996-10-31 | 1996-10-31 | |
| US784657 | 1997-01-21 | ||
| US028798 | 1997-01-21 | ||
| US08/784,657 US6017818A (en) | 1996-01-22 | 1997-01-21 | Process for fabricating conformal Ti-Si-N and Ti-B-N based barrier films with low defect density |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10189491A JPH10189491A (en) | 1998-07-21 |
| JP4065351B2 true JP4065351B2 (en) | 2008-03-26 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30117997A Expired - Fee Related JP4065351B2 (en) | 1996-10-31 | 1997-10-31 | Method for producing an insulating protective barrier film based on Ti-Si-N and Ti-BN with low defect density |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP4065351B2 (en) |
| KR (1) | KR19980032971A (en) |
| TW (1) | TW363213B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6475912B1 (en) | 1998-06-01 | 2002-11-05 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method and apparatus for fabricating the same while minimizing operating failures and optimizing yield |
| JP2003045960A (en) * | 2001-08-01 | 2003-02-14 | Matsushita Electric Ind Co Ltd | Semiconductor device and method of manufacturing same |
| JPWO2007094044A1 (en) * | 2006-02-14 | 2009-07-02 | 富士通マイクロエレクトロニクス株式会社 | Semiconductor device manufacturing method and semiconductor manufacturing apparatus |
| JP2008041977A (en) * | 2006-08-08 | 2008-02-21 | Nec Electronics Corp | Manufacturing method of semiconductor circuit device |
-
1997
- 1997-10-20 KR KR1019970053690A patent/KR19980032971A/en not_active Application Discontinuation
- 1997-10-30 TW TW086116121A patent/TW363213B/en not_active IP Right Cessation
- 1997-10-31 JP JP30117997A patent/JP4065351B2/en not_active Expired - Fee Related
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| Publication number | Publication date |
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| JPH10189491A (en) | 1998-07-21 |
| KR19980032971A (en) | 1998-07-25 |
| TW363213B (en) | 1999-07-01 |
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