JP3920109B2 - High frequency device and manufacturing method thereof - Google Patents

High frequency device and manufacturing method thereof Download PDF

Info

Publication number
JP3920109B2
JP3920109B2 JP2002031209A JP2002031209A JP3920109B2 JP 3920109 B2 JP3920109 B2 JP 3920109B2 JP 2002031209 A JP2002031209 A JP 2002031209A JP 2002031209 A JP2002031209 A JP 2002031209A JP 3920109 B2 JP3920109 B2 JP 3920109B2
Authority
JP
Japan
Prior art keywords
hole
metal base
frequency device
insulating layer
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2002031209A
Other languages
Japanese (ja)
Other versions
JP2003234428A (en
Inventor
龍也 宮
和治 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Priority to JP2002031209A priority Critical patent/JP3920109B2/en
Publication of JP2003234428A publication Critical patent/JP2003234428A/en
Application granted granted Critical
Publication of JP3920109B2 publication Critical patent/JP3920109B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inexpensive and high-reliability surface-mountable high frequency device. <P>SOLUTION: The device is composed of: a metal base 1 with a semiconductor chip 9 mounted thereon; an insulation layer 2 formed on a half-etched surface of the base 1; a plurality of through-holes 3 opened into the base 1; an insulation layer 2 formed on the entire side of each through-hole 3; a through-hole plating layer 4 formed on a desired surface of the base 1, including the surface of the insulation layer 2; an insulator 5 filled in the centers of the through-holes; a metalizing 6 formed on the plating layer 4 and the insulator 5 surface; bonding wires 7 for wiring electrodes of the chip 9 with the metalizing 6; a resin 8 covering the surface of the base 1, including the chip 9; and terminal electrodes 10 for connecting with a wiring of components to be mounted. This realizes a low-manufacturing-cost and high-reliability high frequency device meeting high frequency characteristics. <P>COPYRIGHT: (C)2003,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、高周波装置に関し、特に、モジュール、MCM、半導体チップ、モノリシック集積回路、圧電体チップ等を用いるマイクロ波以上の高周波に適した高周波装置に関する。
【0002】
【従来の技術】
信号処理の高速化に伴い、数100MHzから更には10GHzを越える周波数帯域までを使用する高周波装置が実用化されてきているが、この種の高周波装置を実現するためには、半導体チップを搭載する高周波帯域で使用可能な、小型で低価格、且つシステムの組立自動化しやすい表面実装タイプの高周波装置が必要となる。
【0003】
従来、この種の高周波装置(特開平06−334449や特開平06−169028や特開平06−053682)はセラミックをベースとした多層の基板が使われている(図10乃至図12)。ここで使用されるセラミック使用の高周波装置は製造工程が長く価格も高い。特に多層の場合、製造工程での歩留まりも悪く高価なものとなっていたし、表面実装タイプの高周波装置ではなかった。
【0004】
そこで高周波装置用としては、使用されていないが金属ベースの表面実装タイプの装置(特開昭61−287128や特開昭62−15882)を使用出来れば、金属材料自体がセラミックに比較して安価で、製造工程も短いことからパッケージとして安価であるから、この問題が解決する(図13及び図14)。
【0005】
しかしセラミックの場合は、セラミック自体が絶縁体であるために絶縁性については、問題なかったが、金属の場合には、表面に絶縁層を形成した上で、スルーホールの下側に被実装側の配線と接続させるためにスルーホール径に比較して寸法的に十分大きな端子電極用のメタライズが必要である。
【0006】
前記金属ベースの従来例では、スルーホール上部には端子電極のメタライズが存在せず空洞となつており、十分な接触面積が得られなかったり又接続ロー材が多いとスルーホールを通して金属ベースの反対面に盛り上がる等の不具合があった。
【0007】
又スルーホール径が小さい場合は、金属と絶縁層との接触面積が少なくて密着性が悪く、外力により剥離しスルーホール端子が抜ける等の不具合があった。
【0008】
一方絶縁層を薄くしようとする場合、セラミックでは製法上割れ等の問題から200μmから300μmが限界で特性上必要な60μm以下の厚さには出来なかった。
【0009】
これを解決するために、フィルムキァリアタイプの装置(特開平5−291347)の使用も考えられるが、フィルムはプラスチックで出来ているため強度がない点で問題があった(図15)。
【0010】
【発明が解決しようとする課題】
従来の、セラミックを使用した高周波装置では、高価格のものとなり、又高周波特性も十分には満たすことができない。そこで金属ベースを使用しようとして、端子電極寸法を十分大きくするとショートをしてしまったりスルーホールでの絶縁層が剥離したりするという問題があった。
【0011】
本発明は、上記問題点に鑑み、表面実装できると共に小型で低価格で信頼性の高い高周波装置を提供することを目的とする。
【0012】
【課題を解決するための手段】
上記目的を達成するために、本発明の高周波装置は、半導体チップあるいは圧電体チップを表面に搭載する金属ベースを有する表面実装型の高周波装置において、金属ベースは中央の板厚の厚い領域と、その周辺の板厚の薄い領域を有し、板厚の薄い領域は少なくとも裏面側から厚さが減じられ、板厚の厚い領域の表面には半導体チップあるいは圧電体チップが搭載され、板厚の薄い領域には複数のスルーホールを備え、スルーホールの内壁面と金属ベースの板厚の薄い領域の表面の一部および裏面の一部に連続して形成された絶縁層を備え、板厚の薄い領域の表面の一部に形成された絶縁層の表面上にメタライズ層を備え、メタライズ層の表面にコンデンサ、インダクタ、抵抗等のチップ部品が搭載され、メタライズ層と金属ベースはマイクロストリップラインを形成することを特徴とする。
【0017】
あるいはスルーホール上部を覆う形にスルーホール形成領域の絶縁層上に端子電極を有することを特徴とする。
【0019】
次に本発明の高周波装置の製造方法は、半導体チップあるいは圧電体チップを表面に搭載する金属ベースを有する表面実装型の高周波装置の製造方法において、金属ベースの一部の領域を、少なくとも裏面側からハーフエッチングし、板厚の厚い領域と薄い領域を形成する工程と、板厚の薄い領域に、スルーホールとなる箇所を穿孔する工程と、スルーホールの内壁面と、金属ベースの板厚の薄い領域の表面の一部および裏面の一部に連続して絶縁層を形成する工程と、スルーホールにある絶縁層の中心部に前記スルーホールの寸法よりも小さい孔を穿孔する工程と、金属ベース全面にスルーホールメッキを行う工程と、スルーホールメッキの上にメタライズ層を形成する工程と、不要な部分のメタライズ層を含むメッキ金属を除去し所望のパターンを形成する工程を備え、メタライズ層と金属ベースはマイクロストリップラインを形成することを特徴とする。
【0021】
あるいは上記に加えて金属ベース全面にスルーホールメッキを行う工程の後に、スルーホールのスルーホールメッキで埋まっていない部分に絶縁体を充填する工程を有することを特徴とする。
【0022】
【実施例】
以下、本発明の第1の実施例を示す添付図面を参照しながら説明する。図1は本発明の実施例に係る高周波装置の斜視図及び展開図であり、図2は、図1中のA−A断面図である。
【0023】
図2に示す高周波装置は、半導体チップ9が載置された金属ベース1と、金属ベース1のハーフエッチングされた表裏面に形成された絶縁層2と、金属ベース1に開口された複数のスルーホール3と、スルーホール3の側面全面に形成された絶縁層2と、絶縁層2の表面を含む金属ベース1の半導体チップ9を載置する側の反対側の表面に形成されたスルーホールメッキ層4と、スルーホールの中心部に充填された絶縁体5と、スルーホールメッキ層4と絶縁体5の表面に形成されたメタライズ層6と、半導体チップ9の電極とメタライズ層6とを結線するボンディングワイヤ7と、半導体チップ9を含む金属ベース1の表側を覆う樹脂8と、被実装側の配線と接続させるための端子電極10とから成っている。
【0024】
次に第1の実施例の構造に到る製造方法を図3に従って説明する。
【0025】
まず、銅合金や鉄ニッケル合金等の金属から成る金属ベース(厚さ100μm以上)の表面の所望のパターンの感光性樹脂を形成し、スルーホール形成領域をハーフエッチング(25μm〜60μm程度)して板厚を薄くする(図3a)。
次にスルーホールとなる箇所にドリル加工等の手段により複数のスルーホール(0.3mm〜0.7mm程度)を形成する(図3b)。尚図3aと図3bの工程は、入れ替えてもかまわない。
その後スクリーン印刷法で金属ベースを両面からエポキシ樹脂等の絶縁物を刷込みハーフエッチングしたスルーホール形成領域及びスルーホールを絶縁物で充填する(図3c)。
次にスルーホールの中心部にドリル等により先のスルーホールの寸法よりも小さい孔(0.1mm〜0.3mm程度)を形成する(図3d)。
その後無電界銅メッキ(厚さ15μm程度)等により金属ベース全面にスルーホールメッキを行う(図3e)。次にスルーホールの中心部の空間にエポキシ樹脂等の絶縁体5を充填し(図3f)、その後スルーホールメッキと絶縁体との上にメタライズ層(厚さ15μm程度)を形成する(図3g)。
次に金属ベースの表裏面に所望のパターンの感光性樹脂を形成し不要な部分のメッキ金属を除去し配線パターンを形成する(図3h)。
【0026】
その上に金属ベースの表面に半導体チップ9を導電性ペースト又は樹脂接着剤又は金属ロー材により接着し、次に半導体チップ上の電極と金属ベース上のメタライズ層とを金線あるいはアルミ線等のボンディングワイヤで結線し(図3i) 、最後に樹脂注入金型で金属ベースを表裏両面から挟みエポキシ樹脂等の絶縁物を注入し金属ベースの表面を絶縁物で覆い本発明の第1の実施例の構造ができ上がる(図2)。
【0027】
本実施例の構造にすれば、高価なセラミックの多層基板に代えて安価な単層の金属ベースを使用でき、且つ板厚が薄くても十分な装置強度を得ることができ更にスルーホール近傍の板厚を他の部分よりも薄く形成したことにより絶縁膜を形成することができ、その上に端子電極の寸法として十分大きなものが金属ベースとショートすることなく形成でき又スルーホール側面の絶縁層との密着性を、その接触面積を増加し抵抗に強い形状にしたことにより剥離を防止できシールド性も高く信頼性の高い高周波装置を実現できる。
【0028】
次に本発明の第2の実施例を示す添付図面を参照しながら説明する。図4は本発明の第2の実施例に係る高周波装置のA−A断面図である。
【0029】
図4に示す高周波装置は、半導体チップ9及び抵抗やコンデンサ等のチップ部品11が載置された金属ベース1と、半導体チップ9等を載置する面の反対側の表面のみがハーフエッチングされた金属ベース1の表裏面に形成された絶縁層2と、金属ベース1に開口された複数のスルーホール3と、スルーホール3の側面全面に形成された絶縁層2と、絶縁層2の表面を含む任意の表面に形成されたスルーホールメッキ層7と、スルーホールの中心部に充填された絶縁体5と、スルーホールメッキ層4と絶縁体5の表面に形成されたメタライズ層6と、半導体チップ9の電極とメタライズ層6とを結線するボンディングワイヤ7と、半導体チップ9を含む金属ベース1の表面を覆う樹脂8と、被実装側の配線と接続させるための端子電極10とから成っている。
【0030】
次に第2の実施例の構造に到る製造方法を図5に従って説明する。
【0031】
まず、銅合金や鉄ニッケル合金等の金属から成る金属ベース(厚さ100μm以上)の表面の所望のパターンの感光性樹脂を形成し、スルーホール形成領域をハーフエッチングして板厚を薄くする(図5a)。本実施例の場合は、金属ベース1の裏面片面のみハーフエッチング(25μm〜60μm程度)している。次にスルーホールとなる箇所にドリル加工等の手段により複数のスルーホール(0.3mm〜0.7mm程度)を形成する(図5b)。尚図5aと図5bの順序は、前後してもかまわない。
その後スクリーン印刷法で金属ベースを両面からエポキシ樹脂等の絶縁物を刷込みハーフエッチングしたスルーホール形成領域及びスルーホールを絶縁物で充填する(図5c)。
この時金属ベースの表面の絶縁層の厚さを60μm以下とし、後で付けるメタライズとの間で所望の箇所にマイクロストリップラインを形成する。次にスルーホールの中心部にドリル等により先のスルーホールの寸法(0.1mm〜0.3mm程度)よりも小さい孔を形成する(図5d)。
その後無電界銅メッキ(厚さ15μm程度)等により金属ベース全面にスルーホールメッキを行う(図5e)。次にスルーホールの中心部の空間にエポキシ樹脂等の絶縁体を充填し(図5f)、その後スルーホールメッキ層と絶縁体との上にメタライズ層を形成する(図5g)。次に金属ベースの表面に所望のパターンの感光性樹脂を形成し不要な部分のメッキ金属を除去し配線パターンを形成する(図5h)。次にチップ部品をメタライズ層と導電性ペースト又は樹脂接着剤又は金属ロー材等により接続し、更に金属ベースの表面に半導体チップを導電性ペースト又は樹脂接着剤又は金属ロー材あるいは、樹脂ペーストにより接着する。次に半導体チップ上の電極と金属ベース上のメタライズとを金線あるいはアルミ線等のボンディングワイヤで結線し、最後に樹脂注入金型で金属ベースを両面から挟みエポキシ樹脂等の絶縁物を注入し金属ベースの表面を絶縁物で覆い本発明の第2の実施例の構造ができ上がる(図4)。
【0032】
本実施例の構造にすれば、高価なセラミックの多層基板に代えて安価な単層の金属ベースを使用でき、且つ板厚が薄くても十分な装置強度を得ることができ更にスルーホール近傍の板厚を他の部分よりも薄く形成したことにより絶縁層を形成することができ、その上に端子電極の寸法として十分大きなものが金属ベースとショートすることなく形成でき、又スルーホール側面の絶縁層との密着性の低下による剥離を防止でき加えて十分薄い絶縁層でマイクロストリップラインも形成できシールド性も高く信頼性の高い高周波装置を実現できる。
【0033】
次に本発明の第3の実施例を示す添付図面を参照しながら説明する。図6は本発明の第3の実施例に係る高周波装置の断面図である。
【0034】
図6に示す高周波装置は、図1の実施例における半導体チップ9をバンプ12を有するものとしてボンディングワイヤを使用せずフェイスダウンで接続したものです。
【0035】
次に本発明の第4の実施例を示す添付図面を参照しながら説明する。図7は本発明の第4の実施例に係る高周波装置の断面図である。
【0036】
図7に示す高周波装置は、図4の実施例における半導体チップ9をバンプ12を有するものとしてボンディングワイヤを使用せずフェイスダウンで接続したものである。
【0037】
次に本発明の第5の実施例を示す添付図面を参照しながら説明する。図8は本発明の第5の実施例に係る高周波装置の断面図である。
【0038】
図8に示す高周波装置は、図2の実施例における樹脂8による封止に代えて金属キァップ13による中空封止の高周波装置としたものである。
【0039】
第5の実施例は、第2の実施例の効果に加えて気密性を要求する半導体チップ等に有効な高周波装置となっている。
又次に本発明の第6の実施例を示す添付図面を参照しながら説明する。図9は本発明の第5の実施例に係る高周波装置の断面図である。
【0040】
図9に示す高周波装置は、図4の実施例における金属ベース1の一部分に二層のメタライズ層を設けたものである。
【0041】
このように高周波装置の特徴に応じて種々の変更が可能であり、以上の例に限定されることなく本願の主旨を含むものであれば自由に変更可能である。
【0042】
【発明の効果】
以上説明したように、本発明の高周波装置は、安価で強度が強く信頼性の高い表面実装できる高周波装置を提供することができる。
【図面の簡単な説明】
【図1】本願の実施例の高周波装置の概要を示す斜視図及び展開図である。
【図2】本願第1の実施例を示す図1のA−A断面図である。
【図3】本願第1の実施例の高周波装置の工程図である。
【図4】本願第2の実施例を示す図1のA−A断面図である。
【図5】本願第2の実施例の高周波装置の工程図である。
【図6】本願第3の実施例を示す図1のA−A断面図である。
【図7】本願第4の実施例を示す図1のA−A断面図である。
【図8】本願第5の実施例を示す図1のA−A断面図である。
【図9】本願第6の実施例を示す図1のA−A断面図である。
【図10】従来例を示す断面図である。
【図11】従来例を示す断面図である。
【図12】従来例を示す断面図である。
【図13】従来例を示す断面図である。
【図14】従来例を示す断面図である。
【図15】従来例を示す断面図である。
【符号の説明】
1 金属ベース
2 絶縁層
3 スルーホール
4 スルーホールメッキ層
5 絶縁体
6 メタライズ層
7 ボンディングワイヤ
8 樹脂
9 半導体チップ
10 端子電極
11 チップ部品
12 バンプ
13 キァップ
(尚従来例における番号とは関係ありません)
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a high-frequency device, and more particularly, to a high-frequency device suitable for a high frequency higher than a microwave using a module, an MCM, a semiconductor chip, a monolithic integrated circuit, a piezoelectric chip, and the like.
[0002]
[Prior art]
As signal processing speeds up, high-frequency devices that use frequencies ranging from several hundred MHz to even over 10 GHz have been put into practical use. In order to realize this type of high-frequency device, a semiconductor chip is mounted. There is a need for a surface-mount type high-frequency device that can be used in a high-frequency band, is small, low-priced, and easy to automate system assembly.
[0003]
Conventionally, this type of high-frequency device (Japanese Patent Laid-Open Nos. 06-334449, 06-169028, and 06-056822) uses a multilayer substrate based on ceramic (FIGS. 10 to 12). The ceramic-based high-frequency device used here has a long manufacturing process and a high price. In particular, in the case of multilayers, the yield in the manufacturing process was poor and expensive, and it was not a surface mount type high frequency device.
[0004]
Therefore, if a metal-based surface mounting type device (Japanese Patent Laid-Open Nos. 61-287128 and 62-15882) can be used for high-frequency devices, the metal material itself is less expensive than ceramics. Thus, since the manufacturing process is short and the package is inexpensive, this problem is solved (FIGS. 13 and 14).
[0005]
However, in the case of ceramic, since the ceramic itself is an insulator, there was no problem with insulation, but in the case of metal, an insulating layer was formed on the surface, and the mounting side under the through hole. Therefore, it is necessary to metallize the terminal electrode having a dimension sufficiently larger than the diameter of the through hole in order to connect to the wiring.
[0006]
In the conventional example of the metal base, the metallization of the terminal electrode does not exist at the upper part of the through hole, and it becomes a cavity, and if the contact area is not sufficient or there are many connecting brazing materials, the metal base is opposed to the through hole. There were problems such as swelling on the surface.
[0007]
When the through-hole diameter is small, the contact area between the metal and the insulating layer is small and the adhesion is poor, and there is a problem that the through-hole terminal comes off due to peeling due to external force.
[0008]
On the other hand, when trying to make the insulating layer thin, the thickness of 200 μm to 300 μm cannot be reduced to a thickness of 60 μm or less, which is necessary for characteristics, due to problems such as cracking in the manufacturing method.
[0009]
In order to solve this problem, the use of a film carrier type apparatus (Japanese Patent Laid-Open No. 5-291347) can be considered, but there is a problem in that the film is made of plastic and has no strength (FIG. 15).
[0010]
[Problems to be solved by the invention]
Conventional high-frequency devices using ceramics are expensive and cannot sufficiently satisfy high-frequency characteristics. Therefore, when trying to use a metal base, if the terminal electrode dimensions are made sufficiently large, there is a problem that a short circuit occurs or the insulating layer at the through hole is peeled off.
[0011]
The present invention has been made in view of the above problems, and an object thereof is to provide a high-frequency device that can be surface-mounted and is small, low-cost, and highly reliable.
[0012]
[Means for Solving the Problems]
In order to achieve the above object, a high-frequency device of the present invention is a surface-mounted high-frequency device having a metal base on which a semiconductor chip or a piezoelectric chip is mounted, and the metal base has a thick central plate region, There is a thin region around the periphery, and the thin region is reduced at least from the back side, and a semiconductor chip or a piezoelectric chip is mounted on the surface of the thick region. The thin region is provided with a plurality of through holes, and an insulating layer formed continuously on a part of the surface of the inner surface of the through hole and a part of the metal base with a thin plate thickness and a part of the back surface is provided. A metallized layer is provided on the surface of the insulating layer formed on a part of the surface of the thin region, and chip parts such as capacitors, inductors, resistors, etc. are mounted on the surface of the metallized layer. And forming a B stripline.
[0017]
Alternatively, a terminal electrode is provided on the insulating layer in the through hole forming region so as to cover the top of the through hole.
[0019]
Next, a method for manufacturing a high-frequency device according to the present invention is a method for manufacturing a surface-mounted high-frequency device having a metal base on which a semiconductor chip or a piezoelectric chip is mounted on the surface. Half-etching, forming a thick region and a thin region, drilling a portion to be a through hole in the thin region, the inner wall surface of the through hole, and the thickness of the metal base Forming an insulating layer continuously on a part of the front surface and a part of the back surface of the thin region, drilling a hole smaller than the dimension of the through hole in the center of the insulating layer in the through hole, and metal A step of performing through-hole plating on the entire surface of the base, a step of forming a metallized layer on the through-hole plating, and removing a plating metal including an unnecessary part of the metallized layer Comprising the step of forming a turn, metallized layer and the metal base and forming a microstrip line.
[0021]
Alternatively, in addition to the above, after the step of performing through-hole plating on the entire surface of the metal base, there is a step of filling an insulating material in a portion of the through-hole that is not filled with through-hole plating.
[0022]
【Example】
Hereinafter, the first embodiment of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a perspective view and a developed view of a high-frequency device according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along line AA in FIG.
[0023]
The high frequency device shown in FIG. 2 includes a metal base 1 on which a semiconductor chip 9 is mounted, an insulating layer 2 formed on the front and back surfaces of the metal base 1 that are half-etched, and a plurality of through holes that are opened in the metal base 1. Through hole plating formed on the surface opposite to the side on which the semiconductor chip 9 of the metal base 1 including the hole 3, the insulating layer 2 formed on the entire side surface of the through hole 3, and the surface of the insulating layer 2 is placed The layer 4, the insulator 5 filled in the center of the through hole, the through hole plating layer 4, the metallized layer 6 formed on the surface of the insulator 5, and the electrode of the semiconductor chip 9 and the metallized layer 6 are connected. It comprises a bonding wire 7 to be formed, a resin 8 covering the front side of the metal base 1 including the semiconductor chip 9, and a terminal electrode 10 for connection to a wiring on the mounted side.
[0024]
Next, a manufacturing method reaching the structure of the first embodiment will be described with reference to FIG.
[0025]
First, a photosensitive resin having a desired pattern on the surface of a metal base (thickness of 100 μm or more) made of a metal such as a copper alloy or an iron-nickel alloy is formed, and a through-hole forming region is half-etched (about 25 μm to 60 μm). The plate thickness is reduced (FIG. 3a).
Next, a plurality of through holes (about 0.3 mm to 0.7 mm) are formed by drilling or the like at locations to be through holes (FIG. 3b). Note that the steps of FIGS. 3a and 3b may be interchanged.
Thereafter, an insulating material such as an epoxy resin is imprinted from both sides of the metal base by screen printing, and the through-hole forming region and the through-hole which are half-etched are filled with the insulating material (FIG. 3c).
Next, a hole (about 0.1 mm to 0.3 mm) smaller than the dimension of the previous through hole is formed in the center of the through hole by a drill or the like (FIG. 3d).
Thereafter, through-hole plating is performed on the entire surface of the metal base by electroless copper plating (thickness of about 15 μm) or the like (FIG. 3e). Next, an insulator 5 such as an epoxy resin is filled in the central space of the through hole (FIG. 3f), and then a metallized layer (thickness of about 15 μm) is formed on the through hole plating and the insulator (FIG. 3g). ).
Next, a photosensitive resin having a desired pattern is formed on the front and back surfaces of the metal base, and unnecessary portions of the plated metal are removed to form a wiring pattern (FIG. 3h).
[0026]
Further, the semiconductor chip 9 is bonded to the surface of the metal base with a conductive paste, a resin adhesive, or a metal brazing material, and then the electrode on the semiconductor chip and the metallized layer on the metal base are made of gold wire or aluminum wire. A wire is connected with a bonding wire (FIG. 3i). Finally, an insulating material such as an epoxy resin is injected by sandwiching the metal base from both front and back surfaces with a resin injection mold, and the surface of the metal base is covered with the insulating material. This completes the structure (Fig. 2).
[0027]
According to the structure of this embodiment, an inexpensive single-layer metal base can be used instead of an expensive ceramic multilayer substrate, and sufficient device strength can be obtained even if the plate thickness is thin. An insulating film can be formed by making the plate thickness thinner than other parts, and a terminal electrode having a sufficiently large dimension can be formed without short-circuiting with the metal base, and an insulating layer on the side surface of the through hole The high-frequency device can be realized by increasing the contact area and making it resistant to resistance, thereby preventing peeling and having high shielding properties.
[0028]
Next, a second embodiment of the present invention will be described with reference to the accompanying drawings. FIG. 4 is a cross-sectional view of the high-frequency device according to the second embodiment of the present invention taken along the line AA.
[0029]
The high-frequency device shown in FIG. 4 is half-etched only on the metal base 1 on which the semiconductor chip 9 and chip components 11 such as resistors and capacitors are mounted, and the surface opposite to the surface on which the semiconductor chip 9 is mounted. an insulating layer 2 formed on the front and back surfaces of the metallic base 1, a plurality of through-holes 3 opened in the metal base 1, an insulating layer 2 formed on the entire side surface of the through-hole 3, the surface of the insulating layer 2 A through-hole plating layer 7 formed on an arbitrary surface including the insulator 5 filled in the center of the through-hole, a metallization layer 6 formed on the surface of the through-hole plating layer 4 and the insulator 5, A bonding wire 7 for connecting the electrode of the semiconductor chip 9 to the metallized layer 6; a resin 8 for covering the surface of the metal base 1 including the semiconductor chip 9; and a terminal electrode 10 for connecting to the wiring on the mounting side. It consists et al.
[0030]
Next, a manufacturing method reaching the structure of the second embodiment will be described with reference to FIG.
[0031]
First, a photosensitive resin having a desired pattern on the surface of a metal base (thickness of 100 μm or more) made of a metal such as a copper alloy or an iron nickel alloy is formed, and the through-hole forming region is half-etched to reduce the plate thickness ( FIG. 5a). In the case of the present embodiment, only one side of the back surface of the metal base 1 is half-etched (about 25 μm to 60 μm). Next, a plurality of through-holes (about 0.3 mm to 0.7 mm) are formed at a location to be a through-hole by means such as drilling (FIG. 5b). Note that the order of FIGS. 5a and 5b may be reversed.
Thereafter, an insulating material such as an epoxy resin is imprinted from both sides of the metal base by screen printing, and the through-hole forming region and the through-hole that are half-etched are filled with the insulating material (FIG. 5c).
At this time, the thickness of the insulating layer on the surface of the metal base is set to 60 μm or less, and a microstrip line is formed at a desired location between the metallization to be applied later. Next, a hole smaller than the dimension of the previous through hole (about 0.1 mm to 0.3 mm) is formed in the center of the through hole by a drill or the like (FIG. 5d).
Thereafter, through-hole plating is performed on the entire surface of the metal base by electroless copper plating (thickness of about 15 μm) or the like (FIG. 5e). Next, an insulator such as an epoxy resin is filled in the central space of the through hole (FIG. 5f), and then a metallized layer is formed on the through hole plating layer and the insulator (FIG. 5g). Next, a photosensitive resin having a desired pattern is formed on the surface of the metal base, and unnecessary portions of the plated metal are removed to form a wiring pattern (FIG. 5h). Next, the chip component is connected to the metallized layer with a conductive paste, resin adhesive, or metal brazing material, and the semiconductor chip is further bonded to the surface of the metal base with a conductive paste, resin adhesive, metal brazing material, or resin paste. To do. Next, the electrode on the semiconductor chip and the metallization on the metal base are connected by a bonding wire such as a gold wire or an aluminum wire, and finally an insulating material such as epoxy resin is injected by sandwiching the metal base from both sides with a resin injection mold. The structure of the second embodiment of the present invention is completed by covering the metal base surface with an insulator (FIG. 4).
[0032]
According to the structure of this embodiment, an inexpensive single-layer metal base can be used instead of an expensive ceramic multilayer substrate, and sufficient device strength can be obtained even if the plate thickness is thin. An insulating layer can be formed by forming the plate thickness thinner than other parts, and a terminal electrode having a sufficiently large dimension can be formed without short-circuiting with the metal base, and the through-hole side surface can be insulated. In addition, it is possible to prevent peeling due to a decrease in adhesiveness to the layer, and to form a microstrip line with a sufficiently thin insulating layer, thereby realizing a high-frequency device with high shielding and high reliability.
[0033]
Next, a third embodiment of the present invention will be described with reference to the accompanying drawings. FIG. 6 is a sectional view of a high-frequency device according to the third embodiment of the present invention.
[0034]
The high-frequency device shown in FIG. 6 is obtained by connecting the semiconductor chip 9 in the embodiment of FIG. 1 face-down with bumps 12 without using bonding wires.
[0035]
Next, a fourth embodiment of the present invention will be described with reference to the accompanying drawings. FIG. 7 is a sectional view of a high-frequency device according to the fourth embodiment of the present invention.
[0036]
The high-frequency device shown in FIG. 7 is obtained by connecting the semiconductor chip 9 in the embodiment of FIG. 4 face down without using bonding wires as having bumps 12.
[0037]
Next, a fifth embodiment of the present invention will be described with reference to the accompanying drawings. FIG. 8 is a sectional view of a high-frequency device according to the fifth embodiment of the present invention.
[0038]
The high-frequency device shown in FIG. 8 is a hollow-sealed high-frequency device using a metal cap 13 instead of sealing with the resin 8 in the embodiment of FIG.
[0039]
The fifth embodiment is a high-frequency device effective for a semiconductor chip or the like that requires airtightness in addition to the effects of the second embodiment.
Next, a sixth embodiment of the present invention will be described with reference to the accompanying drawings. FIG. 9 is a sectional view of a high-frequency device according to the fifth embodiment of the present invention.
[0040]
The high frequency device shown in FIG. 9 is obtained by providing two metallized layers on a part of the metal base 1 in the embodiment of FIG.
[0041]
As described above, various modifications can be made according to the characteristics of the high-frequency device, and the present invention is not limited to the above examples, and can be freely modified as long as it includes the gist of the present application.
[0042]
【The invention's effect】
As described above, the high-frequency device of the present invention can provide a high-frequency device that is inexpensive, strong, and reliable and can be surface-mounted.
[Brief description of the drawings]
FIG. 1 is a perspective view and a developed view showing an outline of a high-frequency device according to an embodiment of the present application.
FIG. 2 is a cross-sectional view taken along line AA of FIG. 1 showing a first embodiment of the present application.
FIG. 3 is a process diagram of the high-frequency device according to the first embodiment of the present application.
4 is a cross-sectional view taken along the line AA of FIG. 1 showing a second embodiment of the present application.
FIG. 5 is a process diagram of a high-frequency device according to a second embodiment of the present application.
6 is a cross-sectional view taken along the line AA of FIG. 1 showing a third embodiment of the present application.
FIG. 7 is a cross-sectional view taken along the line AA of FIG. 1 showing a fourth embodiment of the present application.
FIG. 8 is a cross-sectional view taken along line AA of FIG. 1 showing a fifth embodiment of the present application.
FIG. 9 is a cross-sectional view taken along line AA of FIG. 1 showing a sixth embodiment of the present application.
FIG. 10 is a cross-sectional view showing a conventional example.
FIG. 11 is a cross-sectional view showing a conventional example.
FIG. 12 is a cross-sectional view showing a conventional example.
FIG. 13 is a cross-sectional view showing a conventional example.
FIG. 14 is a cross-sectional view showing a conventional example.
FIG. 15 is a cross-sectional view showing a conventional example.
[Explanation of symbols]
1 Metal base 2 Insulating layer 3 Through-hole 4 Through-hole plating layer 5 Insulator 6 Metallized layer 7 Bonding wire 8 Resin 9 Semiconductor chip 10 Terminal electrode 11 Chip component 12 Bump 13 Cap (Not related to the number in the conventional example)

Claims (4)

半導体チップあるいは圧電体チップを表面に搭載する金属ベースを有する表面実装型の高周波装置において、
前記金属ベースは中央の板厚の厚い領域と、その周辺の板厚の薄い領域を有し、
前記板厚の薄い領域は少なくとも裏面側から厚さが減じられ、
前記板厚の厚い領域の表面には前記半導体チップあるいは圧電体チップが搭載され、
前記板厚の薄い領域には複数のスルーホールを備え、
前記スルーホールの内壁面と前記金属ベースの前記板厚の薄い領域の表面の一部および裏面の一部に連続して形成された絶縁層を備え、
前記板厚の薄い領域の表面の一部に形成された前記絶縁層の表面上にメタライズ層を備え、
前記メタライズ層の表面にコンデンサ、インダクタ、抵抗等のチップ部品が搭載され、
前記メタライズ層と前記金属ベースはマイクロストリップラインを形成することを特徴とする高周波装置。
In a surface-mounted high-frequency device having a metal base on which a semiconductor chip or a piezoelectric chip is mounted,
The metal base has a central thick plate region and a peripheral thin plate region,
The thickness of the thin region is reduced at least from the back side,
The semiconductor chip or the piezoelectric chip is mounted on the surface of the thick plate area,
The thin plate area includes a plurality of through holes,
An insulating layer formed continuously on a part of the front surface and a part of the back surface of the inner wall surface of the through hole and the thin region of the metal base;
A metallized layer is provided on the surface of the insulating layer formed on a part of the surface of the thin plate region,
Chip parts such as capacitors, inductors and resistors are mounted on the surface of the metallized layer,
The high-frequency device according to claim 1, wherein the metallized layer and the metal base form a microstrip line.
前記スルーホール上部を覆う形に、前記絶縁層上に端子電極を有することを特徴とする請求項1に記載した高周波装置。The high-frequency device according to claim 1, further comprising a terminal electrode on the insulating layer so as to cover an upper portion of the through hole. 半導体チップあるいは圧電体チップを表面に搭載する金属ベースを有する表面実装型の高周波装置の製造方法において、
前記金属ベースの一部の領域を、少なくとも裏面側からハーフエッチングし、板厚の厚い領域と薄い領域を形成する工程と、
前記板厚の薄い領域に、スルーホールとなる箇所を穿孔する工程と、
前記スルーホールの内壁面と、前記金属ベースの前記板厚の薄い領域の表面の一部および裏面の一部に連続して絶縁層を形成する工程と、
前記スルーホールにある前記絶縁層の中心部に前記スルーホールの寸法よりも小さい孔を穿孔する工程と、
前記金属ベース全面にスルーホールメッキを行う工程と、
前記スルーホールメッキの上にメタライズ層を形成する工程と、
不要な部分の前記メタライズ層を含むメッキ金属を除去し所望のパターンを形成する工程を備え、
前記メタライズ層と前記金属ベースはマイクロストリップラインを形成することを特徴とする高周波装置の製造方法。
In a method of manufacturing a surface-mounted high-frequency device having a metal base on which a semiconductor chip or a piezoelectric chip is mounted,
Half-etching at least a partial area of the metal base from the back side to form a thick area and a thin area; and
Drilling a portion to be a through hole in the thin plate area;
Forming an insulating layer continuously on the inner wall surface of the through-hole and a part of the front surface and a part of the back surface of the thin region of the metal base;
Drilling a hole smaller than the size of the through hole at the center of the insulating layer in the through hole;
Performing through-hole plating on the entire metal base;
Forming a metallized layer on the through-hole plating;
A step of removing a plating metal including an unnecessary portion of the metallized layer and forming a desired pattern;
A method of manufacturing a high-frequency device, wherein the metallized layer and the metal base form a microstrip line.
前記金属ベース全面にスルーホールメッキを行う工程の後に、前記スルーホールの前記スルーホールメッキで埋まっていない部分に絶縁体を充填する工程を有することを特徴とする請求項3に記載の高周波装置の製造方法。  4. The high frequency device according to claim 3, further comprising a step of filling an insulator in a portion of the through hole that is not filled with the through hole plating after the step of performing through hole plating on the entire surface of the metal base. Production method.
JP2002031209A 2002-02-07 2002-02-07 High frequency device and manufacturing method thereof Expired - Fee Related JP3920109B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002031209A JP3920109B2 (en) 2002-02-07 2002-02-07 High frequency device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002031209A JP3920109B2 (en) 2002-02-07 2002-02-07 High frequency device and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JP2003234428A JP2003234428A (en) 2003-08-22
JP3920109B2 true JP3920109B2 (en) 2007-05-30

Family

ID=27774684

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002031209A Expired - Fee Related JP3920109B2 (en) 2002-02-07 2002-02-07 High frequency device and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP3920109B2 (en)

Also Published As

Publication number Publication date
JP2003234428A (en) 2003-08-22

Similar Documents

Publication Publication Date Title
US5866942A (en) Metal base package for a semiconductor device
WO2001026147A1 (en) Semiconductor device, method of manufacture thereof, circuit board, and electronic device
JP2001319992A (en) Wiring board, semiconductor device, and their manufacturing methods
JPH1065034A (en) Wiring substrate for electronic parts and package of electronic parts
JP2004537841A5 (en)
JPH09199635A (en) Multilayer film for forming circuit substrate, multilayer circuit substrate using it, and package for semiconductor device
JPH09312355A (en) Semiconductor device and its manufacture
JP3920109B2 (en) High frequency device and manufacturing method thereof
JP3912445B2 (en) Semiconductor device
JP3102287B2 (en) Ceramic multilayer substrate
JP3914094B2 (en) Semiconductor device
US11784625B2 (en) Packaging method and package structure for filter chip
JP4388410B2 (en) Multiple wiring board
JPH0846084A (en) Surface mounting type semiconductor package, method of manufacture and semiconductor device
JP2784248B2 (en) Method for manufacturing semiconductor device
JPH1074859A (en) Qfn semiconductor package
JP2001291817A (en) Electronic circuit device and multilayer printed wiring board
WO1994025984A1 (en) Ic package and method of its manufacture
JPH05326644A (en) Double side wired film carrier and manufacture thereof
JP2571960B2 (en) Double-sided flexible circuit board and manufacturing method thereof
JP2001284803A (en) Mounting method of printed wiring board for high frequency, printed wiring board mounting member for high frequency and its manufacturing method
JP3441194B2 (en) Semiconductor device and manufacturing method thereof
JP2006279483A (en) Surface acoustic wave device of surface mount type
JPS6038843A (en) Semiconductor device and manufacture thereof
JP2004095864A (en) Electronic part

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20041119

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20050726

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050926

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20060424

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060801

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060927

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20070116

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20070214

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100223

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110223

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110223

Year of fee payment: 4

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110223

Year of fee payment: 4

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110223

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120223

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130223

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140223

Year of fee payment: 7

LAPS Cancellation because of no payment of annual fees