JP3822321B2 - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
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- JP3822321B2 JP3822321B2 JP20868797A JP20868797A JP3822321B2 JP 3822321 B2 JP3822321 B2 JP 3822321B2 JP 20868797 A JP20868797 A JP 20868797A JP 20868797 A JP20868797 A JP 20868797A JP 3822321 B2 JP3822321 B2 JP 3822321B2
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- silicone gel
- semiconductor device
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- semiconductor element
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12032—Schottky diode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- Compositions Of Macromolecular Compounds (AREA)
- Silicon Polymers (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【0001】
【発明の属する技術分野】
本発明は、ケース内の半導体素子をシリコーンゲルにより封止もしくは充填している半導体装置に関し、詳しくは、ヒートサイクル時の気泡や亀裂の生成が抑制されたシリコーンゲルにより半導体素子を封止もしくは充填している、優れた信頼性を有する半導体装置に関する。
【0002】
【従来の技術】
半導体素子を主要な構成部品とする半導体装置は、一般に、外部からの機械的応力から該素子を保護するために、該素子がケース内に設置されており、さらに、外部からの振動を緩和して、湿気を遮断するために該素子がシリコーンゲルにより封止もしくは充填されている(特開昭61−48945号公報、特開昭62−104145号公報、および特開平8−46093号公報参照)。
【0003】
【発明が解決しようとする課題】
しかし、ケース内の半導体素子をシリコーンゲルにより封止もしくは充填している半導体装置がヒートサイクルを受けた場合には、該シリコーンゲル中に気泡や亀裂が生成して、該半導体装置の信頼性が低下するという問題があった。そして、この問題は、複数の電気素子を1つの基板内に組み込んだようなモジュールにおいて、特に顕著であった。
【0004】
本発明者らは、上記の課題を解決するため鋭意検討した結果、本発明に到達した。
すなわち、本発明の目的は、ヒートサイクル時の気泡や亀裂の生成が抑制されたシリコーンゲルにより半導体素子を封止もしくは充填している、優れた信頼性を有する半導体装置を提供することにある。
【0005】
【課題を解決するための手段】
本発明は、ケース内の半導体素子をシリコーンゲルにより封止もしくは充填している半導体装置であって、該シリコーンゲルの25℃、せん断周波数0.1Hzにおける損失弾性率が1.0×103〜1.0×105dyne/cm2であり、複素弾性率が1.0×106dyne/cm2以下であり、かつJIS K 2220に規定される1/4ちょう度が20〜80であることを特徴とする半導体装置に関する。
【0006】
【発明の実施の形態】
本発明の半導体装置を詳細に説明する。
本発明の半導体装置は、ケース内の半導体素子をシリコーンゲルにより封止もしくは充填している半導体装置である。このような半導体素子としては、IC、ハイブリッドIC、LSI等の半導体素子;このような半導体素子、コンデンサ、電気抵抗器等の電気素子を実装した電気回路やモジュール;1W以上の電力を扱えるパワーIC;静電誘導トランジスタ(SIT:Static Induction Transistor)、MOS型(パワーMOSFET)、MOS型とバイポーラ型を組み合わせたIGBT(Insulated Gate Bipolar Transistor)、ショットキバリアゲート型化合物(GaAs)FET等のパワートランジスタ;パワー半導体素子が例示される。また、このような半導体素子を保護するためのケースとしては、金属製のものや、プラスチック製のものが例示される。このような本発明の半導体装置としては、電極と電極、電気素子と電気素子、電気素子とケース等の隙間が狭いものや、これらの構造がこのシリコーンゲルの膨張・収縮に追随しにくい構造を有するものが例示される。このような構造を有する半導体装置においても、これがヒートサイクルを受けた場合でも半導体素子を封止もしくは充填しているシリコーンゲル中の気泡や亀裂の生成が抑制されているという特徴がある。このような半導体装置としては、例えば、IC、ハイブリッドIC、LSI等の半導体素子、コンデンサ、電気抵抗器等の電気素子を実装した電気回路やモジュールをシリコーンゲルにより封止もしくは充填している、OA、情報、自動車、家電、FA等の分野で使用される各種モータ制御用パワーIC、電源分野で200VラインオペレートパワーIC、自動車分野でのランプ/ソレノイドドライブ用ハイサイドスイッチ等のパワーIC、複数個のパワー半導体素子を1つのパッケージに組み込んで、電流容量を大きくしたパワーモジュール、自動車用のイグナイターやレギュレータが挙げられ、特に、パワーモジュールが好適である。
【0007】
本発明の半導体装置においては、半導体素子を封止もしくは充填しているシリコーンゲルの25℃、せん断周波数0.1Hzにおける損失弾性率が1.0×103〜1.0×105dyne/cm2であり、かつ、複素弾性率が1.0×106dyne/cm2以下であることを特徴としており、特に、このシリコーンゲルの25℃、せん断周波数0.1Hzにおける損失弾性率が3.0×103〜3.0×104dyne/cm2であり、かつ、この複素弾性率が1.0×105dyne/cm2以下であることことが好ましい。これは、このような範囲の損失弾性率および複素弾性率を有するシリコーンゲルにより半導体素子を封止もしくは充填している半導体装置は、これがヒートサイクルを受けても、該シリコーンゲル中の気泡や亀裂の形成が抑制されているので、絶縁破壊強さ等の電気特性の低下がなく、信頼性が優れるためである。
【0008】
このようなシリコーンゲルを形成するためのシリコーンゲル組成物としては、例えば、アルケニル基含有オルガノポリシロキサン、ケイ素原子結合水素原子含有オルガノポリシロキサン、およびヒドロシリル化反応用触媒からなるヒドロシリル化反応硬化型シリコーンゲル組成物、シラノール基またはケイ素原子結合アルコキシ基含有オルガノポリシロキサン、ケイ素原子結合アルコキシ基含有シラン、および縮合反応用触媒からなる脱アルコール縮合反応硬化型シリコーンゲル組成物、アクリル官能性基含有オルガノポリシロキサンを主成分とする紫外線硬化型シリコーンゲル組成物が挙げられ、比較的速やかに全体が硬化することから、ヒドロシリル化反応硬化型シリコーンゲル組成物であることが好ましい。
【0009】
半導体素子を封止もしくは充填しているシリコーンゲルの25℃、せん断周波数0.1Hzにおける損失弾性率および複素弾性率は、例えば、このシリコーンゲルを厚さ5〜6mm、直径20mmの円形プレート状に調整した後、これを動的粘弾性測定装置により測定することにより求められる。
【0010】
また、本発明の半導体装置において、半導体素子を封止もしくは充填しているシリコーンゲルのJIS K 2220に規定される1/4ちょう度は20〜80の範囲内である。これは、この1/4ちょう度がこの範囲内であるようなシリコーンゲルが繰り返しのヒートサイクルや振動を受けても、該シリコーンゲル中に気泡や亀裂の生成が著しく抑制されるからである。
【0011】
本発明の半導体装置を調製する方法は限定されず、例えば、半導体素子を設置したケース内にシリコーンゲル組成物を注入した後、該組成物を加熱したり、室温で放置したり、紫外線を照射することにより硬化させる方法が挙げられ、特に、比較的速やかに全体が硬化することから、該組成物としてヒドロシリル化反応硬化型のものを用いて、加熱により硬化させることがが好ましい。この際には、加熱温度が高くなると、半導体素子を封止もしくは充填しているシリコーンゲル中に気泡や亀裂が生成しやすくなる傾向があるので、50〜250℃の範囲内に加熱することが好ましく、特に、70〜130℃の範囲内に加熱することが好ましい。
【0012】
【実施例】
本発明の半導体装置を実施例により詳細に説明する。なお、実施例中の特性は25℃において測定した値であり、シリコーンゲルの特性は次のようにして測定した。
[シリコーンゲルの損失弾性率および複素弾性率]
ヒドロシリル化反応硬化型のシリコーンゲル組成物を125℃で1時間加熱することにより、厚さ5〜6mm、直径20mmの円形プレート状のシリコーンゲルを作成した。このシリコーンゲルの25℃、せん断周波数0.1Hzにおける損失弾性率および複素弾性率をレオメトリック社製の動的粘弾性測定装置(商品名:ダイナミックアナライザーARES)により測定した。
[シリコーンゲルの1/4ちょう度]
50mlのガラスビーカーにヒドロシリル化反応硬化型のシリコーンゲル組成物を静かに注いだ後、125℃で1時間加熱することによりシリコーンゲルを作成した。このシリコーンゲルの1/4ちょう度をJIS K 2220に規定の方法により測定した。
【0013】
[実施例1〜5・比較例1〜6]
各種の1/4ちょう度、損失弾性率、および複素弾性率を有するシリコーンゲルを形成することができるヒドロシリル化反応硬化型のシリコーンゲル組成物を用いて図1で表される半導体装置を作成した。すなわち、この半導体装置は、半導体素子(IGBT)1が、銅製回路配線2を設けたセラミック製基板3上に接着剤により載置され、この回路配線2とボンディングワイヤにより電気的に接続されている。このセラミック製基板3上の回路配線2には外部接続端子4が設けられており、また、半導体素子1以外の電気抵抗器やコンデンサ等の各種電気素子が実装されている。この半導体素子1および各種の電気素子を実装したセラミック製基板3は、ポリエチレンテレフタレート(PET)等のプラスチック製のケース5内に接着剤により固定されている。
【0014】
この半導体素子1を設置したケース5の内部にヒドロシリル化反応硬化型のシリコーンゲル組成物を静かに注ぎ込んだ。その後、この半導体装置ごと、室温、5mmHg以下の条件で10分間減圧脱泡した後、これを125℃のオーブン中で1時間加熱することにより、このシリコーンゲル組成物をを硬化させてシリコーンゲル6を形成した。
【0015】
このようにして調製した各々5個の半導体装置について、−40℃で1時間、125℃で1時間を1サイクルとするヒートサイクル試験を行った。500サイクル後のシリコーンゲルの外観(気泡・亀裂の有無および程度)、および外部接続端子4を用いた絶縁破壊強さ(毎秒1kVの割合で昇圧)を測定した。これらの測定結果を表1に示した。なお、表中のシリコーンゲルの外観はそれぞれ、
A:気泡・亀裂の生成が全くない、
B:気泡・亀裂が生成し、その大きさが10mm未満である、
C:気泡・亀裂が生成し、その大きさが10〜30mmである、
D:気泡・亀裂が生成し、その大きさが30mm以上である、
を示している。また、表中の半導体装置の不良率は、半導体装置5個中の絶縁破壊強さが5KV/mm以下である半導体装置の個数を示している。
【0016】
【表1】
【0017】
【発明の効果】
本発明の半導体装置は、半導体素子を封止もしくは充填しているシリコーンゲルの25℃、せん断周波数0.1Hzにおける損失弾性率が1.0×103〜1.0×105dyne/cm2であり、複素弾性率が1.0×106dyne/cm2以下であり、かつJIS K 2220に規定される1/4ちょう度が20〜80であるので、ヒートサイクルを受けた場合でも、該シリコーンゲル中の気泡や亀裂の生成が抑制され、信頼性が優れるという特徴がある。
【図面の簡単な説明】
【図1】 図1は、本発明の一例であり、実施例で用いた半導体装置の断面図である。
【図2】 図2は、半導体素子を封止もしくは充填しているシリコーンゲル中に気泡矢や亀裂が生成した半導体装置の断面図である。
【符号の説明】
1 半導体素子(IGBT)
2 銅製回路配線
3 セラミック製基板
4 外部取出端子
5 プラスチック製ケース
6 シリコーンゲル
7 シリコーンゲル中に生成した気泡や亀裂[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device in which a semiconductor element in a case is sealed or filled with a silicone gel. More specifically, the semiconductor element is sealed or filled with a silicone gel in which generation of bubbles and cracks during a heat cycle is suppressed. The present invention relates to a semiconductor device having excellent reliability.
[0002]
[Prior art]
A semiconductor device having a semiconductor element as a main component generally has the element installed in a case in order to protect the element from external mechanical stress, and further reduces vibration from the outside. In order to block moisture, the element is sealed or filled with a silicone gel (see Japanese Patent Laid-Open Nos. 61-48945, 62-104145, and 8-46093). .
[0003]
[Problems to be solved by the invention]
However, when a semiconductor device in which the semiconductor element in the case is sealed or filled with silicone gel is subjected to a heat cycle, bubbles and cracks are generated in the silicone gel, and the reliability of the semiconductor device is increased. There was a problem of lowering. This problem is particularly remarkable in a module in which a plurality of electric elements are incorporated in one substrate.
[0004]
As a result of intensive studies to solve the above-mentioned problems, the present inventors have reached the present invention.
That is, an object of the present invention is to provide a semiconductor device having excellent reliability in which a semiconductor element is sealed or filled with a silicone gel in which generation of bubbles and cracks during a heat cycle is suppressed.
[0005]
[Means for Solving the Problems]
The present invention is a semiconductor device in which a semiconductor element in a case is sealed or filled with a silicone gel, and the loss elastic modulus of the silicone gel at 25 ° C. and a shear frequency of 0.1 Hz is 1.0 × 10 3 to 1.0 × 10 5 dyne / cm 2 der is, 1/4 consistency is 20 to double prime modulus Ri der 1.0 × 10 6 dyne / cm 2 or less, and is defined in JIS K 2220 80 der Rukoto a semiconductor device according to claim.
[0006]
DETAILED DESCRIPTION OF THE INVENTION
The semiconductor device of the present invention will be described in detail.
The semiconductor device of the present invention is a semiconductor device in which a semiconductor element in a case is sealed or filled with silicone gel. Examples of such semiconductor elements include semiconductor elements such as ICs, hybrid ICs, and LSIs; electrical circuits and modules on which such electrical elements such as semiconductor elements, capacitors, and electrical resistors are mounted; power ICs that can handle power of 1 W or more A power transistor such as a static induction transistor (SIT), a MOS type (power MOSFET), a combination of a MOS type and a bipolar type (Insulated Gate Bipolar Transistor), a Schottky barrier gate type compound (GaAs) FET; A power semiconductor element is exemplified. Examples of the case for protecting such a semiconductor element include a metal case and a plastic case. Such a semiconductor device of the present invention has a structure in which the gap between the electrode and the electrode, the electric element and the electric element, the electric element and the case is narrow, or a structure in which these structures hardly follow the expansion / contraction of the silicone gel. What has is illustrated. The semiconductor device having such a structure is also characterized in that the generation of bubbles and cracks in the silicone gel sealing or filling the semiconductor element is suppressed even when the semiconductor device is subjected to a heat cycle. As such a semiconductor device, for example, an OA in which an electric circuit or module on which an electric element such as a semiconductor element such as an IC, a hybrid IC, or an LSI, a capacitor, or an electric resistor is mounted is sealed or filled with silicone gel, OA Power control ICs for various motors used in the fields of information, automobiles, home appliances, factory automation, etc., 200V line operated power ICs in the power supply field, power ICs such as high-side switches for lamp / solenoid drive in the automotive field, etc. These power semiconductor elements are incorporated into one package to increase a power capacity, and an automobile igniter or regulator. A power module is particularly preferable.
[0007]
In the semiconductor device of the present invention, the loss elastic modulus at 25 ° C. and the shear frequency of 0.1 Hz of the silicone gel sealing or filling the semiconductor element is 1.0 × 10 3 to 1.0 × 10 5 dyne / cm. 2 and a complex elastic modulus of 1.0 × 10 6 dyne / cm 2 or less. In particular, this silicone gel has a loss elastic modulus of 3 at 25 ° C. and a shear frequency of 0.1 Hz. It is preferably 0 × 10 3 to 3.0 × 10 4 dyne / cm 2 and the complex elastic modulus is 1.0 × 10 5 dyne / cm 2 or less. This is because a semiconductor device in which a semiconductor element is sealed or filled with a silicone gel having a loss elastic modulus and a complex elastic modulus in such a range, even if it is subjected to a heat cycle, bubbles and cracks in the silicone gel This is because the formation of is suppressed, and the electrical characteristics such as the dielectric breakdown strength are not deteriorated and the reliability is excellent.
[0008]
Examples of the silicone gel composition for forming such a silicone gel include a hydrosilylation reaction-curable silicone comprising an alkenyl group-containing organopolysiloxane, a silicon-bonded hydrogen atom-containing organopolysiloxane, and a hydrosilylation reaction catalyst. A dealcoholization condensation reaction curable silicone gel composition comprising a gel composition, a silanol group- or silicon atom-bonded alkoxy group-containing organopolysiloxane, a silicon atom-bonded alkoxy group-containing silane, and a condensation reaction catalyst, an acrylic functional group-containing organopoly Examples thereof include an ultraviolet curable silicone gel composition containing siloxane as a main component, and since the whole is cured relatively quickly, a hydrosilylation reaction curable silicone gel composition is preferable.
[0009]
The loss elastic modulus and complex elastic modulus at 25 ° C. and a shear frequency of 0.1 Hz of the silicone gel sealing or filling the semiconductor element are, for example, a circular plate shape having a thickness of 5 to 6 mm and a diameter of 20 mm. After adjustment, it is determined by measuring this with a dynamic viscoelasticity measuring device.
[0010]
In the semiconductor device of the present invention, 1/4 consistency defined a semiconductor element on JIS K 2220 of sealing or filling to have the silicone gel Ru der range of 20 to 80. This is because the 1/4 consistency even if subjected to heat cycle and vibration repeating silicone gels such as are within this range, generation of bubbles and cracks in the silicone gel is significantly suppressed .
[0011]
The method for preparing the semiconductor device of the present invention is not limited. For example, after injecting a silicone gel composition into a case in which a semiconductor element is installed, the composition is heated, left at room temperature, or irradiated with ultraviolet rays. In particular, since the whole is cured relatively quickly, it is preferable to use a hydrosilylation reaction-curable composition as the composition and cure by heating. In this case, if the heating temperature is increased, bubbles and cracks tend to be generated in the silicone gel sealing or filling the semiconductor element, so that heating within the range of 50 to 250 ° C. is possible. It is particularly preferable to heat within the range of 70 to 130 ° C.
[0012]
【Example】
The semiconductor device of the present invention will be described in detail with reference to examples. In addition, the characteristic in an Example is the value measured in 25 degreeC, and the characteristic of the silicone gel was measured as follows.
[Loss modulus and complex modulus of silicone gel]
The hydrosilylation reaction-curable silicone gel composition was heated at 125 ° C. for 1 hour to produce a circular plate-shaped silicone gel having a thickness of 5 to 6 mm and a diameter of 20 mm. The loss elastic modulus and complex elastic modulus of this silicone gel at 25 ° C. and shear frequency of 0.1 Hz were measured with a dynamic viscoelasticity measuring device (trade name: Dynamic Analyzer ARES) manufactured by Rheometric.
[1/4 consistency of silicone gel]
A hydrosilylation reaction-curable silicone gel composition was gently poured into a 50 ml glass beaker and then heated at 125 ° C. for 1 hour to prepare a silicone gel. The 1/4 consistency of this silicone gel was measured by the method specified in JIS K 2220.
[0013]
[Examples 1 to 5 and Comparative Examples 1 to 6 ]
The semiconductor device shown in FIG. 1 was prepared using a hydrosilylation reaction-curable silicone gel composition capable of forming silicone gels having various ¼ consistency, loss modulus, and complex modulus. . That is, in this semiconductor device, a semiconductor element (IGBT) 1 is mounted on a
[0014]
A hydrosilylation reaction-curable silicone gel composition was gently poured into the
[0015]
Each of the five semiconductor devices thus prepared was subjected to a heat cycle test in which one cycle was performed at −40 ° C. for 1 hour and 125 ° C. for 1 hour. The appearance of the silicone gel after 500 cycles (presence / absence and extent of bubbles / cracks) and dielectric breakdown strength using the external connection terminals 4 (pressure increase at a rate of 1 kV per second) were measured. These measurement results are shown in Table 1. In addition, each appearance of the silicone gel in the table,
A: No bubble / crack formation,
B: Bubbles / cracks are generated and the size is less than 10 mm.
C: Bubbles / cracks are generated and the size is 10 to 30 mm.
D: Bubbles / cracks are generated and the size is 30 mm or more.
Is shown. The defect rate of the semiconductor device in the table indicates the number of semiconductor devices having a dielectric breakdown strength of 5 KV / mm or less in the five semiconductor devices.
[0016]
[Table 1]
[0017]
【The invention's effect】
The semiconductor device of the present invention has a loss elastic modulus of 1.0 × 10 3 to 1.0 × 10 5 dyne / cm 2 at 25 ° C. and a shear frequency of 0.1 Hz of a silicone gel sealing or filling a semiconductor element. der Ri state, and are double-containing elastic modulus 1.0 × 10 6 dyne / cm 2 or less, and 1/4 consistency 20-80 der as they may be specified in JIS K 2220, receives the heat cycle Even in this case, the formation of bubbles and cracks in the silicone gel is suppressed, and the reliability is excellent.
[Brief description of the drawings]
FIG. 1 is an example of the present invention, and is a cross-sectional view of a semiconductor device used in an example.
FIG. 2 is a cross-sectional view of a semiconductor device in which bubble arrows and cracks are generated in a silicone gel sealing or filling a semiconductor element.
[Explanation of symbols]
1 Semiconductor device (IGBT)
2
Claims (2)
Priority Applications (1)
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JP20868797A JP3822321B2 (en) | 1997-07-17 | 1997-07-17 | Semiconductor device |
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JP20868797A JP3822321B2 (en) | 1997-07-17 | 1997-07-17 | Semiconductor device |
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JP3822321B2 true JP3822321B2 (en) | 2006-09-20 |
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CN106103594B (en) * | 2014-01-27 | 2019-06-28 | 陶氏东丽株式会社 | Silicone gel composition |
JP6537627B2 (en) * | 2015-11-27 | 2019-07-03 | 三菱電機株式会社 | Power semiconductor device |
JP7324036B2 (en) * | 2019-04-17 | 2023-08-09 | アルプスアルパイン株式会社 | Electronics and manufacturing methods |
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