JP3734098B2 - Evaluation method for multilayer ceramic capacitors - Google Patents
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- JP3734098B2 JP3734098B2 JP28033894A JP28033894A JP3734098B2 JP 3734098 B2 JP3734098 B2 JP 3734098B2 JP 28033894 A JP28033894 A JP 28033894A JP 28033894 A JP28033894 A JP 28033894A JP 3734098 B2 JP3734098 B2 JP 3734098B2
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- multilayer ceramic
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Description
【0001】
【産業上の利用分野】
本発明は積層セラミックコンデンサ、特に、ニッケル又はニッケル合金からなる内部電極を有する積層セラミックコンデンサの信頼性の判定方法に関するものである。
【0002】
【従来の技術】
近年、エレクトロニクスの発展に伴い電子機器の小型化が急速に進行し、それに伴い電子部品に対する要求はますます厳しくなり、積層セラミックコンデンサに対する小型・大容量化、低価格化、高信頼性化への要求もますます厳しくなってきている。
【0003】
これらの要求に応えるため、積層セラミックコンデンサにおいても、その誘電体磁器材料の開発、それに応じた積層セラミックコンデンサの製造方法、磁器誘電体層の薄層化、安価な内部電極材料の採用など種々試みられている。
【0004】
例えば、積層セラミックコンデンサは、一般に、チタン酸バリウム(BaTiO3)を主成分とする誘電体材料をシート状に成形してセラミックグリーンシートを形成し、その表面に内部電極材料を塗布して内部電極層を形成した後、複数枚のグリーンシートを積層して熱圧着し、一体化した積層体をチップ化して自然雰囲気中1250〜1350℃の温度で焼成した後、得られた積層コンデンサチップの両端面に内部電極と導通する外部電極を焼き付ける方法により製造されている。この場合、内部電極が誘電体磁器と同時に高温の酸化性雰囲気中で焼成されるため、内部電極材料は(a)誘電体磁器の焼成温度以上の融点を有し、(b)高温の酸化性雰囲気中においても酸化されず、かつ、誘電体と反応しないという条件を満たす必要がある。これらの条件を満たす内部電極材料として、従来、白金、パラジウムあるいは銀−パラジウム合金などの貴金属やそれらの合金が用いられてきたが、これらは、優れた特性を有する反面、高価であり、積層セラミックコンデンサの製造コストに占める電極材料費の割合は、30〜70%にも達し、製造コストを上昇させる最大の原因となっていた。このため、積層セラミックコンデンサの低価格化を図る手段として、貴金属やその合金に代えて、ニッケル、鉄、コバルト、タングステン、マンガン等の安価な卑金属を内部電極材料として用いることが提案される一方、それに対応して還元性雰囲気中で焼成しても半導体化しない非還元性誘電体磁器、例えば、特公昭57−42588号公報に記載の如く、チタン酸バリウム固溶体におけるバリウムサイト(A)とチタンサイト(B)の比(A/B)を化学量論比より大きくした非還元性誘電体磁器が開発され、卑金属を内部電極材料とする積層セラミックコンデンサが実用に供されてきている。
【0005】
他方、積層セラミックコンデンサを小型・大容量化する方法として、誘電率の高い誘電体磁器組成物を採用することは勿論であるが、それに加えて誘電体磁器を薄層化することが提案されている。しかしながら、誘電体層を薄層化した積層セラミックコンデンサでは、直流電界を印加したときに誘電体層にかかる電界強度が大きくなって絶縁抵抗の経時劣化を生じる傾向が強くなり、電子機器に組み込まれた積層セラミックコンデンサにこのような劣化が起こると、機器全体に重大な損傷を与える恐れがある。このため、積層セラミックコンデンサに高温で長時間負荷を加えてその絶縁抵抗の耐経時劣化性を判定する高温負荷試験により積層セラミックコンデンサの信頼性を評価することが行われている。この場合、積層セラミックコンデンサの絶縁抵抗の耐経時劣化性の良否の判定は、通常、製品ロット毎に抜き取り検査によって行われている。これは、高温負荷試験により絶縁破壊に至るまでの時間を測定しようとすると、必然的に積層セラミックコンデンサが破壊されるまで高温負荷試験を続けることになり、検査後の製品が使用不能になるためである。
【0006】
【発明が解決しようとする課題】
しかしながら、卑金属を内部電極材料とする積層セラミックコンデンサは、自然雰囲気で焼成される貴金属を内部電極材料とする積層セラミックコンデンサと比較すると、通常の使用条件下では問題はないが、高温負荷、湿中負荷時には信頼性が低く、より信頼性の高い積層セラミックコンデンサの開発が要望されている。
【0007】
また、前記高温負荷試験では測定に長時間を要するという問題がある他、全数検査ではないため、製品中に不良品が含まれる可能性もある。これを避けるため、製品の全数について高温負荷試験を行い、その初期に劣化した製品のみを除去する方法を用いた場合は、高温負荷により絶縁抵抗が劣化し、良品の寿命をも短くする恐れがある。
【0008】
本発明は、このような問題に鑑みてなされたものであって、高温負荷時に長期にわたって絶縁抵抗が劣化せず、信頼性が高く安価な積層セラミックコンデンサを得て、その破壊やその特性の劣化を来すことなく、その絶縁抵抗の耐経時劣化性を短時間で判定できるようにすることにあるることを主目的とするものである。
【0009】
【0010】
【課題を解決するための手段】
本発明の良否判定方法における積層セラミックコンデンサは、内部電極を介在させて積層された複数の誘電体磁器層からなり、該誘電体磁器層間からその両端面に交互に露出する内部電極と電気的に接続して設けられた外部電極を備えた積層セラミックコンデンサであって、温度100〜150℃、印加直流電界2 . 0〜5.0kV/mmの条件下での容量低下試験前後のキュリー点シフト量と容量変化率の比が0.1以下である性質を持たせるようにしたものである。
【0011】
より詳細に言えば、前記積層セラミックコンデンサは、温度100〜150℃、印加直流電界2 . 0〜5.0kV/mmの条件下での高温負荷による容量低下試験によりキュリー点が低温側にシフトしない性質、又は、前記容量低下試験前後の室温(25℃)における静電容量をC1、C2、キュリー点をT1、T2としたとき、式:
ΔT(℃)=T2−T1、σ(%)=[(C2−C1)/C1]×100
で定義されるキュリー点シフト量ΔTと容量変化率σが−12<ΔT<0、−60<σ<−10の関係を同時に満たす領域内で、0≦ΔT/σ≦0.1となる性質を積層セラミックコンデンサに持たせるようにしたものである。
【0012】
前記積層セラミックコンデンサの性質は、積層セラミックコンデンサの製造過程において、積層コンデンサチップに外部電極を焼き付けた後、自然雰囲気中、800〜900℃の範囲内の温度で熱処理することにより付与することができる。すなわち、誘電体磁器材料を成形してセラミックグリーンシートを形成し、その表面に内部電極材料を塗布して内部電極層を形成した後、複数のグリーンシートを積層して一体化し、チップ化した後、中性若しくは還元性雰囲気などの非酸化性雰囲気中で焼成し、得られたコンデンサチップの両端面にその内部電極と電気的に接続された外部電極を焼き付け、次いで、自然雰囲気中、800〜900℃の範囲内の温度で熱処理することを特徴とするものである。
【0013】
誘電体磁器材料としては、任意のものを使用できるが、安価な積層セラミックコンデンサを得るという観点からは、非還元性誘電体磁器を使用するのが有利である。この非還元性誘電体磁器としては、前記特公昭57−42588号公報に記載のチタン酸バリウム系非還元性誘電体磁器をはじめとして、公知の任意のものを使用できる。この場合、内部電極材料として、ニッケル、鉄、コバルト、タングステン、マンガン等の安価な卑金属を使用できるが、これらの中でも、ニッケル又はニッケル合金を用いるのが好適である。
【0014】
そして、本発明によれば、積層セラミックコンデンサが前記性質を持つか否かをよりその信頼性の良否を判定することができる。従って、本発明は、積層セラミックコンデンサの良否判定方法をも提供するものであって、その方法は、温度100〜150℃、印加直流電界2 . 0〜5 . 0 kV/mm 、印加時間4〜120時間の条件下での容量低下試験前後の室温(25℃)における静電容量をC1、C2、キュリー点をT1、T2としたとき、式 : ΔT ( ℃ ) =T2−T1、σ ( % ) = [( C2−C1 )/ C1 ] ×100で定義されるキュリー点シフト量 ( ΔT ) と容量変化率 ( σ ) の比 ( ΔT / σ ) が、−12<ΔT<0および−60<σ<−10の範囲にて0≦ΔT / σ≦0 . 1を満たす場合、ならびにΔTが負の値でない場合を良品とすることを特徴とする。この場合、キュリー点シフト量が正であれば、キュリー点シフト量(ΔT)と容量変化率(σ)の比(ΔT/σ)は負、即ち、≦0.1となるので、キュリー点が低温側にシフトしなければ、容量低下試験前後のキュリー点シフト量(ΔT)と容量変化率(σ)の比(ΔT/σ)を求める必要はなく、キュリー点のシフト量(ΔT)が負の場合にのみ前記比(ΔT/σ)を求めれば良い。後者の場合、積層セラミックコンデンサは、容量低下試験により0≦ΔT/σ≦0.1となる性質を有するものであれば良い。
【0015】
【作用】
積層セラミックコンデンサに温度100〜150℃、印加直流電界2 . 0〜5.0kV/mmの条件下での容量低下試験前後のキュリー点のシフト量(ΔT)と容量変化率(σ)の比(ΔT/σ)がΔT/σ≦0.1である性質を持たせると、高温負荷時の絶縁抵抗劣化が少なく、寿命が長くなって、信頼性が向上する。
【0016】
また、容量低下は絶縁抵抗劣化試験に比べて穏やかな負荷条件で短時間に観察される現象であるため、積層セラミックコンデンサに容量低下を生じさせる試験、即ち、容量低下試験は、温度100〜150℃、印加直流電界2.0〜5.0kV/mmと絶縁抵抗劣化試験に比べて穏やかな条件で行うことができ、これを積層セラミックコンデンサの良否判断に適用すれば、製品を破壊することなく、短時間でその良否を判定することができる。なお、容量低下試験を前記条件下で行なうようにしたのは、温度が100℃未満又は印加直流電界が2.0kV/mm未満では、容量低下を生じさせるのに長時間を要し検査効率が悪いので望ましくなく、また、温度が150℃超又は直流印加電界が5.0kV/mm超では、負荷条件が厳しすぎて良品の寿命を低下させる恐れがあるからである。
【0017】
【実施例】
原料として純度99.8%以上のBaCO3、CaCO3、TiO2、ZrO2、MnO2及びSiO2を用意し、これらを[(Ba0.9Ca0.1)O]1.01(Ti0.8 Zr 0.2 )O2+0.25重量%MnO2+0.2重量%SiO2の割合となるように配合し、得られた混合物をボールミルで湿式混合により粉砕し、乾燥させた後、空気中、1100℃で2時間仮焼し、次いで、乾式粉砕して粒径1μm以下の仮焼粉末を得た。
【0018】
この仮焼粉末に適量のポリビニルブチラール系バインダ及びエタノール系有機溶剤を加えてボールミルにより湿式混合してセラミックスラリーを調製した。このセラミックスラリーをドクターブレード法によりシート状に成形し、約23μm厚の矩形のグリーンシートを得た。次に、これらのグリーンシート上にニッケルペーストをスクリーン印刷して内部電極パターンを形成し、内部電極パターンの電極引出側が互い違いとなるように複数枚積層熱圧着して一体化し、積層体を得た。
【0019】
この積層体をチップ化した後、窒素雰囲気中350℃に加熱しバインダを燃焼させて除去し、雰囲気を酸素分圧が10-11MPaとなるように制御して1250℃で2時間焼成して積層コンデンサチップを得た。各チップの内部電極が引き出されている両端面にパラジウムを含む銀ペーストを塗布し、窒素雰囲気中600℃で焼き付けて、内部電極と電気的に接続された外部電極を形成した。その後、更に自然雰囲気中850℃で30分熱処理して積層セラミックコンデンサを得た。
【0020】
得られた積層セラミックコンデンサは、外形寸法が幅:1.6mm、長さ:3.2mm、厚さ:1.2mmで、内部電極間の各誘電体磁器層の厚みが15μmであり、有効誘電体磁器層の総数は19、一層当たりの対向電極の面積は2.1mmである。また、そのキュリー点は約0℃である。
【0021】
本発明に係る積層セラミックコンデンサと比較試料について、下記の方法によりキュリー点の容量変化率依存性を測定した。なお、比較試料としては、前記実施例において、外部電極を形成したままのもの、即ち、熱処理を施してないものを用いた。
【0022】
各試料について、周波数1kHz、1Vrmsの高周波電圧を印加して、−50℃〜150℃の範囲で静電容量の温度変化を測定し、室温(25℃)における静電容量(C1)及びキュリー点(T1)を求めた。次に、各試料を恒温槽に入れ、温度100〜150℃、直流印加電界2.0〜5.0kV/mm、時間4〜120時間の範囲内の種々の条件下で、例えば、125℃で3.5kV/mmの直流電圧を4時間印加して容量低下試験を行った後、室温中に取り出し、再び、前記方法下で室温(25℃)における静電容量(C2)及びキュリー点(T2)を求め、次式で定義される容量変化率(σ)及びキュリー点シフト量(ΔT)を求めた。
σ=(C2−C1)/C1 × 100
ΔT=T2−T1
【0023】
得られたキュリー点シフト量(ΔT)と容量変化率(σ)の結果を図1に示す。図中、黒角は本発明の実施例に係る積層セラミックコンデンサについて、また、白丸は外部電極形成後に熱処理を施してない従来例に相当する比較例の積層セラミックコンデンサについての結果を示し、一点鎖線は容量低下試験前後のキュリー点シフト量(ΔT)と容量変化率(σ)の比ΔT/σ=0.1に対応している。
【0024】
図1から解るように、本発明の実施例に係る積層セラミックコンデンサでは、容量低下試験により容量低下を生じさせた場合に、容量低下試験前後のキュリー点のシフト量(ΔT)と容量変化率(σ)の比(ΔT/σ)が一点鎖線よりも上側、即ち、ΔT/σ≦0.1となる性質を有しているが、比較例のものでは容量低下試験前後のキュリー点のシフト量(ΔT)と容量変化率(σ)の比(ΔT/σ)が一点鎖線よりも下側になる性質を有し、明瞭な相違を示している。より具体的には、本発明に係る積層セラミックコンデンサは、容量変化率が−10%より小さな範囲のものではキュリー点が低温側にシフトせず、また、容量変化率とキュリー点シフト量がそれぞれ、−12<ΔT<0、−60<σ<−10の関係を同時に満たすものではいづれも、0≦ΔT/ΔC≦0.1となる性質を有していることが解る。
【0025】
また、図1の結果から明らかなように、積層セラミックコンデンサの良否の判定を行うには、高温負荷による容量低下率は20%程度で十分であり、これに要する高温負荷は、前記負荷条件で4〜20時間であった。
【0026】
次に、本発明に係る前記積層セラミックコンデンサと比較例のものとをそれぞれ10個ずつ試料として用い、各試料に温度175℃で5.0kV/mmの直流電界を印加して絶縁抵抗劣化の加速寿命試験を行い、所定時間毎に絶縁抵抗を測定し、その経時変化を求めた。寿命判断基準としては、絶縁抵抗が初期値より3桁低下した時点を寿命とし、本発明に係る積層セラミックコンデンサと比較例のものについて平均寿命を求めた。比較例の試料では、平均寿命が12.5時間であったのに対し、本発明のものは平均寿命が147時間であった。このことから、本発明に係る積層セラミックコンデンサは、比較例のものに比べて、寿命が著しく向上していることが解る。
【0027】
更に、前記容量低下試験を行った本発明に係る積層セラミックコンデンサの試料について、直流電界を印加しない状態で150〜200℃で20〜40分加熱したところ、容量低下試験での高温負荷により低下した静電容量は、元の状態にまで回復し、絶縁抵抗の低下は全く認められなかった。このことから、本発明によれば、積層セラミックコンデンサを全数検査しても、製品を劣化させることなく、信頼性の良否判定を短時間に行うことができ、しかも、検査後に熱処理を施すだけで、元の特性に回復させることができる。
【0028】
【発明の効果】
以上の説明から明らかなように、本発明の良否判定方法における積層セラミックコンデンサは、従来の絶縁抵抗劣化試験よりもはるかに穏やかな高温負荷の条件で容量低下試験を行った場合に、キュリー点シフト量と容量変化率の比が≦0.1となる性質を持たせることにより、高温負荷時に長期にわたって絶縁抵抗が劣化せず、長寿命で信頼性が高く、安価な積層セラミックコンデンサである。そして、本発明の良否判定方法は、前記積層セラミックコンデンサの絶縁抵抗を劣化させることなく、信頼性の良否判定を短時間に行うことができ、たとえ、良否判定の過程で静電容量が低下しても、簡単な熱処理により静電容量を元の状態にまで回復させることができるなど優れた効果を奏する。
【図面の簡単な説明】
【図1】 本発明及び比較例の積層セラミックコンデンサの特性を示す図である。[0001]
[Industrial application fields]
The present invention is a multilayer ceramic capacitor, more particularly, to a reliability of the determination method of a multilayer ceramic capacitor having internal electrodes made of nickel or a nickel alloy.
[0002]
[Prior art]
In recent years, with the development of electronics, the miniaturization of electronic devices has progressed rapidly, and as a result, the demand for electronic components has become increasingly severe, and the demand for smaller, larger capacity, lower prices, and higher reliability for multilayer ceramic capacitors has been increasing. The demands are getting more and more demanding.
[0003]
To meet these demands, various attempts have been made to develop dielectric ceramic materials for multilayer ceramic capacitors, manufacturing methods for multilayer ceramic capacitors in response thereto, thinning of ceramic dielectric layers, and adoption of inexpensive internal electrode materials. It has been.
[0004]
For example, a multilayer ceramic capacitor is generally formed by forming a dielectric material mainly composed of barium titanate (BaTiO 3 ) into a sheet shape to form a ceramic green sheet, and applying an internal electrode material on the surface to form an internal electrode After the layers are formed, a plurality of green sheets are laminated and thermocompression bonded, the integrated laminate is chipped and fired at a temperature of 1250 to 1350 ° C. in a natural atmosphere, and then both ends of the obtained multilayer capacitor chip. It is manufactured by a method in which an external electrode conducting to the internal electrode is baked on the surface. In this case, since the internal electrode is fired in a high-temperature oxidizing atmosphere simultaneously with the dielectric ceramic, the internal electrode material has (a) a melting point higher than the firing temperature of the dielectric ceramic, and (b) high-temperature oxidizing property. It is necessary to satisfy the condition that it is not oxidized even in the atmosphere and does not react with the dielectric. Conventionally, noble metals such as platinum, palladium and silver-palladium alloys and alloys thereof have been used as internal electrode materials that satisfy these conditions. However, these have excellent characteristics but are expensive and are laminated ceramics. The ratio of the electrode material cost to the manufacturing cost of the capacitor has reached 30 to 70%, which is the largest cause for increasing the manufacturing cost. Therefore, as a means for reducing the cost of the multilayer ceramic capacitor, it is proposed to use an inexpensive base metal such as nickel, iron, cobalt, tungsten, manganese as the internal electrode material instead of the noble metal or its alloy, Correspondingly, a non-reducing dielectric ceramic that does not become a semiconductor when fired in a reducing atmosphere, for example, as described in Japanese Patent Publication No. 57-42588, barium sites (A) and titanium sites in a barium titanate solid solution. Non-reducing dielectric ceramics in which the ratio (A / B) of (B) is larger than the stoichiometric ratio have been developed, and multilayer ceramic capacitors using base metals as internal electrode materials have been put into practical use.
[0005]
On the other hand, as a method for reducing the size and capacity of a multilayer ceramic capacitor, it is a matter of course to employ a dielectric ceramic composition having a high dielectric constant. In addition to that, it has been proposed to make the dielectric ceramic thinner. Yes. However, in a multilayer ceramic capacitor with a thin dielectric layer, the electric field strength applied to the dielectric layer increases when a DC electric field is applied, and the tendency of the insulation resistance to deteriorate over time increases, and is incorporated into electronic devices. If such deterioration occurs in a laminated ceramic capacitor, the entire device may be seriously damaged. For this reason, the reliability of a multilayer ceramic capacitor is evaluated by a high-temperature load test in which a load is applied to the multilayer ceramic capacitor for a long time at a high temperature to determine the deterioration resistance of the insulation resistance over time. In this case, the determination of whether the insulation resistance of the multilayer ceramic capacitor is resistant to deterioration with time is usually performed by sampling inspection for each product lot. This is because if you try to measure the time until dielectric breakdown occurs in the high temperature load test, the high temperature load test will inevitably continue until the multilayer ceramic capacitor is destroyed, and the product after inspection becomes unusable. It is.
[0006]
[Problems to be solved by the invention]
However, a multilayer ceramic capacitor using a base metal as an internal electrode material is not a problem under normal use conditions compared to a multilayer ceramic capacitor using a precious metal fired in a natural atmosphere as an internal electrode material. There is a demand for the development of a more reliable multilayer ceramic capacitor that is less reliable when loaded.
[0007]
In addition, the high temperature load test has a problem that it takes a long time to measure, and since it is not 100% inspection, there is a possibility that a defective product is included in the product. In order to avoid this, if a high temperature load test is performed on all products and only the product that deteriorates at the initial stage is removed, the insulation resistance may deteriorate due to the high temperature load, and the life of good products may be shortened. is there.
[0008]
The present invention has been made in view of such a problem, and the insulation resistance does not deteriorate for a long time under a high temperature load, and a highly reliable and inexpensive multilayer ceramic capacitor is obtained. The main purpose is to make it possible to determine the deterioration resistance of the insulation resistance over time without causing any problems.
[0009]
[0010]
[Means for Solving the Problems]
The multilayer ceramic capacitor in the quality determination method of the present invention is composed of a plurality of dielectric ceramic layers laminated with an internal electrode interposed therebetween, and is electrically connected to the internal electrodes exposed alternately from both sides of the dielectric ceramic layer. a multilayer ceramic capacitor having an external electrode arranged in connection with a temperature of 100 to 150 ° C., applying a DC electric field 2. 0 ~5.0kV / Curie point shift before and after the capacity reduction test under the conditions of mm And the capacity change rate ratio is 0.1 or less.
[0011]
More particularly, the laminated ceramic capacitor, the Curie point by capacity reduction test by high-temperature load under conditions of temperature 100 to 150 ° C., applying a DC electric field 2. 0 ~5.0kV / mm is not shifted to the low temperature side When the properties or capacitance at room temperature (25 ° C.) before and after the capacity reduction test are C1, C2, and Curie points are T1, T2, the formula:
ΔT (° C.) = T2−T1, σ (%) = [(C2−C1) / C1] × 100
The property of 0 ≦ ΔT / σ ≦ 0.1 in the region where the Curie point shift amount ΔT and the capacity change rate σ defined by the equation satisfy the relationship of −12 <ΔT <0 and −60 <σ <−10 at the same time. Is provided in a multilayer ceramic capacitor.
[0012]
The properties of the multilayer ceramic capacitor can be imparted by baking an external electrode on the multilayer capacitor chip in the manufacturing process of the multilayer ceramic capacitor and then performing a heat treatment at a temperature in the range of 800 to 900 ° C. in a natural atmosphere. . That is , after forming a ceramic green sheet by forming a dielectric ceramic material and applying an internal electrode material on the surface to form an internal electrode layer, a plurality of green sheets are laminated and integrated into a chip. Baked in a non-oxidizing atmosphere such as a neutral or reducing atmosphere, and baked external electrodes electrically connected to the internal electrodes on both end faces of the obtained capacitor chip. The heat treatment is performed at a temperature within the range of 900 ° C.
[0013]
Any material can be used as the dielectric ceramic material, but it is advantageous to use a non-reducing dielectric ceramic from the viewpoint of obtaining an inexpensive multilayer ceramic capacitor. As this non-reducing dielectric ceramic, any known one can be used, including the barium titanate non-reducing dielectric ceramic described in Japanese Patent Publication No. 57-42588. In this case, an inexpensive base metal such as nickel, iron, cobalt, tungsten, or manganese can be used as the internal electrode material. Among these, nickel or a nickel alloy is preferably used.
[0014]
Then, according to the present invention can be laminated ceramic capacitor is determined more that reliable quality whether having said properties. Accordingly, the present invention is intended to provide even quality determination method of a multilayer ceramic capacitor, the method, the temperature 100 to 150 ° C., applying a DC electric field 2. 0~5. 0 kV / mm , application time 4 When the capacitance at room temperature (25 ° C.) before and after the capacity reduction test under the condition of 120 hours is C1, C2, and the Curie points are T1, T2, the formula : ΔT ( ° C. ) = T2-T1, σ ( % ) = [( C2-C1 ) / C1 ] × 100 The ratio ( ΔT / σ ) of the Curie point shift amount ( ΔT ) and the capacity change rate ( σ ) defined by −12 <ΔT <0 and −60 < sigma when satisfying 0 ≦ ΔT / σ ≦ 0. 1 in the range of <-10, and characterized by a good case [Delta] T is not a negative value. In this case, if the Curie point shift amount is positive, the ratio (ΔT / σ) of the Curie point shift amount (ΔT) and the capacity change rate (σ) is negative, that is, ≦ 0.1. If it does not shift to the low temperature side, it is not necessary to obtain the ratio (ΔT / σ) of the Curie point shift amount (ΔT) and the capacity change rate (σ) before and after the capacity decrease test, and the Curie point shift amount (ΔT) is negative. In this case, the ratio (ΔT / σ) may be obtained only. In the latter case, the multilayer ceramic capacitor only needs to have a property of 0 ≦ ΔT / σ ≦ 0.1 by the capacity reduction test.
[0015]
[Action]
The ratio of the temperature 100 to 150 ° C. in the multilayer ceramic capacitor, the applied DC electric field 2. 0 ~5.0kV / shift amount of the Curie point of before and after the capacity reduction test under the conditions of mm ([Delta] T) and capacitance change rate (sigma) ( When the property that ΔT / σ) is ΔT / σ ≦ 0.1, the insulation resistance is less deteriorated at a high temperature load, the life is extended, and the reliability is improved.
[0016]
Further, since the capacity drop is a phenomenon observed in a short time under a mild load condition as compared with the insulation resistance deterioration test, the test for causing the capacity drop in the multilayer ceramic capacitor, that is, the capacity drop test is performed at a temperature of 100 to 150. ℃, applied DC electric field of 2.0 to 5.0 kV / mm, which can be performed under milder conditions than the insulation resistance degradation test, and if this is applied to pass / fail judgment of multilayer ceramic capacitors, the product is not destroyed. The quality can be determined in a short time. Note that the capacity reduction test was performed under the above conditions when the temperature was less than 100 ° C. or the applied DC electric field was less than 2.0 kV / mm. It is not desirable because it is bad, and if the temperature exceeds 150 ° C. or the DC applied electric field exceeds 5.0 kV / mm, the load condition is too severe and the life of a good product may be reduced.
[0017]
【Example】
BaCO 3 , CaCO 3 , TiO 2 , ZrO 2 , MnO 2 and SiO 2 with a purity of 99.8% or more are prepared as raw materials, and these are [(Ba 0.9 Ca 0.1 ) O] 1.01 (Ti 0.8 Zr 0.2 ) O 2. Formulated to a ratio of +0.25 wt% MnO 2 +0.2 wt% SiO 2 , the resulting mixture was pulverized by wet mixing in a ball mill, dried, and then calcined in air at 1100 ° C. for 2 hours Subsequently, dry pulverization was performed to obtain a calcined powder having a particle size of 1 μm or less.
[0018]
An appropriate amount of a polyvinyl butyral binder and an ethanol organic solvent were added to the calcined powder and wet mixed by a ball mill to prepare a ceramic slurry. This ceramic slurry was formed into a sheet by a doctor blade method to obtain a rectangular green sheet having a thickness of about 23 μm. Next, nickel paste was screen-printed on these green sheets to form internal electrode patterns, and a plurality of layers were stacked and thermocompression bonded so that the electrode lead-out sides of the internal electrode patterns were alternated to obtain a laminate. .
[0019]
After this laminated body was made into chips, it was heated to 350 ° C. in a nitrogen atmosphere to burn and remove the binder, and the atmosphere was controlled so that the oxygen partial pressure was 10 −11 MPa and fired at 1250 ° C. for 2 hours. A multilayer capacitor chip was obtained. A silver paste containing palladium was applied to both end faces from which the internal electrodes of each chip were drawn, and baked at 600 ° C. in a nitrogen atmosphere to form external electrodes electrically connected to the internal electrodes. Thereafter, it was further heat-treated at 850 ° C. for 30 minutes in a natural atmosphere to obtain a multilayer ceramic capacitor.
[0020]
The obtained multilayer ceramic capacitor has outer dimensions of width: 1.6 mm, length: 3.2 mm, thickness: 1.2 mm, and the thickness of each dielectric ceramic layer between internal electrodes is 15 μm. Is 19 and the area of the counter electrode per layer is 2.1 mm. Its Curie point is about 0 ° C.
[0021]
For the multilayer ceramic capacitor according to the present invention and the comparative sample, the capacitance change rate dependency of the Curie point was measured by the following method. In addition, as a comparative sample, the sample in which the external electrode was formed in the above-described example, that is, the sample that was not heat-treated was used.
[0022]
For each sample, a high frequency voltage of 1 kHz and 1 Vrms was applied, and the temperature change of the capacitance was measured in the range of −50 ° C. to 150 ° C., and the capacitance (C1) and Curie point at room temperature (25 ° C.). (T1) was determined. Next, each sample is put into a thermostat, and the temperature is 100 to 150 ° C., the direct current applied electric field is 2.0 to 5.0 kV / mm, and the time is 4 to 120 hours. After conducting a capacity reduction test by applying a DC voltage of 3.5 kV / mm for 4 hours, the battery was taken out to room temperature and again subjected to the capacitance (C2) and Curie point (T2) at room temperature (25 ° C.) under the above method. ) And the capacity change rate (σ) and Curie point shift amount (ΔT) defined by the following equations were obtained.
σ = (C2−C1) / C1 × 100
ΔT = T2-T1
[0023]
The results of the obtained Curie point shift amount (ΔT) and the capacity change rate (σ) are shown in FIG. In the figure, the black squares indicate the results for the multilayer ceramic capacitor according to the example of the present invention, and the white circles indicate the results for the multilayer ceramic capacitor of the comparative example corresponding to the conventional example in which heat treatment is not performed after forming the external electrode. Corresponds to the ratio ΔT / σ = 0.1 of the Curie point shift amount (ΔT) and the capacity change rate (σ) before and after the capacity decrease test.
[0024]
As can be seen from FIG. 1, in the multilayer ceramic capacitor according to the example of the present invention, when the capacity reduction is caused by the capacity reduction test, the Curie point shift amount before and after the capacity reduction test (ΔT) and the capacity change rate ( The ratio (ΔT / σ) of σ) is higher than the one-dot chain line, that is, ΔT / σ ≦ 0.1. In the comparative example, the amount of shift of the Curie point before and after the capacity reduction test The ratio (ΔT / σ) of (ΔT) and the rate of change in capacity (σ) is lower than the one-dot chain line, showing a clear difference. More specifically, in the multilayer ceramic capacitor according to the present invention, the Curie point does not shift to a low temperature side when the capacitance change rate is less than −10%, and the capacitance change rate and the Curie point shift amount are respectively -12 <ΔT <0 and -60 <σ <−10, all satisfy the relationship of 0 ≦ ΔT / ΔC ≦ 0.1.
[0025]
Further, as is apparent from the results of FIG. 1, a capacity reduction rate of about 20% is sufficient for determining the quality of the multilayer ceramic capacitor, and the high temperature load required for this is the above load condition. 4 to 20 hours.
[0026]
Next, 10 samples each of the multilayer ceramic capacitor according to the present invention and the comparative example are used as samples, and a DC electric field of 5.0 kV / mm is applied to each sample at a temperature of 175 ° C. to accelerate the deterioration of insulation resistance. A life test was performed, and the insulation resistance was measured every predetermined time, and the change with time was obtained. As the life criterion, the time when the insulation resistance decreased by three digits from the initial value was regarded as the life, and the average life was obtained for the multilayer ceramic capacitor according to the present invention and the comparative example. The sample of the comparative example had an average life of 12.5 hours, whereas the sample of the present invention had an average life of 147 hours. From this, it can be seen that the multilayer ceramic capacitor according to the present invention has a significantly improved life compared to the comparative example.
[0027]
Furthermore, when the sample of the multilayer ceramic capacitor according to the present invention subjected to the capacity reduction test was heated at 150 to 200 ° C. for 20 to 40 minutes without applying a DC electric field, it decreased due to a high temperature load in the capacity reduction test. The capacitance recovered to the original state, and no decrease in insulation resistance was observed. Therefore, according to the present invention, even if all the multilayer ceramic capacitors are inspected, it is possible to make a good / bad determination of reliability in a short time without deteriorating the product, and only by performing a heat treatment after the inspection. , Can be restored to its original characteristics.
[0028]
【The invention's effect】
As is clear from the above description, the multilayer ceramic capacitor in the pass / fail judgment method of the present invention has a Curie point shift when a capacity reduction test is performed under a condition of a much higher temperature load than the conventional insulation resistance deterioration test. By giving the property that the ratio between the amount and the capacity change rate is ≦ 0.1, the insulation resistance does not deteriorate for a long time under a high-temperature load, and the multilayer ceramic capacitor is long-lived, highly reliable, and inexpensive . In the quality determination method of the present invention , the reliability quality can be determined in a short time without degrading the insulation resistance of the multilayer ceramic capacitor . For example, the capacitance decreases in the quality determination process. However, there are excellent effects such that the electrostatic capacity can be restored to the original state by a simple heat treatment.
[Brief description of the drawings]
FIG. 1 is a graph showing characteristics of multilayer ceramic capacitors according to the present invention and comparative examples.
Claims (1)
前記積層セラミックコンデンサにおいて、温度100〜150℃、印加直流電界2In the multilayer ceramic capacitor, a temperature of 100 to 150 ° C., an applied DC electric field 2 .. 0〜50-5 .. 00 kV/mmkV / mm 、印加時間4〜120時間の条件下での容量低下試験前後の室温(25℃)における静電容量をC1、C2、キュリー点をT1、T2としたとき、式When the electrostatic capacity at room temperature (25 ° C.) before and after the capacity reduction test under the condition of application time of 4 to 120 hours is C1, C2, and Curie points are T1, T2, : : ΔTΔT (( ℃℃ )) =T2−T1、σ= T2-T1, σ (( %% )) == [([( C2−C1C2-C1 )/) / C1C1 ]] ×100で定義されるキュリー点シフト量Curie point shift amount defined by × 100 (( ΔTΔT )) と容量変化率And capacity change rate (( σσ )) の比Ratio of (( ΔTΔT // σσ )) が、−12<ΔT<0および−60<σ<−10の範囲にて0≦ΔTIn the range of −12 <ΔT <0 and −60 <σ <−10, 0 ≦ ΔT // σ≦0σ ≦ 0 .. 1を満たす場合、ならびにΔTが負の値でない場合を良品とすることを特徴とする、積層セラミックコンデンサの良否判定方法。1. A method for determining the quality of a multilayer ceramic capacitor, wherein 1 is satisfied, and ΔT is not a negative value.
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JP28033894A JP3734098B2 (en) | 1994-11-15 | 1994-11-15 | Evaluation method for multilayer ceramic capacitors |
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JP28033894A JP3734098B2 (en) | 1994-11-15 | 1994-11-15 | Evaluation method for multilayer ceramic capacitors |
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JP3734098B2 true JP3734098B2 (en) | 2006-01-11 |
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