JP3526220B2 - Semiconductor manufacturing equipment - Google Patents
Semiconductor manufacturing equipmentInfo
- Publication number
- JP3526220B2 JP3526220B2 JP23440898A JP23440898A JP3526220B2 JP 3526220 B2 JP3526220 B2 JP 3526220B2 JP 23440898 A JP23440898 A JP 23440898A JP 23440898 A JP23440898 A JP 23440898A JP 3526220 B2 JP3526220 B2 JP 3526220B2
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- wafer support
- temperature
- inlet
- heat exchanger
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
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- ing And Chemical Polishing (AREA)
- Drying Of Semiconductors (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】この発明は、半導体製造装置
に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus.
【０００２】[0002]
【従来の技術】近年、半導体装置の微細化が進み、半導
体基板上に形成されるパターンの寸法や間隔も微細化す
ることが求められている。それに伴い、パターン加工寸
法のばらつきも低減させることが求められている。加工
寸法のばらつきの一因としてウエハ面内での加工ばらつ
きがあげられる。一方、ウエハの大口径化が進み、ウエ
ハ面内でのばらつきの少ないパターンを形成することが
困難となってきている。以下、従来の技術による半導体
製造装置ついて、図面を参照しながら説明する。2. Description of the Related Art In recent years, miniaturization of semiconductor devices has progressed, and it has been required to miniaturize the dimensions and intervals of patterns formed on a semiconductor substrate. Along with this, it is required to reduce variations in pattern processing dimensions. One of the causes of variations in processing dimensions is processing variations within the wafer surface. On the other hand, as the diameter of the wafer becomes larger, it is becoming difficult to form a pattern with less variation in the wafer surface. A conventional semiconductor manufacturing apparatus will be described below with reference to the drawings.
【０００３】図６は、従来の技術における半導体製造装
置の断面図を示す。図６において、１は真空容器、２は
真空容器１内に設置されたウエハ支持台、３はウエハ支
持台２上に設置され、あらかじめマスクパターンが加工
された被加工ウエハ、４は熱交換器、５はウエハ支持台
２と熱交換器４を接続し、冷媒を流すための配管であ
る。FIG. 6 shows a cross-sectional view of a conventional semiconductor manufacturing apparatus. In FIG. 6, reference numeral 1 is a vacuum container, 2 is a wafer support table installed in the vacuum container 1, 3 is a wafer to be processed on which a mask pattern is processed in advance, and 4 is a heat exchanger. Reference numeral 5 is a pipe for connecting the wafer support 2 and the heat exchanger 4 and for flowing a refrigerant.
【０００４】図７は図６において示した半導体製造装置
の平面図を示し、６はウエハ支持台２と配管５を接続す
る入口であり、７はウエハ支持台２と配管５を接続する
出口である。真空容器１内にエッチングで用いるガスと
プラズマを発生させるための電力を外部から供給するこ
とにより、被加工ウエハ３上にあらかじめ加工されたマ
スクパターンをマスクとしてパターンが加工される。熱
交換器４はウエハ支持台２の温度を調節するためのもの
であり、熱交換器４から流出された冷媒は、配管５、入
口６、ウエハ支持台２、出口７、配管５を経由して熱交
換器４へ戻る。この冷媒の循環によりウエハ支持台２の
温度を調節している。ウエハ支持台２と被加工ウエハ３
は密着しており、熱的に伝導している。被加工ウエハ３
はエッチング処理中にプラズマにさらされることによ
り、温度が上昇する。このウエハ温度上昇を制御し、エ
ッチング処理中に所望のウエハ温度が実現できるように
ウエハ支持台２の温度を調整するため、冷媒の温度を熱
交換器４により設定する。FIG. 7 is a plan view of the semiconductor manufacturing apparatus shown in FIG. 6, 6 is an inlet connecting the wafer support 2 and the pipe 5, and 7 is an outlet connecting the wafer support 2 and the pipe 5. is there. By supplying the gas used for etching and the electric power for generating plasma into the vacuum container 1 from the outside, the pattern is processed using the mask pattern previously processed on the wafer 3 to be processed as a mask. The heat exchanger 4 is for adjusting the temperature of the wafer support base 2, and the refrigerant flowing out from the heat exchanger 4 passes through the pipe 5, the inlet 6, the wafer support base 2, the outlet 7, and the pipe 5. Return to heat exchanger 4. The temperature of the wafer support base 2 is adjusted by the circulation of the coolant. Wafer support 2 and processed wafer 3
Are in close contact and are thermally conductive. Processed wafer 3
Is exposed to plasma during the etching process, causing the temperature to rise. The temperature of the coolant is set by the heat exchanger 4 in order to control the temperature rise of the wafer and adjust the temperature of the wafer support 2 so that a desired wafer temperature can be realized during the etching process.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、上記従
来の構成では、エッチング処理中に入口６からウエハ支
持台２内へ入った冷媒は被加工ウエハ３の温度上昇に伴
い、ウエハ支持台２を通して加熱され、出口７から出
る。その結果、ウエハ支持台２は出口６付近から出口７
付近へ向けて温度勾配が発生し、被加工ウエハ３にも同
様な温度勾配が発生する。However, in the above-mentioned conventional structure, the coolant entering the wafer support base 2 through the inlet 6 during the etching process is heated through the wafer support base 2 as the temperature of the wafer 3 to be processed rises. And exit through exit 7. As a result, the wafer support base 2 moves from the vicinity of the outlet 6 to the outlet 7
A temperature gradient is generated toward the vicinity, and a similar temperature gradient is also generated in the processed wafer 3.
【０００６】また、エッチングを行うために発生させた
プラズマはウエハ支持台２および被加工ウエハ３に対し
て中心の温度が最も高い分布を有する同心円上の温度勾
配を発生させてしまうことがある。これらのウエハ支持
台２の温度勾配がエッチング処理中の被加工ウエハに温
度勾配を与え、パターン加工寸法のウエハ面内ばらつき
を発生させるという欠点がある。Further, the plasma generated for etching may generate a concentric temperature gradient in which the center temperature of the wafer support 2 and the wafer 3 to be processed has the highest distribution. These temperature gradients of the wafer support base 2 give a temperature gradient to the wafer to be processed during the etching process, which causes the in-plane variation of the pattern processing dimension to occur.
【０００７】この発明の目的は、上記課題について鑑
み、パターン加工寸法のウエハ面内ばらつきを低減させ
る半導体製造装置を提供するものである。In view of the above problems, an object of the present invention is to provide a semiconductor manufacturing apparatus that reduces variations in pattern processing dimensions within a wafer.
【０００８】[0008]
【課題を解決するための手段】請求項１記載の半導体製
造装置は、一側に第１の入口を設け他側に第１の出口を
設けた第１の冷媒用通路を内部に形成し、前記第１の出
口の近傍に第２の入口を設け、前記第１の入口の近傍に
第２の出口を設けた第２の冷媒用通路を内部に形成した
ウエハ支持台と、第１の冷媒が循環するように前記第１
の入口および前記第１の出口に、第１の配管を介して連
結された第１の熱交換器と、第２の冷媒が循環するよう
に前記第２の入口および前記第２の出口に、第２の配管
を介して連結された第２の熱交換器とを備え、前記第１
の入口と前記第１の出口は、前記ウエハ支持台の面内の
第１の対称線をはさんで対向する位置に配置され、前記
第２の入口と前記第２の出口は、前記ウエハ支持台の面
内の前記第１の対称線をはさんで対向する位置に配置さ
れ、前記第１の冷媒用通路と前記第２の冷媒用通路は、
同心円状に配置された互いに独立した冷媒用通路であっ
て、前記第２の冷媒用通路は、前記第１の冷媒用通路の
外側に配置され、前記第１の冷媒用通路の長さと前記第
２の冷媒用通路の長さは、前記第１の入口と前記第１の
出口を結ぶ線、あるいは、前記第２の入口と前記第２の
出口を結ぶ線と平行な前記ウエハ支持台の面内の第２の
対称軸の両側において同一であり、前記第１の熱交換器
の設定温度は、前記第２の熱交換器の設定温度と異なる
温度に設定されていることを特徴するものである。According to another aspect of the present invention, there is provided a semiconductor manufacturing apparatus in which a first refrigerant passage having a first inlet on one side and a first outlet on the other side is formed inside, wherein the second inlet is provided in the vicinity of the first outlet, said a wafer support base a second coolant passage formed within which is provided a second outlet in the vicinity of the first inlet, the first refrigerant The first so that
To the inlet and the first outlet of the first heat exchanger connected via a first pipe, and to the second inlet and the second outlet so that the second refrigerant circulates, and a second heat exchanger which is connected via a second pipe, said first
And the first outlet are in the plane of the wafer support.
The first symmetry line is placed opposite to each other, and
The second inlet and the second outlet are on the surface of the wafer support table.
Are placed in opposite positions across the first line of symmetry
And the first refrigerant passage and the second refrigerant passage are
These are refrigerant passages that are concentrically arranged and are independent of each other.
And the second refrigerant passage corresponds to the first refrigerant passage.
The length of the first coolant passage and the length of the first coolant passage are arranged outside.
The length of the second refrigerant passage is the same as that of the first inlet and the first inlet.
A line connecting the outlets, or the second inlet and the second
The second in-plane of the wafer support, which is parallel to the line connecting the outlets,
The first heat exchanger being identical on both sides of the axis of symmetry,
Set temperature is different from the set temperature of the second heat exchanger
It is characterized in that the temperature is set .
【０００９】請求項１記載の半導体製造装置によれば、
ウエハ支持台の側部の第１の入口と第２の出口を互いに
近傍に配置し、また第１の出口と第２の入口を互いに近
傍に設置することによって、お互いの冷媒の温度差を相
殺することができ、ウエハ支持台の面内の温度分布を均
一に制御することができるので、パターン加工寸法のウ
エハ面内ばらつきを低減することができる。また一方の
冷媒がウエハ支持台の中心付近を通り、他方の冷媒がウ
エハ支持台の周辺付近を通るように構成された二系統の
冷却機構を備え、それらの冷媒温度を独立に制御するこ
とによって、エッチング処理時に生じる被加工ウエハの
面内温度差を低減することができ、パターン加工寸法の
ウエハ面内ばらつきを低減することができる。 According to the semiconductor manufacturing apparatus of the first aspect,
By arranging the first inlet and the second outlet on the side of the wafer support table in the vicinity of each other and by arranging the first outlet and the second inlet in the vicinity of each other, the temperature difference between the refrigerants is offset. Since it is possible to uniformly control the temperature distribution within the surface of the wafer support, it is possible to reduce the variation within the wafer in the pattern processing dimension. One side
The coolant passes near the center of the wafer support, and the other coolant
A dual system configured to run near the periphery of the roof support
Equipped with a cooling mechanism to control the temperature of these refrigerants independently.
By the,
It is possible to reduce the in-plane temperature difference, and
It is possible to reduce variations within the wafer surface.
【００１０】[0010]
【００１１】[0011]
【００１２】[0012]
【００１３】請求項２記載の半導体製造装置は、請求項
１において、第１の熱交換器の設定温度が第２の熱交換
器の設定温度よりも低く設定されているものである。[0013] The semiconductor manufacturing device according to claim 2 wherein the claim
In No. 1, the set temperature of the first heat exchanger is set lower than the set temperature of the second heat exchanger.
【００１４】請求項２記載の半導体製造装置によれば、
請求項１と同様な効果のほか、ウエハ支持台の中心付近
の設定温度が周辺付近の設定温度よりも低く設定されて
いるので、より一層ウエハ支持台の温度の均一性を図る
ことができる。According to the semiconductor manufacturing apparatus of the second aspect ,
In addition to the same effect as the first aspect , the temperature set in the vicinity of the center of the wafer support is set lower than the set temperature in the vicinity of the periphery, so that the temperature uniformity of the wafer support can be further improved.
【００１５】[0015]
【発明の実施の形態】この発明の半導体製造装置におけ
る第１の実施の形態について、図面を参照しながら説明
する。図１は、この発明の第１の実施の形態の半導体製
造装置における平面図を示す。図１において、１１は真
空容器、１２は真空容器１１内に設置され内部に第１の
冷媒用通路（図示せず）および第２の冷媒用通路（図示
せず）を形成したウエハ支持台、１３は第１の熱交換
器、１４はウエハ支持台１２と第１の熱交換器１３を接
続し、冷媒を流すための第１の配管、１５はウエハ支持
台１２と第１の配管１４を接続する第１の入口、１６は
ウエハ支持台１２と第１の配管１４を接続する第１の出
口、１７は第２の熱交換器、１８はウエハ支持台１２と
第２の熱交換器１７を接続する第２の配管、１９はウエ
ハ支持台１２と第２の配管１８を接続し、第１の出口１
６の近傍に設置された第２の入口、２０はウエハ支持台
１２と第２の配管１８を接続し、第１の入口１５の近傍
に設置された第２の出口である。BEST MODE FOR CARRYING OUT THE INVENTION A first embodiment of a semiconductor manufacturing apparatus of the present invention will be described with reference to the drawings. FIG. 1 shows a plan view of a semiconductor manufacturing apparatus according to a first embodiment of the present invention. In FIG. 1, 11 is a vacuum container, 12 is a wafer support that is installed in the vacuum container 11 and has a first coolant passage (not shown) and a second coolant passage (not shown) formed therein. Reference numeral 13 is a first heat exchanger, 14 is a first pipe for connecting the wafer support 12 and the first heat exchanger 13 and flowing a refrigerant, and 15 is a wafer support 12 and the first pipe 14. A first inlet for connection, 16 is a first outlet for connecting the wafer support 12 and the first pipe 14, 17 is a second heat exchanger, 18 is a wafer support 12 and a second heat exchanger 17. Is connected to the wafer support base 12 and the second pipe 18, and the first outlet 1
A second inlet 20 is installed in the vicinity of 6, and a second outlet 20 is installed in the vicinity of the first inlet 15 for connecting the wafer support 12 and the second pipe 18.
【００１６】エッチング処理を実施する際には、ウエハ
支持台１２の上に被加工ウエハを設置し、真空容器１１
内にエッチングで用いるガスとプラズマを発生させるた
めの電力を外部から供給する。そして、被加工ウエハ上
にあらかじめ加工されたマスクパターンをマスクとして
パターンが加工される。第１の熱交換器１３および第２
の熱交換器１７はウエハ支持台１２の温度を調節するた
めのものであり、第１の熱交換器１３から流出された冷
媒は、第１の配管１４、第１の入口１５、ウエハ支持台
１２の第１の冷媒用通路、第１の出口１６、第１の配管
１４を経由して第１の熱交換器１３へ戻る。他方、第２
の熱交換器１７から流出された冷媒は、第２の配管１
８、第２の入口１９、ウエハ支持台１２の第２の冷媒用
通路、第２の出口２０、第２の配管１８を経由して第２
の熱交換器１７へ戻る。これらの冷媒の循環系は互いに
独立しており、ウエハ支持台１２内でも第１の冷媒用通
路と第２の冷媒用通路に分離されている。また、これら
の冷媒の循環系のコンダクタンスも同一であることが望
ましい。ウエハ支持台１２と被加工ウエハは密着してお
り、熱的に伝導している。被加工ウエハはエッチング処
理中にプラズマにさらされることにより、温度が上昇し
ていく。このウエハ温度上昇を制御し、エッチング処理
中に所望のウエハ温度が実現できるようにウエハ支持台
１２の温度を調節するため、冷媒の温度を第１の熱交換
器１３および第２の熱交換器１７にて設定する。第１の
熱交換器１３と第２の熱交換器１７の冷媒に対する温度
制御性能が同一であれば設定温度は同一にする。エッチ
ング処理中にウエハ支持台１２内へ入った冷媒は被加工
ウエハの温度上昇に伴い、ウエハ支持台１２を通して加
熱される。第１の熱交換器１３から流出された冷媒は第
１の入口１５付近から第１の出口１６付近へ向けて温度
勾配が発生する。第２の熱交換器１７から流出された冷
媒は第２の入口１９付近から第２の出口２０付近へ向け
て温度勾配が発生する。しかし、この発明の第１の実施
の形態の半導体装置の構造上、第１の入口１５と第２の
出口２０が近傍に設置されているため、互いの冷媒の温
度差が相殺され、第１の入口１５および第２の出口２０
付近のウエハ支持台１２の温度は中間的な温度で熱的平
衡状態となる。同様に第１の出口１６と第２の入口１９
が近傍に設置されているため、互いの冷媒の温度差が相
殺され、第１の出口１６および第２の入口１９付近のウ
エハ支持台１２の温度は中間の温度で熱的平衡状態とな
る。その結果、ウエハ支持台１２の全面において均一な
温度が実現できる。When carrying out the etching process, the wafer to be processed is placed on the wafer support 12 and the vacuum container 11 is placed.
Electric power for generating plasma and gas used for etching is supplied from the outside. Then, the pattern is processed on the wafer to be processed using the mask pattern previously processed as a mask. First heat exchanger 13 and second
The heat exchanger 17 is for adjusting the temperature of the wafer support 12, and the refrigerant discharged from the first heat exchanger 13 is the first pipe 14, the first inlet 15, and the wafer support. Returning to the first heat exchanger 13 via the first refrigerant passage 12, the first outlet 16 and the first pipe 14. On the other hand, the second
The refrigerant flowing out of the heat exchanger 17 of the second pipe 1
8, the second inlet 19, the second coolant passage of the wafer support 12, the second outlet 20, and the second pipe 18 to the second
Return to the heat exchanger 17 of. The circulation systems of these refrigerants are independent of each other, and even in the wafer support 12, the first refrigerant passage is used.
And a second refrigerant passage . Further, it is desirable that the conductances of the circulation systems of these refrigerants are also the same. The wafer support 12 and the wafer to be processed are in close contact with each other and are thermally conductive. The temperature of the processed wafer increases as it is exposed to plasma during the etching process. In order to control the temperature rise of the wafer and adjust the temperature of the wafer support 12 so that the desired wafer temperature can be achieved during the etching process, the temperature of the coolant is adjusted to the first heat exchanger 13 and the second heat exchanger. Set at 17. If the temperature control performances for the refrigerant of the first heat exchanger 13 and the second heat exchanger 17 are the same, the set temperatures are the same. The coolant that has entered the wafer support 12 during the etching process is heated through the wafer support 12 as the temperature of the wafer to be processed rises. A temperature gradient is generated in the refrigerant flowing out of the first heat exchanger 13 from the vicinity of the first inlet 15 toward the vicinity of the first outlet 16. The refrigerant flowing out from the second heat exchanger 17 has a temperature gradient from the vicinity of the second inlet 19 toward the vicinity of the second outlet 20. However, because of the structure of the semiconductor device of the first embodiment of the present invention, the first inlet 15 and the second outlet 20 are installed in the vicinity, so that the temperature difference between the refrigerants is offset, and the first inlet 15 and the second outlet 20 are offset. Inlet 15 and second outlet 20
The temperature of the wafer support 12 in the vicinity is in an intermediate temperature and is in thermal equilibrium. Similarly, the first outlet 16 and the second inlet 19
Are installed close to each other, the temperature difference between the refrigerants is canceled out, and the temperature of the wafer support table 12 near the first outlet 16 and the second inlet 19 is in a thermal equilibrium state at an intermediate temperature. As a result, a uniform temperature can be realized on the entire surface of the wafer support 12.
【００１７】以上のように、二系統の冷却機構を逆並列
に配置し、ウエハ支持台１２への互いの入口と出口を近
傍に設置することで、プラズマにさらされている間のウ
エハ支持台１２の温度勾配を抑制することができ、被加
工ウエハの温度も面内で均一にすることができる。そし
て、ウエハ面内の温度分布が均一になれば、パターン加
工寸法のばらつきを低減した加工が実現できる。As described above, the cooling systems of the two systems are arranged in antiparallel and the mutual inlets and outlets of the wafer support 12 are installed in the vicinity, so that the wafer support can be exposed to the plasma. The temperature gradient of 12 can be suppressed, and the temperature of the wafer to be processed can be made uniform in the plane. Then, if the temperature distribution in the wafer surface becomes uniform, it is possible to realize processing with reduced variations in pattern processing dimensions.
【００１８】具体的な一例としてアルミニウム合金のパ
ターンを加工する場合を示す。アルミニウム合金のパタ
ーン形成をドライエッチングにより実施する場合、ウエ
ハ支持台１２の設定温度とパターン加工寸法の関係は非
常に敏感である。図２にウエハ支持台１２の設定温度と
パターン加工寸法の関係を示す。図２より、ウエハ支持
台１２の設定温度を故意に変化させるとパターン加工寸
法が変化することがわかる。As a concrete example, a case of processing a pattern of an aluminum alloy will be shown. When the pattern formation of the aluminum alloy is performed by dry etching, the relationship between the set temperature of the wafer support 12 and the pattern processing dimension is very sensitive. FIG. 2 shows the relationship between the set temperature of the wafer support 12 and the pattern processing dimensions. It can be seen from FIG. 2 that the pattern processing dimension changes when the set temperature of the wafer support table 12 is intentionally changed.
【００１９】被加工ウエハを真空容器１１内のウエハ支
持台１２上に設置する。被加工ウエハはパターンとなる
アルミニウム合金が全面に堆積された後、フォトリソグ
ラフィ法等によりマスクパターンが形成されている。被
加工ウエハは静電吸着方式や機械的圧着方式等によりウ
エハ支持台１２に密着している。ウエハ支持台１２と被
加工ウエハの間に少量のヘリウムガスを流すことによ
り、相互の熱伝導性を向上させることが望ましい。真空
容器１１内に塩素系ガスを導入し、真空容器１１内を１
０ｍＴｏｒｒ程度の圧力に調整する。外部よりアンテナ
や電極を用いて、ＲＦ電力を印加することにより、塩素
系ガスをプラズマ化させる。ウエハ支持台１２の温度は
最初５０度になるように、第１の熱交換器１３と第２の
熱交換器１７の設定温度を５０度とする。第１の配管１
４および第２の配管１８には保温材を設置し、外部温度
と熱的に遮蔽することが望ましい。プラズマにさらされ
た被加工ウエハの表面は加工が終了するまでに９０度程
度まで上昇する。それに伴い、被加工ウエハと密着して
いるウエハ支持台１２も加熱され、温度が上昇してい
く。ここで、図３（ａ）に従来例の半導体製造装置にお
けるウエハ支持台の温度勾配の様子Ｑ1 とパターン加工
寸法のウエハ面内分布Ｑ2 を示す。図３（ａ）中のＡ−
Ａ’は図７中のＡ−Ａ’に対応する。循環している冷媒
はウエハ支持台２への入口６付近では５０度であるが、
出口７付近では６０度程度まで上昇する。すなわち、ウ
エハ支持台の温度勾配も同様となる。そして図２の関係
にしたがい、ウエハ支持台２の入口６付近のパターン加
工寸法と出口７付近のパターン加工寸法は異なってしま
う。温度の高い方がパターン加工寸法は細く仕上がり、
温度の低い方がパターン加工寸法は太く仕上がる。その
結果として、ウエハ面内でパターン加工寸法がばらつく
ことになる。次に、図３（ｂ）にこの発明の第１の実施
の形態の半導体製造装置におけるウエハ支持台の温度勾
配の様子Ｑ3 とパターン加工寸法のウエハ面内分布Ｑ4
を示す。図３（ｂ）中のＢ−Ｂ’は図１中のＢ−Ｂ’に
対応する。この発明の第１の実施の形態の半導体製造装
置の構造上、第１の入口１５と第２の出口２０が近傍に
設置されているため、互いの冷媒の温度差が相殺され
る。第１の入口１５付近の冷媒の温度は５０度、第２の
出口２０付近の冷媒の温度は６０度となると、第１の入
口１５および第２の出口２０付近のウエハ支持台１２の
温度はほぼ中間的な温度である５５度で熱的平衡状態と
なる。同様なことが第１の出口１６および第２の入口１
９付近のウエハ支持台１２で発生する。その結果、ウエ
ハ支持台１２の全面において均一な温度が実現できる。
そして図３（ｂ）に示すようにパターン加工寸法のウエ
ハ面内分布が均一になり、パターン加工寸法のばらつき
を低減した加工が実現できる。The wafer to be processed is placed on the wafer support 12 in the vacuum container 11. An aluminum alloy to be a pattern is deposited on the entire surface of the wafer to be processed, and then a mask pattern is formed by a photolithography method or the like. The wafer to be processed is brought into close contact with the wafer support 12 by an electrostatic attraction method, a mechanical pressure bonding method, or the like. It is desirable to improve the mutual thermal conductivity by flowing a small amount of helium gas between the wafer support 12 and the wafer to be processed. Chlorine-based gas is introduced into the vacuum container 11 to make the inside of the vacuum container 11 1
Adjust the pressure to about 0 mTorr. By applying RF power from the outside using an antenna or an electrode, chlorine-based gas is made into plasma. The set temperature of the first heat exchanger 13 and the second heat exchanger 17 is set to 50 degrees so that the temperature of the wafer support base 12 becomes 50 degrees at the beginning. First pipe 1
It is desirable to install a heat insulating material in the fourth and second pipes 18 to thermally shield them from the external temperature. The surface of the wafer to be processed exposed to the plasma rises to about 90 degrees by the time the processing is completed. Along with that, the wafer support 12 that is in close contact with the wafer to be processed is also heated, and the temperature rises. Here, FIG. 3A shows a state Q 1 of the temperature gradient of the wafer support in the conventional semiconductor manufacturing apparatus and a wafer in-plane distribution Q 2 of pattern processing dimensions. A- in FIG.
A'corresponds to AA 'in FIG. The circulating refrigerant is 50 degrees near the inlet 6 to the wafer support 2,
In the vicinity of exit 7, it rises to about 60 degrees. That is, the temperature gradient of the wafer support is similar. According to the relationship shown in FIG. 2, the pattern processing size near the entrance 6 and the pattern processing size near the exit 7 of the wafer support 2 are different. The higher the temperature, the finer the pattern processing dimensions will be.
The lower the temperature, the thicker the pattern processing dimension will be. As a result, the pattern processing size varies within the wafer surface. Next, FIG. 3B shows a state Q 3 of the temperature gradient of the wafer support table in the semiconductor manufacturing apparatus according to the first embodiment of the present invention and a wafer surface distribution Q 4 of pattern processing dimensions.
Indicates. BB 'in FIG. 3B corresponds to BB' in FIG. Due to the structure of the semiconductor manufacturing apparatus according to the first embodiment of the present invention, since the first inlet 15 and the second outlet 20 are installed in the vicinity, the temperature difference between the refrigerants is offset. When the temperature of the refrigerant near the first inlet 15 is 50 degrees and the temperature of the refrigerant near the second outlet 20 is 60 degrees, the temperature of the wafer support table 12 near the first inlet 15 and the second outlet 20 is Thermal equilibrium occurs at 55 °, which is an almost intermediate temperature. The same applies to the first outlet 16 and the second inlet 1.
It occurs on the wafer support 12 near the position 9. As a result, a uniform temperature can be realized on the entire surface of the wafer support 12.
Then, as shown in FIG. 3B, the distribution of the pattern processing dimensions within the wafer becomes uniform, and the processing in which the variation in the pattern processing dimensions is reduced can be realized.
【００２０】この発明の第２の実施の形態の半導体製造
装置について、図面を参照しながら説明する。図４は、
この発明の第２の半導体製造装置における平面図を示
す。図４において、２１は真空容器、２２は真空容器２
１内に設置され、お互いに分離した二系統の冷媒が流れ
る同心円状の冷媒用通路を備えたウエハ支持台、２３は
第１の熱交換器、２４はウエハ支持台２２と第１の熱交
換器２３を接続し、冷媒を流すための第１の配管、２５
はウエハ支持台２２と第１の配管２４を接続する第１の
入口、２６はウエハ支持台２２と第１の配管２４を接続
する第１の出口、２７は第２の熱交換器、２８はウエハ
支持台２２と第２の熱交換器２７を接続する第２の配
管、２９はウエハ支持台２２と第２の配管２８を接続
し、第１の出口２６の近傍に設置された第２の入口、３
０はウエハ支持台２２と第２の配管２８を接続し、第１
の入口２５の近傍に設置された第２の出口である。A semiconductor manufacturing apparatus according to a second embodiment of the present invention will be described with reference to the drawings. Figure 4
The top view in the 2nd semiconductor manufacturing apparatus of this invention is shown. In FIG. 4, 21 is a vacuum container and 22 is a vacuum container 2.
1, a wafer support table provided with concentric refrigerant passages in which two separate systems of coolant flow, which are separated from each other, 23 is a first heat exchanger, 24 is a wafer support table 22 and a first heat exchanger. First pipe for connecting the container 23 and flowing a refrigerant, 25
Is a first inlet connecting the wafer support 22 and the first pipe 24, 26 is a first outlet connecting the wafer support 22 and the first pipe 24, 27 is a second heat exchanger, and 28 is A second pipe connecting the wafer support base 22 and the second heat exchanger 27, a second pipe 29 connecting the wafer support base 22 and the second pipe 28, and a second pipe installed near the first outlet 26. Entrance 3
0 connects the wafer support 22 and the second pipe 28, and
Is a second outlet installed near the inlet 25 of the.
【００２１】エッチング処理を実施する際には、ウエハ
支持台２２の上に被加工ウエハを設置し、真空容器２１
内にエッチングで用いるガスとプラズマを発生させるた
めの電力を外部から供給する。そして、ウエハ上にあら
かじめ加工されたマスクパターンをマスクとしてパター
ンが加工される。第１の熱交換器２３および第２の熱交
換器２７はウエハ支持台２２の温度を調節するためのも
のであり、第１の熱交換器２３から流出された冷媒は、
第１の配管２４、第１の入口２５、ウエハ支持台２２、
第１の出口２６、第１の配管２４を経由して第１の熱交
換器２３へ戻る。ウエハ支持台２２中の冷媒はウエハ支
持台２２の中心部分の冷媒用通路３２を経由する。他
方、第２の熱交換器２７から流出された冷媒は、第２の
配管２８、第２の入口２９、ウエハ支持台２２、第２の
出口３０、第２の配管２８を経由して第２の熱交換器２
７へ戻る。ウエハ支持台２２中の冷媒はウエハ支持台２
２の周辺部分の冷媒用通路３３を経由する。ウエハ支持
台２２と被加工ウエハは密着しており、熱的に伝導して
いる。被加工ウエハはエッチング処理中にプラズマにさ
らされることにより、温度が上昇していく。しかも、被
加工ウエハの温度上昇はウエハの中心が最も大きく、周
辺が最も小さい。このウエハ温度上昇を制御し、エッチ
ング処理中に所望のウエハ温度が実現できるようにウエ
ハ支持台２２の温度を調節するため、冷媒の温度を第１
の熱交換器２３および第２の熱交換器２７にて設定す
る。さらに、第１の熱交換器２３の設定温度を第２の熱
交換器２７より低く設定すると、ウエハ支持台２２の中
心の熱交換効率を高く、ウエハ支持台２２の周辺の熱交
換効率を低くすることができる。その結果、ウエハ支持
台２２の全面において均一な温度が実現できる。When carrying out the etching process, the wafer to be processed is placed on the wafer support 22 and the vacuum container 21 is placed.
Electric power for generating plasma and gas used for etching is supplied from the outside. Then, the pattern is processed on the wafer using the mask pattern previously processed as a mask. The first heat exchanger 23 and the second heat exchanger 27 are for adjusting the temperature of the wafer support base 22, and the refrigerant flowing out from the first heat exchanger 23 is
The first pipe 24, the first inlet 25, the wafer support table 22,
It returns to the first heat exchanger 23 via the first outlet 26 and the first pipe 24. The coolant in the wafer support 22 passes through the coolant passage 32 in the central portion of the wafer support 22. On the other hand, the refrigerant flowing out from the second heat exchanger 27 passes through the second pipe 28, the second inlet 29, the wafer support table 22, the second outlet 30, and the second pipe 28 to the second pipe 28. Heat exchanger 2
Return to 7. The coolant in the wafer support table 22 is the wafer support table 2
2 passes through the refrigerant passage 33 in the peripheral portion. The wafer support 22 and the wafer to be processed are in close contact with each other and are thermally conductive. The temperature of the processed wafer increases as it is exposed to plasma during the etching process. Moreover, the temperature rise of the wafer to be processed is greatest at the center of the wafer and smallest at the periphery. In order to control the rise of the wafer temperature and adjust the temperature of the wafer support base 22 so that the desired wafer temperature can be achieved during the etching process, the temperature of the coolant is adjusted to
The heat exchanger 23 and the second heat exchanger 27 are used for setting. Further, when the set temperature of the first heat exchanger 23 is set lower than that of the second heat exchanger 27, the heat exchange efficiency at the center of the wafer support base 22 is high and the heat exchange efficiency around the wafer support base 22 is low. can do. As a result, a uniform temperature can be realized on the entire surface of the wafer support base 22.
【００２２】以上のように被加工ウエハに対して二系統
の冷却機構を同心円上に配置することにより、ウエハ支
持台２２の中心部と周辺部の温度抑制を独立にすること
ができ、被加工ウエハの温度も面内で均一にすることが
できる。そして、ウエハ面内の温度分布が均一になれ
ば、パターン加工寸法のばらつきを低減した加工が実現
できる。By arranging the two cooling mechanisms on the wafer to be processed concentrically as described above, it is possible to independently control the temperature of the central portion and the peripheral portion of the wafer support table 22, and thus The temperature of the wafer can also be made uniform within the surface. Then, if the temperature distribution in the wafer surface becomes uniform, it is possible to realize processing with reduced variations in pattern processing dimensions.
【００２３】具体的な一例としてアルミニウム合金のパ
ターンを加工する場合を示す。アルミニウム合金のパタ
ーン形成をドライエッチングにより実施する場合、ウエ
ハ支持台の設定温度とパターン加工寸法の関係は非常に
敏感である。上記したが、図２に示したウエハ支持台２
２の設定温度とパターン加工寸法の関係より、ウエハ支
持台２２の設定温度を故意に変化させるとパターン加工
寸法が変化する。As a concrete example, a case of processing a pattern of an aluminum alloy will be shown. When the pattern formation of the aluminum alloy is performed by dry etching, the relationship between the set temperature of the wafer support and the pattern processing dimension is very sensitive. As described above, the wafer support base 2 shown in FIG.
From the relationship between the set temperature of 2 and the pattern processing dimension, if the set temperature of the wafer support 22 is intentionally changed, the pattern processing dimension changes.
【００２４】被加工ウエハを真空容器２１内のウエハ支
持台２２上に設置する。被加工ウエハはパターンとなる
アルミニウム合金が全面に堆積された後、フォトリソグ
ラフィ法等によりマスクパターンが形成されている。被
加工ウエハは静電吸着方式や機械的圧着方式等によりウ
エハ支持台２２に密着している。ウエハ支持台２２と被
加工ウエハの間に少量のヘリウムガスを流すことによ
り、相互の熱伝導性を向上させることが望ましい。真空
容器内に塩素系ガスを導入し、真空容器２１内を１０ｍ
Ｔｏｒｒ程度に圧力調整する。外部よりアンテナや電極
を用いて、ＲＦ電力を印加することにより、塩素系ガス
をプラズマ化させる。第１の熱交換器２３の設定温度を
４５度、第２の熱交換器２７の設定温度を５５度とす
る。第１の配管２４および第２の配管２８には保温材を
設置し、外部温度と熱的に遮蔽することが望ましい。こ
こで、図５（ａ）に従来例の半導体製造装置における被
加工ウエハの温度分布の様子Ｑ5 とパターン加工寸法の
ウエハ面内分布Ｑ6 を示す。図５（ａ）中のＣ−Ｃ’は
図７中のウエハ支持台２上ではＣ−Ｃ’の位置に対応す
る。プラズマにさらされた被加工ウエハの表面は加工が
終了するまでに被加工ウエハの中心で９０度程度、周辺
で８０度まで上昇する。この原因はプラズマの密度が中
心部分で高く、周辺で低いためである。そして図２の関
係にしたがい、温度の高い方がパターン加工寸法は細く
仕上がり、温度の低い方がパターン加工寸法は太く仕上
がる。その結果として、ウエハ面内でパターン加工寸法
がばらつくことになる。次に、図５（ｂ）にこの発明の
第２の実施の形態の半導体製造装置における被加工ウエ
ハの温度分布の様子Ｑ7 とパターン加工寸法のウエハ面
内分布Ｑ8 を示す。図５（ｂ）中のＤ−Ｄ’は図４中ウ
エハ支持台２２上ではＤ−Ｄ’の位置に対応する。この
発明の第２の実施の形態の半導体製造装置の構造上、二
系統の冷却機構を被加工ウエハに対して同心円状に配置
することにより、ウエハ支持台２２の中心部と周辺部の
温度抑制を独立にすることができ、被加工ウエハの温度
も面内で均一にすることができる。そして、図５（ｂ）
に示すようにパターン加工寸法のウエハ面内分布が均一
になり、パターン加工寸法のばらつきを低減した加工が
実現できる。The wafer to be processed is placed on the wafer support 22 in the vacuum container 21. An aluminum alloy to be a pattern is deposited on the entire surface of the wafer to be processed, and then a mask pattern is formed by a photolithography method or the like. The wafer to be processed is in close contact with the wafer support base 22 by an electrostatic attraction method, a mechanical pressure bonding method, or the like. It is desirable to improve the mutual thermal conductivity by flowing a small amount of helium gas between the wafer support 22 and the wafer to be processed. Chlorine gas is introduced into the vacuum container, and the inside of the vacuum container 21 is 10 m.
Adjust the pressure to about Torr. By applying RF power from the outside using an antenna or an electrode, chlorine-based gas is made into plasma. The set temperature of the first heat exchanger 23 is 45 degrees, and the set temperature of the second heat exchanger 27 is 55 degrees. It is desirable that a heat insulating material is installed in the first pipe 24 and the second pipe 28 to thermally shield them from the external temperature. Here, FIG. 5A shows a state Q 5 of the temperature distribution of the wafer to be processed in the conventional semiconductor manufacturing apparatus and a wafer in-plane distribution Q 6 of the pattern processing dimension. CC 'in FIG. 5A corresponds to the position of CC' on the wafer support base 2 in FIG. The surface of the wafer to be processed exposed to plasma rises up to about 90 degrees at the center of the wafer to be processed and up to 80 degrees at the periphery by the time the processing is completed. This is because the plasma density is high in the central part and low in the peripheral part. According to the relationship shown in FIG. 2, the higher the temperature, the finer the pattern processing dimension is finished, and the lower the temperature, the thicker the pattern processing dimension is finished. As a result, the pattern processing size varies within the wafer surface. Next, FIG. 5B shows a state Q 7 of temperature distribution of the wafer to be processed and an in-plane distribution Q 8 of the pattern processing dimension in the semiconductor manufacturing apparatus according to the second embodiment of the present invention. DD 'in FIG. 5B corresponds to the position of DD' on the wafer support base 22 in FIG. Due to the structure of the semiconductor manufacturing apparatus according to the second embodiment of the present invention, by arranging the two cooling mechanisms concentrically with respect to the wafer to be processed, the temperature control of the central portion and the peripheral portion of the wafer support table 22 is suppressed. Can be made independent, and the temperature of the wafer to be processed can be made uniform in the plane. And FIG. 5 (b)
As shown in (1), the distribution of the pattern processing dimensions in the wafer becomes uniform, and it is possible to realize the processing in which the variation in the pattern processing dimensions is reduced.
【００２５】また、第２の実施の形態は、入口２５、２
９および出口２６、３０をウエハ支持第２２の側部に設
け、かつ第２の入口２９を第１の出口２６の近傍に配置
し、第２の出口３０を第１の入口２５の近傍に配置した
構成であるので、入口と出口を結ぶ方向の温度分布の均
一化も図れ、第１の実施の形態と同様な効果も得ること
ができる。In the second embodiment, the inlets 25 and 2 are provided.
9 and outlets 26, 30 are provided on the wafer support 22nd side, a second inlet 29 is arranged in the vicinity of the first outlet 26, and a second outlet 30 is arranged in the vicinity of the first inlet 25. With this configuration, the temperature distribution in the direction connecting the inlet and the outlet can be made uniform, and the same effect as that of the first embodiment can be obtained.
【００２６】なお、上記の実施の形態では、真空容器中
のドライエッチングついて示したが、ウエハ支持台を有
する半導体製造装置による加工であれば、同様の効果が
得られることは言うまでもない。ここで、特許請求の範
囲に示された発明は上記の実施の形態で説明した態様に
限られるものではない。In the above embodiment, dry etching in a vacuum container has been described, but it goes without saying that the same effect can be obtained by processing with a semiconductor manufacturing apparatus having a wafer support. Here, the invention described in the claims is not limited to the aspect described in the above embodiment.
【００２７】[0027]
【発明の効果】請求項１記載の半導体製造装置によれ
ば、ウエハ支持台の側部の第１の入口と第２の出口を互
いに近傍に配置し、また第１の出口と第２の入口を互い
に近傍に設置することによって、お互いの冷媒の温度差
を相殺することができ、ウエハ支持台の面内の温度分布
を均一に制御することができるので、パターン加工寸法
のウエハ面内ばらつきを低減することができる。また一
方の冷媒がウエハ支持台の中心付近を通り、他方の冷媒
がウエハ支持台の周辺付近を通るように構成された二系
統の冷却機構を備え、それらの冷媒温度を独立に制御す
ることによって、エッチング処理時に生じる被加工ウエ
ハの面内温度差を低減することができ、パターン加工寸
法のウエハ面内ばらつきを低減することができる。 According to the semiconductor manufacturing apparatus of the first aspect, the first inlet and the second outlet of the side portion of the wafer support are arranged in the vicinity of each other, and the first outlet and the second inlet are arranged. By installing the two in proximity to each other, it is possible to cancel out the temperature difference between the refrigerants, and it is possible to uniformly control the temperature distribution within the surface of the wafer support table. It can be reduced. One more time
One refrigerant passes near the center of the wafer support and the other refrigerant
System configured to pass around the periphery of the wafer support
Integral cooling mechanism to control the temperature of these refrigerants independently
By doing so, the wafer to be processed generated during the etching process
The in-plane temperature difference of c can be reduced and the pattern processing size can be reduced.
It is possible to reduce the variation in the wafer surface of the method.
【００２８】[0028]
【００２９】請求項２記載の半導体製造装置によれば、
請求項１と同様な効果のほか、ウエハ支持台の中心付近
の設定温度が周辺付近の設定温度よりも低く設定されて
いるので、より一層ウエハ支持台の温度の均一性を図る
ことができる。According to the semiconductor manufacturing apparatus of the second aspect ,
In addition to the same effect as the first aspect , the temperature set in the vicinity of the center of the wafer support is set lower than the set temperature in the vicinity of the periphery, so that the temperature uniformity of the wafer support can be further improved.
【図１】この発明の第１の実施の形態における半導体製
造装置の概略平面図である。FIG. 1 is a schematic plan view of a semiconductor manufacturing apparatus according to a first embodiment of the present invention.
【図２】ウエハ支持台の設定温度とパターン加工寸法の
関係図である。FIG. 2 is a relationship diagram between a set temperature of a wafer support and pattern processing dimensions.
【図３】半導体製造装置のウエハ支持台の温度分布の様
子とパターン加工寸法の関係図であり、（ａ）は従来
例、（ｂ）は第１の実施の形態を示す。3A and 3B are diagrams showing a relationship between a temperature distribution of a wafer support table of a semiconductor manufacturing apparatus and pattern processing dimensions, FIG. 3A shows a conventional example, and FIG. 3B shows a first embodiment.
【図４】この発明の第２の実施の形態における半導体製
造装置の概略平面図である。FIG. 4 is a schematic plan view of a semiconductor manufacturing apparatus according to a second embodiment of the present invention.
【図５】半導体装置の被加工ウエハの温度分布の様子と
パターン加工寸法の関係図であり、（ａ）は従来例、
（ｂ）は第２の実施の形態を示す。FIG. 5 is a relational diagram of a temperature distribution state of a wafer to be processed of a semiconductor device and pattern processing dimensions, in which (a) is a conventional example,
(B) shows a second embodiment.
【図６】従来の半導体製造装置の概略断面図である。FIG. 6 is a schematic sectional view of a conventional semiconductor manufacturing apparatus.
【図７】その概略平面図である。FIG. 7 is a schematic plan view thereof.
１ 真空容器 ２ ウエハ支持台 ３ 被加工ウエハ ４ 熱交換器 ５ 配管 ６ 入口 ７ 出口 １１ 真空容器 １２ ウエハ支持台 １３ 第１の熱交換器 １４ 第１の配管 １５ 第１の入口 １６ 第１の出口 １７ 第２の熱交換器 １８ 第２の配管 １９ 第２の入口 ２０ 第２の出口 ２１ 真空容器 ２２ ウエハ支持台 ２３ 第１の熱交換器 ２４ 第１の配管 ２５ 第１の入口 ２６ 第１の出口 ２７ 第２の熱交換器 ２８ 第２の配管 ２９ 第２の入口 ３０ 第２の出口 1 vacuum container 2 Wafer support 3 Processed wafer 4 heat exchanger 5 piping 6 entrance 7 exit 11 vacuum container 12 Wafer support 13 First heat exchanger 14 First piping 15 First entrance 16 First exit 17 Second heat exchanger 18 Second piping 19 Second entrance 20 Second exit 21 vacuum container 22 Wafer support 23 First heat exchanger 24 First piping 25 First entrance 26 First Exit 27 Second heat exchanger 28 Second piping 29 Second entrance 30 Second exit
Claims (2)
口を設けた第１の冷媒用通路を内部に形成し、前記第１
の出口の近傍に第２の入口を設け、前記第１の入口の近
傍に第２の出口を設けた第２の冷媒用通路を内部に形成
したウエハ支持台と、第１の 冷媒が循環するように前記第１の入口および前記
第１の出口に、第１の配管を介して連結された第１の熱
交換器と、第２の 冷媒が循環するように前記第２の入口および前記
第２の出口に、第２の配管を介して連結された第２の熱
交換器とを備え、 前記第１の入口と前記第１の出口は、前記ウエハ支持台
の面内の第１の対称線をはさんで対向する位置に配置さ
れ、 前記第２の入口と前記第２の出口は、前記ウエハ支持台
の面内の前記第１の対称線をはさんで対向する位置に配
置され、 前記第１の冷媒用通路と前記第２の冷媒用通路は、同心
円状に配置された互いに独立した冷媒用通路であって、 前記第２の冷媒用通路は、前記第１の冷媒用通路の外側
に配置され、 前記第１の冷媒用通路の長さと前記第２の冷媒用通路の
長さは、前記第１の入口と前記第１の出口を結ぶ線、あ
るいは、前記第２の入口と前記第２の出口を結ぶ線と平
行な前記ウエハ支持台の面内の第２の対称軸の両側にお
いて同一であり、 前記第１の熱交換器の設定温度は、前記第２の熱交換器
の設定温度と異なる温度に設定されていることを特徴す
る 半導体製造装置。1. A first refrigerant passage having a first inlet on one side and a first outlet on the other side is formed in the inside of the first passage.
A second inlet is provided in the vicinity of the first outlet and a second coolant passage is provided in the second inlet near the first inlet, and the first coolant is circulated. A first heat exchanger connected to the first inlet and the first outlet via a first pipe, and the second inlet and the second heat exchanger so that a second refrigerant circulates. A second heat exchanger connected to a second outlet through a second pipe , wherein the first inlet and the first outlet are the wafer support base.
It is placed at the opposite position across the first line of symmetry in the plane of
Is, the second inlet and the second outlet, wherein the wafer support table
The first line of symmetry in the plane of
And the first coolant passage and the second coolant passage are concentric with each other.
Circularly arranged refrigerant passages independent of each other, wherein the second refrigerant passage is outside the first refrigerant passage.
Of the first refrigerant passage and the second refrigerant passage.
The length is a line that connects the first inlet and the first outlet.
Rui is a flat line connecting the second inlet and the second outlet.
On both sides of the second axis of symmetry in the plane of the wafer support.
And the set temperature of the first heat exchanger is the same as that of the second heat exchanger.
It is set to a temperature different from the set temperature of
That semiconductor manufacturing equipment.
２の熱交換器の設定温度よりも低く設定されている請求
項１記載の半導体製造装置。2. A semiconductor manufacturing apparatus according to claim 1, wherein the set temperature of the first heat exchanger is set lower than the set temperature of the second heat exchanger.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23440898A JP3526220B2 (en) | 1998-08-20 | 1998-08-20 | Semiconductor manufacturing equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23440898A JP3526220B2 (en) | 1998-08-20 | 1998-08-20 | Semiconductor manufacturing equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000068249A JP2000068249A (en) | 2000-03-03 |
| JP3526220B2 true JP3526220B2 (en) | 2004-05-10 |
Family
ID=16970551
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23440898A Expired - Fee Related JP3526220B2 (en) | 1998-08-20 | 1998-08-20 | Semiconductor manufacturing equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3526220B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110269314A1 (en) * | 2010-04-30 | 2011-11-03 | Applied Materials, Inc. | Process chambers having shared resources and methods of use thereof |
| JP6374301B2 (en) | 2013-12-24 | 2018-08-15 | 東京エレクトロン株式会社 | Stage, stage manufacturing method, heat exchanger |
| KR101736363B1 (en) * | 2016-04-18 | 2017-05-18 | (주)티티에스 | Substrate supporting device and Substrate treating apparatus having the same |
-
1998
- 1998-08-20 JP JP23440898A patent/JP3526220B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2000068249A (en) | 2000-03-03 |
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