JP3495808B2 - Manufacturing method of semiconductor light emitting device - Google Patents
Manufacturing method of semiconductor light emitting deviceInfo
- Publication number
- JP3495808B2 JP3495808B2 JP05769195A JP5769195A JP3495808B2 JP 3495808 B2 JP3495808 B2 JP 3495808B2 JP 05769195 A JP05769195 A JP 05769195A JP 5769195 A JP5769195 A JP 5769195A JP 3495808 B2 JP3495808 B2 JP 3495808B2
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- layer
- electron beam
- light emitting
- type
- emitting device
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Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体発光素子の製法に
関する。さらに詳しくは、青色発光に好適なチッ化ガリ
ウム系化合物半導体を用いた半導体発光素子の製法に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor light emitting device. More specifically, it relates to a method for manufacturing a semiconductor light emitting device using a gallium nitride based compound semiconductor suitable for blue light emission.
【０００２】ここにチッ化ガリウム系化合物半導体と
は、III 族元素のＧａとＶ族元素のＮとの化合物または
III 族元素のＧａの一部がＡｌ、Ｉｎなど他のIII 族元
素と置換したものおよび／またはＶ族元素のＮの一部が
Ｐ、Ａｓなど他のＶ族元素と置換した化合物からなる半
導体をいう。Here, a gallium nitride compound semiconductor is a compound of a group III element Ga and a group V element N or
A semiconductor made of a compound in which a part of Ga of the group III element is replaced with another group III element such as Al and In and / or a part of N of the group V element is replaced with another group V element such as P and As. Say.
【０００３】また、半導体発光素子とは、ｐｎ接合また
はダブルヘテロ接合を有する発光ダイオード（以下、Ｌ
ＥＤという）、スーパルミネッセントダイオード（ＳＬ
Ｄ）または半導体レーザダイオード（以下、ＬＤとい
う）などの光を発生する半導体素子をいう。A semiconductor light emitting element is a light emitting diode having a pn junction or a double heterojunction (hereinafter referred to as L
ED), super luminescent diode (SL)
D) or a semiconductor element such as a semiconductor laser diode (hereinafter referred to as LD) that generates light.
【０００４】[0004]
【従来の技術】従来青色のＬＥＤは赤色や緑色に比べて
輝度が小さく実用化に難点があったが、近年チッ化ガリ
ウム系化合物半導体を用い、Ｍｇをドーパントした低抵
抗のｐ型半導体層がえられたことにより、輝度が向上し
脚光をあびている。2. Description of the Related Art Conventionally, blue LEDs have a lower brightness than red and green and are difficult to put into practical use. In recent years, however, gallium nitride compound semiconductors have been used, and a low resistance p-type semiconductor layer doped with Mg has been formed. As a result, the brightness is improved and it is in the limelight.
【０００５】ところで、チッ化ガリウム系のＬＥＤの製
法はつぎに示されるような工程で行われ、その完成した
チッ化ガリウム系化合物半導体の斜視図を図３に示す。The gallium nitride based LED is manufactured by the following steps, and a perspective view of the completed gallium nitride based compound semiconductor is shown in FIG.
【０００６】まず、サファイア（Ａｌ2 Ｏ3 単結晶）な
どからなる基板２１に４００〜７００℃の低温で有機金
属化合物気相成長法（以下、ＭＯＣＶＤ法という）によ
りキャリアガスＨ2 とともに有機金属化合物ガスである
トリメチルガリウム（以下、ＴＭＧという）、ＮＨ3 お
よびドーパントとしてのＳｉＨ4 などを供給し、ｎ型の
ＧａＮ層からなる低温バッファ層２２を０．０１〜０．
２μｍ程度形成し、ついで９００〜１２００℃の高温で
同じガスを供給し同じ組成のｎ型のＧａＮからなる高温
バッファ層２３を２〜５μｍ程度形成する。First, a substrate 21 made of sapphire (Al 2 O 3 single crystal) or the like is used at a low temperature of 400 to 700 ° C. at a low temperature of 400 to 700 ° C. with a carrier gas H 2 together with a carrier gas H 2 by an organometallic compound vapor phase growth method (hereinafter referred to as MOCVD method). Trimethylgallium (hereinafter referred to as TMG) which is a gas, NH 3 and SiH 4 as a dopant are supplied to the low temperature buffer layer 22 formed of an n-type GaN layer in an amount of 0.01 to 0.
Then, the same gas is supplied at a high temperature of 900 to 1200 ° C. to form the high temperature buffer layer 23 made of n-type GaN having the same composition to a thickness of about 2 to 5 μm.
【０００７】ついで前述のガスにさらにトリメチルアル
ミニウム（以下、ＴＭＡという）の原料ガスを加え、ｎ
型ドーパントのＳｉを含有したｎ型Ａｌx Ｇａ1-x Ｎ
（０＜ｘ＜１）層を成膜し、ダブルヘテロ接合形成のた
めのｎ型クラッド層２４を０．１〜０．３μｍ程度形成
する。Then, a raw material gas of trimethylaluminum (hereinafter referred to as TMA) is further added to the above gas, and n
N - type Al x Ga 1-x N containing Si as a type dopant
A (0 <x <1) layer is formed, and an n-type cladding layer 24 for forming a double heterojunction is formed to have a thickness of about 0.1 to 0.3 μm.
【０００８】つぎに、バンドギャップエネルギーがクラ
ッド層のそれより小さくなる材料、たとえば前述の原料
ガスのＴＭＡに代えてトリメチルインジウム（以下、Ｔ
ＭＩという）を導入し、Ｇａy Ｉｎ1-y Ｎ（０＜ｙ≦
１）からなる活性層２５を０．０５〜０．１μｍ程度形
成する。Next, a material having a bandgap energy smaller than that of the clad layer, for example, trimethylindium (hereinafter, T
MI) is introduced, and Ga y In 1-y N (0 <y ≦
The active layer 25 composed of 1) is formed to a thickness of about 0.05 to 0.1 μm.
【０００９】さらに、ｎ型クラッド層２４の形成に用い
たガスと同じ原料のガスで不純物原料ガスをＳｉＨ4 に
代えてｐ型不純物としてＭｇまたはＺｎをビスシクロペ
ンタジエニルマグネシウム（Ｍｇ（Ｃ5 Ｈ5 ）2 ）（以
下、Ｃｐ2 Ｍｇという）またはジメチル亜鉛（以下、Ｄ
ＭＺｎという）を加えて反応管に導入し、ｐ型クラッド
層２６であるｐ型Ａｌx Ｇａ1-x Ｎ層を気相成長させ
る。これによりｎ型クラッド層２４と活性層２５とｐ型
クラッド層２６とによりダブルヘテロ接合が形成され
る。Further, the same raw material gas as that used for forming the n-type cladding layer 24 is used as the p-type impurity instead of the impurity raw material gas SiH 4, and Mg or Zn is replaced with biscyclopentadienyl magnesium (Mg (C 5 H 5 ) 2 ) (hereinafter referred to as Cp 2 Mg) or dimethyl zinc (hereinafter referred to as D
(Hereinafter referred to as “MZn”) is added and introduced into the reaction tube, and a p-type Al x Ga 1-x N layer which is the p-type cladding layer 26 is vapor-phase grown. As a result, the n-type cladding layer 24, the active layer 25, and the p-type cladding layer 26 form a double heterojunction.
【００１０】ついでキャップ層２７を形成するため、前
述のバッファ層２３と同様のガスで不純物原料ガスとし
てＣｐ2 ＭｇまたはＤＭＺｎを供給してｐ型のＧａＮ層
を０．３〜１μｍ程度成長させる。Next, in order to form the cap layer 27, Cp 2 Mg or DMZn is supplied as an impurity source gas by using the same gas as that of the buffer layer 23 described above to grow a p-type GaN layer of about 0.3 to 1 μm.
【００１１】つぎに、熱処理または電子線照射によりア
ニールをしてｐ型層の活性化処理を行う。これはｐ型ド
ーパントのＭｇなどをチッ化ガリウム系化合物半導体層
内にドーピングするときに、Ｍｇなどがキャリアガスの
Ｈ2 や原料ガスのＮＨ3 のＨと化合してドーパントとし
ての働きをせず、高抵抗になるため、ｐ型層の温度を上
昇させてＭｇなどとＨとの結合を分離させ、Ｈを外部に
放出する目的で行われる。Next, the p-type layer is activated by heat treatment or annealing by electron beam irradiation. This is because when the p-type dopant Mg or the like is doped into the gallium nitride-based compound semiconductor layer, the Mg or the like does not function as a dopant by combining with H 2 of the carrier gas and H of NH 3 of the source gas. Since the resistance becomes high, it is performed for the purpose of raising the temperature of the p-type layer to separate the bond between Mg and H and to release H.
【００１２】熱処理によりｐ型層の活性化を行うには、
全体を炉内に入れて４００〜８００℃で１５〜６０分間
程度の熱処理で行われるが、全体の温度が高温になって
いるため、熱処理の際にチッ化ガリウム系化合物半導体
のＮやＧａが同時に抜け易い。それを防止するため、熱
処理を行う前に半導体層の表面全体にＳｉＯ2 やＳｉ3
Ｎ4 などの保護膜を設けてチッ素雰囲気中で行ってい
る。To activate the p-type layer by heat treatment,
The whole is put in a furnace and heat-treated at 400 to 800 ° C. for about 15 to 60 minutes, but since the whole temperature is high, N and Ga of the gallium nitride based compound semiconductor are increased during the heat treatment. At the same time, it is easy to come out. To prevent this, the entire surface of the semiconductor layer is covered with SiO 2 or Si 3 before heat treatment.
A protective film such as N 4 is provided and the process is performed in a nitrogen atmosphere.
【００１３】一方、電子線照射により活性化を行うばあ
いは、電子線の照射によりｐ型層の半導体層を局部的に
加熱して前述のＭｇとＨとの結合を切り離すものである
が、従来の電子線照射に用いられる装置は、全表面を照
射する目的のため、ビーム径の大きい走査型電子顕微鏡
（ＳＥＭ）を基礎とした構造の装置で、化合物半導体が
積層されたウェハ内を手動でスキャンすることにより行
っている。On the other hand, when activation is performed by electron beam irradiation, the semiconductor layer of the p-type layer is locally heated by electron beam irradiation to break the above-mentioned bond between Mg and H. A conventional device used for electron beam irradiation is a device having a structure based on a scanning electron microscope (SEM) with a large beam diameter for the purpose of irradiating the entire surface. This is done by scanning in.
【００１４】ついで、成長した各半導体層の一部をドラ
イエッチングにより除去してｎ型ＧａＮ層であるバッフ
ァ層２３を露出させ、Ａｕ、Ａｌなどの金属膜をたとえ
ば蒸着、スパッタリングなどにより成膜してｐ側および
ｎ側の両電極２９、３０を形成し、ダイシングすること
によりＬＥＤチップを形成している。Then, a part of each of the grown semiconductor layers is removed by dry etching to expose the buffer layer 23 which is an n-type GaN layer, and a metal film of Au, Al or the like is formed by, for example, vapor deposition or sputtering. Then, the p-side and n-side electrodes 29 and 30 are formed, and the LED chip is formed by dicing.
【００１５】[0015]
【発明が解決しようとする課題】従来のチッ化ガリウム
系化合物半導体を用いた半導体発光素子の製法では、チ
ッ化ガリウム系化合物半導体のｐ型層の活性化を熱処理
により行うと、保護膜を設ける工程が必要であるととも
に、熱処理時間が長くかかり、工数や工期が増加すると
いう問題がある。In the conventional method for manufacturing a semiconductor light emitting device using a gallium nitride based compound semiconductor, a protective film is provided when the p-type layer of the gallium nitride based compound semiconductor is activated by heat treatment. There is a problem that the process is required and the heat treatment time is long and the man-hour and the work period are increased.
【００１６】また、従来の電子線照射による方法では、
電子線の描画装置が走査型電子顕微鏡（ＳＥＭ）を基に
した構造であり、電子ビームの径が大きく、しかも走査
は手動で行われるために、走査にムラが生じ、ウェハ内
での加熱にバラツキが生じ、均一な活性化を行えない。
そのため完全な低抵抗化を達成できないという問題があ
る。In the conventional method using electron beam irradiation,
The electron beam drawing device has a structure based on a scanning electron microscope (SEM), the diameter of the electron beam is large, and the scanning is performed manually. Variations occur and uniform activation cannot be performed.
Therefore, there is a problem that a complete reduction in resistance cannot be achieved.
【００１７】本発明はこのような問題を解決し、ｐ型半
導体層を短時間で均一に加熱し、所要範囲の全体を活性
化して低抵抗のｐ型層がえられるチッ化ガリウム系化合
物半導体を用いた半導体発光素子の製法を提供すること
を目的とする。The present invention solves such a problem, and uniformly heats the p-type semiconductor layer in a short time to activate the entire required range to obtain a p-type layer having a low resistance. An object of the present invention is to provide a method for manufacturing a semiconductor light emitting device using.
【００１８】[0018]
【課題を解決するための手段】本発明の半導体発光素子
の製法は、基板上に少なくともｎ型層とｐ型層とを有す
るチッ化ガリウム系化合物半導体層を積層し、前記ｐ型
層の活性化処理を行う半導体発光素子の製法であって、
前記活性化処理をビーム径が１μｍ以下の電子線描画装
置を用いて所定範囲を走査することにより行うことを特
徴とする。According to the method of manufacturing a semiconductor light emitting device of the present invention, a gallium nitride based compound semiconductor layer having at least an n-type layer and a p-type layer is laminated on a substrate, and the activity of the p-type layer is increased. A method of manufacturing a semiconductor light-emitting element, which comprises a chemical conversion treatment, comprising:
The activation process is performed by scanning a predetermined range using an electron beam drawing apparatus having a beam diameter of 1 μm or less.
【００１９】前記電子線描画装置のビーム径が０．０１
〜０．２μｍであることが、走査のムラがなく、加熱に
バラツキが生じないため好ましい。The beam diameter of the electron beam drawing apparatus is 0.01
It is preferable that the thickness is 0.2 μm because there is no unevenness in scanning and there is no variation in heating.
【００２０】前記所定範囲の走査を前記電子線描画装置
のビーム径のピッチで相対移動させながら行うことが全
面を均一に走査することができるため好ましい。It is preferable that the scanning of the predetermined range is performed while relatively moving at a pitch of the beam diameter of the electron beam drawing apparatus because the entire surface can be uniformly scanned.
【００２１】[0021]
【作用】本発明によれば、ｐ型層の活性化処理をビーム
径が１μｍ以下の電子線描画装置を用いて走査すること
により行うので、活性化処理を行うべき範囲にもれなく
正確に同じ強さの電子ビームを照射し均一な温度にする
ことができる。その結果、均一な活性化処理がなされ、
所要範囲の全体を充分低抵抗化することができ、低い電
圧で明るい輝度の発光をうることができる。According to the present invention, since the activation treatment of the p-type layer is performed by scanning with an electron beam drawing apparatus having a beam diameter of 1 μm or less, the activation treatment can be performed in exactly the same intensity range without exception. It is possible to irradiate an electron beam of a certain depth to obtain a uniform temperature. As a result, a uniform activation process is performed,
The entire required range can be made sufficiently low in resistance, and light emission with bright brightness can be obtained at a low voltage.
【００２２】[0022]
【実施例】つぎに添付図面を参照しながら本発明の半導
体発光素子の製法を説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a semiconductor light emitting device of the present invention will be described below with reference to the accompanying drawings.
【００２３】図１は本発明の半導体発光素子の製法の一
実施例の工程断面説明図である。FIG. 1 is a sectional view showing the steps of an embodiment of a method for manufacturing a semiconductor light emitting device according to the present invention.
【００２４】まず、図１（ａ）に示されるように、サフ
ァイアなどからなる基板１に、ＭＯＣＶＤ法によりたと
えばｎ型ＧａＮなどのチッ化ガリウム系半導体層からな
る低温バッファ層２および高温バッファ層３をそれぞれ
０．０１〜０．２μｍ、２〜５μｍ程度成長する。その
のち、たとえばｎ型Ａｌx Ｇａ1-x Ｎ（０＜ｘ＜１）か
らなるｎ型クラッド層４、ノンドープまたはｎ型もしく
はｐ型のＧａy Ｉｎ1-y Ｎ（０＜ｙ≦１）からなる活性
層５、ｐ型Ａｌx Ｇａ1-x Ｎからなるｐ型クラッド層
６、ｐ型ＧａＮからなるキャップ層７を順次積層する。
クラッド層４、６は通常０．１〜０．３μｍ程度、活性
層５は０．０５〜０．１μｍ程度、キャップ層７は０．
３〜１μｍ程度の厚さにそれぞれ形成される。これらの
チッ化ガリウム系半導体層の成膜は従来技術で説明した
のと同様の原料ガスを導入し、反応させて成長する。First, as shown in FIG. 1A, a low temperature buffer layer 2 and a high temperature buffer layer 3 made of a gallium nitride based semiconductor layer such as n-type GaN are formed on a substrate 1 made of sapphire by MOCVD. Of 0.01 to 0.2 μm and 2 to 5 μm, respectively. After that, for example, an n - type clad layer 4 made of n-type Al x Ga 1-x N (0 <x <1), undoped or n-type or p-type Ga y In 1-y N (0 <y ≦ 1) The active layer 5 made of p-type Al x Ga 1 -x N, the p-type cladding layer 6 made of p-type GaN, and the cap layer 7 made of p-type GaN are sequentially laminated.
The cladding layers 4 and 6 are usually about 0.1 to 0.3 μm, the active layer 5 is about 0.05 to 0.1 μm, and the cap layer 7 is about 0.
Each is formed to a thickness of about 3 to 1 μm. The film formation of these gallium nitride based semiconductor layers is performed by introducing the same raw material gas as described in the prior art and reacting it to grow.
【００２５】前述のチッ化ガリウム系化合物半導体層を
ｎ型にするためには、Ｓｉ、Ｇｅ、ＴｅなどをＳｉ
Ｈ4 、ＧｅＨ4 、ＴｅＨ4 などのガスとして反応ガス内
に混入し、ｐ型にするためにはＭｇやＺｎをＣｐ2 Ｍｇ
またはＤＭＺｎの有機金属ガスとして原料ガスに混入す
る。In order to make the above-mentioned gallium nitride compound semiconductor layer n-type, Si, Ge, Te, etc. are replaced with Si.
In order to mix into the reaction gas as a gas such as H 4 , GeH 4 , and TeH 4 , and to make it p-type, Mg or Zn is replaced with Cp 2 Mg.
Alternatively, it is mixed in the source gas as an organic metal gas of DMZn.
【００２６】そののち、図１（ａ）のチッ化ガリウム系
化合物半導体層に電子線を照射することにより、ｐ型ク
ラッド層６およびキャップ層７の活性化を行う。本発明
ではこのｐ型層の活性化処理をビーム径が１μｍ以下、
さらに好ましくは０．０１〜０．２μｍの電子線描画装
置を用いて所定範囲を走査して行うことに特徴がある。
すなわち、電子線を点状ビームにし、該電子線の照射を
縦横にマトリクス状に移動して電子線の照射を走査する
ものである。ウェハ内で電子線を照射する範囲をあらか
じめコンピュータなどに記憶させておき、ウェハステー
ジを相対移動させてその範囲内のドットマトリクスを順
次走査するプログラムにより自動的に所定範囲への電子
線照射をもれなく行うことができる。ここで、ドットマ
トリクスとは、０．２μｍ程度のピッチをいい、ドット
マトリクスによるプログラムとは、０．２μｍ程度のピ
ッチでビームを照射するように位置を指定することをい
う。After that, the p-type cladding layer 6 and the cap layer 7 are activated by irradiating the gallium nitride compound semiconductor layer of FIG. 1A with an electron beam. In the present invention, this p-type layer activation treatment is performed with a beam diameter of 1 μm or less,
More preferably, it is characterized in that a predetermined range is scanned using an electron beam drawing device of 0.01 to 0.2 μm.
That is, the electron beam is made into a point beam, and the irradiation of the electron beam is moved vertically and horizontally in a matrix to scan the irradiation of the electron beam. The range of electron beam irradiation on the wafer is stored in advance in a computer, etc., and the wafer stage is moved relative to it, and a program that sequentially scans the dot matrix within that range is automatically filled with electron beam irradiation to a predetermined range. It can be carried out. Here, the dot matrix means a pitch of about 0.2 μm, and the program by the dot matrix means designating a position so that the beam is emitted at a pitch of about 0.2 μm.
【００２７】図２に電子線描画装置の概略構成図を示
す。電子線描画装置３９は主に電子銃３１、電子線走査
ユニット３２および電子線収束系３３よりなる。電子銃
３１に５〜２０ｋＶ程度の加速電圧が印加され、電子線
収束系３３には所定の電圧が印加されることにより、電
子銃３１より放射される電子ビーム３４の径は積層され
た化合物半導体層であるウェハ３６の表面で０．０１〜
０．２μｍ程度に収束されるようになっている。また、
電子線走査ユニット３２はたとえば偏向コイルなどで構
成され、印加される電流により発生する磁界で電子ビー
ムを所定の方向に偏向されるように構成され、その方向
はたとえば０．２〜０．５μｍ程度のピッチのドットマ
トリクスの単位で、所定範囲内を順次走査するようにプ
ログラミングすることにより、自動的に所定範囲にもれ
なく電子線を照射することができる。この方法によれ
ば、手動式の方法に比べてドットマトリクスの微小範囲
ごとにもれなく電子線を照射するため、均一に加熱して
クラッド層６およびキャップ層７を活性化することがで
きる。その結果、低抵抗のクラッド層６およびキャップ
層７をうることができるため、従来要した電圧と同じ電
圧値を与えても、高輝度の半導体発光素子がえられる。
なお、電子ビームの径が０．０１〜０．２μｍ程度に絞
られる電子線描画装置としては（株）日立製作所製 商
品名 ＨＬ７００、米国イーペック社製 商品名 ＭＥ
ＢＥＳ ＩＶなどを用いることができる。FIG. 2 shows a schematic configuration diagram of the electron beam drawing apparatus. The electron beam drawing device 39 mainly includes an electron gun 31, an electron beam scanning unit 32, and an electron beam focusing system 33. By applying an acceleration voltage of about 5 to 20 kV to the electron gun 31 and applying a predetermined voltage to the electron beam focusing system 33, the diameter of the electron beam 34 emitted from the electron gun 31 is a stacked compound semiconductor. On the surface of the wafer 36, which is a layer, from 0.01 to
It is designed to converge to about 0.2 μm. Also,
The electron beam scanning unit 32 is composed of, for example, a deflection coil or the like, and is configured to deflect the electron beam in a predetermined direction by a magnetic field generated by an applied current, which direction is, for example, about 0.2 to 0.5 μm. By programming so as to sequentially scan within a predetermined range in units of a dot matrix having a pitch of, it is possible to automatically irradiate the electron beam within the predetermined range. According to this method, the electron beam is irradiated in every minute area of the dot matrix as compared with the manual method, so that the cladding layer 6 and the cap layer 7 can be uniformly heated and activated. As a result, since the clad layer 6 and the cap layer 7 having low resistance can be obtained, a semiconductor light emitting device with high brightness can be obtained even if the same voltage value as that conventionally required is applied.
An electron beam drawing apparatus in which the diameter of the electron beam is reduced to about 0.01 to 0.2 μm is a product name HL700 manufactured by Hitachi, Ltd. and a product name ME manufactured by Yepec Co., USA.
BES IV or the like can be used.
【００２８】前記電子線の照射は化合物半導体が積層さ
れた表面全体に行ってもよいが、前述のようにドットマ
トリクスによるプログラミングに基づく走査をすれば、
細かいパターンで走査をすることができるため、エッチ
ングにより除去する部分など不必要部分を除いた所定範
囲のみを走査させることができ、ムダがなくなり、短時
間で必要部分の活性化を行うことができる。The electron beam irradiation may be performed on the entire surface on which the compound semiconductors are laminated, but if scanning is performed based on programming by the dot matrix as described above,
Since it is possible to scan in a fine pattern, it is possible to scan only a predetermined range excluding unnecessary parts such as a part to be removed by etching, waste is eliminated, and necessary parts can be activated in a short time. .
【００２９】さらに前述の例では電子線走査ユニット３
２により電子ビームを偏向させることでドットマトリク
スの走査を行ったが、電子ビームは一定のままで、ウェ
ハ３６を載置するステージ３７をドットマトリクスのプ
ログラミングに基づいて移動させることによっても所定
範囲内の電子ビーム照射を行うことができる。Further, in the above-mentioned example, the electron beam scanning unit 3
The dot matrix was scanned by deflecting the electron beam by means of 2. However, the electron beam remains constant, and the stage 37 on which the wafer 36 is mounted is moved within a predetermined range by moving based on the programming of the dot matrix. The electron beam irradiation can be performed.
【００３０】つぎに図１（ｂ）に示されるように、積層
された半導体層の表面にレジスト膜１０を設け、パター
ニングして開口部を設け、たとえばＣｌ2 およびＢＣｌ
3 の混合ガスなどの塩素系プラズマによる反応性イオン
エッチングを行い、活性層５を貫通してｎ型のクラッド
層４または高温バッファ層３が露出するまでエッチング
する。Next, as shown in FIG. 1B, a resist film 10 is provided on the surface of the stacked semiconductor layers and patterned to form an opening, for example, Cl 2 and BCl.
Reactive ion etching is performed by chlorine-based plasma such as a mixed gas of 3 to penetrate the active layer 5 until the n-type cladding layer 4 or the high temperature buffer layer 3 is exposed.
【００３１】ついで図１（ｃ）に示されるように、Ａ
ｕ、Ａｌなどの金属膜を蒸着、スパッタリングなどによ
り形成し、積層された化合物半導体層の表面でｐ型層に
電気的に接続されるｐ側電極８、露出した高温バッファ
層３の表面またはｎ型クラッド層４の表面でｎ型層に電
気的に接続されるｎ側電極９を形成する。Then, as shown in FIG. 1 (c), A
A metal film of u, Al, or the like is formed by vapor deposition, sputtering, or the like, and the p-side electrode 8 electrically connected to the p-type layer on the surface of the stacked compound semiconductor layers, the exposed surface of the high-temperature buffer layer 3, or n. An n-side electrode 9 electrically connected to the n-type layer is formed on the surface of the mold clad layer 4.
【００３２】つぎに、各チップにダイシングして、ＬＥ
Ｄチップが形成される。Next, each chip is diced to obtain LE.
A D chip is formed.
【００３３】前記実施例ではダブルヘテロ接合のＬＥＤ
であったが、通常のｐｎ接合のＬＥＤや種々の構造のＬ
Ｄなどでも同様に適用できる。また、チッ化ガリウム系
化合物半導体についても、前述の組成の材料に限定され
ず、一般にＡｌp Ｇａq Ｉｎ1-p-q Ｎ（０≦ｐ＜１、０
＜ｑ≦１、０＜ｐ＋ｑ≦１）からなり、たとえば活性層
のバンドギャップエネルギーがクラッド層のバンドギャ
ップエネルギーより小さくなるように各組成の比率が選
定されるよう、ｐ、ｑを選定して組成量を変化させたも
のでもよい。また、前記Ａｌp Ｇａq Ｉｎ1-p-q ＮのＮ
の一部または全部をＡｓおよび／またはＰなどで置換し
た材料でも同様に本発明を適用できる。In the above embodiment, a double heterojunction LED
However, normal pn junction LEDs and L of various structures
The same applies to D and the like. Further, the gallium nitride based compound semiconductor is not limited to the material having the above-mentioned composition, and is generally Al p Ga q In 1 -pq N (0 ≦ p <1,0
<Q ≦ 1, 0 <p + q ≦ 1), and p and q are selected so that the composition ratios are selected such that the bandgap energy of the active layer is smaller than the bandgap energy of the cladding layer. The composition amount may be changed. In addition, N of the Al p Ga q In 1-pq N
The present invention can be similarly applied to a material in which a part or all of is replaced with As and / or P or the like.
【００３４】[0034]
【発明の効果】本発明の半導体発光素子の製法によれ
ば、ｐ型層の活性化をする必要がある部分に確実に電子
線照射を行うことができるために、低抵抗のｐ型層がえ
られ、発光効率が向上し輝度の大きい半導体発光素子を
うることができる。According to the method for manufacturing a semiconductor light emitting device of the present invention, since a portion of the p-type layer that needs to be activated can be reliably irradiated with an electron beam, a p-type layer having a low resistance can be formed. Thus, it is possible to obtain a semiconductor light emitting device having improved luminous efficiency and high brightness.
【図１】本発明の半導体発光素子の製法の一実施例を示
す工程断面説明図である。FIG. 1 is a process cross-sectional explanatory view showing an example of a method for manufacturing a semiconductor light emitting device of the present invention.
【図２】電子線描画装置の概略構成図である。FIG. 2 is a schematic configuration diagram of an electron beam drawing apparatus.
【図３】従来の半導体発光素子の一例を示す斜視図であ
る。FIG. 3 is a perspective view showing an example of a conventional semiconductor light emitting device.
１ 基板 ４ ｎ型クラッド層 ５ 活性層 ６ ｐ型クラッド層 ３１ 電子銃 ３２ 電子線走査ユニット ３９ 電子線描画装置 1 substrate 4 n-type clad layer 5 Active layer 6 p-type clad layer 31 electron gun 32 electron beam scanning unit 39 Electron beam drawing device
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 33/00 H01L 21/027 H01L 21/263 H01L 21/324 ─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. 7 , DB name) H01L 33/00 H01L 21/027 H01L 21/263 H01L 21/324
Claims (3)
有するチッ化ガリウム系化合物半導体層を積層し、前記
ｐ型層の活性化処理を行う半導体発光素子の製法であっ
て、前記活性化処理をビーム径が１μｍ以下の電子線描
画装置を用いて所定範囲を走査することにより行う半導
体発光素子の製法。1. A method for manufacturing a semiconductor light emitting device, comprising: laminating a gallium nitride based compound semiconductor layer having at least an n-type layer and a p-type layer on a substrate, and activating the p-type layer. A method for manufacturing a semiconductor light emitting device, which comprises performing an activation treatment by scanning a predetermined range using an electron beam drawing apparatus having a beam diameter of 1 μm or less.
ある請求項１記載の半導体発光素子の製法。2. The method for manufacturing a semiconductor light emitting device according to claim 1, wherein the beam diameter is 0.01 to 0.2 μm.
置のビーム径のピッチで相対移動させながら行う請求項
１記載の半導体発光素子の製法。3. The method for manufacturing a semiconductor light emitting device according to claim 1, wherein the scanning of the predetermined range is performed while relatively moving at a pitch of a beam diameter of the electron beam drawing apparatus.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP05769195A JP3495808B2 (en) | 1995-03-16 | 1995-03-16 | Manufacturing method of semiconductor light emitting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP05769195A JP3495808B2 (en) | 1995-03-16 | 1995-03-16 | Manufacturing method of semiconductor light emitting device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08255927A JPH08255927A (en) | 1996-10-01 |
| JP3495808B2 true JP3495808B2 (en) | 2004-02-09 |
Family
ID=13062975
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP05769195A Expired - Fee Related JP3495808B2 (en) | 1995-03-16 | 1995-03-16 | Manufacturing method of semiconductor light emitting device |
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| Country | Link |
|---|---|
| JP (1) | JP3495808B2 (en) |
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|---|---|---|---|---|
| KR100916489B1 (en) * | 2007-07-27 | 2009-09-08 | 엘지이노텍 주식회사 | Semiconductor light emitting device and fabrication method thereof |
| KR100921143B1 (en) * | 2008-12-18 | 2009-10-12 | 엘지이노텍 주식회사 | Semiconductor light emitting device |
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1995
- 1995-03-16 JP JP05769195A patent/JP3495808B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08255927A (en) | 1996-10-01 |
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