JP3482313B2 - Dresser for polishing cloth for semiconductor substrate and method of manufacturing the same - Google Patents
Dresser for polishing cloth for semiconductor substrate and method of manufacturing the sameInfo
- Publication number
- JP3482313B2 JP3482313B2 JP00966197A JP966197A JP3482313B2 JP 3482313 B2 JP3482313 B2 JP 3482313B2 JP 00966197 A JP00966197 A JP 00966197A JP 966197 A JP966197 A JP 966197A JP 3482313 B2 JP3482313 B2 JP 3482313B2
- Authority
- JP
- Japan
- Prior art keywords
- diamond
- dresser
- semiconductor substrate
- polishing
- polishing cloth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Grinding-Machine Dressing And Accessory Apparatuses (AREA)
Description
【発明の詳細な説明】Detailed Description of the Invention
【0001】[0001]
【発明の属する技術分野】本発明は、半導体基板の平面
化研磨工程で、研磨布の目詰まりや異物除去を行う際に
使用される半導体基板用研磨布のドレッサーに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dresser for a semiconductor substrate polishing cloth used for removing clogging of a polishing cloth and removing foreign matters in a flattening polishing process for a semiconductor substrate.
【0002】[0002]
【従来の技術】集積回路を製造する所定の段階で、ウエ
ーハやウエーハ表面に導電体・誘電体層が形成された半
導体基板の表面を研磨することが必要である。半導体基
板は研磨されて、高い***や結晶格子損傷、引っかき
傷、粗さ等の表面欠陥、または埋もれた異物粒子が除去
される。この研磨工程は、半導体装置の信頼性および品
質を改良するために行われる。通常、この工程は、ウエ
ーハ上に種々の装置および集積回路を形成する間に行わ
れる。この研磨工程では、化学スラリーを導入すること
により、半導体表面に、より大きな研磨除去速度および
選択度を与えようとする。この研磨工程はしばしば、化
学的かつ機械的平面化(CMP:Chemical Mechanical
Planarization )と呼ばれる。一般に、CMP工程は、
薄くかつ平坦な半導体材料を制御された圧力および温度
下で、湿った研磨表面に対して保持し、かつ回転させる
工程を含む。2. Description of the Related Art At a predetermined stage of manufacturing an integrated circuit, it is necessary to polish the surface of a wafer or a semiconductor substrate having a conductor / dielectric layer formed on the surface of the wafer. The semiconductor substrate is polished to remove high bumps, crystal lattice damage, scratches, surface defects such as roughness, or buried foreign particles. This polishing process is performed to improve the reliability and quality of the semiconductor device. This step is typically performed during the formation of various devices and integrated circuits on the wafer. In this polishing step, the chemical slurry is introduced to give a higher polishing removal rate and selectivity to the semiconductor surface. This polishing process is often performed by chemical and mechanical planarization (CMP).
Planarization). Generally, the CMP process is
Holding and rotating a thin and flat semiconductor material under controlled pressure and temperature against a wet polishing surface.
【0003】CMP工程では、例えば5〜300nm程
度の粒径を有するシリカ粒子を苛性ソーダ、アンモニア
およびアミン等のアルカリ溶液に懸濁させてpH9〜1
2程度にした化学スラリーとポリウレタン樹脂等からな
る研磨布が用いられる。研磨時には化学スラリーを流布
しながら、半導体基板を研磨布に当接させて相対回転さ
せることにより、研磨が行われる。そして研磨布のドレ
ッシング法としては、研磨布に水または化学スラリーを
流しながら、ダイヤモンド電着砥石またはブラッシ等を
用いたブラッシングにより、研磨布の内部の目詰まり、
異物の除去を行っていた。In the CMP process, silica particles having a particle size of, for example, about 5 to 300 nm are suspended in an alkaline solution of caustic soda, ammonia, amine or the like to have a pH of 9 to 1.
A polishing cloth made of about 2 chemical slurry and polyurethane resin is used. During the polishing, the semiconductor substrate is brought into contact with the polishing cloth and relatively rotated while the chemical slurry is being spread, whereby the polishing is performed. And as a dressing method of the polishing cloth, while flowing water or chemical slurry to the polishing cloth, by brushing using a diamond electrodeposition grindstone or brush, clogging of the inside of the polishing cloth,
Foreign objects were being removed.
【0004】CMP工程で使用されるドレッサーは、切
削や研削で使用される従来のダイヤモンド工具とは、次
の点で本質的に異なっている。切削工具ではダイヤモン
ドが少量脱落しても、ダイヤモンド脱落後の新生面に別
のダイヤモンドが残っていれば、切削能力の低下にはな
らないのに対して、CMPドレッサーでは脱落したダイ
ヤモンド砥粒が研磨布や半導体基板表面を傷つけるた
め、ダイヤモンドの脱落が少量でも許されない点であ
る。また、湿式で低い回転数で使用されるので、切削工
具で求められる耐熱性や極端な耐摩耗性は必要ない点で
ある。ダイヤモンド粒の脱落が問題になる従来のダイヤ
モンド工具としては、単粒の比較的大きなダイヤモンド
(一般的には直径1mm程度以上)を金属シャンクに接
合した工具用のドレッサーがある。しかし、CMP工程
で使用されるドレッサーとは、次の点で本質的に異なっ
ている。従来の工具用ドレッサーでは、比較的大きなダ
イヤモンド(一般的には直径1mm程度以上)を単粒で
接合するのに対して、CMP工程で使用されるドレッサ
ーは、比較的小さい(直径50〜300μm)ダイヤモ
ンドを単層で面状に接合している。また、CMP工程で
使用されるドレッサーは、湿式で低い回転数で使用され
るので、工具用ドレッサーで求められる耐熱性や極端な
耐摩耗性は必要ない点である。The dresser used in the CMP process is essentially different from the conventional diamond tools used in cutting and grinding in the following points. Even if a small amount of diamond falls off with a cutting tool, if another diamond remains on the new surface after the diamond falls off, the cutting ability will not decrease, whereas with the CMP dresser, the dropped diamond abrasive particles This is because the surface of the semiconductor substrate is damaged, and even a small amount of diamond is not allowed to fall off. Further, since it is used in a wet condition at a low rotational speed, it does not require heat resistance and extreme wear resistance required for a cutting tool. As a conventional diamond tool in which the dropping of diamond grains is a problem, there is a dresser for a tool in which a relatively large single grain diamond (generally having a diameter of about 1 mm or more) is joined to a metal shank. However, it is essentially different from the dresser used in the CMP process in the following points. In the conventional dresser for tools, a relatively large diamond (generally having a diameter of about 1 mm or more) is bonded by a single grain, whereas the dresser used in the CMP process is relatively small (diameter 50 to 300 μm). A single layer of diamond is joined in a plane. Further, since the dresser used in the CMP process is used in a wet type at a low rotation speed, it does not require the heat resistance and the extreme wear resistance required for the dresser for a tool.
【0005】[0005]
【発明が解決しようとする課題】従来の研磨布のドレッ
シング法においては、ダイヤモンド粒をニッケル電着し
た砥石を用いたドレッシングを行っていた。ニッケルの
電着は、比較的容易に金属支持部材に適用できるので広
く用いられてきた。しかし、ダイヤモンドとの接合強度
が充分ではなく、しばしばダイヤモンド粒の脱落や欠損
が起こり、研磨布や半導体基板にキズを付ける原因とな
っていた。このため、ダイヤモンド粒の脱落のないドレ
ッサーが求められていた。In the conventional dressing method for a polishing cloth, dressing is carried out using a grindstone in which diamond grains are nickel electrodeposited. Electrodeposition of nickel has been widely used because it can be applied to metal support members relatively easily. However, the bonding strength with diamond is not sufficient, and the diamond grains often fall off or become defective, causing scratches on the polishing cloth or the semiconductor substrate. Therefore, there has been a demand for a dresser in which diamond grains do not fall off.
【0006】そこで、本発明は、研磨布のドレッシング
において、スクラッチ傷を最小限に抑え、歩留まり高
く、安定した研磨速度が得られる半導体基板用研磨布の
ドレッサーを提供することを目的としている。Therefore, an object of the present invention is to provide a dresser for a polishing cloth for semiconductor substrates, which can minimize scratches in dressing of the polishing cloth, have a high yield, and can obtain a stable polishing rate.
【0007】[0007]
【課題を解決するための手段】本発明は、炭化チタン、
炭化ジルコニウムおよび炭化クロムの内より選ばれた、
少なくとも1種よりなり、気相法により作製され、厚さ
が0.1〜10μmである被膜を有するダイヤモンド粒
子を、融点650℃〜1200℃、厚さがダイヤモンド
粒径の0.2〜1.5倍の合金を用いて、金属および/
または合金からなる支持部材に、単層で、真空中、65
0℃〜1200℃でろう付けすることを特徴とする、半
導体基板の平面化研磨工程で使用される半導体基板用研
磨布のドレッサーの製造方法である。The present invention is a titanium carbide,
Selected from zirconium carbide and chromium carbide,
Consists of at least one, is prepared by a vapor phase method, the diamond particles having a target film thickness is 0.1 to 10 [mu] m, melting point 650 ° C. to 1200 ° C., the thickness of the diamond
Using an alloy having a grain size of 0.2 to 1.5 times , a metal and /
Alternatively, the support member made of an alloy may be used as a single layer in a vacuum of 65
A method for manufacturing a dresser for a polishing cloth for a semiconductor substrate used in a flattening polishing step for a semiconductor substrate, which comprises brazing at 0 ° C to 1200 ° C.
【0008】好ましくは、前記金属炭化物被覆膜は炭化
チタンよりなることを特徴とする。また、前記金属炭化
物被覆膜はイオンプレーティング法、真空蒸着法、スパ
ッタリング法、およびCVD法などの気相法により作製
され、厚さ0.1〜10μmであることを特徴とする。
あるいは、ダイヤモンド粒が、径50μm以上300μ
m以下であることを特徴とする半導体基板用研磨布のド
レッサーである。[0008] Preferably, the metal carbide coating film is made of titanium carbide. Further, the metal carbide coating film is produced by a vapor phase method such as an ion plating method, a vacuum deposition method, a sputtering method, and a CVD method, and has a thickness of 0.1 to 10 μm.
Alternatively, the diamond grains have a diameter of 50 μm or more and 300 μm.
It is a dresser for a polishing cloth for semiconductor substrates, characterized in that it is m or less.
【0009】[0009]
【0010】[0010]
【作用】本発明によって製作された半導体基板用研磨布
のドレッサーは、ダイヤモンド粒の脱落によるスクラッ
チ傷を最小限に抑えることができる。その結果、加工精
度が高く、歩留まりの高い半導体製造が可能となる。ダ
イヤモンドとろう付け合金との接合は、ろう付け合金と
の界面に炭化チタン、炭化ジルコニウムおよび炭化クロ
ムなどよりなる層が形成されることで著しく接合強度が
上昇する。本発明者らは、炭化チタン、炭化ジルコニウ
ムおよび炭化クロムの内より選ばれた、少なくとも1種
よりなる被膜を有するダイヤモンド粒子を使用すること
により、ダイヤモンドとろう付け合金との界面に金属炭
化物層が形成されることを確認した。界面に金属炭化物
層が形成されるためには、ダイヤモンド粒子には、厚さ
0.1μm以上の炭化チタン、炭化ジルコニウムおよび
炭化クロムなどよりなる被覆膜が必要となる。界面にお
ける金属炭化物層形成による接合強度向上は、炭化チタ
ン、炭化ジルコニウムおよび炭化クロムなどよりなる被
覆層の厚さが10μmあれば充分な効果がえられるの
で、10μm以内とする。The dresser for a polishing cloth for a semiconductor substrate manufactured according to the present invention can minimize scratches caused by falling of diamond grains. As a result, it is possible to manufacture semiconductors with high processing accuracy and high yield. Bonding between diamond and a brazing alloy remarkably increases the bonding strength by forming a layer of titanium carbide, zirconium carbide, chromium carbide or the like at the interface between the brazing alloy. The present inventors have used a diamond particle having a coating film made of at least one selected from titanium carbide, zirconium carbide and chromium carbide, whereby a metal carbide layer is formed at the interface between the diamond and the brazing alloy. It was confirmed that it was formed. In order to form the metal carbide layer at the interface, the diamond particles require a coating film made of titanium carbide, zirconium carbide, chromium carbide or the like having a thickness of 0.1 μm or more. The improvement of the bonding strength due to the formation of the metal carbide layer at the interface can be sufficiently effected if the thickness of the coating layer made of titanium carbide, zirconium carbide, chromium carbide, etc. is 10 μm, and therefore is within 10 μm.
【0011】ろう付け合金を融点650℃〜1200℃
の合金とするのは、650℃以下のろう付け温度では、
接合強度が得られず、1200℃以上のろう付け温度で
は、ダイヤモンドの劣化が起こるので好ましくないから
である。ろう付け合金の厚さは、ダイヤモンド粒径の
0.2〜1.5倍の厚さが適当である。薄すぎるとダイ
ヤモンドとろう付け合金との接合強度が低くなり、厚す
ぎるとろう材と支持部材との剥離がおこりやすくなる。The brazing alloy has a melting point of 650 ° C. to 1200 ° C.
The alloy of is that at a brazing temperature of 650 ° C or lower,
This is because the bonding strength cannot be obtained, and if the brazing temperature is 1200 ° C. or higher, the diamond is deteriorated, which is not preferable. A suitable brazing alloy thickness is 0.2 to 1.5 times the diamond grain size. If it is too thin, the bonding strength between the diamond and the brazing alloy will be low, and if it is too thick, the brazing material and the supporting member will be easily separated.
【0012】ダイヤモンド粒の径は、50μm以上30
0μm以下とすることが好ましい。50μm以下のダイ
ヤモンドでは充分な研磨速度が得られず、300μmで
あれば充分な研磨速度が得られる。また、50μm以下
の微粒のダイヤモンドでは凝集し易い傾向があり、凝集
しクラスターを形成すると脱落し易くなり、スクラッチ
傷の原因となる。300μm以上の粗粒のダイヤモンド
は、研磨時の応力集中が大きく脱落し易くなるので、5
0μm以上300μm以下とする。The diameter of diamond grains is 50 μm or more and 30
It is preferably 0 μm or less. Sufficient polishing rate cannot be obtained with diamond of 50 μm or less, and sufficient polishing rate can be obtained with diamond of 300 μm. Also, fine particles of 50 μm or less tend to agglomerate easily, and if they agglomerate to form clusters, they tend to fall off, causing scratches. Coarse-grained diamond with a diameter of 300 μm or more has a large stress concentration during polishing and is easily removed.
It is set to 0 μm or more and 300 μm or less.
【0013】[0013]
【実施例】イオンプレーティング法を用いて、平均粒径
150μmのダイアモンド粒上に2μmの炭化チタンを
被覆した。その炭化チタン被覆ダイアモンドを用いて、
10−5Torrの真空中、850℃でろう付けを行いドレッ
サーを作製した。上記の発明したドレッサーおよびNi
電着の従来ドレッサーについて、400枚の半導体ウエ
ーハの研磨実験を行った。ドレッシングは1回の研磨毎
に、2分間ドレッシングを行った。その後、400枚研
磨後に、脱落したダイヤモンド粒によるスクラッチ傷が
発生したウエーハ数を調査した。また、一定時間研磨後
のウエーハ研磨速度を調査した。400枚のウエーハの
研磨には約20時間を要した。ウエーハ表面傷およびダ
イヤモンド粒径は電子顕微鏡により観察した。Example Using the ion plating method, 2 μm of titanium carbide was coated on diamond particles having an average particle size of 150 μm. With the titanium carbide coated diamond,
Brazing was performed at 850 ° C. in a vacuum of 10 −5 Torr to prepare a dresser. The above-invented dresser and Ni
A polishing experiment of 400 semiconductor wafers was performed on the conventional electrodeposition dresser. The dressing was performed for 2 minutes for each polishing. Then, after polishing 400 wafers, the number of wafers in which scratches were caused by the dropped diamond grains was investigated. Further, the wafer polishing rate after polishing for a certain period of time was investigated. It took about 20 hours to polish 400 wafers. Wafer surface scratches and diamond grain size were observed by an electron microscope.
【0014】本発明によるドレッサーは、従来のドレッ
サーに比べて大幅にウエーハ表面のスクラッチ傷発生が
低下し、スクラッチ傷の発生したウエーハは従来ドレッ
サー9枚に対して、発明品では0枚であった。また、発
明品において、400枚研磨後の研磨速度の低下は見ら
れなかった。そのため、高いスループットと高い歩留ま
りの半導体基板製造が実現できる。In the dresser according to the present invention, the occurrence of scratches on the surface of the wafer was significantly reduced as compared with the conventional dresser, and the number of the scratched wafers was 9 in the conventional product and 9 in the conventional dresser. . Further, in the invention product, no decrease in polishing rate was observed after polishing 400 sheets. Therefore, high throughput and high yield semiconductor substrate manufacturing can be realized.
【0015】[0015]
【発明の効果】本発明によれば、ダイヤモンド粒の脱落
による半導体基板のスクラッチ傷を最小限に抑えること
が可能になる。また、研磨布の目詰まりを除去し、研磨
布表面を常時新しい時と同様に保持できるため、研磨布
の使用時間に伴う研磨速度の低下も改善でき、加工精度
の高い半導体基板を高い歩留まりで製造できる。According to the present invention, it is possible to minimize scratches on the semiconductor substrate due to the loss of diamond grains. Also, since the clogging of the polishing cloth can be removed and the surface of the polishing cloth can be held at all times in the same manner as when it was new, it is possible to improve the decrease in the polishing rate due to the usage time of the polishing cloth, and to improve the yield of semiconductor substrates with high processing accuracy Can be manufactured.
【図1】本発明の半導体基板用研磨布のドレッサーの断
面模式図である。FIG. 1 is a schematic sectional view of a dresser of a polishing cloth for semiconductor substrates of the present invention.
1 ダイヤモンド粒 2 ろう材合金 3 支持部材 4 炭化チタン層 1 diamond grain 2 brazing alloy 3 Support members 4 Titanium carbide layer
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平7−299731(JP,A) 特開 平1−301070(JP,A) ─────────────────────────────────────────────────── ─── Continued front page (56) Reference JP-A-7-299731 (JP, A) JP-A-1-301070 (JP, A)
Claims (2)
化クロムの内より選ばれた、少なくとも1種よりなり、
気相法により作製され、厚さが0.1〜10μmである
被膜を有するダイヤモンド粒子を、融点650℃〜12
00℃、厚さがダイヤモンド粒径の0.2〜1.5倍の
合金を用いて、金属および/または合金からなる支持部
材に、単層で、真空中、650℃〜1200℃でろう付
けすることを特徴とする、半導体基板の平面化研磨工程
で使用される半導体基板用研磨布のドレッサーの製造方
法。1. At least one selected from titanium carbide, zirconium carbide and chromium carbide,
Is produced by a vapor phase method, is a 0.1~10μm thickness
The diamond particles with the membrane, mp 650 ° C. to 12
Brazing at 650 ° C to 1200 ° C in vacuum in a single layer on a supporting member made of metal and / or alloy at 00 ° C using an alloy having a thickness of 0.2 to 1.5 times the diamond grain size. A method for manufacturing a dresser for a polishing cloth for a semiconductor substrate, which is used in a flattening polishing process for a semiconductor substrate, characterized by comprising:
Law .
0μm以下であることを特徴とする特許請求項第1項に
記載の半導体基板用研磨布のドレッサーの製造方法。2. Diamond grains having a diameter of 50 μm or more and 30 or more.
Method of manufacturing a dresser over the polishing pad for a semiconductor substrate according to paragraph 1 claims, characterized in that 0μm or less.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP00966197A JP3482313B2 (en) | 1997-01-22 | 1997-01-22 | Dresser for polishing cloth for semiconductor substrate and method of manufacturing the same |
AU44729/97A AU4472997A (en) | 1996-10-15 | 1997-10-14 | Semiconductor substrate polishing pad dresser, method of manufacturing the same, and chemicomechanical polishing method using the same dresser |
KR1019997003204A KR100328108B1 (en) | 1996-10-15 | 1997-10-14 | Semiconductor substrate polishing pad dresser, method of manufacturing the same, and chemicomechanical polishing method using the same dresser |
PCT/JP1997/003686 WO1998016347A1 (en) | 1996-10-15 | 1997-10-14 | Semiconductor substrate polishing pad dresser, method of manufacturing the same, and chemicomechanical polishing method using the same dresser |
US09/284,521 US6190240B1 (en) | 1996-10-15 | 1997-10-14 | Method for producing pad conditioner for semiconductor substrates |
US09/714,687 US6752708B1 (en) | 1996-10-15 | 2000-11-16 | Pad conditioner for semiconductor substrates |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP00966197A JP3482313B2 (en) | 1997-01-22 | 1997-01-22 | Dresser for polishing cloth for semiconductor substrate and method of manufacturing the same |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH10202505A JPH10202505A (en) | 1998-08-04 |
JP3482313B2 true JP3482313B2 (en) | 2003-12-22 |
Family
ID=11726406
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP00966197A Expired - Lifetime JP3482313B2 (en) | 1996-10-15 | 1997-01-22 | Dresser for polishing cloth for semiconductor substrate and method of manufacturing the same |
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JP (1) | JP3482313B2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005288685A (en) * | 2004-03-10 | 2005-10-20 | Read Co Ltd | Dresser for polishing cloth, and manufacturing method thereof |
US20070020457A1 (en) * | 2005-07-21 | 2007-01-25 | 3M Innovative Properties Company | Composite particle comprising an abrasive grit |
CN108161778B (en) * | 2017-12-27 | 2020-06-30 | 汕头大学 | Diamond grinding head and preparation process thereof |
-
1997
- 1997-01-22 JP JP00966197A patent/JP3482313B2/en not_active Expired - Lifetime
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Publication number | Publication date |
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JPH10202505A (en) | 1998-08-04 |
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