JP3324955B2 - Distortion compensation amplifier - Google Patents
Distortion compensation amplifierInfo
- Publication number
- JP3324955B2 JP3324955B2 JP08720597A JP8720597A JP3324955B2 JP 3324955 B2 JP3324955 B2 JP 3324955B2 JP 08720597 A JP08720597 A JP 08720597A JP 8720597 A JP8720597 A JP 8720597A JP 3324955 B2 JP3324955 B2 JP 3324955B2
- Authority
- JP
- Japan
- Prior art keywords
- distortion
- signal
- amount
- phase
- vector adjuster
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Amplifiers (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、自動車電話システ
ムの基地局および中継装置に用いられる歪補償増幅装置
に関し、特に、その装置の実用上発生する技術的問題点
の改善に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distortion compensation amplifying device used for a base station and a relay device of an automobile telephone system, and more particularly to improvement of a technical problem that occurs in the practical use of the device.
【０００２】[0002]
【従来の技術】例えば、中継装置は、基地局からの電波
を増幅し、移動局に対して電波を送出する。この場合、
多チャネルの電波を同時に増幅するため非線形歪補償回
路として自己調整形フィードフォワード（ＳＡＦＦ：Se
lf Adjusting Feed Forward ）回路と呼ばれる歪補償増
幅回路を実装した装置が用いられている。2. Description of the Related Art For example, a relay device amplifies a radio wave from a base station and transmits the radio wave to a mobile station. in this case,
Self-adjusting feedforward (SAFF: Se) as a nonlinear distortion compensation circuit to simultaneously amplify multi-channel radio waves
A device equipped with a distortion compensation amplifier circuit called an lf Adjusting Feed Forward (circuit) is used.
【０００３】図３は、従来のフィードフォワード形歪補
償増幅回路例図である。図において、１，４，９は方向
性結合器、２，７はベクトル調整器、３は主増幅器、
５，６は遅延線、８は補助増幅器、１０は増幅器、１１
はパイロット信号発生器、１２は検波器、１３はパイロ
ット信号受信器である。（ａ），（ｂ），（ｃ），
（ｄ），（ｅ）は各部の周波数スペクトラムを示す。方
向性結合器１と４の間の回路は歪検出ループであり、入
力多周波信号が主増幅器３で増幅されるとき発生する相
互変調歪，雑音などの歪成分（誤差成分）を検出する。
例えば、特定の２波（ａ）を入力信号としたとき、
（ｂ）は主増幅器３の出力を示し、増幅された入力信号
に歪成分が加わっている。方向性結合器４と９の間の回
路は歪除去ループであり、上記の歪検出ループで検出さ
れた誤差成分を補助増幅器８で所望の値に増幅して位相
を反転した信号と、遅延線６を介して方向性結合器９に
入力される歪成分を含んだ増幅信号とを逆相加算する。
（ｃ）は位相反転された歪成分を示す。このようにして
主増幅器３で増幅したとき発生した歪成分が除去（相
殺）された２波増幅信号（ｄ）が出力される。FIG. 3 is a diagram showing an example of a conventional feedforward distortion compensation amplifier circuit. In the figure, 1, 4, 9 are directional couplers, 2, 7 are vector adjusters, 3 is a main amplifier,
5, 6 are delay lines, 8 is an auxiliary amplifier, 10 is an amplifier, 11
Is a pilot signal generator, 12 is a detector, and 13 is a pilot signal receiver. (A), (b), (c),
(D) and (e) show the frequency spectrum of each part. The circuit between the directional couplers 1 and 4 is a distortion detection loop, and detects distortion components (error components) such as intermodulation distortion and noise generated when the input multi-frequency signal is amplified by the main amplifier 3.
For example, when two specific waves (a) are input signals,
(B) shows the output of the main amplifier 3, in which a distortion component is added to the amplified input signal. The circuit between the directional couplers 4 and 9 is a distortion removal loop. The signal obtained by amplifying the error component detected by the above-described distortion detection loop to a desired value by the auxiliary amplifier 8 and inverting the phase, and the delay line 6 and the amplified signal including the distortion component input to the directional coupler 9 via the negative phase adder 6.
(C) shows a phase-inverted distortion component. In this way, a two-wave amplified signal (d) from which the distortion component generated when amplified by the main amplifier 3 is removed (canceled) is output.
【０００４】ベクトル調整器２，７、及びパイロット信
号発生器１１，検波器１２，受信器１３，制御回路１４
は、歪検出ループで取り出した歪成分を歪除去ループで
除去するための最適調整値を設定するために設けられて
いる。制御回路１４には、増幅器１０で増幅された歪成
分（ｅ）を検波する検波器１２の検波出力と、パイロッ
ト信号を受信検出する受信器１３からのパイロット信号
とが入力され、それぞれアナログ量をディジタル変換す
るＡ／Ｄ変換器１５，１６によってディジタル変換さ
れ、それぞれディジタル信号処理によって歪補償最適値
を判定した後、Ｄ／Ａ変換器１７，１８によってアナロ
グ量の振幅・位相制御信号に変換してベクトル調整器
２，７に入力する。[0004] Vector adjusters 2 and 7, a pilot signal generator 11, a detector 12, a receiver 13, and a control circuit 14
Is provided to set an optimum adjustment value for removing a distortion component extracted by the distortion detection loop by the distortion removal loop. The detection output of the detector 12 for detecting the distortion component (e) amplified by the amplifier 10 and the pilot signal from the receiver 13 for receiving and detecting the pilot signal are input to the control circuit 14, and the analog amounts are respectively controlled. The digital-to-analog converters 15 and 16 perform digital conversion, determine the optimum distortion compensation value by digital signal processing, and convert them into analog amplitude / phase control signals by D / A converters 17 and 18. And input to the vector adjusters 2 and 7.
【０００５】すなわち、歪検出ループのベクトル調整器
２は、歪検出ループで検出した歪成分を増幅器１０で抽
出増幅し、検波器１２で検波した信号をＡ／Ｄ変換器１
５でディジタル化して最適制御値を求めた後、Ｄ／Ａ変
換器１８から出力される制御信号で位相・振幅が調整さ
れ、２波増幅信号の検波出力が最小となるように自己調
整される。一方、歪除去ループのベクトル調整器７は、
歪検出ループの主増幅器３の出力側に注入された例えば
帯域外周波数のパイロット信号を、方向性結合器９の出
力側から、そのレベルを相関検出器などの狭帯域検出器
を備えた受信器１３によって抽出し、Ａ／Ｄ変換器１６
でディジタル化して最適制御値を求めた後、Ｄ／Ａ変換
器１７から出力される制御信号で位相・振幅が調整さ
れ、抽出レベルが最小となるように自己調整される。That is, the vector adjuster 2 of the distortion detection loop extracts and amplifies the distortion component detected by the distortion detection loop by the amplifier 10, and converts the signal detected by the detector 12 to the A / D converter 1.
After obtaining the optimum control value by digitizing in step 5, the phase and amplitude are adjusted by the control signal output from the D / A converter 18, and the self-adjustment is performed so that the detection output of the two-wave amplified signal is minimized. . On the other hand, the vector adjuster 7 of the distortion removal loop
The level of a pilot signal, for example, an out-of-band frequency signal injected into the output side of the main amplifier 3 of the distortion detection loop is converted from the output side of the directional coupler 9 to a receiver provided with a narrow band detector such as a correlation detector. 13 and an A / D converter 16
After obtaining the optimum control value by digitizing the control signal, the phase and amplitude are adjusted by the control signal output from the D / A converter 17, and the self-adjustment is performed so that the extraction level is minimized.
【０００６】[0006]
【発明が解決しようとする課題】図４は２つのベクトル
調整器２と７に対する制御動作説明図である。Ｐは最適
化開始点を示し、Ｓは最適点を示す。従来の制御動作
は、第１のベクトル調整器２の位相器から減衰器の順に
変化させ、更に、移相器，減衰器を変化させるというよ
うに順番が決まっていたため、最適化時間の長い製品も
あれば短い製品もあった。例えば、第２のベクトル調整
器７を調整する場合に、決められた順に従い、先ず位相
器をの方向へ変化させても歪のキャンセル量は少しし
か変化しない。しかし、若し、最初に振幅（減衰器）を
の方向へ変化させるとキャンセル量は３０ｄＢに達す
る。次に、位相器を変化させれば容易に最適点を求める
ことができる。すなわち、図４の例の場合、決められた
順に制御すると時間がかかる。FIG. 4 is an explanatory view of the control operation for the two vector adjusters 2 and 7. P indicates the optimization start point, and S indicates the optimum point. In the conventional control operation, the order is determined such that the phase shifter and the attenuator of the first vector adjuster 2 are changed in order, and further the phase shifter and the attenuator are changed. Some were short products. For example, when the second vector adjuster 7 is adjusted, the amount of distortion cancellation only slightly changes even if the phase shifter is first changed in the direction according to the determined order. However, if the amplitude (attenuator) is first changed in the direction, the cancellation amount reaches 30 dB. Next, the optimum point can be easily obtained by changing the phase shifter. That is, in the case of the example of FIG. 4, it takes time to perform control in the determined order.
【０００７】本発明の目的は、従来の最適化時間のばら
つき低減し、最適点を短時間に求める制御を行わせるよ
うにした歪補償増幅装置を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a distortion-compensating amplification apparatus in which a conventional variation in optimization time is reduced and a control for finding an optimum point in a short time is performed.
【０００８】[0008]
【課題を解決するための手段】本発明の歪補償増幅装置
は、多周波入力信号を主増幅器で増幅する際に発生する
相互変調歪を補償するため、入力信号を第１のベクトル
調整器を介して前記主増幅器で増幅した信号と前記入力
信号を第１の遅延線を介した逆相信号とにより歪成分を
検出する歪検出ループと、前記歪成分を第２のベクトル
調整器を介して補助増幅器によってレベルを合わせた逆
相信号と前記主増幅器で増幅した信号を第２の遅延線を
介した信号とにより歪成分を相殺して出力する歪除去ル
ープと、前記歪検出ループから抽出した多周波波入力信
号の検波レベルおよび前記歪検出ループに注入し前記歪
除去ループから抽出したパイロット信号の検出レベルが
それぞれ最小になるように、前記第１のベクトル調整器
および前記第２のベクトル調整器の減衰量と位相量を調
整する制御回路とから構成された歪補償増幅装置におい
て、前記制御回路は、まず、前記歪検出ループの第１の
ベクトル調整器の振幅と位相をそれぞれ一定量変化させ
て検出した検波レベルの変化量を比較し該変化量の大き
い方から順に変化させて最適化を行い、次に、前記歪除
去ループの第２のベクトル調整器の振幅と位相をそれぞ
れ一定量変化させて検出したパイロットレベルの変化量
を比較し該変化量の大きい方から順に変化させて最適化
を行うようにしたことを特徴とするものである。In order to compensate for intermodulation distortion generated when a multi-frequency input signal is amplified by a main amplifier, a distortion compensating amplifier according to the present invention converts an input signal to a first vector adjuster. A distortion detection loop for detecting a distortion component from the signal amplified by the main amplifier and the inverted signal from the input signal via a first delay line, and the distortion component via a second vector adjuster. It is extracted from a distortion removal loop that cancels out a distortion component by an inverted-phase signal whose level is adjusted by an auxiliary amplifier and a signal amplified by the main amplifier through a signal through a second delay line, and outputs the distortion detection loop. The first vector adjuster and the second vector adjuster so that the detection level of the multi-frequency wave input signal and the detection level of the pilot signal injected into the distortion detection loop and extracted from the distortion removal loop are respectively minimized. In the distortion compensating amplifying device comprising a control circuit for adjusting the attenuation amount and the phase amount of the vector adjuster, the control circuit first sets the amplitude and the phase of the first vector adjuster of the distortion detection loop to be constant. The amount of change in the detected level is compared with the amount of change detected, and optimization is performed by changing the amount of change in descending order, and then the amplitude and phase of the second vector adjuster of the distortion removal loop are respectively adjusted. It is characterized in that the amount of change in the pilot level detected by changing the amount by a certain amount is compared, and optimization is performed by sequentially changing the amount of change from the larger one.
【０００９】[0009]
【発明の実施の形態】図１は本発明の実施例を示す回路
例図であり、制御回路１４に不揮発性メモリ１９が設け
られている。他の符号は図３の従来回路の同一部分を示
す。不揮発性メモリ１９は、バッテリバックアップＲＡ
Ｍ（又はＥ2 ＰＲＯＭ）である。FIG. 1 is a circuit diagram showing an embodiment of the present invention. A control circuit 14 is provided with a nonvolatile memory 19. Other symbols indicate the same parts of the conventional circuit of FIG. The non-volatile memory 19 has a battery backup RA
M (or E 2 PROM).
【００１０】図２は本発明の最適化動作を示すフローチ
ャートであり、２１〜３１はステップ番号を示す。制御
回路１４は、まず、ステップ２１で、歪検出ループのベ
クトル調整器２の位相をある固定値で増減させ、検波レ
ベルがどれだけ変化するかを求め、次に、ステップ２２
で振幅をある固定値で増減させ、検波レベルがどれだけ
変化するかを求める。ステップ２３によって検波レベル
が大きく変化した方の位相又は振幅をステップ２５又は
ステップ２４で変化させ、検波レベルが一番下がる値を
求める。次に、もう一方を変化させ、検波レベルが一番
下がる値を求め、その振幅，位相値を最適値とする。FIG. 2 is a flowchart showing the optimizing operation of the present invention, and 21 to 31 indicate step numbers. The control circuit 14 first increases or decreases the phase of the vector adjuster 2 of the distortion detection loop by a certain fixed value in step 21 to determine how much the detection level changes.
Then, the amplitude is increased or decreased by a certain fixed value, and how much the detection level changes is obtained. The phase or the amplitude at which the detection level greatly changes in step 23 is changed in step 25 or step 24, and the value at which the detection level becomes the lowest is obtained. Next, the other is changed to find a value at which the detection level is the lowest, and its amplitude and phase values are set as optimum values.
【００１１】次に、歪除去ループのベクトル調整器７に
ついても、ステップ２６〜３０で同様に最適化を行い、
歪レベルが目的値より下回れば最適化終了とする。Next, the vector adjuster 7 of the distortion removal loop is similarly optimized in steps 26 to 30, and
If the distortion level is lower than the target value, the optimization ends.
【００１２】更に、温度が変化した場合などは、パイロ
ットレベルを常時検出し、歪レベルが目的値より上回っ
た場合には再度最適化を行うようにすることもできる。Further, when the temperature changes, the pilot level is always detected, and when the distortion level exceeds the target value, the optimization can be performed again.
【００１３】[0013]
【発明の効果】本発明を実施することにより、次の効果
がある。 （１）最適化時間が短くなり高速制御ができる。 （２）製品によるばらつきが少なくなった。By implementing the present invention, the following effects can be obtained. (1) The optimization time is shortened and high-speed control can be performed. (2) Variations between products are reduced.
【図１】本発明の実施例を示す回路例図である。FIG. 1 is a circuit diagram illustrating an embodiment of the present invention.
【図２】本発明の動作を示すフローチャートである。FIG. 2 is a flowchart showing the operation of the present invention.
【図３】従来の歪補償回路例図である。FIG. 3 is an example diagram of a conventional distortion compensation circuit.
【図４】制御動作の説明図である。FIG. 4 is an explanatory diagram of a control operation.
１，４，９ 方向性結合器 ２，７ ベクトル調整器 ３ 主増幅器 ５，６ 遅延線 ８ 補助増幅器 １０ 増幅器 １１ パイロット信号発生器 １２ 検波器 １３ 受信器 １４ 制御回路 １５，１６ Ａ／Ｄ変換器 １７，１８ Ｄ／Ａ変換器 １９ 不揮発性メモリ ２１〜３１ ステップ番号 1,4,9 Directional coupler 2,7 Vector adjuster 3 Main amplifier 5,6 Delay line 8 Auxiliary amplifier 10 Amplifier 11 Pilot signal generator 12 Detector 13 Receiver 14 Control circuit 15,16 A / D converter 17, 18 D / A converter 19 Non-volatile memory 21 to 31 Step number
───────────────────────────────────────────────────── フロントページの続き (72)発明者 北川 真清 東京都港区虎ノ門二丁目10番１号 エ ヌ・ティ・ティ移動通信網株式会社内 (72)発明者 渡邊 裕介 東京都港区虎ノ門二丁目10番１号 エ ヌ・ティ・ティ移動通信網株式会社内 (56)参考文献 特開 平３−27605（ＪＰ，Ａ) 特開 平７−245530（ＪＰ，Ａ) 特開 平10−233628（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H03F 1/32 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Masayoshi Kitagawa 2-10-1 Toranomon, Minato-ku, Tokyo Inside NTT Mobile Communication Network Corporation (72) Inventor Yusuke Watanabe Toranomon, Minato-ku, Tokyo JP-A-3-27605 (JP, A) JP-A-7-245530 (JP, A) JP-A-10-210 233628 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H03F 1/32
Claims (1)
に発生する相互変調歪を補償するため、入力信号を第１
のベクトル調整器を介して前記主増幅器で増幅した信号
と前記入力信号を第１の遅延線を介した逆相信号とによ
り歪成分を検出する歪検出ループと、前記歪成分を第２
のベクトル調整器を介して補助増幅器によってレベルを
合わせた逆相信号と前記主増幅器で増幅した信号を第２
の遅延線を介した信号とにより歪成分を相殺して出力す
る歪除去ループと、前記歪検出ループから抽出した多周
波入力信号の検波レベルおよび前記歪検出ループに注入
し前記歪除去ループから抽出したパイロット信号の検出
レベルがそれぞれ最小になるように、前記第１のベクト
ル調整器および前記第２のベクトル調整器の減衰量と位
相量を調整する制御回路とから構成された歪補償増幅装
置において、 前記制御回路は、まず、前記歪検出ループの第１のベク
トル調整器の振幅と位相をそれぞれ一定量変化させて検
出した検波レベルの変化量を比較し該変化量の大きい方
から順に変化させて最適化を行い、次に、前記歪除去ル
ープの第２のベクトル調整器の振幅と位相をそれぞれ一
定量変化させて検出したパイロットレベルの変化量を比
較し該変化量の大きい方から順に変化させて最適化を行
うようにしたことを特徴とする歪補償増幅装置。1. An input signal for compensating an intermodulation distortion generated when a multi-frequency input signal is amplified by a main amplifier.
A distortion detection loop for detecting a distortion component from the signal amplified by the main amplifier through the vector adjuster and the inverted signal from the input signal via a first delay line;
The second signal is a second phase-adjusted signal having the level adjusted by the auxiliary amplifier and the signal amplified by the main amplifier.
A distortion removal loop that cancels out the distortion component with the signal passing through the delay line and outputs the detection level of the multi-frequency input signal extracted from the distortion detection loop and the distortion is injected into the distortion detection loop and extracted from the distortion removal loop And a control circuit that adjusts the amount of attenuation and the amount of phase of the first vector adjuster and the second vector adjuster so that the detected levels of the pilot signals become minimum. The control circuit firstly changes the amplitude and the phase of the first vector adjuster of the distortion detection loop by a fixed amount, compares the detected amounts of the detected levels, and changes the detected levels in descending order of the amount of change. Then, the amount of change in the pilot level detected by changing the amplitude and phase of the second vector adjuster of the distortion removal loop by a certain amount is compared. A distortion compensating amplifier characterized in that optimization is performed by changing the amount of change in descending order.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP08720597A JP3324955B2 (en) | 1997-03-24 | 1997-03-24 | Distortion compensation amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP08720597A JP3324955B2 (en) | 1997-03-24 | 1997-03-24 | Distortion compensation amplifier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10270951A JPH10270951A (en) | 1998-10-09 |
| JP3324955B2 true JP3324955B2 (en) | 2002-09-17 |
Family
ID=13908470
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP08720597A Expired - Lifetime JP3324955B2 (en) | 1997-03-24 | 1997-03-24 | Distortion compensation amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3324955B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002111397A (en) * | 2000-09-29 | 2002-04-12 | Sony Corp | Distortion compensator and distortion compensation method |
-
1997
- 1997-03-24 JP JP08720597A patent/JP3324955B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10270951A (en) | 1998-10-09 |
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