JP3232581B2 - Solar cell - Google Patents

Solar cell

Info

Publication number
JP3232581B2
JP3232581B2 JP11321891A JP11321891A JP3232581B2 JP 3232581 B2 JP3232581 B2 JP 3232581B2 JP 11321891 A JP11321891 A JP 11321891A JP 11321891 A JP11321891 A JP 11321891A JP 3232581 B2 JP3232581 B2 JP 3232581B2
Authority
JP
Japan
Prior art keywords
layer
solar cell
semiconductor
solid solution
cdte
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP11321891A
Other languages
Japanese (ja)
Other versions
JPH05206493A (en
Inventor
幹彦 西谷
光佑 池田
孝 平尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP11321891A priority Critical patent/JP3232581B2/en
Publication of JPH05206493A publication Critical patent/JPH05206493A/en
Application granted granted Critical
Publication of JP3232581B2 publication Critical patent/JP3232581B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、エネルギー変換効率の
高い太陽電池の構成に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solar cell having a high energy conversion efficiency.

【0002】[0002]

【従来の技術】従来の化合物薄膜を用いた太陽電池は、
図2(a)及び(b)に示すように広いバンドギャップを持つ
化合物半導体薄膜3(窓層として機能する)と狭いバン
ドギャップを持つ化合物薄膜4(吸収層として機能す
る)のヘテロ接合で構成されている。
2. Description of the Related Art Solar cells using conventional compound thin films are:
As shown in FIGS. 2 (a) and (b), a heterojunction of a compound semiconductor thin film 3 having a wide band gap (functioning as a window layer) and a compound thin film 4 having a narrow band gap (functioning as an absorption layer) is formed. Have been.

【0003】高いエネルギー変換効率を得るために一番
必要とされる条件は、界面においてキャリアの再結合の
ない高品質なヘテロ接合を作ることである。高品質なヘ
テロ界面は、その作製方法や膜形成の順序と関係が深
く、CdS/CdTe系においては図2に示したよう
な、透光性電極2/窓層3(CdS)/吸収層4(Cd
Te)/電極5の順に形成する方がすぐれている。この
ことは、たとえば、ユーエス ディー オー イー レ
ポート(US DOE Rep)(1988)に掲載さ
れている シン-フィルム カト゛ミウム テルライト゛ ソーラー セルス゛ (Thin-Fil
m Cadmium Telluride Solar Cells)のP30 以降に述べら
れており、さらにCdTeのヘテロ接合の相手としてC
dSが一番適していることも述べられている。その理由
として、接合界面においてCdSとCdTeとの固溶体
層が約8%程度ある格子不整合を緩和するため、優れた
ヘテロ界面となると考えられている。
The most necessary condition for obtaining high energy conversion efficiency is to produce a high-quality heterojunction without carrier recombination at the interface. The high-quality hetero interface is closely related to the manufacturing method and the order of film formation. In the case of the CdS / CdTe system, as shown in FIG. 2, the translucent electrode 2 / window layer 3 (CdS) / absorption layer 4 (Cd
It is better to form Te) / electrode 5 in this order. This is, for example, the case for the Thin-Fil Cathodium Tellurite Solar Cells, published in the US DOE Rep (1988).
m Cadmium Telluride Solar Cells) on page 30 and onwards.
It is also stated that dS is most suitable. The reason for this is considered to be an excellent heterointerface because the solid solution layer of CdS and CdTe at the junction interface alleviates the lattice mismatch of about 8%.

【0004】[0004]

【発明が解決しようとする課題】CdTe系薄膜太陽電
池のより高効率化のために従来から用いられている方法
として、CdSをより薄くする(0.1μm以下)試みやよ
り広いバンドギャップをもつ半導体、たとえば、CdZ
nSや透明導電性酸化膜(SnO2 、ITO、ZnO
等)とのヘテロ接合構成の試みによって、太陽光の短波
長光の感度向上がはかられている。しかし、前者の場
合、優れたヘテロ界面を得るために必要なCdSとCd
Teとの界面における固溶体層は、600℃以上の温度
を用いたプロセスでの相互拡散によって界面に形成され
るために、それら半導体層のそれじれの厚さを充分考慮
する必要が生じる。したがって、CdSの厚さを0.1μm
以下に制御して製造することは非常に困難である。ま
た、後者の試みはCdTeとのヘテロ界面特性が現状で
はCdS/CdTeに比べ優れたものが得られておら
ず、結果として太陽電池の高効率化が予想されるほどは
かられてはいない。以上のような観点から本発明の課題
は、さきに述べた欠点を解決し、より高効率な太陽電池
を実現することである。
As methods for improving the efficiency of CdTe-based thin-film solar cells which have been conventionally used, there have been attempts to make CdS thinner (0.1 μm or less) and semiconductors having a wider band gap. , For example, CdZ
nS or a transparent conductive oxide film (SnO2, ITO, ZnO
Etc.), the sensitivity of short-wavelength light of sunlight has been improved. However, in the former case, CdS and Cd required to obtain an excellent hetero interface are required.
Since the solid solution layer at the interface with Te is formed at the interface by interdiffusion in a process using a temperature of 600 ° C. or more, it is necessary to sufficiently consider the thickness of the semiconductor layers. Therefore, the thickness of CdS is 0.1 μm
It is very difficult to manufacture with the following control. Further, in the latter attempt, at present, a heterointerface property with CdTe that is superior to that of CdS / CdTe has not been obtained, and as a result, the efficiency of the solar cell has not been as high as expected. In view of the above, an object of the present invention is to solve the above-mentioned disadvantages and realize a more efficient solar cell.

【0005】[0005]

【課題を解決するための手段】透光性基板上に、透光性
の下部電極と、窓層として第1の半導体層と第2の半導
体層の固溶体層と、吸収層として第2の半導体層と、上
部電極とを順次積層する。
On a light-transmitting substrate, a light-transmitting lower electrode, a solid solution layer of a first semiconductor layer and a second semiconductor layer as a window layer, and a second semiconductor layer as an absorbing layer. The layers and the upper electrode are sequentially laminated.

【0006】または、基板上に、下部電極と、吸収層と
して第2の半導体層と、窓層として第1の半導体層と第
2の半導体層の固溶体層と、透光性の上部電極とを順次
積層する。
Alternatively, a lower electrode, a second semiconductor layer as an absorbing layer, a solid solution layer of the first semiconductor layer and the second semiconductor layer as a window layer, and a light-transmitting upper electrode are formed on a substrate. Laminate sequentially.

【0007】[0007]

【作用】上記の構成によれば、第1の半導体と第2の半
導体の固溶体層と第2の半導体層の格子定数を整合させ
ることにより両者の半導体のヘテロ界面の高品質化を図
ることができる。従来のCdS/CdTe系太陽電池で
は,CdSとCdTeの間には8%の格子不整合が存在
するが、両者の固溶体層の存在がヘテロ接合の品質を高
くしているのに対し,本発明では固溶体層によって,格
子定数に自由度をもたせ,格子定数を整合させた組合せ
で太陽電池を構成しようとするものである。この様な構
成によれば従来のものにくらべ,ヘテロ接合の電流電圧
特性における逆バイアス時の飽和電流をさらに低減で
き、光照射時におけるヘテロ界面でのキャリアの再結合
を抑えるとともに出力電圧や太陽電池特性における曲線
因子をも向上させることができる。また、本発明のヘテ
ロ接合が急峻に構成できることは、デバイス設計の上で
用いる2つの半導体層の膜厚設定の自由度が増し,たと
えば、光入射側の半導体層を0.1μm程度の厚さで構
成できるようになり、ヘテロ界面付近に生じている空乏
層により多くの光を取り込むことができるように設計で
きる。
According to the above arrangement, the quality of the heterointerface between the two semiconductors can be improved by matching the lattice constants of the solid solution layer of the first semiconductor, the second semiconductor, and the second semiconductor layer. it can. In a conventional CdS / CdTe-based solar cell, there is an 8% lattice mismatch between CdS and CdTe, but the presence of both solid solution layers enhances the quality of the heterojunction. In the Japanese Patent Application Laid-Open No. H11-157, a solar cell is to be constructed by a combination in which a lattice constant is matched by giving a degree of freedom to a lattice constant by a solid solution layer. According to such a configuration, the saturation current at the time of reverse bias in the current-voltage characteristics of the heterojunction can be further reduced as compared with the conventional configuration, the recombination of carriers at the heterointerface during light irradiation is suppressed, and the output voltage and The fill factor in battery characteristics can also be improved. Further, the steep construction of the heterojunction of the present invention increases the degree of freedom in setting the film thickness of the two semiconductor layers used in device design. For example, the thickness of the semiconductor layer on the light incident side is reduced to about 0.1 μm. And can be designed so that more light can be taken into the depletion layer generated near the hetero interface.

【0008】[0008]

【実施例】本発明の実施例を以下に示す。図1には本発
明の太陽電池の一構成を示している。すなわち、ガラス
基板1に形成した透光性の下部電極2上に、第1の半導
体と第2の半導体との固溶体層としてCd0.4Mn0.6
e薄膜3(n型半導体)を0.5μm程度の膜厚で形成
し、第2の半導体としてCdTe薄膜(p型半導体)を
5μm程度形成し、そのCdTe薄膜上に上部電極が形
成された構成である。Cd0.4Mn0.6TeとCdTeの
格子定数は,ほぼ整合がとれており,Cd0. 4Mn0.6
eのバンドギャップはほぼCdSと同程度である。図1
に示した本発明の太陽電池と図2に示した従来の太陽電
池の特性を図3のAおよびBにそれぞれ示している。そ
の特性をまとめると以下の表のようになる。
Embodiments of the present invention will be described below. FIG. 1 shows one configuration of the solar cell of the present invention. That is, Cd 0.4 Mn 0.6 T is formed on the transparent lower electrode 2 formed on the glass substrate 1 as a solid solution layer of the first semiconductor and the second semiconductor.
An e-thin film 3 (n-type semiconductor) is formed to a thickness of about 0.5 μm, a CdTe thin film (p-type semiconductor) is formed as a second semiconductor to a thickness of about 5 μm, and an upper electrode is formed on the CdTe thin film. It is. Cd 0.4 Mn 0.6 Te and the lattice constant of CdTe is 0.00 approximately aligned, Cd 0. 4 Mn 0.6 T
The band gap of e is almost the same as that of CdS. FIG.
3A and 3B show characteristics of the solar cell of the present invention shown in FIG. 3 and the conventional solar cell shown in FIG. 2, respectively. The characteristics are summarized in the following table.

【0009】[0009]

【表1】 [Table 1]

【0010】以上のことから,従来のものに比べ開放電
圧Vocにおいて著しい改善がなされ結果として変換効率
13%に近い太陽電池を本発明の構成により実現でき
た。
As described above, the open circuit voltage Voc is remarkably improved as compared with the conventional one, and as a result, a solar cell having a conversion efficiency close to 13% can be realized by the structure of the present invention.

【0011】[0011]

【発明の効果】本発明によれば、エネルギー変換効率が
高く低コストな太陽電池の構成を提供することができ
る。
According to the present invention, it is possible to provide a low-cost solar cell having a high energy conversion efficiency.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例における太陽電池を示す斜視
FIG. 1 is a perspective view showing a solar cell according to an embodiment of the present invention.

【図2】従来の太陽電池の構成を示す斜視図FIG. 2 is a perspective view showing a configuration of a conventional solar cell.

【図3】従来の太陽電池の特性と図1に示した本発明の
太陽電池の特性を示すグラフ
FIG. 3 is a graph showing characteristics of a conventional solar cell and characteristics of the solar cell of the present invention shown in FIG.

【符号の説明】[Explanation of symbols]

1 基板 2 下部電極 2a 透光性下部電極 3 窓層 4 吸収層 5 上部電極 5a 透光性上部電極 DESCRIPTION OF SYMBOLS 1 Substrate 2 Lower electrode 2a Translucent lower electrode 3 Window layer 4 Absorption layer 5 Upper electrode 5a Translucent upper electrode

フロントページの続き (56)参考文献 特開 昭42−7492(JP,A) 特開 昭63−245963(JP,A) 特開 昭63−213973(JP,A) 特開 平4−233772(JP,A) 特開 平4−74481(JP,A) 特開 平4−199751(JP,A) 特開 平4−340770(JP,A) 米国特許4935383(US,A) (58)調査した分野(Int.Cl.7,DB名) H01L 31/04 - 31/078 Continuation of front page (56) References JP-A-42-7492 (JP, A) JP-A-63-245963 (JP, A) JP-A-63-213973 (JP, A) JP-A-4-233772 (JP) JP-A-4-74481 (JP, A) JP-A-4-199751 (JP, A) JP-A-4-340770 (JP, A) US Patent 4,493,833 (US, A) (58) (Int.Cl. 7 , DB name) H01L 31/04-31/078

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 透光性基板上に、透光性の下部電極と、
窓層として第1の半導体と第2の半導体の固溶体層と、
吸収層として前記第2の半導体を用いた層と、上部電極
とを順次積層した太陽電池であって、前記固溶体層の格
子定数と前記第2の半導体を用いた層の格子定数とがほ
ぼ整合がとれていることを特徴とする太陽電池。
1. A translucent lower electrode on a translucent substrate,
A solid solution layer of the first semiconductor body and the second semiconductors as window layer,
A layer with the second semiconductor as an absorption layer, a sequentially stacked solar cell and an upper electrode, rating of the solid-solution layer
And the lattice constant of the layer using the second semiconductor.
A solar cell characterized in that it is well aligned .
【請求項2】 基板上に、下部電極と、吸収層として第
2の半導体を用いた層と、窓層として第1の半導体と前
第2の半導体の固溶体層と、透光性の上部電極とを順
次積層した太陽電池であって、前記固溶体層の格子定数
と前記第2の半導体を用いた層の格子定数とがほぼ整合
がとれていることを特徴とする太陽電池。
To 2. A substrate, a lower electrode, a layer including a second semiconductor as an absorption layer, the first semiconductor body as the window layer and the front
Serial and second semiconductors solid solution layer of a sequentially stacked solar cell and an upper electrode of the light-lattice constant of the solid solution layer
And the lattice constant of the layer using the second semiconductor are substantially matched.
A solar cell characterized in that the solar cell is removed .
【請求項3】第1の半導体がMnTeであり、第2の半
導体がCdTeであることを特徴とする請求項1または
2に記載の太陽電池。
3. The solar cell according to claim 1, wherein the first semiconductor is MnTe, and the second semiconductor is CdTe.
JP11321891A 1991-05-17 1991-05-17 Solar cell Expired - Fee Related JP3232581B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11321891A JP3232581B2 (en) 1991-05-17 1991-05-17 Solar cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11321891A JP3232581B2 (en) 1991-05-17 1991-05-17 Solar cell

Publications (2)

Publication Number Publication Date
JPH05206493A JPH05206493A (en) 1993-08-13
JP3232581B2 true JP3232581B2 (en) 2001-11-26

Family

ID=14606570

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11321891A Expired - Fee Related JP3232581B2 (en) 1991-05-17 1991-05-17 Solar cell

Country Status (1)

Country Link
JP (1) JP3232581B2 (en)

Also Published As

Publication number Publication date
JPH05206493A (en) 1993-08-13

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