JP3210007B2 - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP3210007B2
JP3210007B2 JP33797590A JP33797590A JP3210007B2 JP 3210007 B2 JP3210007 B2 JP 3210007B2 JP 33797590 A JP33797590 A JP 33797590A JP 33797590 A JP33797590 A JP 33797590A JP 3210007 B2 JP3210007 B2 JP 3210007B2
Authority
JP
Japan
Prior art keywords
oxide layer
electrode
ferroelectric
semiconductor device
ferroelectric film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP33797590A
Other languages
Japanese (ja)
Other versions
JPH04206870A (en
Inventor
賢二 飯島
一朗 上田
公一 釘宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP33797590A priority Critical patent/JP3210007B2/en
Publication of JPH04206870A publication Critical patent/JPH04206870A/en
Application granted granted Critical
Publication of JP3210007B2 publication Critical patent/JP3210007B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、強誘電体膜を用いた不揮発メモリ、電気光
学効果装置、熱検出装置などの半導体装置に関する。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a nonvolatile memory using a ferroelectric film, an electro-optic effect device, and a heat detecting device.

従来の技術 強誘電体の圧電性、焦電性、分極反転等の物性を用い
たデバイスが各種提案されている。
2. Description of the Related Art Various devices using physical properties such as piezoelectricity, pyroelectricity, and polarization inversion of a ferroelectric have been proposed.

例えば鉛(Pb)を主成分とするPZT、PLZT等の強誘電
体材料は、圧電性、焦電性にすぐれ、電気光学効果が大
きく、残留分極が大きく、抗電界が小さい優れた材料と
して注目されており、その薄膜化の研究も数多くなされ
ている。
For example, ferroelectric materials such as PZT and PLZT, which are mainly composed of lead (Pb), have excellent piezoelectricity, pyroelectricity, large electro-optic effects, large remanent polarization, and small coercive electric fields. Many studies on thinning have been made.

通常これらの材料を薄膜化する場合、基板上に形成さ
れた電極上に、主にスパッタリング法、CVD法等で作製
している。
Usually, when these materials are thinned, they are mainly formed by sputtering, CVD, or the like on electrodes formed on a substrate.

この時、強誘電性を有するPZT、PLZTを作製するため
には、600℃以上の基板温度が必要である。
At this time, in order to produce PZT and PLZT having ferroelectricity, a substrate temperature of 600 ° C. or higher is required.

しかし、このように高い基板温度では、一度基板上に
付着した鉛(Pb)あるいは酸化鉛(PbO)が再蒸発し、
強誘電体膜の組成ずれが生じてしまう。とくに薄膜成長
初期に重大な問題となる。
However, at such a high substrate temperature, the lead (Pb) or lead oxide (PbO) once deposited on the substrate re-evaporates,
The composition shift of the ferroelectric film occurs. This is a serious problem especially at the beginning of thin film growth.

そこで、スパッタのターゲットに過剰にPbOを加えてP
bの組成ずれを補償しているが、十分な効果が得られて
いない。
Therefore, PbO is added excessively to the sputtering target
Although the composition deviation of b is compensated, a sufficient effect has not been obtained.

発明が解決しようとする課題 このような従来の半導体装置では、強誘電性を発現さ
せるために600℃以上の高い基板温度が必要であり、こ
のような高い基板温度ではPbOの蒸気圧が非常に高いた
め化学量論組成の化合物を作ることが難しいという課題
があった。特に、金属電極上に作製する場合は、薄膜成
長の極く初期にPbの欠乏したPbTi3O7構造の化合物が生
成し、薄膜の強誘電特性を著しく劣化させる。
Problems to be Solved by the Invention In such a conventional semiconductor device, a high substrate temperature of 600 ° C. or more is required in order to exhibit ferroelectricity. At such a high substrate temperature, the vapor pressure of PbO is extremely high. There is a problem that it is difficult to produce a compound having a stoichiometric composition because of its high content. In particular, when the thin film is formed on a metal electrode, a compound having a Pb-deficient PbTi 3 O 7 structure is generated very early in the growth of the thin film, and the ferroelectric characteristics of the thin film are significantly deteriorated.

本発明は上記課題を解決するもので、結晶性、強誘電
特性の優れた強誘電体膜を有する半導体装置を提供する
ことを目的としている。
An object of the present invention is to provide a semiconductor device having a ferroelectric film having excellent crystallinity and ferroelectric characteristics.

課題を解決するための手段 本発明は上記目的を達成するために、基板上に形成さ
れた電極の上に、酸化物層を介して、強誘電体膜を形成
した構成である。
Means for Solving the Problems In order to achieve the above object, the present invention has a configuration in which a ferroelectric film is formed on an electrode formed on a substrate via an oxide layer.

作用 本発明は上記構成により、金属電極上に直接薄膜を形
成する場合と異なり、極薄い酸化物層を形成したのち強
誘電体膜を形成することで、PbあるいはPbOの付着率が
向上し、薄膜成長の初期から、強誘電性を有するPZTあ
るいはPLZTの薄膜が容易に形成される。
Action The present invention, by the above configuration, unlike the case of forming a thin film directly on a metal electrode, by forming a ferroelectric film after forming an extremely thin oxide layer, the adhesion rate of Pb or PbO is improved, From the beginning of thin film growth, a ferroelectric PZT or PLZT thin film is easily formed.

この酸化物層としてペロブスカイト構造を有す材料を
用いることはさらに効果的である。
It is more effective to use a material having a perovskite structure as the oxide layer.

また、酸化物層の材料として誘電率が大きい材料を用
いれば、その上に形成されたPZT、PLZTの薄膜の特性は
何等損なわれない。
If a material having a large dielectric constant is used as the material of the oxide layer, the characteristics of the PZT and PLZT thin films formed thereon are not impaired at all.

実施例 以下、本発明の一実施例について第1図を参照しなが
ら説明する。
Embodiment An embodiment of the present invention will be described below with reference to FIG.

第1図において1はシリコン基板、2はソース領域、
3はドレイン領域、4はゲート絶縁膜、5はゲート電
極、6は層間絶縁膜、7はドレイン電極、8はドレイン
電極7と連続したキャパシタ下部電極、9は本発明の特
徴とする酸化物層、10は強誘電体膜、11はキャパシタ上
部電極、12はソース電極、13は層間絶縁膜である。
In FIG. 1, 1 is a silicon substrate, 2 is a source region,
Reference numeral 3 denotes a drain region, 4 denotes a gate insulating film, 5 denotes a gate electrode, 6 denotes an interlayer insulating film, 7 denotes a drain electrode, 8 denotes a capacitor lower electrode continuous with the drain electrode 7, and 9 denotes an oxide layer characteristic of the present invention. , 10 is a ferroelectric film, 11 is a capacitor upper electrode, 12 is a source electrode, and 13 is an interlayer insulating film.

すなわち本発明の特徴は、例えばスパッタリング法に
より膜厚100nmの白金(Pt)薄膜電極であるキャパシタ
下部電極8を形成した後、同様にスパッタリング法によ
り、膜厚50nmの酸化物層9を形成したことである。
That is, a feature of the present invention is that, for example, after forming a capacitor lower electrode 8 which is a platinum (Pt) thin film electrode having a thickness of 100 nm by a sputtering method, an oxide layer 9 having a thickness of 50 nm is similarly formed by a sputtering method. It is.

その後いろいろな組成のPZT、PLZTをスパッタリング
法で種々の基板温度で作製した。
Thereafter, PZT and PLZT of various compositions were produced at various substrate temperatures by a sputtering method.

得られた強誘電体膜を、従来法のPt上に酸化物膜を形
成することなく直接PZT、PLZTを形成したものと、強誘
電体膜中のPb組成について目標組成からのずれを比較し
た。結果を次の第1表に示す。
The obtained ferroelectric film was compared directly with PZT and PLZT without forming an oxide film on Pt in the conventional method, and the deviation of the Pb composition in the ferroelectric film from the target composition was compared. . The results are shown in Table 1 below.

酸化物層9としてはペロブスカイト構造を有する三つ
の材料について実験した。
Experiments were performed on three materials having a perovskite structure as the oxide layer 9.

第1表から分かるとおり、従来法のPt電極上に直接PZ
T、PLZT膜を形成した場合は特に高温にした場合、Pbの
欠乏が顕著であったが、酸化物薄膜を挟んだ試料ではPb
の組成ずれはほとんどなかった。
As can be seen from Table 1, PZ is directly applied on the conventional Pt electrode.
In the case of forming a T, PLZT film, Pb deficiency was remarkable especially at a high temperature.
There was almost no composition deviation.

次に、強誘電体薄膜の電気特性を測定した。その結果
の内誘電率を第2表に、残留分極を第3表に、抗電界を
第4表に示す。
Next, the electrical characteristics of the ferroelectric thin film were measured. The resulting inner dielectric constant is shown in Table 2, the remanent polarization is shown in Table 3, and the coercive electric field is shown in Table 4.

第2〜4表から分かるとおり、Pt電極上に酸化物層を
形成した試料では、酸化物層なしでPt電極上に直接強誘
電体膜を作製した試料と比べ誘電率、残留分極が大き
く、抗電界が小さい優れた電気特性が得られている。
As can be seen from Tables 2 to 4, in the sample in which the oxide layer was formed on the Pt electrode, the permittivity and the remanent polarization were larger than in the sample in which the ferroelectric film was formed directly on the Pt electrode without the oxide layer. Excellent electrical characteristics with a small coercive electric field are obtained.

酸化物層の膜厚と強誘電特性について検討した結果を
次の第5表に示す。
Table 5 below shows the results of the examination on the thickness of the oxide layer and the ferroelectric characteristics.

第5表から分かるとおり、酸化物層の膜厚が10nmより
厚くなると強誘電特性が損なわれる。
As can be seen from Table 5, when the thickness of the oxide layer is more than 10 nm, the ferroelectric properties are impaired.

この他に強誘電体膜としてその他の組成のPZT、PLZT
などについて実施したが同様の結果が得られた。
In addition, PZT and PLZT of other compositions as ferroelectric films
And the like, but similar results were obtained.

なお、以上の実施例では、ペロブスカイト構造を有す
る酸化物層について述べたが、その他鉛、チタン、ラン
タンのうち少なくとも一つを主成分としたもの、アルカ
リ類金属とチタンを主成分としたもの、バリウムとチタ
ンを主成分としたもの、ストロンチウムとチタンを主成
分としたものでもよい。
In the above embodiments, the oxide layer having a perovskite structure has been described, but other lead, titanium, and lanthanum as main components, alkali metal and titanium as main components, A material containing barium and titanium as main components or a material containing strontium and titanium as main components may be used.

また酸化物層の膜厚は10nm以下で、実用上1nm以上で
あればよい。
The thickness of the oxide layer is 10 nm or less, and may be 1 nm or more in practical use.

また酸化物層の介在場所としては、本実施例では強誘
電体膜と下部電極の間に設けた場合について述べたが上
部電極との間にも設けてもよい。
In this embodiment, the place where the oxide layer is interposed is described between the ferroelectric film and the lower electrode. However, the oxide layer may be disposed between the ferroelectric film and the upper electrode.

発明の効果 以上の実施例から明らかなように本発明によれば、電
極と強誘電体膜の間の、少なくとも一つの間に酸化物層
を介在させた構成であるから、結晶性、強誘電特性が優
れた強誘電体膜を有する半導体装置を提供できる。
Effect of the Invention As is apparent from the above embodiments, according to the present invention, since an oxide layer is interposed between at least one of the electrodes and the ferroelectric film, the crystallinity and the ferroelectric A semiconductor device having a ferroelectric film having excellent characteristics can be provided.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の一実施例の半導体装置の断面図であ
る。 1……シリコン基板(基板)、8……下部電極(第1の
電極)、9……酸化物層、10……強誘電体膜、11……上
部電極(第2の電極)。
FIG. 1 is a sectional view of a semiconductor device according to one embodiment of the present invention. 1 ... silicon substrate (substrate), 8 ... lower electrode (first electrode), 9 ... oxide layer, 10 ... ferroelectric film, 11 ... upper electrode (second electrode).

───────────────────────────────────────────────────── フロントページの続き (72)発明者 釘宮 公一 大阪府門真市大字門真1006番地 松下電 器産業株式会社内 (56)参考文献 特開 昭60−200403(JP,A) 特開 昭62−161953(JP,A) 特開 平4−18753(JP,A) ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Koichi Kugimiya 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP-A-60-200403 (JP, A) -161953 (JP, A) JP-A-4-18753 (JP, A)

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】基板上に形成された第1の電極と、前記第
1の電極上にスパッタリング法で形成されたPbを主成分
の1つに含む強誘電体膜と、前記強誘電体膜上に形成さ
れた第2の電極とを少なくとも有する半導体装置であっ
て、前記第1の電極と前記強誘電体膜との間に、鉛とチ
タンを主成分とする酸化物層、あるいは鉛とチタンとラ
ンタンを主成分とする酸化物層のいずれかであってスパ
ッタリング法にて製膜した酸化物層を介在させたことを
特徴とする半導体装置。
A first electrode formed on a substrate, a ferroelectric film containing Pb as one of main components formed by sputtering on the first electrode, and the ferroelectric film. A semiconductor device having at least a second electrode formed thereon, wherein between the first electrode and the ferroelectric film, an oxide layer containing lead and titanium as main components, or A semiconductor device, characterized by interposing an oxide layer formed by a sputtering method, which is one of oxide layers containing titanium and lanthanum as main components.
【請求項2】酸化物層の膜厚が、1〜10nmであることを
特徴とする請求項1記載の半導体装置。
2. The semiconductor device according to claim 1, wherein said oxide layer has a thickness of 1 to 10 nm.
JP33797590A 1990-11-30 1990-11-30 Semiconductor device Expired - Lifetime JP3210007B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33797590A JP3210007B2 (en) 1990-11-30 1990-11-30 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33797590A JP3210007B2 (en) 1990-11-30 1990-11-30 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH04206870A JPH04206870A (en) 1992-07-28
JP3210007B2 true JP3210007B2 (en) 2001-09-17

Family

ID=18313761

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33797590A Expired - Lifetime JP3210007B2 (en) 1990-11-30 1990-11-30 Semiconductor device

Country Status (1)

Country Link
JP (1) JP3210007B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102191002B1 (en) * 2019-02-19 2020-12-14 박재혁 Cream-beer manufacturing apparatus

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950009813B1 (en) * 1993-01-27 1995-08-28 삼성전자주식회사 Semiconductor device and manufacturing method thereof
JP3123468B2 (en) 1997-06-25 2001-01-09 日本電気株式会社 Ink jet recording head and method of manufacturing the same
KR20000014388A (en) * 1998-08-20 2000-03-15 윤종용 Ferroelectric memory capacitor and forming method thereof
WO2005106956A1 (en) * 2004-04-28 2005-11-10 Fujitsu Limited Semiconductor device and production method therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102191002B1 (en) * 2019-02-19 2020-12-14 박재혁 Cream-beer manufacturing apparatus

Also Published As

Publication number Publication date
JPH04206870A (en) 1992-07-28

Similar Documents

Publication Publication Date Title
US7443649B2 (en) Ferroelectric capacitor
US5965942A (en) Semiconductor memory device with amorphous diffusion barrier between capacitor and plug
US5548475A (en) Dielectric thin film device
JP3341357B2 (en) Piezoelectric thin film element
JP2000208725A (en) Semiconductor device and its manufacture
KR20010080131A (en) Low imprint ferroelectric material for long retention memory and method of making the same
KR20010014838A (en) Amorphous dielectric capacitors on silicon
JP3182909B2 (en) Method of manufacturing ferroelectric capacitor and method of manufacturing ferroelectric memory device
JPH08274270A (en) Electronic component
JP3210007B2 (en) Semiconductor device
US20040109280A1 (en) Ferroelectric capacitor and process for its manufacture
KR100238210B1 (en) FRAM and FFRAM device having thin film of MgTi03
JP3144799B2 (en) Semiconductor device and method of manufacturing the same
JPH08186182A (en) Ferroelectric thin-film element
JP3138128B2 (en) Dielectric thin film structure
JPH07183397A (en) Dielectric thin film element and fabrication thereof
JPH10144867A (en) Thin film capacitor
JPH0590600A (en) Ferroelectric device
JPH0644601B2 (en) Thin film capacitor and manufacturing method thereof
JPH0624222B2 (en) Method of manufacturing thin film capacitor
JP2692646B2 (en) Capacitor using bismuth-based layered ferroelectric and its manufacturing method
JP3267278B2 (en) Method for manufacturing semiconductor device
JP3127086B2 (en) Semiconductor memory device
JP2000082796A (en) Semiconductor device
JPH0620866A (en) Dielectric element

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20070713

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080713

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090713

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090713

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100713

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110713

Year of fee payment: 10

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110713

Year of fee payment: 10