JP3092377B2 - Data receiving device - Google Patents

Data receiving device

Info

Publication number
JP3092377B2
JP3092377B2 JP05042498A JP4249893A JP3092377B2 JP 3092377 B2 JP3092377 B2 JP 3092377B2 JP 05042498 A JP05042498 A JP 05042498A JP 4249893 A JP4249893 A JP 4249893A JP 3092377 B2 JP3092377 B2 JP 3092377B2
Authority
JP
Japan
Prior art keywords
signal
phase
discriminator
received
phase rotation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP05042498A
Other languages
Japanese (ja)
Other versions
JPH06261087A (en
Inventor
和久 椿
良樹 衛
宜昭 品川
光一 本間
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP05042498A priority Critical patent/JP3092377B2/en
Publication of JPH06261087A publication Critical patent/JPH06261087A/en
Application granted granted Critical
Publication of JP3092377B2 publication Critical patent/JP3092377B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はディジタル自動車電話等
に利用するデータ受信装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data receiving apparatus used for a digital car telephone or the like.

【0002】[0002]

【従来の技術】図3は従来のデータ受信装置の構成を示
すブロック図である。図3において、31は受信信号の
同相信号(I信号)をディジタル信号に変換するAD変
換器、32は受信信号の直交信号(Q信号)をディジタ
ル信号に変換するAD変換器である。33はAD変換器
31及び32で変換されたディジタル信号から受信信号
の位相φを(数1)から求め、φの変位量から受信した
データの復号を行う復号器である。
2. Description of the Related Art FIG. 3 is a block diagram showing a configuration of a conventional data receiving apparatus. In FIG. 3, reference numeral 31 denotes an AD converter that converts an in-phase signal (I signal) of a received signal into a digital signal, and 32 denotes an AD converter that converts a quadrature signal (Q signal) of the received signal into a digital signal. Reference numeral 33 denotes a decoder which obtains the phase φ of the received signal from the digital signals converted by the AD converters 31 and 32 from (Equation 1) and decodes the received data from the displacement of φ.

【0003】[0003]

【数1】φ = tan-1{Q/I} 次に上記従来例の動作について説明する。図3におい
て、信号を受信すると、AD変換器31でI信号を、A
D変換器32でQ信号をそれぞれアナログ信号からディ
ジタル信号に変換する。これら2つのAD変換器に接続
された復号器33では、ディジタル信号に変換された
I,Q信号から(数1)を用いて受信信号の位相φを求
める。求めた位相φの変位量に対して、識別に最適とな
るように再生されたクロックを用いて受信したデータの
復号を行う。このように上記従来のデータ受信装置によ
り、データを誤りなく復号することができる。
## EQU1 ## φ = tan -1 {Q / I} Next, the operation of the above conventional example will be described. In FIG. 3, when a signal is received, the AD converter 31 converts the I signal into an A signal.
The D signal is converted by the D converter 32 from an analog signal to a digital signal. The decoder 33 connected to these two AD converters obtains the phase φ of the received signal from the I and Q signals converted into digital signals using (Equation 1). The received data is decoded using the clock reproduced so as to be optimal for the discrimination with respect to the obtained displacement amount of the phase φ. As described above, the data can be decoded without error by the conventional data receiving apparatus.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、上記従
来のデータ受信装置では、AD変換器を用いて受信信号
の位相を求めるために、高精度のAD変換器を必要と
し、多大な消費電力を必要とするという問題があった。
However, the conventional data receiving apparatus requires a high-precision A / D converter to obtain the phase of the received signal using the A / D converter, and requires a great amount of power consumption. There was a problem that.

【0005】本発明はこのような従来の問題を解決する
ものであり、AD変換器を用いずに受信信号の位相を求
めデータを復号するもので、消費電力の少ない優れたデ
ータ受信装置を提供することを目的とする。
The present invention solves such a conventional problem, and provides an excellent data receiving apparatus which obtains the phase of a received signal without using an AD converter and decodes the data, and which consumes less power. The purpose is to do.

【0006】[0006]

【課題を解決するための手段】本発明は上記課題を解決
するために、受信信号の同相信号(I信号)と直交信号
(Q信号)の正負を判別する識別器と、前記I信号及び
Q信号に位相回転を与える複数の位相回転回路と、前記
位相回転回路の出力のQ信号の正負を判別する複数の識
別器と、前記各識別器の出力信号から受信信号の位相情
報を取り出してデータの復号を行う復号器とを備えたも
のである。
SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a discriminator for discriminating between a positive signal and a negative signal of an in-phase signal (I signal) and a quadrature signal (Q signal) of a received signal. A plurality of phase rotation circuits for applying a phase rotation to the Q signal; a plurality of discriminators for discriminating whether the Q signal output from the phase rotation circuit is positive or negative; and extracting phase information of a received signal from an output signal of each discriminator. And a decoder for decoding data.

【0007】[0007]

【作用】したがって、本発明は上記「課題を解決するた
めの手段」に記載した方法によりデータの復号を行うも
ので、高精度のAD変換器を用いないため低消費電力で
動作することができる。
Therefore, the present invention decodes data by the method described in "Means for Solving the Problems", and can operate with low power consumption because a high-precision AD converter is not used. .

【0008】[0008]

【実施例】図1は本発明のデータ受信装置の一実施例を
示すブロック図である。図1において、1は受信した同
相信号(I信号)と直交信号(Q信号)を位相変換する
位相回転回路である。2は位相回転回路1で変換された
I,Q信号を位相変換する位相回転回路であり、3は2
で変換されたI,Q信号を位相変換する位相回転回路で
あり、4は3で変換されたI,Q信号を位相変換する位
相回転回路である。5は受信したI信号の正負を判別す
る識別器であり、6は受信したQ信号の正負を判別する
識別器である。7は1で変換されたQ信号の正負を判別
する識別器であり、8は2で変換されたQ信号の正負を
判別する識別器であり、9は3で変換されたQ信号の正
負を判別する識別器であり、10は4で変換されたQ信
号の正負を判別する識別器である。11は5,6,7,
8,9,10で識別した結果に基づいて受信信号の位相
φを特定し、φの変位量から受信したデータの復号を行
う復号器である。
FIG. 1 is a block diagram showing an embodiment of a data receiving apparatus according to the present invention. In FIG. 1, reference numeral 1 denotes a phase rotation circuit that converts the phase of a received in-phase signal (I signal) and a quadrature signal (Q signal). Reference numeral 2 denotes a phase rotation circuit for phase-converting the I and Q signals converted by the phase rotation circuit 1;
Is a phase rotation circuit for converting the phase of the I and Q signals converted in step 3, and 4 is a phase rotation circuit for converting the phase of the I and Q signals converted in step 3. Reference numeral 5 denotes a discriminator for discriminating the sign of the received I signal, and reference numeral 6 denotes a discriminator for discriminating the sign of the received Q signal. Reference numeral 7 denotes a discriminator for discriminating the sign of the Q signal converted by 1, 8 denotes a discriminator for discriminating the sign of the Q signal converted by 2, and 9 denotes the sign of the Q signal converted by 3. A discriminator 10 for discriminating the sign of the Q signal converted by 4. 11 is 5, 6, 7,
A decoder that specifies the phase φ of the received signal based on the results identified in 8, 9, and 10, and decodes the received data from the amount of displacement of φ.

【0009】次に上記実施例の動作について説明する。
上記実施例において、まず信号を受信すると、識別器5
でI信号の正負を判別し、位相回転回路1では、まずI
信号の絶対値を求めておく。次に識別器6でQ信号の正
負を判別し、その結果が正ならば位相が減少する方向
へ、負ならば位相が増える方向に、受信したI信号の絶
対値と受信したQ信号の組に対して位相回転を施す。こ
のとき、回転量θはπ/4とする。位相回転回路2では、
1で変換されたQ信号の正負を識別器7で識別し、正な
らば位相が減少する方向へ、負ならば位相が増える方向
に、位相回転回路1で変換されたI信号とQ信号の組に
対して位相回転を施す。このとき、回転量θはπ/8とす
る。2に接続された位相回転回路3では、2で変換され
たQ信号の正負を識別器8で識別し、正ならば位相が減
少する方向へ、負ならば位相が増える方向に、位相回転
回路2で変換されたI信号とQ信号の組に対して位相回
転を施す。このとき、回転量θはπ/16とする。3に接
続された位相回転回路4では、3で変換されたQ信号の
正負を9の識別器で識別し、正ならば位相が減少する方
向へ、負ならば位相が増える方向に、位相回転回路3で
変換されたI信号とQ信号の組に対して位相回転を施
す。このとき、回転量θはπ/32とする。さらに、位相
回転回路4で変換されたQ信号の正負を10の識別器で
識別する。
Next, the operation of the above embodiment will be described.
In the above embodiment, when the signal is received first, the discriminator 5
Is used to determine whether the I signal is positive or negative.
Find the absolute value of the signal. Next, the discriminator 6 determines whether the Q signal is positive or negative. If the result is positive, the combination of the absolute value of the received I signal and the received Q signal is set in the direction of decreasing the phase, and if the result is negative, in the direction of increasing the phase. Is subjected to phase rotation. At this time, the rotation amount θ is π / 4. In the phase rotation circuit 2,
The positive / negative of the Q signal converted in step 1 is discriminated by the discriminator 7, and if positive, the phase decreases in the direction of decrease, and if negative, the phase of the I and Q signals converted in the phase rotation circuit 1 increases. Apply phase rotation to the set. At this time, the rotation amount θ is π / 8. In the phase rotation circuit 3 connected to 2, the discriminator 8 discriminates whether the Q signal converted in 2 is positive or negative, and if the Q signal is positive, the phase is reduced in the direction, and if the negative, the phase is increased in the direction of the phase. The phase rotation is performed on the set of the I signal and the Q signal converted in step 2. At this time, the rotation amount θ is π / 16. The phase rotation circuit 4 connected to 3 discriminates whether the Q signal converted in 3 is positive or negative by a discriminator 9. The phase rotation is performed on the set of the I signal and the Q signal converted by the circuit 3. At this time, the rotation amount θ is π / 32. Further, the positive / negative of the Q signal converted by the phase rotation circuit 4 is identified by ten classifiers.

【0010】このように位相回転を順次行うことによ
り、位相回転回路の出力信号の位相は0に近づいてゆく
が、受信した信号の位相により0への近づき方が異な
り、識別器5〜10の出力に0への近づき方が現れる。
図2は、位相回転回路を2個用いた場合の受信信号の位
相と識別器出力の例を示す。ここで( )内の数字は4
個の識別器の出力を示す。
By sequentially performing the phase rotation in this manner, the phase of the output signal of the phase rotation circuit approaches 0, but the approach to 0 differs depending on the phase of the received signal. An approach to zero appears at the output.
FIG. 2 shows an example of the phase of the received signal and the output of the discriminator when two phase rotation circuits are used. Where the number in parentheses is 4
3 shows the outputs of the classifiers.

【0011】識別器5〜10に接続された復号器11で
は、識別器5〜10で表現された位相φに対してφの変
位量を求め、データの識別に最適となるように再生され
たクロックを用いて受信したデータの復号を行う。
In the decoder 11 connected to the classifiers 5 to 10, the amount of displacement of φ with respect to the phase φ expressed by the classifiers 5 to 10 is obtained and reproduced so as to be optimal for data discrimination. The received data is decoded using the clock.

【0012】ここでは、位相回転回路を4個用いている
が、必要とする位相情報の精度に応じて位相回転回路の
個数を替えることも可能である。また、θをπ/2k
(ここでk=2,3,4,..)として順々に小さくし
ているが、順々に小さくなれば、どの様な規則でも構わ
ない。
Although four phase rotation circuits are used here, the number of phase rotation circuits can be changed according to the required accuracy of the phase information. Also, let θ be π / 2k
(Here, k = 2, 3, 4,...), And the size is gradually reduced. However, any rule may be used as long as the size is gradually reduced.

【0013】[0013]

【発明の効果】本発明は上記実施例より明らかなよう
に、受信信号の同相信号(I信号)と直交信号(Q信
号)の正負を判別する識別器と、I信号及びQ信号に位
相回転を与える複数の位相回転回路と、位相回転回路の
出力のQ信号の正負を判別する複数の識別器と、識別器
の出力信号から受信信号の位相情報を取り出してデータ
の復号を行う復号器とを備えたもので、AD変換器を用
いずに低消費電力で動作することができるという効果を
有する。
As is apparent from the above embodiment, the present invention provides a discriminator for discriminating the positive / negative of an in-phase signal (I signal) and a quadrature signal (Q signal) of a received signal, and a phase detector for the I signal and the Q signal. A plurality of phase rotation circuits for providing rotation, a plurality of discriminators for discriminating the sign of the Q signal output from the phase rotation circuit, and a decoder for extracting phase information of a received signal from an output signal of the discriminator and decoding data And has an effect that the device can be operated with low power consumption without using an AD converter.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例におけるデータ受信装置のブ
ロック図
FIG. 1 is a block diagram of a data receiving apparatus according to an embodiment of the present invention.

【図2】受信信号の位相と識別器出力の対応図FIG. 2 is a diagram showing the correspondence between the phase of a received signal and the output of a discriminator.

【図3】従来のデータ受信装置のブロック図FIG. 3 is a block diagram of a conventional data receiving apparatus.

【符号の説明】[Explanation of symbols]

1〜4 位相回転回路 5〜10 識別器 11 復号器 31 AD変換器 32 AD変換器 33 復号器 1-4 phase rotation circuit 5-10 discriminator 11 decoder 31 AD converter 32 AD converter 33 decoder

───────────────────────────────────────────────────── フロントページの続き (72)発明者 本間 光一 神奈川県横浜市港北区綱島東四丁目3番 1号 松下通信工業株式会社内 (56)参考文献 特開 平5−268280(JP,A) 特開 平7−143186(JP,A) (58)調査した分野(Int.Cl.7,DB名) H04L 27/00 - 27/38 ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Koichi Honma 4-1-1 Tsunashima Higashi, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture Inside Matsushita Communication Industrial Co., Ltd. (56) References JP-A-5-268280 (JP, A) JP-A-7-143186 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H04L 27/00-27/38

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 受信信号の同相信号(I信号)と直交信
号(Q信号)の正負を判別する識別器と、前記I信号及
びQ信号に位相回転を与え、その出力を次の段にて位相
回転する従属接続した複数段の位相回転回路と、前記各
位相回転回路の出力のQ信号の正負を判別する複数の識
別器と、前記各識別器の出力信号から受信信号の位相情
報を取り出してデータの復号を行う復号器とを備えたデ
ータ受信装置。
A discriminator for discriminating between a positive signal and a negative signal of an in-phase signal (I signal) and a quadrature signal (Q signal) of a received signal, applying a phase rotation to the I signal and the Q signal, and outputting the output to the next stage. Phase
Rotating cascade-connected phase rotation circuits of a plurality of stages , a plurality of discriminators for discriminating the sign of the Q signal output from each of the phase rotation circuits, and extracting phase information of a received signal from an output signal of each discriminator. A data receiving device comprising: a decoder for decoding data.
JP05042498A 1993-03-03 1993-03-03 Data receiving device Expired - Fee Related JP3092377B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP05042498A JP3092377B2 (en) 1993-03-03 1993-03-03 Data receiving device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP05042498A JP3092377B2 (en) 1993-03-03 1993-03-03 Data receiving device

Publications (2)

Publication Number Publication Date
JPH06261087A JPH06261087A (en) 1994-09-16
JP3092377B2 true JP3092377B2 (en) 2000-09-25

Family

ID=12637734

Family Applications (1)

Application Number Title Priority Date Filing Date
JP05042498A Expired - Fee Related JP3092377B2 (en) 1993-03-03 1993-03-03 Data receiving device

Country Status (1)

Country Link
JP (1) JP3092377B2 (en)

Also Published As

Publication number Publication date
JPH06261087A (en) 1994-09-16

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