JP3085658B2 - Wiring board and manufacturing method thereof - Google Patents

Wiring board and manufacturing method thereof

Info

Publication number
JP3085658B2
JP3085658B2 JP09233157A JP23315797A JP3085658B2 JP 3085658 B2 JP3085658 B2 JP 3085658B2 JP 09233157 A JP09233157 A JP 09233157A JP 23315797 A JP23315797 A JP 23315797A JP 3085658 B2 JP3085658 B2 JP 3085658B2
Authority
JP
Japan
Prior art keywords
wiring
insulator
wiring board
width
cross
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP09233157A
Other languages
Japanese (ja)
Other versions
JPH1174625A (en
Inventor
昭彦 西本
桂 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP09233157A priority Critical patent/JP3085658B2/en
Publication of JPH1174625A publication Critical patent/JPH1174625A/en
Application granted granted Critical
Publication of JP3085658B2 publication Critical patent/JP3085658B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/119—Details of rigid insulating substrates therefor, e.g. three-dimensional details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、例えば半導体素子
収納パッケージなどに用いられる配線基板とその製造方
法に関し、特に、絶縁体表面に微細配線を配した高密度
配線基板及びその製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board used for, for example, a semiconductor device storage package and a method of manufacturing the same, and more particularly to a high-density wiring board having fine wirings arranged on an insulator surface and a method of manufacturing the same. is there.

【０００２】[0002]

【従来技術とその課題】従来から、配線基板、例えば、
半導体素子を収納するパッケージに使用される配線基板
として、比較的高密度の配線が可能な多層セラミック配
線基板が多く用いられてきた。この多層セラミック配線
基板は、アルミナなどの絶縁体と、その表面に形成され
たＷやＭｏ等の高融点金属からなる配線導体とから構成
されるもので、この絶縁体の一部に凹部が形成され、こ
の凹部内に半導体素子が収納され、蓋体によって凹部を
気密に封止されるものである。2. Description of the Related Art Conventionally, a wiring board, for example,
2. Description of the Related Art Multilayer ceramic wiring boards capable of relatively high-density wiring have been widely used as wiring boards used for packages containing semiconductor elements. This multilayer ceramic wiring board is composed of an insulator such as alumina and a wiring conductor made of a high melting point metal such as W or Mo formed on the surface thereof, and a concave portion is formed in a part of the insulator. The semiconductor element is housed in the recess, and the recess is hermetically sealed by the lid.

【０００３】ところで、多層配線基板や半導体素子収納
用パッケージなどに使用される配線基板は、各種電子機
器の高性能化に伴って、今後益々高密度化が進み、配線
幅や配線ピッチを５０μｍ以下にすることが要求されて
おり、ビアホールもインタースティシャルバイアホール
（ＩＶＨ）にする必要やＩＣチップの実装方法もワイヤ
ーボンディングからフリップチップと代わるため、基板
自体の平坦度を小さくする必要も生じている。しかしな
がら、多層セラミック配線基板では、焼結前のグリーン
シートにメタライズインクを印刷して、印刷後のシート
を積層して焼結させて製造するのであるが、その製造工
程において高温での焼成時に焼成収縮が生じるために、
得られた基板に反り等の変形や寸法のばらつき等が発生
しやすく、そのため回路基板の超高密度化やフリップチ
ップ等のような基板の平坦度に関する厳しい要求に対し
て、十分に対応できないなという問題があった。Meanwhile, wiring boards used for multi-layer wiring boards and packages for housing semiconductor elements, etc., have become more and more dense in the future as the performance of various electronic devices has been improved, and the wiring width and wiring pitch have been reduced to 50 μm or less. are required to, since the necessary and an IC chip mounting method to be via holes interstitial via hole (IVH) also replaces the flip chip from the wire bonding occur need to reduce the flatness of the substrate itself ing. However, a multilayer ceramic wiring board is manufactured by printing metallized ink on a green sheet before sintering, and laminating and sintering the printed sheets. Because shrinkage occurs,
Deformation such as warpage and dimensional variation are likely to occur in the obtained substrate, so that it is not possible to sufficiently cope with strict demands regarding ultra-high density of circuit boards and flatness of substrates such as flip chips. There was a problem.

【０００４】また、多層セラミック配線基板の別の問題
としては、セラミックスが硬くて脆いという性質を有す
ることから、製造工程または搬送工程において、セラミ
ックスの欠けや割れ等が発生しやすく、その結果、半導
体素子の気密封止性が損なわれることがあるため歩留り
が低い等の問題があった。Another problem of the multilayer ceramic wiring board is that ceramics are hard and brittle, so that chipping or cracking of the ceramics is likely to occur in a manufacturing process or a transporting process. Since the hermetic sealing of the device may be impaired, there are problems such as low yield.

【０００５】これに対してセラミック配線基板以外の配
線基板として、有機樹脂を含む絶縁性基板の表面に銅等
の金属層から成る表面配線を形成した樹脂製配線基板が
用いられている。このような樹脂製配線基板は、セラミ
ック配線基板のような欠けや割れ等の欠点がなく、また
多層化に際しても、焼成のような高温での熱処理を必要
としないという利点を有している。On the other hand, as a wiring board other than the ceramic wiring board, a resin wiring board is used in which a surface wiring made of a metal layer such as copper is formed on the surface of an insulating substrate containing an organic resin. Such a resin wiring board does not have defects such as chipping or cracking unlike a ceramic wiring board, and has the advantage that heat treatment at a high temperature, such as firing, is not required for multilayering.

【０００６】しかしながら、樹脂製配線基板は、一般
に、銅箔等の金属箔を絶縁性基板上に貼り、次いで金属
箔の不要な部分をエッチング法やメッキ法により除去す
るという手段により表面配線を形成するものであること
から、種々の問題があった。However, a resin wiring board generally forms a surface wiring by means of attaching a metal foil such as a copper foil on an insulating substrate, and then removing unnecessary portions of the metal foil by etching or plating. Therefore, there are various problems.

【０００７】例えば、エッチング等の薬液により、絶縁
性基板が劣化してしまったり、金属箔を用いて形成した
表面配線は絶縁性基板表面に載置されているのみである
ため、この表面配線と絶縁性基板とに密着不良がおきて
両者の界面に空隙が生じ易く、ひいては配線不良に至り
使用不能となるなどの問題があった。また多層化にあた
っては、ＩＶＨを形成するのに逐次積層によらねばなら
ず、一括積層を行うことができない等の問題がある。さ
らに、表面配線により絶縁性基板上に凸部が形成される
ために平坦度も低く、フリップチップ実装に要求される
平坦度を満足するに至っていない。For example, an insulating substrate may be deteriorated by a chemical solution such as etching or may be formed using a metal foil.
Since the surface wiring is only placed on the surface of the insulating substrate, a poor adhesion occurs between the surface wiring and the insulating substrate, so that a gap is easily generated at the interface between the two, and as a result, the wiring becomes defective and cannot be used. There was such a problem. In addition, in forming a multilayer, there is a problem that the sequential lamination must be performed to form the IVH, and a batch lamination cannot be performed. Further, since the convex portions are formed on the insulating substrate by the surface wiring , the flatness is low, and the flatness required for flip chip mounting has not been satisfied.

【０００８】樹脂製配線基板のこれらの問題のうち、表
面配線と絶縁性基板とに密着不良の問題に対しては表面
配線の下面と表面とを黒化処理等の手段により針状の結
晶を成長させることにより粗化し、絶縁体と表面配線と
の密着力を高める方法が提案されている。[0008] Among these problems of the resin wiring board, the problem of poor adhesion between the surface wiring and the insulating substrate is considered as a problem with the surface.
A method has been proposed in which the lower surface and the upper surface of the wiring are roughened by growing needle-like crystals by means such as blackening treatment to increase the adhesion between the insulator and the surface wiring .

【０００９】しかしながら、表面配線の下面と表面とを
粗化して密着力を高めても、高密度配線基板を作製する
ために配線幅を小さくした場合、配線の密着力が極端に
低下し、基板の長期使用時の信頼性が低下するという問
題があった。また、ビアホールに導体ペースト等をもち
いてビアホール導体を形成して層間の導通をとる場合に
も、配線とビアホール導体の密着力が低下するという問
題があった。However, even if the lower surface and the surface of the surface wiring are roughened to increase the adhesion, if the wiring width is reduced to produce a high-density wiring substrate, the adhesion of the wiring is extremely reduced, and There is a problem in that the reliability of the device during long-term use is reduced. Furthermore, even when taking the continuity of the layers to form a via-hole conductors by using a conductive paste or the like via holes, the adhesion strength of the wiring and the via-hole conductor is lowered.

【００１０】このため、高密度配線基板とするために必
要な微細配線、ビアホール導体等を形成した信頼性の高
い基板を作製するのは難しいのが現状であった。For this reason, it has been difficult at present to produce a highly reliable substrate on which fine wirings, via-hole conductors and the like necessary for forming a high-density wiring substrate are formed.

【００１１】また、特開平９−６４５１４号には、表面
配線の転写シートからの剥離の問題を改善することを目
的としたプリント配線板の製造方法に関する発明が記載
されている。この製造方法は、表面配線をなすための金
属層を金属膜上に付設した転写シートから該金属層と金
属膜を絶縁体となるプリプレグに転写して金属層を埋没
形成した後、金属膜のみをソフトエッチングにより除去
することを特徴としたものであった。このようにして形
成されるプリント配線基板は、表面配線の断面形状が矩
形であり、また、転写シートに形成される金属層の表面
が滑らかなものであるが、高密度配線基板を作製するた
めに配線幅を小さくする場合には、配線の密着力が十分
とは言えなかった。Japanese Patent Application Laid-Open No. 9-64514 discloses an invention relating to a method for manufacturing a printed wiring board for the purpose of improving the problem of peeling of a surface wiring from a transfer sheet. In this manufacturing method, a metal layer for forming surface wiring is transferred from a transfer sheet provided on the metal film to the prepreg serving as an insulator, and the metal layer is buried and formed. Was removed by soft etching. The printed wiring board formed in this way has a rectangular cross-sectional surface wiring and a smooth metal layer formed on the transfer sheet. When the wiring width is reduced, the adhesion of the wiring is not sufficient.

【００１２】また、軟質状態の絶縁体（プリプレグ）に
配線を転写することにより、絶縁体表面に配線を埋設す
ることにより配線基板の表面の平滑化が可能であるが、
このような配線の断面が矩形である場合、図３に示すよ
うに、転写シート１１表面の配線１３と絶縁体１９に圧
接すると、必然的に配線１３の周囲の絶縁体１９に変形
が伴うために配線１３と絶縁体１９との十分な密着性が
得られないという問題があった。 Further, by transferring the wiring insulation soft state (prepreg) is susceptible to smooth the surface of the wiring substrate by burying the wires in the insulator surface,
When the cross section of such a wiring is rectangular, as shown in FIG. 3, a pressure is applied to the wiring 13 and the insulator 19 on the surface of the transfer sheet 11.
When in contact, it is inevitably deformed to the insulator 19 around the wiring 13
, The wiring 13 and the insulator 19 have sufficient adhesion.
There was a problem that it could not be obtained.

【００１３】[0013]

【発明の目的】上記のような従来技術の問題に鑑み、本
発明は、欠けや割れ等が発生し難く、絶縁体表面の平坦
度が高く、また、高密度配線基板を作製するために配線
幅を小さくする場合にも配線の絶縁体への密着力が大き
い高性能で高信頼性の配線基板とその製造方法を提供す
ることを目的とする。SUMMARY OF THE INVENTION In view of the above-mentioned problems of the prior art, the present invention is directed to a method for manufacturing a high-density wiring board, in which chipping and cracking are unlikely to occur, the insulator surface has a high flatness, and a high-density wiring board is manufactured. It is an object of the present invention to provide a high-performance and highly-reliable wiring board having a large adhesive strength of a wiring to an insulator even when the width is reduced, and a method for manufacturing the same.

【００１４】[0014]

【課題を解決するための手段】本発明者は、前記のよう
な課題について鋭意検討した結果、有機樹脂を含み、且
つビアホール内に導体ペーストを充填したビアホール導
体が形成された絶縁体表面に金属箔による表面配線を上
面が露出した状態で埋設してなり、上記表面配線の平均
表面粗さを２００ｎｍ以上とするとともに、上記表面配
線の上面幅を下面幅より大きくして該表面配線の断面形
状を形成角α°が４５°〜８０°の逆台形として前記ビ
アホール導体と結合したことによって、微細配線、ビア
ホール導体を形成した高密度配線基板において配線の密
着力が低下することなく、むしろ密着力が大幅に向上
し、高性能で高信頼性の基板を得ることができることを
知見した。Means for Solving the Problems The present inventors have conducted intensive studies on the above-mentioned problems, and as a result, have found that they contain an organic resin and
Via hole filled with conductive paste in one via hole
A surface wiring made of metal foil is buried on the surface of the insulator on which the body is formed in a state where the upper surface is exposed. The average surface roughness of the surface wiring is set to 200 nm or more, and the surface wiring is formed.
Wherein the top surface width of the line as a reverse trapezoidal made larger than the lower surface width forming angle alpha ° the cross-sectional shape of the surface wiring 45 ° to 80 ° bi
By conjugated with via hole conductors, fine wires, vias
Dense interconnection in a high density wiring board to form a hole conductor
It has been found that the adhesion is not significantly reduced, but rather the adhesion is greatly improved, so that a high-performance and highly reliable substrate can be obtained.

【００１５】また、このような配線基板を製造する方法
として、転写シートの表面に形成された金属箔をエッチ
ング処理して断面形状が台形状となる表面配線を形成
し、上記表面配線の表面を平均表面粗さ２００ｎｍ以上
に粗化した後、有機樹脂を含み且つビアホール内に導体
ペーストを充填したビアホール導体が形成された絶縁体
の表面に上記転写シートを圧接して、上記表面配線を上
記絶縁体表面に転写させることによって、形成角α°が
４５°〜８０°で上面幅が下面幅より大きい逆台形状の
断面形状を有する表面配線を上面が露出した状態で上記
絶縁体表面に埋設して前記配線と前記ビアホール導体と
結合したことを特徴とする配線基板の製造方法が好適で
あることを見いだした。Further, as a method of manufacturing such a wiring board, a metal foil formed on the surface of the transfer sheet is etched to form a surface wiring cross section becomes trapezoidal, the surface of the surface wiring After roughening to an average surface roughness of 200 nm or more , a conductor containing organic resin and
Insulator with via-hole conductor filled with paste
By pressing the transfer sheet against the surface of the substrate and transferring the surface wiring to the surface of the insulator, the cross-sectional shape of the inverted trapezoid having an upper angle width of 45 ° to 80 ° and an upper surface width larger than the lower surface width is formed. The wiring and the via-hole conductor are buried in the surface of the insulator with the surface wiring having the upper surface exposed.
It has been found that a method for manufacturing a wiring board characterized by being bonded is suitable.

【００１６】[0016]

【発明の実施の形態】以下、本発明の実施形態を図によ
って説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings.

【００１７】本発明実施形態としての配線基板１を図１
の断面図に示すごとく、この配線基板１は複数の絶縁体
２からなり、該絶縁体２には低抵抗金属を主成分とする
金属材料からなる表面配線３が埋没形成（埋設）され、
さらに該各表面配線３は、ビアホール３ａに上記金属材
料が充填されてなるビアホール導体３ｂに結合してい
る。FIG. 1 shows a wiring board 1 according to an embodiment of the present invention.
As shown in the cross-sectional view of FIG. 1, the wiring board 1 is composed of a plurality of insulators 2, and surface wirings 3 made of a metal material mainly composed of a low-resistance metal are buried (buried) in the insulators 2.
Further respective surface wiring 3, the metal material is bonded to the via hole conductor 3b made filled in the via holes 3a.

【００１８】また、上記表面配線３は、側面４と下面５
が粗面化されて絶縁体２との間でアンカリングを得るこ
とができるようになっているとともに上辺６と横辺７の
形成角α°を鋭角とした逆台形の断面形状を有し、上面
幅ｗ１が下面幅ｗ２より大きくなるように埋設されてい
る。The surface wiring 3 has a side surface 4 and a lower surface 5.
Is roughened so that anchoring can be obtained with the insulator 2 and has an inverted trapezoidal cross-sectional shape in which the formation angle α ° of the upper side 6 and the horizontal side 7 is acute, It is buried so that the upper surface width w1 is larger than the lower surface width w2.

【００１９】なお、前記表面配線３の断面形状におい
て、横辺７と上辺６がなす形成角α°は４５°〜８０°
で、また、その下面５と側面４の表面粗さが２００ｎｍ
以上であることが重要である。このうち、上記形成角α
°として、より望ましくは５０°〜７５°である。形成
角α°が８０°より大きいと配線側面を粗化するのが困
難となり絶縁体２と表面配線３の密着強度が低下する
他、後述の転写シート上の回路パターンをプリプレグに
圧着する際、埋設するのが難しくなる。他方、４５°よ
り小さいと絶縁体２と表面配線３との密着力が不足す
る。また、配線の下面５及び側面４の表面粗さは２００
ｎｍ以上が必要で、望ましくは４００ｎｍ以上が良い。
表面粗さが２００ｎｍより小さいと絶縁体２と表面配線
３の密着強度が不足する。 In the cross-sectional shape of the surface wiring 3, an angle α ° formed by the lateral side 7 and the upper side 6 is 45 ° to 80 °.
And the lower surface 5 and the side surface 4 have a surface roughness of 200 nm.
It is important that this is the case . Among them, the formation angle α
The angle is more preferably 50 ° to 75 °. When the formation angle α ° is larger than 80 °, it is difficult to roughen the side surface of the wiring, the adhesion strength between the insulator 2 and the surface wiring 3 is reduced, and when a circuit pattern on a transfer sheet to be described later is crimped to a prepreg, It becomes difficult to bury. On the other hand, if it is smaller than 45 °, the adhesion between the insulator 2 and the surface wiring 3 will be insufficient . The surface roughness of the lower surface 5 and the side surface 4 of the wiring is 200
nm or more is required, and preferably 400 nm or more.
If the surface roughness is smaller than 200 nm, the adhesion strength between the insulator 2 and the surface wiring 3 is insufficient .

【００２０】前記多層配線基板１を構成する絶縁体２
は、有機樹脂を含み、例えば、有機樹脂とともに無機フ
ィラー、無機繊維、有機繊維から選ばれる少なくとも１
種類以上含む複合材料等からなる。なお、無機フィラ
ー、無機繊維、有機繊維は有機樹脂中に合計２０〜８０
体積％の割合で均一に分散されたものを用いると良い。An insulator 2 constituting the multilayer wiring board 1
Contains an organic resin, for example, together with the organic resin, at least one selected from inorganic fillers, inorganic fibers, and organic fibers
It is composed of a composite material containing more than one kind. In addition, the inorganic filler, the inorganic fiber, and the organic fiber are 20 to 80 in total in the organic resin.
It is preferable to use one that is uniformly dispersed at a volume percentage.

【００２１】このような複合材料を構成する有機樹脂と
しては、ＰＰＥ（ポリフェニレンエーテル樹脂）、ＢＴ
レジン（ビスマレイドトリアジン）、エポキシ樹脂、ポ
リイミド樹脂、フッ素樹脂、フェノール樹脂、ポリアミ
ノビスマレイミド等の樹脂からなり、とりわけ原料とし
て室温で液体の熱硬化性樹脂であることが望ましい。As the organic resin constituting such a composite material, PPE (polyphenylene ether resin), BT
It is made of a resin such as a resin (bismaleide triazine), an epoxy resin, a polyimide resin, a fluororesin, a phenol resin, and a polyaminobismaleimide, and it is particularly preferable that the raw material is a liquid thermosetting resin at room temperature.

【００２２】他方、前記無機フィラーとしては、ＳｉＯ
2、Ａｌ2Ｏ3、ＺｒＯ2、ＴｉＯ2、ＡｌＮ、ＳｉＣ、Ｂ
ａＴｉＯ3、ＳｒＴｉＯ3、ＭｇＴｉＯ3、ゼオライト、
ＣａＴｉＯ3、ほう酸アルミニウム等の公知の材料が使
用できる。また、その形状としては球状、針状など任意
のものとすることができる。On the other hand, as the inorganic filler, SiO 2
2 , Al 2 O 3 , ZrO 2 , TiO 2 , AlN, SiC, B
aTiO 3, SrTiO 3, MgTiO 3 , zeolite,
Known materials such as CaTiO 3 and aluminum borate can be used. In addition, the shape can be any shape such as a spherical shape and a needle shape.

【００２３】さらに、無機又は有機の繊維としては、ガ
ラス繊維、アラミド繊維、セルロース繊維等があり、織
布、不織布など任意の性状のものを用いれば良い。いず
れにしても、多層配線基板１の強度を高めて高信頼性の
基板とするためには、繊維を含む絶縁体２を少なくとも
１層以上含むことが望ましい。Further, examples of the inorganic or organic fiber include glass fiber, aramid fiber, cellulose fiber and the like, and any property such as woven fabric and non-woven fabric may be used. In any case, in order to increase the strength of the multilayer wiring board 1 and obtain a highly reliable board, it is desirable to include at least one or more layers of the insulator 2 containing fibers.

【００２４】また、上記表面配線を構成する低抵抗金属
材料としては、銅、アルミニウム、金、銀から選ばれる
少なくとも１種を含むことが望ましい。また、回路の必
要に応じて、Ｎｉ−Ｃｒ等の高抵抗の金属を用いる場合
もある。It is preferable that the low-resistance metal material forming the surface wiring includes at least one selected from copper, aluminum, gold, and silver. A high-resistance metal such as Ni-Cr may be used as necessary for the circuit.

【００２５】次に、図１の多層配線基板１の製造方法を
以下に説明する。 Next , a method of manufacturing the multilayer wiring board 1 of FIG. 1 will be described below.

【００２６】まず、多層配線基板１を得るために絶縁体
２を作製する。無機フィラーを用いる場合を例にとる
と、無機質フィラーに液状の有機樹脂を加えた絶縁性組
成物を混練機（ニーダ）や３本ロール等の手段によって
十分に混合する。十分に混合されたものを圧延法、押し
出し法、射出法、ドクターブレード法によってシート状
に成形した後、有機樹脂を半硬化させる。絶縁性スラリ
ーは、好適には、絶縁体を構成する前述したような有機
樹脂と無機フィラーの複合材料に、トルエン、酢酸ブチ
ル、メチルエチルケトン、メタノール、メチルセロソル
ブアセテート、イソプロピルアルコール、メチルイソブ
チルケトン、ジメチルホルムアシド等の溶媒を添加して
所定の粘度を有する流動体からなる。かかる観点から、
スラリーの粘度は、形成方法にもよるが１００〜３００
０ポイズが適当である。半硬化には、有機樹脂は熱可塑
性樹脂の場合には、加熱下で混合したものを冷却し、熱
硬化性樹脂の場合には、完全固化するに十分な温度より
もやや低い温度に加熱すればよい。また、織布、不織布
を用いる場合には、織布、不織布等の繊維にワニス状の
樹脂を含浸、乾燥させ半硬化のプリプレグの絶縁体２を
作製する。First, an insulator 2 is manufactured to obtain a multilayer wiring board 1. Taking the case of using an inorganic filler as an example, an insulating composition obtained by adding a liquid organic resin to the inorganic filler is sufficiently mixed by means such as a kneader (kneader) or three rolls. A sufficiently mixed material is formed into a sheet by a rolling method, an extrusion method, an injection method, or a doctor blade method, and then the organic resin is semi-cured. The insulating slurry is preferably prepared by adding toluene, butyl acetate, methyl ethyl ketone, methanol, methyl cellosolve acetate, isopropyl alcohol, methyl isobutyl ketone, dimethyl form It is composed of a fluid having a predetermined viscosity by adding a solvent such as acid. From this perspective,
The viscosity of the slurry is 100 to 300, depending on the forming method.
0 poise is appropriate. For semi-curing, if the organic resin is a thermoplastic resin, cool the mixture under heating, and in the case of a thermosetting resin, heat the organic resin to a temperature slightly lower than the temperature sufficient for complete solidification. I just need. When a woven or non-woven fabric is used, a varnish-like resin is impregnated into fibers of the woven or non-woven fabric and dried to produce a semi-cured prepreg insulator 2.

【００２７】次に、上記のようにして作製した絶縁体２
をなすための半硬化のプリプレグのに対して、打ち抜き
法やレーザー加工により所望のビアホールを形成して導
体ペーストを充填してビアホール導体を形成する。導体
ペースト中に配合される金属粉末としては、銅、アルミ
ニウム、銀、金のうち少なくとも１種の低抵抗金属から
なることが望ましく、有機溶剤とバインダーを添加し導
体ペーストを得ることができる。Next, the insulator 2 manufactured as described above is used.
Whereas semi-cured prepreg to form a to form a via hole conductor to form a desired via hole by stamping or laser machining filled with conductive paste. The metal powder to be blended in the conductive paste, copper, Aluminum <br/> bromide, silver, desirably made of at least one low-resistance metal selected from gold, conductive by adding an organic solvent and a binder
A body paste can be obtained.

【００２８】そして、この半硬化状の絶縁体２に表面配
線３を形成する。表面配線の形成には、図２（ａ）に示
すように樹脂フィルムからなる転写シート１１の表面に
接着剤を介して銅、金、銀、アルミニウム等から選ばれ
る少なくとも１種、または２種以上の合金からなる金属
箔１２を貼り合せたものを準備する。この時、銅または
銅を含む合金が最も望ましい。Then, a surface wiring 3 is formed on the semi-cured insulator 2. The formation of the surface wiring, at least one via an adhesive to the surface of the transfer sheet 11 made of a resin film as shown in FIG. 2 (a) selected copper, gold, silver, Aluminum bromide and the like, or 2, A product prepared by laminating metal foils 12 made of at least two or more alloys is prepared. At this time, copper or an alloy containing copper is most desirable.

【００２９】次に、図２（ｂ）に示すように所望の回路
パターンによるレジスト層１６を金属箔１２の表面に付
設した後、エッチング法により、図２（ｃ）に示すよう
に断面形状が台形状の配線１３を形成する。この時、台
形の底辺１４と横辺１５の形成角β°を４５°〜８０°
とするには、金属箔のエッチング速度を２〜５０μｍ／
分にするのが良い。また、図２（ｄ）に示すように配線
１３の上面１８と側面１７の平均表面粗さを２００ｎｍ
とするべく配線１３をギ酸あるいはＮａＣｌＯ2、Ｎａ
ＯＨ、Ｎａ3ＰＯ4の混合液等で表面処理する。この表面
粗さは、粗化速度で制御でき、１μｍ／分以上の粗化速
度で良好に粗化できる。Next, after a resist layer 16 having a desired circuit pattern is provided on the surface of the metal foil 12 as shown in FIG. 2B, the resist layer 16 is etched as shown in FIG. 2C. Thus, the wiring 13 having a trapezoidal cross section is formed . At this time, the formation angle β ° of the base 14 and the side 15 of the trapezoid is 45 ° to 80 °.
In order to obtain, the etching rate of the metal foil is 2 to 50 μm /
Minutes are good. Further, as shown in FIG. 2D, the average surface roughness of the upper surface 18 and the side surface 17 of the wiring 13 is set to 200 nm.
Wiring 13 is formic acid or NaClO 2 , Na
The surface is treated with a mixed solution of OH and Na 3 PO 4 . The surface roughness can be controlled by the roughening speed, and the surface can be satisfactorily roughened at a roughening speed of 1 μm / min or more.

【００３０】次に、このようにして上記配線１３を付設
した転写シート１１を、今度は該配線１３がプリプレグ
１９と対面する向きとしてから、図２（ｅ）に示すよう
に転写シート１１でプリプレグ１９を圧力１０〜５００
ｋｇ／ｃｍ2程度の圧力で印加する。そして、上記配線
１３をプリプレグ１９内に残したままで転写シート１１
を接着層（不図示）とともに剥離することにより配線１
３を転写して図１に示したような表面配線３を形成する
ことができる。Next, the prepreg transfer sheet 11 which is attached to the wiring 13 in this manner, since the direction of turn the wire 13 is facing the prepreg 19, the transfer sheet 11 as shown in FIG. 2 (e) 19 to a pressure of 10 to 500
It is applied at a pressure of about kg / cm 2 . Then, the transfer sheet 11 is left while the wiring 13 is left in the prepreg 19.
Is peeled off together with an adhesive layer (not shown) to form the wiring 1
3 is transferred to form the surface wiring 3 as shown in FIG.
Can be .

【００３１】最後に、このようにして配線１３を形成し
たプリプレグ１９を積層して加圧加熱して密着し一体化
して多層配線基板１を作製することができる。Finally, the prepregs 19 on which the wirings 13 are formed as described above are laminated, pressed and heated, adhered and integrated, and the multilayer wiring board 1 can be manufactured.

【００３２】上記の製造方法によれば、プリプレグ１９
の表面に転写する配線１３の断面形状を前記所定の台形
形状とすることにより、配線１３をプレプレグ１９表面
に圧接した際に、図３に示すように、配線１３の周辺の
プレプレグ１９の変形が抑制される結果、その圧力が配
線１３の逆台形の横辺、底辺にわたって、プリプレグ１
９と圧接される結果、配線１３の断面が矩形の場合
（ａ）に比較して配線１３の絶縁体への密着性を大幅に
向上させることができるのである。According to the above manufacturing method, the prepreg 19
By making the cross-sectional shape of the wiring 13 to be transferred to the surface of the prepreg 19 into the predetermined trapezoidal shape, when the wiring 13 is pressed against the surface of the prepreg 19 , the deformation of the prepreg 19 around the wiring 13 as shown in FIG. As a result, the pressure is reduced across the prepreg 1 across the lateral and bottom sides of the inverted trapezoid of the wiring 13.
9 and Pressed outcome, the cross section of the wire 13 it is possible to greatly improve the adhesion to insulator compared to the wiring 13 in the case of a rectangular (a).

【００３３】なお、本発明の配線基板によれば、絶縁体
の表面に微細で高密度の配線を具備するものであるか
ら、例えば、この配線基板をコア基板とし、その表面に
ビルドアップ法により感光性樹脂からなる絶縁体と、メ
ッキなどの薄膜形成法により形成された配線やビアホー
ル導体を順次積層して、高密度の配線基板を作製するこ
ともできる。According to the wiring board of the present invention, since fine and high-density wiring is provided on the surface of the insulator, for example, this wiring board is used as a core substrate, and
An insulator made of a photosensitive resin by a build-up method, by sequentially stacking the wiring and via hole conductors which are formed by a thin film forming method such as plating, it is also possible to produce a high-density wiring board.

【００３４】[0034]

【実施例】ＢＴレジン、ＰＰＥまたはポリイミド熱硬化
性樹脂に平均粒径が５μｍの球状溶融ＳｉＯ2、ＢａＴ
ｉＯ3、ＭｇＴｉＯ3、ＣａＴｉＯ3、アスペクト比５の
針状ほう酸アルミニウムウイスカーを５０体積％加え、
これに溶媒として酢酸ブチル、トルエン、ＭＥＫを加
え、さらに有機樹脂の硬化を促進させるための触媒を添
加し、攪拌翼が公転および自転する攪拌機により１時間
混合した後、スラリーをドクターブレード法により絶縁
体を構成するための厚さ２００μｍのシート状のプリレ
グを作製した（表１の試料１〜１９）。また、別の絶縁
体としてガラス布、ガラス不織布、アラミド不織布にＢ
Ｔレジン、ＰＰＥ、ポリイミドを５０体積％含浸乾燥さ
せ厚さ２００μｍの絶縁体を構成するための半硬化のプ
リプレグを作製した（表１の試料２０〜２２）。EXAMPLE A BT resin, PPE or polyimide thermosetting resin was coated with spherical fused SiO 2 , BaT having an average particle size of 5 μm.
iO 3, MgTiO 3, CaTiO 3 , added acicular aluminum borate whiskers having an aspect ratio 5 50% by volume,
To this, butyl acetate, toluene, and MEK were added as solvents, and a catalyst for accelerating the curing of the organic resin was further added. The mixture was stirred for 1 hour by a stirrer in which the stirring blades revolved and rotated, and then the slurry was insulated by a doctor blade method. Sheet-shaped pre-legs having a thickness of 200 μm for constituting the body were prepared (Samples 1 to 19 in Table 1). In addition, as another insulator, glass cloth, glass non-woven fabric , and aramid non-woven
T-resin, PPE, and polyimide were impregnated and dried at 50% by volume to prepare a semi-cured prepreg for forming a 200-μm-thick insulator (samples 20 to 22 in Table 1).

【００３５】[0035]

【表１】 [Table 1]

【００３６】これらのプリプレグを１５０ｍｍ□にカッ
トし、ＣＯ2レーザーにより直径１００μｍのビアホー
ルを形成した。このビアホールに銅−銀合金粉末を主成
分とする銅ペーストをスクリーン印刷により埋め込ん
だ。The cut these prepreg 150 mm □, to form a via Ho <br/> Le diameter 100μm by a CO 2 laser. Embedded silver alloy powder copper paste mainly composed of the screen printing - copper the via hole.

【００３７】一方、ポリエチレンテレフタレート（ＰＥ
Ｔ）の転写シート表面に接着剤を塗布して厚み１２μｍ
の電解銅箔を接着した。そして、前記絶縁スラリーをレ
ジストとして前記銅箔の表面に感光性のレジストを塗布
し、ガラスマスクを通して露光してパターンを形成した
後、これを塩化第二鉄溶液中に浸漬して非パターン部を
エッチング除去した。レジスト剥離後、金属層の上面及
び側面を１０％のギ酸で処理した。なお、作製した金属
層による配線は底幅が５０μｍ、配線と配線との間隔
（配線ピッチ）が５０μｍ以下の微細なパターンであ
る。On the other hand, polyethylene terephthalate (PE)
Applying an adhesive to the transfer sheet surface of T)
Was adhered. Then, a photosensitive resist is applied to the surface of the copper foil using the insulating slurry as a resist, and a pattern is formed by exposing through a glass mask, and then immersed in a ferric chloride solution to remove a non-pattern portion. It was removed by etching. After the resist was stripped, the top and side surfaces of the metal layer were treated with 10% formic acid. The wiring formed by the metal layer is a fine pattern having a bottom width of 50 μm and an interval between wirings (wiring pitch) of 50 μm or less.

【００３８】そして、表１の条件で上記エッチング速度
で処理し、前記形成角β°の断面形状で配線を形成し、
さらに表１の粗化速度で配線を粗面化した後に転写シー
トとプリプレグを位置合わせして真空積層機により３０
ｋｇ／ｃｍ2の圧力で３０秒加圧した後、転写シートと
接着層のみを剥離して配線を移転することにより、表面
配線をプリプレグ表面に埋設した。最後に、このプリプ
レグを３０ｋｇ／ｃｍ2の圧力で６枚積層し、２００
℃、５時間加熱処理して多層配線基板を得た。Then, the above etching rate under the conditions shown in Table 1
In processing to form a wiring cross-sectional shape of the forming angle beta °,
Further, after roughening the wiring at the roughening speed shown in Table 1, the transfer sheet and the prepreg were aligned, and 30
After pressurizing with a pressure of kg / cm 2 for 30 seconds, only the transfer sheet and the adhesive layer were peeled off and the wiring was transferred to bury the surface wiring on the prepreg surface . Finally, six prepregs were laminated at a pressure of 30 kg / cm 2 ,
C. for 5 hours to obtain a multilayer wiring board.

【００３９】なお、転写シート上に形成された配線の形
成角は配線断面をＳＥＭで観察し測定した。また、配線
下面及び側面の表面粗さは、ＡＦＭにより測定した。The shape of the wiring formed on the transfer sheet
The angle was measured by observing the cross section of the wiring with an SEM. The surface roughness of the lower surface and the side surface of the wiring was measured by AFM.

【００４０】これらの試料について絶縁体と表面配線の
密着強度を、２ｍｍ□のパッドを垂直に引っ張り、剥が
れ時の荷重を測定することにより求めた。その結果を表
１に示す。[0040] The adhesion strength of these insulators for the sample and the surface wiring, pulling a 2 mm □ pad vertically, peeled
It was determined by measuring the load at the time . Table 1 shows the results.

【００４１】表１から明らかなように前記形成角α°
（＝β°）は４５°〜８０°、表面配線の下面及び側面
の配線の表面粗さ（金属層の上面及び側面の表面粗さ）
を２００ｎｍ以上とすることにより、密着強度２ｋｇ／
ｍｍ2以上の高信頼性の多層基板を得ることができた。As is clear from Table 1, the formation angle α °
(= Β °) is 45 ° to 80 °, the surface roughness of the lower surface and the side surface of the surface wiring (the surface roughness of the upper surface and the side surface of the metal layer)
Is 200 nm or more, the adhesion strength is 2 kg /
A highly reliable multi-layer substrate of not less than mm 2 was obtained.

【００４２】[0042]

【発明の効果】叙上のように、本発明によれば、有機樹
脂を含有する絶縁体の表面に表面配線が埋没形成された
構成とすることにより、欠けや割れ等が発生し難く、絶
縁体表面の平坦度が高く、また表面配線の断面形状を逆
台形とすることによって、微細配線、ＩＶＨ等を形成し
た高密度配線基板において配線の密着力が低下すること
なく、むしろ密着力が大幅に向上し、高性能で高信頼性
の配線基板を得ることができるという優れた効果を奏す
る。As described above, according to the present invention, the organic tree
With the structure surface wiring on a surface of the insulator containing the fat is buried formed, chipping or cracking or the like hardly occurs, the flatness of the insulator surface is rather high, also the cross-sectional shape of the surface wiring inverted trapezoid by Rukoto be a fine wire, the adhesion of the wiring in the high-density wiring substrate formed with IVH like drops
Instead , the adhesive force is greatly improved, and an excellent effect that a high-performance and highly reliable wiring board can be obtained is obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の配線基板の断面図である。FIG. 1 is a cross-sectional view of a wiring board according to the present invention.

【図２】（ａ）〜（ｅ）は図１の配線基板の製造方法を
概略説明するための工程図である。FIGS. 2A to 2E are process diagrams for schematically explaining a method of manufacturing the wiring board of FIG. 1;

【図３】配線のプリプレグへの圧接時の状態を説明する
ための概略断面図であり（ａ）は従来法、（ｂ）は本発
明の方法の図である。FIGS. 3A and 3B are schematic cross-sectional views for explaining a state when a wiring is pressed against a prepreg, wherein FIG. 3A is a diagram of a conventional method and FIG. 3B is a diagram of a method of the present invention.

【符号の説明】[Explanation of symbols]

１ 多層配線基板 ２ 絶縁体 ３ 表面配線 ３ａ ビアホール ３ｂ ビアホール導体 ４、１７ 側面 ５ 下面 ６ 上辺 ７、１５ 横辺 １１ 転写シート １２ 金属箔 １３ 配線 １４ 底辺 １６ レジスト層 １８ 上面 １９ プリプレグ α° 形成角1 multilayer wiring board 2 insulator 3 surface wiring 3a via hole 3b via hole conductors 4,17 side 5 bottom surface 6 the upper side 7 and 15 horizontal side 11 transfer sheet 12 metal foil 13 wiring 14 bottom 16 resist layer 18 top surface 19 prepreg alpha ° forming angle

フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H05K 1/02 H05K 3/20 H05K 3/40 Continuation of the front page (58) Field surveyed (Int.Cl. 7 , DB name) H05K 1/02 H05K 3/20 H05K 3/40

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】有機樹脂を含み、且つビアホール内に導体
ペーストを充填したビアホール導体が形成された絶縁体
表面に金属箔による表面配線を上面が露出した状態で埋
設してなり、上記表面配線の平均表面粗さを２００ｎｍ
以上とするとともに、上記表面配線の上面幅を下面幅よ
り大きくして該表面配線の断面形状を形成角α°が４５
°〜８０°の逆台形として前記ビアホール導体と結合し
たことを特徴とする配線基板。An organic resin and a conductor in a via hole.
A surface wiring made of metal foil is buried in the surface of the insulator on which the via-hole conductor filled with the paste is formed in a state where the upper surface is exposed, and the average surface roughness of the surface wiring is 200 nm.
As described above, the upper surface width of the surface wiring is made larger than the lower surface width so that the cross-sectional shape of the surface wiring is formed at an angle α of 45 °.
° to 80 ° inverted trapezoidal shape and combined with the via hole conductor
A wiring substrate , characterized in that: 【請求項２】転写シートの表面に形成された金属箔をエ
ッチング処理して断面形状が台形状となる表面配線を形
成し、上記表面配線の表面を平均表面粗さ２００ｎｍ以
上に粗化した後、有機樹脂を含み且つビアホール内に導
体ペーストを充填したビアホール導体が形成された絶縁
体の表面に上記転写シートを圧接して、上記表面配線を
上記絶縁体表面に転写させることによって、形成角α°
が４５°〜８０°で上面幅が下面幅より大きい逆台形状
の断面形状を有する表面配線を上面が露出した状態で上
記絶縁体表面に埋設して前記配線と前記ビアホール導体
と結合したことを特徴とする配線基板の製造方法。Wherein a metal foil formed on the surface of the transfer sheet to form a surface wiring cross-sectional shape by etching becomes trapezoidal, after roughening the surface of the surface wiring above average surface roughness 200nm Contains organic resin and leads into via hole
Insulation with via-hole conductor filled with body paste
By pressing the transfer sheet against the surface of the body and transferring the surface wiring to the surface of the insulator, the formation angle α °
A surface wiring having an inverted trapezoidal cross-sectional shape whose upper surface width is larger than the lower surface width by 45 ° to 80 ° is buried in the insulator surface with the upper surface exposed, and the wiring and the via-hole conductor
And a method of manufacturing a wiring board.
JP09233157A 1997-08-28 1997-08-28 Wiring board and manufacturing method thereof Expired - Fee Related JP3085658B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP09233157A JP3085658B2 (en) 1997-08-28 1997-08-28 Wiring board and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP09233157A JP3085658B2 (en) 1997-08-28 1997-08-28 Wiring board and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPH1174625A JPH1174625A (en) 1999-03-16
JP3085658B2 true JP3085658B2 (en) 2000-09-11

Family

ID=16950622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP09233157A Expired - Fee Related JP3085658B2 (en) 1997-08-28 1997-08-28 Wiring board and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP3085658B2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001044638A (en) * 1999-07-30 2001-02-16 Kyocera Corp Multi-layer wiring board and manufacture thereof
JP4605939B2 (en) * 2000-10-31 2011-01-05 京セラ株式会社 Wiring board manufacturing method
JP4335075B2 (en) * 2004-06-08 2009-09-30 株式会社伸光製作所 Multilayer printed wiring board and manufacturing method thereof
JP4846258B2 (en) * 2005-03-31 2011-12-28 京セラＳｌｃテクノロジー株式会社 Wiring board and manufacturing method thereof
JP5072283B2 (en) * 2006-07-31 2012-11-14 三洋電機株式会社 Circuit board
JP5203108B2 (en) 2008-09-12 2013-06-05 新光電気工業株式会社 Wiring board and manufacturing method thereof
KR101203965B1 (en) 2009-11-25 2012-11-26 엘지이노텍 주식회사 Printed circuit board and manufacturing method of the same
JP5580374B2 (en) * 2012-08-23 2014-08-27 新光電気工業株式会社 Wiring board and manufacturing method thereof
DE102012216926A1 (en) * 2012-09-20 2014-03-20 Jumatech Gmbh Method for producing a printed circuit board element and printed circuit board element
TWI566309B (en) * 2016-01-08 2017-01-11 恆勁科技股份有限公司 Method of fabricating package substrates

Also Published As

Publication number Publication date
JPH1174625A (en) 1999-03-16

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