JP3078390B2 - Method of controlling junction resistance between oxide superconductor and electrode and method of manufacturing superconducting transistor - Google Patents

Method of controlling junction resistance between oxide superconductor and electrode and method of manufacturing superconducting transistor

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Publication number
JP3078390B2
JP3078390B2 JP04100702A JP10070292A JP3078390B2 JP 3078390 B2 JP3078390 B2 JP 3078390B2 JP 04100702 A JP04100702 A JP 04100702A JP 10070292 A JP10070292 A JP 10070292A JP 3078390 B2 JP3078390 B2 JP 3078390B2
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Japan
Prior art keywords
electrode
thin film
forming
oxide superconductor
superconducting
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Japanese (ja)
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JPH0690033A (en
Inventor
誠二 鈴木
博 鈴木
辰朗 臼杵
順信 善里
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】酸化物超電導体と電極との接合抵
抗値の制御法及びそれを用いた超電導トランジスタの製
造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for controlling a junction resistance value between an oxide superconductor and an electrode and a method for manufacturing a superconducting transistor using the same.

【0002】[0002]

【従来の技術】従来の超電導ベーストランジスタにおい
ては、半導体と超電導体との接合をコレクタ・ベース接
合に用いている。ところで、酸化物超電導体は半導体と
の接合において、相互拡散のため良好な接合が得られて
いなかった。
2. Description of the Related Art In a conventional superconducting base transistor, a junction between a semiconductor and a superconductor is used for a collector-base junction. By the way, the oxide superconductor has not been able to obtain a good junction due to mutual diffusion in the junction with the semiconductor.

【0003】酸化物超電導体と半導体との良好な接合を
得る方法が,特願平3−224565号に提案されてい
る。この方法を用いて形成された超電導トランジスタを
図1に示す。Nbを0.08重量%から0.5重量%の
範囲でドープしたSrTiO3単結晶基板1上に、Ba
1-xxBiO3(0.2<x<0.5)(以下、BKB
Oという)組成からなる超電導体薄膜2をスパッタリン
グ法により形成し、このNbドープのSrTiO3単結
晶基板1と超電導薄膜2により、良好な半導体と超電導
体接合を得ている。
A method for obtaining a good junction between an oxide superconductor and a semiconductor has been proposed in Japanese Patent Application No. 3-224565. FIG. 1 shows a superconducting transistor formed by using this method. On a SrTiO 3 single crystal substrate 1 doped with Nb in the range of 0.08% by weight to 0.5% by weight,
1-x K x BiO 3 (0.2 <x <0.5) (hereinafter referred to as BKB
A superconductor thin film 2 having a composition of O) is formed by a sputtering method, and a good semiconductor-superconductor junction is obtained by the Nb-doped SrTiO 3 single crystal substrate 1 and the superconducting thin film 2.

【0004】そして、BKBOは乾燥大気中にさらすこ
とにより、その表面に自然な絶縁バリアが形成され、こ
の絶縁バリア3をトンネル接合の絶縁層として用いてい
る。この絶縁バリア3上に金(Au)などからなるエミ
ッタ層4を蒸着形成することで、超電導ベーストランジ
スタを作成することができる。また、BKBO膜2には
金(Au)からなるベース電極5が形成されている。
[0004] When BKBO is exposed to dry air, a natural insulating barrier is formed on its surface, and the insulating barrier 3 is used as an insulating layer of a tunnel junction. A superconducting base transistor can be formed by depositing an emitter layer 4 made of gold (Au) or the like on the insulating barrier 3 by vapor deposition. A base electrode 5 made of gold (Au) is formed on the BKBO film 2.

【0005】ところで、低エネルギー型超電導ベースト
ランジスタはエミッタ・ベース間電圧を±10mV程度
で使用する。そして、使用目的により、夫々電流値が決
められ、従って要求される素子接合抵抗が自ずと決めら
れる。すなわち、使用目的に応じて電流値と接合抵抗値
が変化する。
The low-energy superconducting base transistor uses an emitter-base voltage of about ± 10 mV. The current value is determined depending on the purpose of use, and the required element junction resistance is determined naturally. That is, the current value and the junction resistance value change according to the purpose of use.

【0006】[0006]

【表1】 [Table 1]

【0007】また、接合サイズとして、1×1μm2
100×100μm2が考えられており、上記表1の各
接合抵抗を実現するためには表2のように接合の抵抗率
を変える必要がある。
[0007] The bonding size is 1 × 1 μm 2 to
100 × 100 μm 2 is considered, and it is necessary to change the resistivity of the junction as shown in Table 2 in order to realize each of the junction resistances in Table 1 above.

【0008】[0008]

【表2】 [Table 2]

【0009】[0009]

【発明は解決しようする課題】従来はエミッタ・ベース
間の接合抵抗率を変化させることができず、本来は表2
に示すような接合抵抗率が要求されるものに対しても、
接合抵抗値を変化させるためにはエミッタ・ベース間の
接合面積で対応せざるを得ず、デバイスのレイアウト上
の大きな制約となるなどの問題があった。
Conventionally, the junction resistivity between the emitter and the base cannot be changed.
For those requiring a junction resistivity as shown in
In order to change the junction resistance, there is no other way but to cope with the junction area between the emitter and the base, which causes a problem such as a great restriction on the layout of the device.

【0010】この発明は上述した従来の問題点を解消す
るためになされたものとして、接合抵抗値を容易に制御
できる方法を提供するものである。
The present invention has been made to solve the above-mentioned conventional problems, and provides a method for easily controlling a junction resistance value.

【0011】[0011]

【課題を解決するための手段】Ba1-xxBiO3(B
KBO)は低基板温度でのエピタキシャル成長が可能で
あり、等方的な電気伝導性等から、デバイスにより有利
な材料である。この発明者等はこのBKBO超電導薄膜
を用いて、このBKBO膜表面に形成される自然バリア
についての検討を行ったところ、Au(金)蒸着時の基
板温度により、接合特性を再現良く制御できることを見
出した。この発明は斯る事実に基づいてなされたもので
ある。
[Means for Solving the Problems] Ba 1-x K x BiO 3 (B
KBO) is a material that is capable of epitaxial growth at a low substrate temperature and is more advantageous for devices because of its isotropic electrical conductivity and the like. The present inventors have studied the natural barrier formed on the surface of the BKBO film using the BKBO superconducting thin film, and found that the bonding characteristics can be reproducibly controlled by the substrate temperature at the time of Au (gold) deposition. I found it. The present invention has been made based on such a fact.

【0012】すなわち、この発明は、大気中にさらすこ
とにより表面に自然絶縁バリアが形成されたBa1-xx
BiO3(ここに0.2<x<0.5)組成からなる酸
化物超電導体を、真空雰囲気中で室温以上の所定温度で
熱処理した後、金電極を蒸着にて形成することにより酸
化物超電導体と電極間の接合抵抗を制御することを特徴
とする。
That is, the present invention provides a Ba 1-x K x having a natural insulating barrier formed on the surface by exposing it to the atmosphere.
An oxide superconductor having a composition of BiO 3 (here, 0.2 <x <0.5) is heat-treated at a predetermined temperature of room temperature or higher in a vacuum atmosphere, and then a gold electrode is formed by vapor deposition. It is characterized in that the junction resistance between the superconductor and the electrode is controlled.

【0013】特に、200℃以上300℃未満の温度で
熱処理することにより、超電導体と電極との間でオーミ
ックコンタクトを取ることを特徴とする。
In particular, an ohmic contact is made between the superconductor and the electrode by performing a heat treatment at a temperature of 200 ° C. or more and less than 300 ° C.

【0014】また、この発明の超電導トランジスタの製
造方法は、コレクタとなる半導体基板上に、Ba1-xx
BiO3(ここに0.2<x<0.5)組成からなるベ
ース領域としての酸化物超電導体薄膜を形成すると共に
この超電導薄膜表面上に自然絶縁バリアを形成する工程
と、真空雰囲気中で室温以上の所定温度で熱処理をした
後、前記超電導薄膜上の一部に超電導薄膜とコンタクト
をとる金電極を形成する工程と、金電極を除いた超電導
薄膜上に絶縁層を形成する工程と、この絶縁層上にエミ
ッタ層を形成する工程と、を備える。
Further, according to the method of manufacturing a superconducting transistor of the present invention, the Ba 1-x K x
Forming an oxide superconductor thin film as a base region having a composition of BiO 3 (here, 0.2 <x <0.5) and forming a natural insulating barrier on the surface of the superconducting thin film; After performing a heat treatment at a predetermined temperature equal to or higher than room temperature, a step of forming a gold electrode that contacts the superconducting thin film on a part of the superconducting thin film, and a step of forming an insulating layer on the superconducting thin film excluding the gold electrode, Forming an emitter layer on the insulating layer.

【0015】また、この発明の超電導トランジスタの製
造方法は、コレクタとなる半導体基板上に、Ba1-xx
BiO3(ここに、0.2<x<0.5)組成からなる
ベース領域としての酸化物超電導体薄膜を形成すると共
に、この超電導薄膜表面上に自然絶縁バリアを形成する
工程と、前記自然絶縁バリア上の一部にエミッタ層を形
成する工程と、真空雰囲気中で室温以上の所定温度で熱
処理をした後、前記超電導薄膜上の一部に超電導薄膜と
コンタクトする金電極を形成する工程と、を備えてな
る。
Further, according to the method of manufacturing a superconducting transistor of the present invention, the Ba 1-x K x
Forming an oxide superconductor thin film as a base region having a composition of BiO 3 (here, 0.2 <x <0.5) and forming a natural insulating barrier on the surface of the superconducting thin film; A step of forming an emitter layer on a part of the insulating barrier, and a step of forming a gold electrode in contact with the superconducting thin film on a part of the superconducting thin film after heat treatment at a predetermined temperature of room temperature or higher in a vacuum atmosphere. , Is provided.

【0016】[0016]

【作用】Ba1-xxBiO3(BKBO)は、大気中に
さらすとその表面に自然バリアが発生するが、この自然
バリアは真空雰囲気中で熱処理することで、自然バリア
がうすくなる。従って、Au蒸着時の基板温度を制御す
ることにより、その接合抵抗が制御される。
[Function] When exposed to the atmosphere, Ba 1-x K x BiO 3 (BKBO) forms a natural barrier on its surface, but the natural barrier becomes thinner by heat treatment in a vacuum atmosphere. Accordingly, by controlling the substrate temperature during Au deposition, the junction resistance is controlled.

【0017】[0017]

【実施例】以下、この発明に実施例につき説明する。Embodiments of the present invention will be described below.

【0018】まず、Nbを0.08重量%から0.5重
量%ドープしたSrTiO3(110)基板上にRFマ
グネトロンスパッタリング(基板温度400℃)により
BKBO膜をエピタキシャル成長させた後、乾燥した大
気中で1時間放置し自然バリアを形成した。
First, a BKBO film is epitaxially grown on a SrTiO 3 (110) substrate doped with 0.08% by weight to 0.5% by weight of Nb by RF magnetron sputtering (substrate temperature: 400 ° C.), and then dried in air. For 1 hour to form a natural barrier.

【0019】そして、このBKBOの自然バリアが形成
された表面上に金(Au)を蒸着により形成する。その
Au蒸着時の温度を室温から300℃まで変化させその
時の0バイヤス接合抵抗を夫々測定した。すなわち、真
空雰囲気中Au蒸着時の温度まで基板温度を上昇させた
後、その状態で30分ほど熱処理を施し、EB蒸着法に
よりAuをBKBO膜上に蒸着させた。
Then, gold (Au) is formed by evaporation on the surface on which the natural barrier of BKBO is formed. The temperature at the time of Au deposition was changed from room temperature to 300 ° C., and the zero bias junction resistance at that time was measured. That is, after raising the substrate temperature to the temperature at which Au was deposited in a vacuum atmosphere, a heat treatment was performed for 30 minutes in that state, and Au was deposited on the BKBO film by the EB deposition method.

【0020】図4は、その時の0バイヤス接合抵抗(T
=5K)の基板温度依存性を示す。図から明らかなよう
に、Au蒸着時の温度が室温から200℃までは、温度
上昇に対応して線形に100〜10-5Ωcm2までその接合
抵抗が減少し、200℃を越えるとその接合抵抗が10
-5Ωcm2の範囲でほぼ一定となる。室温から200℃ま
では、Au蒸着時の温度まで基板温度を変化させ、その
状態で一定時間保持してAu蒸着することで接合抵抗を
制御することができた。すなわち、基板温度を室温にし
て作成した接合はBKBO膜表面の自然バリアによりS
/I/Nトンネル接合が形成され、I−V特性において
図5(a)に示すように、非線形が観測された。
FIG. 4 shows the zero bias junction resistance (T
= 5K). As can be seen, the temperature at the time of Au deposition from room temperature to 200 ° C. is linear in its junction resistance to 10 0 ~10 -5 Ωcm 2 is reduced in response to the temperature rise, exceeds 200 ° C. Its Junction resistance is 10
It is almost constant in the range of -5 Ωcm 2 . From room temperature to 200 ° C., the junction resistance could be controlled by changing the substrate temperature to the temperature at the time of Au deposition and holding the state for a certain period of time to perform Au deposition. That is, the junction formed at the substrate temperature of room temperature is formed by the natural barrier on the surface of the BKBO film.
A / I / N tunnel junction was formed, and non-linearity was observed in the IV characteristics as shown in FIG.

【0021】一方、基板温度200℃以上300℃未満
にて作成した接合は、図5(b)及び図6に示すような
S/N接合特性を示し、この時の接合抵抗ρは10-5Ω
cm2より小さい、自然バリアの消滅が確認された。
On the other hand, a junction formed at a substrate temperature of 200 ° C. or higher and lower than 300 ° C. exhibits S / N junction characteristics as shown in FIGS. 5B and 6, and the junction resistance ρ at this time is 10 −5. Ω
The disappearance of the natural barrier smaller than cm 2 was confirmed.

【0022】図4に示すように、基板温度が200℃を
越えると接合抵抗はほぼ一定となるが、基板温度が30
0℃以上になるとBKBO膜からの酸素の抜けが生じる
ので好ましくない。従って、オーミックコンタクトを取
るためには、200℃以上300℃未満の基板温度で、
熱処理を施した後、Auを蒸着すれば良い。
As shown in FIG. 4, when the substrate temperature exceeds 200 ° C., the junction resistance becomes almost constant, but when the substrate temperature exceeds 30 ° C.
If the temperature is 0 ° C. or higher, it is not preferable because oxygen escapes from the BKBO film. Therefore, to obtain an ohmic contact, at a substrate temperature of 200 ° C. or more and less than 300 ° C.,
After the heat treatment, Au may be deposited.

【0023】次に、上記接合抵抗の制御方法を用いたこ
の発明にかかる超電導ベーストランジスタの製造方法に
つき図2及び図3に従い説明する。
Next, a method of manufacturing a superconducting base transistor according to the present invention using the above-described method of controlling the junction resistance will be described with reference to FIGS.

【0024】Nbを0.05〜0.5重量%ドープした
SrTiO3単結晶基板1を用意する。そして、この単
結晶基板1をトリクレン、アセトン、メタノールを使っ
て洗浄する。洗浄はトリクレン中に超音波10分間、ア
セトン中に超音波10分間、メタノール中に超音波10
分間漬けそれぞれ行う。その洗浄が終わった後、真空オ
ーブン120℃中で10分間乾燥させた後、スパッタリ
ングチャンバー内にセットする。
An SrTiO 3 single crystal substrate 1 doped with 0.05 to 0.5% by weight of Nb is prepared. Then, the single crystal substrate 1 is washed with trichlene, acetone and methanol. Washing is performed by ultrasonication in trichlene for 10 minutes, ultrasonic wave in acetone for 10 minutes, and ultrasonic wave in methanol for 10 minutes.
Pickle each minute. After the cleaning is completed, the substrate is dried in a vacuum oven at 120 ° C. for 10 minutes, and then set in a sputtering chamber.

【0025】そして、この単結晶基板1上にBKBO薄
膜2をRFスパッタリングにより形成する。この成膜は
先ず、スパッタリングチャンバーを真空に引き、1×1
-5Paに達した後、基板温度を380〜400℃に設
定する。ガス流量をO2:Ar=1:1に設定し、合計
80Paのガスを流しながら、BKBOを100Wでス
パッタリングする。BKBOターゲットはBKBO粉末
をプレスで固めた粉末ターゲットであり、スパッタリン
グレートは0.1Å/秒とした。この条件で3000秒
のスパッタリングを行うと、300ÅのBKBO超電導
薄膜2が形成される(図2(a)参照)。このBKBO
膜はTce=28K、R300=100μΩcmであり、非
常に良質な超電導特性を持った超電導薄膜が得られる。
Then, a BKBO thin film 2 is formed on the single crystal substrate 1 by RF sputtering. In this film formation, first, the sputtering chamber was evacuated to a vacuum and 1 × 1
After reaching 0 -5 Pa, the substrate temperature is set to three hundred eighty to four hundred ° C.. The gas flow rate is set to O 2 : Ar = 1: 1, and BKBO is sputtered at 100 W while flowing a gas of 80 Pa in total. The BKBO target was a powder target obtained by solidifying BKBO powder by pressing, and the sputtering rate was set at 0.1 ° / sec. When 3,000 seconds of sputtering is performed under these conditions, a 300 ° BKBO superconducting thin film 2 is formed (see FIG. 2A). This BKBO
The film has T ce = 28 K and R 300 = 100 μΩcm, and a superconducting thin film having very good superconducting properties can be obtained.

【0026】スパッタリング終了時、酸素(O2)ガス
をチャンバーに4/5気圧まで注入し、400℃から数
時間かけて冷却した後、乾燥大気中に1時間さらす。こ
の工程により膜の表面に自然絶縁バリア3が10〜30
Å程度形成される(図2(b)参照)。
At the end of sputtering, oxygen (O 2 ) gas is injected into the chamber to 4/5 atm, cooled from 400 ° C. for several hours, and then exposed to dry air for one hour. By this step, the natural insulating barrier 3 is formed on the surface of the film by 10 to 30.
Å is formed (see FIG. 2B).

【0027】その後、エミッタ電極4を自然絶縁バリア
3上に形成する。使用目的及び接合面積に応じて室温か
ら200℃までの間の所定温度に基板温度を設定して、
その基板温度で30分保持した後、AuをEB蒸着法に
より形成する。すなわち、真空チャンバーの真空度が1
×10-5Paに達したら、基板温度を所定温度に成るよ
うに制御、例えば基板温度を100℃に設定し、Auを
蒸着することにより、BKBO膜2とエミッタ電極4が
自然絶縁バリアを介してトンネル接合される。この時の
接合抵抗率は図4に示すように温度により変化するの
で、使用目的及びデバイスの接合面積などにより最適な
値を決めれば良い。
After that, the emitter electrode 4 is formed on the natural insulating barrier 3. The substrate temperature is set to a predetermined temperature between room temperature and 200 ° C. depending on the purpose of use and the bonding area,
After holding at the substrate temperature for 30 minutes, Au is formed by the EB evaporation method. That is, if the degree of vacuum in the vacuum chamber is 1
When the pressure reaches × 10 -5 Pa, the substrate temperature is controlled to a predetermined temperature, for example, the substrate temperature is set to 100 ° C., and Au is vapor-deposited, so that the BKBO film 2 and the emitter electrode 4 pass through a natural insulating barrier. Tunnel junction. Since the junction resistivity at this time changes depending on the temperature as shown in FIG. 4, an optimum value may be determined according to the purpose of use and the junction area of the device.

【0028】そして、このエミッタ電極4をマスクとし
て、ベース電極5を形成する。ベース電極5として、A
u電極を真空蒸着で形成するため、基板1を蒸着チャン
バー内にいれる。このチャンバー内を1×10-5Paに
なるように真空引きした後、基板温度を200℃まで上
昇させる。この温度でBKBO膜を30分から1時間程
度保持すると、エミッタ電極4でマスクされていない部
分の自然絶縁バリア3が薄くなり、清浄なBKBO膜表
面が得られる。この状態でAuのベース電極5をEB蒸
着により形成すると、Au電極とBKBO膜界面にバリ
アが存在せず、オーミックな特性の電極特性が得られ
る。
Then, a base electrode 5 is formed using the emitter electrode 4 as a mask. A as the base electrode 5
In order to form the u electrode by vacuum deposition, the substrate 1 is placed in a deposition chamber. After evacuating the chamber to 1 × 10 −5 Pa, the substrate temperature is increased to 200 ° C. When the BKBO film is held at this temperature for about 30 minutes to 1 hour, the portion of the natural insulating barrier 3 not masked by the emitter electrode 4 becomes thin, and a clean BKBO film surface is obtained. When the Au base electrode 5 is formed by EB vapor deposition in this state, no barrier exists at the interface between the Au electrode and the BKBO film, so that ohmic electrode characteristics can be obtained.

【0029】然る後、所定の形に分割し、ワイヤボンデ
ィング等で端子に接続し、超電導ベーストランジスタが
得られる。
Thereafter, the substrate is divided into predetermined shapes and connected to terminals by wire bonding or the like to obtain a superconducting base transistor.

【0030】次に、この発明の他の製造方法につき図3
を参照して説明する。SrTiO3単結晶基板にBKB
O膜及び自然バリアを形成するまで、すなわち図2
(a)(b)までは前述の方法と同様であり、その後の
形成が上記とは相違するので、相違する工程のみ説明す
る。。
Next, another manufacturing method of the present invention will be described with reference to FIG.
This will be described with reference to FIG. BKB on SrTiO 3 single crystal substrate
Until the O film and the natural barrier are formed, that is, FIG.
The steps up to (a) and (b) are the same as those described above, and the subsequent formation is different from the above. Therefore, only the different steps will be described. .

【0031】SrTiO3単結晶基板1上にBKBO膜
2及び自然バリア3を形成した、BKBO膜2上に、ベ
ース電極5としてAu電極を真空蒸着で形成するため、
基板1を蒸着チャンバー内にいれる。このチャンバー内
を1×10-5Paになるように真空引きした後、基板温
度を200℃まで上昇させる。この温度でBKBO膜を
30分から1時間程度保持すると、自然絶縁バリア3が
薄くなり、清浄なBKBO膜表面が得られる。この状態
でAuのベース電極5を蒸着により形成すると、Au電
極とBKBO膜界面にバリアが存在せず、オーミックな
特性の電極特性が得られる(図3(a)参照)。
A BKBO film 2 and a natural barrier 3 are formed on a SrTiO 3 single crystal substrate 1, and an Au electrode as a base electrode 5 is formed on the BKBO film 2 by vacuum deposition.
The substrate 1 is placed in a deposition chamber. After evacuating the chamber to 1 × 10 −5 Pa, the substrate temperature is increased to 200 ° C. When the BKBO film is held at this temperature for about 30 minutes to 1 hour, the natural insulating barrier 3 becomes thin, and a clean BKBO film surface is obtained. When the Au base electrode 5 is formed by vapor deposition in this state, no barrier exists at the interface between the Au electrode and the BKBO film, and ohmic electrode characteristics can be obtained (see FIG. 3A).

【0032】このAuの蒸着終了時、O2ガスをチャン
バーに4/5気圧まで注入し、400℃から数時間かけ
て冷却した後、乾燥した大気中に1時間さらす。この工
程でBKBO膜の表面に再び自然絶縁バリア6が10〜
30Å程度形成される。
At the end of the deposition of Au, O 2 gas is injected into the chamber to 4/5 atm, cooled from 400 ° C. for several hours, and then exposed to a dry atmosphere for one hour. In this step, the natural insulating barrier 6 is again formed on the surface of the BKBO film.
It is formed at about 30 °.

【0033】次に、エミッタ電極4を自然絶縁バリア6
上に蒸着法にて形成する。この蒸着の際、使用目的及び
接合面積に応じて室温から200℃までの間の所定温度
に基板温度を設定して蒸着を行う。すなわち、真空チャ
ンバーの真空度が1×10-5Paに達したら、基板温度
を所定温度になるように制御、例えば基板温度を100
℃に設定し、金を蒸着して、BKBO膜2とエミッタ電
極4が自然絶縁バリア6を介してトンネル接合される。
Next, the emitter electrode 4 is connected to the natural insulating barrier 6.
It is formed thereon by a vapor deposition method. At the time of this vapor deposition, vapor deposition is performed by setting the substrate temperature to a predetermined temperature between room temperature and 200 ° C. according to the purpose of use and the bonding area. That is, when the degree of vacuum in the vacuum chamber reaches 1 × 10 −5 Pa, the substrate temperature is controlled to a predetermined temperature, for example, 100 ° C.
C., gold is deposited, and the BKBO film 2 and the emitter electrode 4 are tunnel-joined via the natural insulating barrier 6.

【0034】然る後、所定の形に分割し、ワイヤボンデ
ィング等で端子に接続し、超電導ベーストランジスタが
得られる。
Thereafter, the substrate is divided into a predetermined shape and connected to terminals by wire bonding or the like to obtain a superconducting base transistor.

【0035】[0035]

【発明の効果】この発明によれば、BKBOを真空雰囲
気中で熱処理することで、BKBO表面に形成された自
然バリア層をうすくすることができるので、Au蒸着時
の基板温度を制御することにより、その接合抵抗を制御
することができる。
According to the present invention, by subjecting BKBO to a heat treatment in a vacuum atmosphere, the natural barrier layer formed on the BKBO surface can be lightened. , The junction resistance can be controlled.

【図面の簡単な説明】[Brief description of the drawings]

【図1】BKBO膜を用いた超電導トランジスタを示す
模式図である。
FIG. 1 is a schematic view showing a superconducting transistor using a BKBO film.

【図2】この発明にかかる超電導ベーストランジスタの
製造方法の一実施例を工程別に示す断面図である。
FIG. 2 is a cross-sectional view showing an embodiment of a method for manufacturing a superconducting base transistor according to the present invention for each step.

【図3】この発明にかかる超電導ベーストランジスタの
製造方法の他の実施例を工程別に示す断面図である。
FIG. 3 is a cross-sectional view showing another embodiment of the method for manufacturing a superconducting base transistor according to the present invention for each step.

【図4】EB蒸着法によりAuをBKBO膜上に蒸着さ
せたときの0バイヤス接合抵抗(T=5K)の基板温度
依存特性を示す特性図である。
FIG. 4 is a characteristic diagram showing a substrate temperature dependence of a zero bias junction resistance (T = 5K) when Au is deposited on a BKBO film by an EB vapor deposition method.

【図5】EB蒸着法によりAuをBKBO膜上に蒸着さ
せたときのI−V特性図である。
FIG. 5 is an IV characteristic diagram when Au is evaporated on a BKBO film by an EB evaporation method.

【図6】EB蒸着法によりAuをBKBO膜上に蒸着さ
せたときのI−V特性図である。
FIG. 6 is an IV characteristic diagram when Au is evaporated on a BKBO film by an EB evaporation method.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 善里 順信 守口市京阪本通2丁目18番地 三洋電機 株式会社内 (56)参考文献 特開 平2−192777(JP,A) 特開 平3−68181(JP,A) Japanese Journal of Applied Physics vol.30 no.8B pp.L 1458−L1461(1991) (58)調査した分野(Int.Cl.7,DB名) H01L 39/00 H01L 39/22 - 39/24 JICSTファイル(JOIS)──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Junnobu Yoshizato 2-18-18 Keihanhondori, Moriguchi City Sanyo Electric Co., Ltd. (56) References JP-A-2-192777 (JP, A) JP-A-3 -68181 (JP, A) Japanese Journal of Applied Physics vol. 30 no. 8B pp. L1458-L1461 (1991) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 39/00 H01L 39/22-39/24 JICST file (JOIS)

Claims (5)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 大気中にさらすことにより表面に自然絶
縁バリアが形成されたBa1-xxBiO3(ここにx
は、0.2<x<0.5)組成からなる酸化物超電導体
を、真空雰囲気中で室温以上の所定温度で熱処理した
後、金電極を蒸着にて形成することにより、酸化物超電
導体と電極間の接合抵抗を制御することを特徴とする酸
化物超電導体と電極との接合抵抗制御方法。
1. A Ba 1-x K x BiO 3 (here, x) in which a natural insulating barrier is formed on the surface by exposure to the atmosphere.
Is obtained by subjecting an oxide superconductor having a composition of 0.2 <x <0.5) to a heat treatment at a predetermined temperature equal to or higher than room temperature in a vacuum atmosphere, and then forming a gold electrode by vapor deposition. Resistance control method between an oxide superconductor and an electrode, comprising controlling the junction resistance between the electrode and the electrode.
【請求項2】 室温以上200℃未満の温度で熱処理す
ることにより、接合抵抗値を変化させることを特徴とす
る請求項1に記載の酸化物超電導体と電極との接合抵抗
制御方法。
2. The method for controlling the junction resistance between an oxide superconductor and an electrode according to claim 1, wherein the junction resistance is changed by performing a heat treatment at a temperature from room temperature to less than 200 ° C.
【請求項3】 200℃以上300℃未満の温度で熱処
理することにより、超電導体と電極との間でオーミック
コンタクトを取ることを特徴とする請求項1に記載の酸
化物超電導体と電極との接合抵抗制御方法。
3. An oxide superconductor and an electrode according to claim 1, wherein an ohmic contact is made between the superconductor and the electrode by performing a heat treatment at a temperature of 200 ° C. or more and less than 300 ° C. Junction resistance control method.
【請求項4】 コレクタとなる半導体基板上に、Ba
1-xxBiO3(ここにxは、0.2<x<0.5)組
成からなるベース領域としての酸化物超電導体薄膜を形
成すると共にこの超電導薄膜表面上に自然絶縁バリアを
形成する工程と、真空雰囲気中で室温以上の所定温度で
熱処理をした後、前記超電導薄膜上の一部に超電導薄膜
とコンタクトをとる金電極を形成する工程と、金電極を
除いた超電導薄膜上に絶縁層を形成する工程と、この絶
縁層上にエミッタ層を形成する工程と、からなる超電導
トランジスタの製造方法。
4. A method according to claim 1, wherein Ba is formed on a semiconductor substrate serving as a collector.
Forming an oxide superconductor thin film as a base region having a composition of 1-x K x BiO 3 (where x is 0.2 <x <0.5) and forming a natural insulating barrier on the surface of the superconducting thin film Performing a heat treatment at a predetermined temperature equal to or higher than room temperature in a vacuum atmosphere, and then forming a gold electrode that makes contact with the superconducting thin film on a part of the superconducting thin film, on the superconducting thin film excluding the gold electrode. A method for manufacturing a superconducting transistor, comprising: a step of forming an insulating layer; and a step of forming an emitter layer on the insulating layer.
【請求項5】 コレクタとなる半導体基板上に、Ba
1-xxBiO3(ここに、0.2<x<0.5)組成か
らなるベース領域としての酸化物超電導体薄膜を形成す
ると共に、この超電導薄膜表面上に自然絶縁バリアを形
成する工程と、前記自然絶縁バリア上の一部にエミッタ
層を形成する工程と、真空雰囲気中で室温以上の所定温
度で熱処理をした後、前記超電導薄膜上の一部に超電導
薄膜とコンタクトする金電極を形成する工程と、からな
る超電導トランジスタの製造方法。
5. A method according to claim 1, wherein Ba is formed on a semiconductor substrate serving as a collector.
An oxide superconductor thin film as a base region having a composition of 1-x K x BiO 3 (here, 0.2 <x <0.5) is formed, and a natural insulating barrier is formed on the surface of the superconducting thin film. A step of forming an emitter layer on a part of the natural insulating barrier, and a heat treatment at a predetermined temperature equal to or higher than room temperature in a vacuum atmosphere, and then contacting a part of the superconducting thin film with the superconducting thin film. Forming a superconducting transistor.
JP04100702A 1992-03-25 1992-03-25 Method of controlling junction resistance between oxide superconductor and electrode and method of manufacturing superconducting transistor Expired - Fee Related JP3078390B2 (en)

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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7688335B2 (en) 2001-05-09 2010-03-30 Samsung Electronics Co., Ltd. Conversion of a sub-pixel format data to another sub-pixel data format

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Japanese Journal of Applied Physics vol.30 no.8B pp.L1458−L1461(1991)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7688335B2 (en) 2001-05-09 2010-03-30 Samsung Electronics Co., Ltd. Conversion of a sub-pixel format data to another sub-pixel data format
US7689058B2 (en) 2001-05-09 2010-03-30 Samsung Electronics Co., Ltd. Conversion of a sub-pixel format data to another sub-pixel data format
US7864202B2 (en) 2001-05-09 2011-01-04 Samsung Electronics Co., Ltd. Conversion of a sub-pixel format data to another sub-pixel data format
US7916156B2 (en) 2001-05-09 2011-03-29 Samsung Electronics Co., Ltd. Conversion of a sub-pixel format data to another sub-pixel data format

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