JP3072807B2 - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JP3072807B2 JP3072807B2 JP04188136A JP18813692A JP3072807B2 JP 3072807 B2 JP3072807 B2 JP 3072807B2 JP 04188136 A JP04188136 A JP 04188136A JP 18813692 A JP18813692 A JP 18813692A JP 3072807 B2 JP3072807 B2 JP 3072807B2
- Authority
- JP
- Japan
- Prior art keywords
- copper
- semiconductor device
- wiring
- hydrogen
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Description
【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION
【０００１】[0001]
【産業上の利用分野】本発明は、半導体集積回路の配線
用に適した金属の薄膜の成長方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for growing a metal thin film suitable for wiring of a semiconductor integrated circuit.
【０００２】[0002]
【従来の技術】シリコン半導体集積回路において、アル
ミニウムに代わる配線材料として、電気抵抗が低く、マ
イグレーション耐性を有する銅が注目されている。本発
明者等は既に特願昭６３−１２４００６号、特願昭６３
−３２６０６３号、およびこれらを基礎とした特開平２
−２５６２３８号（特願平１−１２４４４５号）におい
て、シリコン酸化膜等をマスクにして、金属上のみに選
択的に銅を化学気相成長させてコンタクトホールおよび
スルーホールを充填する技術を提案している。2. Description of the Related Art In a silicon semiconductor integrated circuit, copper having low electrical resistance and migration resistance has attracted attention as a wiring material instead of aluminum. The present inventors have already filed Japanese Patent Application No. 63-124006,
No. 326063 and Japanese Patent Laid-Open No.
Japanese Patent Application No. 256256/1996 (Japanese Patent Application No. 1-124445) proposes a technique for selectively filling a contact hole and a through hole by selectively vapor-depositing copper on a metal only using a silicon oxide film or the like as a mask. ing.
【０００３】この選択成長の要点は、銅の有機錯体また
有機金属からなる原料を加熱して蒸発させ、水素と共に
反応室に送り、金属もしくは金属シリサイドからなる第
１の材料および酸化膜もしくは窒化膜からなる第２の材
料を表面に有する基板を原料のガスの分解温度以上に加
熱し、蒸発ガスをその分解温度より低い温度に保ったま
ま加熱された基板上に還元ガスと共に供給し、銅を第１
の材料の表面上のみに選択的に成長させるものである。The main point of this selective growth is that a raw material made of an organic complex or an organic metal of copper is heated and evaporated, sent to a reaction chamber together with hydrogen, and a first material made of metal or metal silicide and an oxide film or nitride film Is heated above the decomposition temperature of the raw material gas, and while the evaporating gas is kept at a temperature lower than the decomposition temperature, the substrate is supplied together with the reducing gas onto the heated substrate, and copper is supplied. First
Selective growth only on the surface of the material.
【０００４】また、特願平２−５６５８６号は原料に水
蒸気等を添加することで堆積速度を増加させたもので、
さらに特開平３−２６７９０２号（特願平２−１７９４
６６号）は、特にビアホールの底面の金属中間層を除去
し、銅を露出させ、銅表面の自然酸化膜が反応雰囲気中
の水素で容易に還元されることを利用して、その上に上
述の選択成長法でビアホール充填させることで、低抵抗
のビア埋め込みを実現する方法である。In Japanese Patent Application No. 2-56586, the deposition rate is increased by adding steam or the like to the raw material.
Further, Japanese Patent Application Laid-Open No. 3-267902 (Japanese Patent Application No. 2-17994)
No. 66) removes a metal intermediate layer on the bottom surface of a via hole, exposes copper, and makes use of the fact that a native oxide film on the copper surface is easily reduced by hydrogen in a reaction atmosphere. Is a method of realizing low-resistance via filling by filling via holes by the selective growth method.
【０００５】[0005]
【発明が解決しようとする課題】上に述べた方法でビア
底部に銅を露出して銅の選択成長を行う場合、反応ガス
と水素は同時に導入することで、底面の銅の自然酸化膜
の還元と銅の成長は同時に進むため、還元が不十分にな
る場合があり、膜の表面形状や、ビア抵抗に不良を生じ
る恐れがある。反応ガスを導入する前に水素のみを導入
して還元反応を充分に行えば、表面形状や、ビア抵抗の
不良の発生は抑えることができるが、長時間の水素処理
は、特にプラズマＣＶＤ等で形成した絶縁膜上に原料ガ
スの吸着点を発生させて選択性を低下させる。これらの
現象は銅の選択成長技術を生産現場で使用する場合に歩
留りの低下等の問題を起こす。In the case where copper is exposed to the bottom of a via and copper is selectively grown by the above-described method, a reactive gas and hydrogen are simultaneously introduced to form a natural oxide film of copper on the bottom. Since the reduction and the growth of copper proceed at the same time, the reduction may be insufficient, and the surface shape of the film and the via resistance may be defective. If the reduction reaction is sufficiently performed by introducing only hydrogen before introducing the reaction gas, it is possible to suppress the occurrence of defects in the surface shape and via resistance. An adsorption point of the source gas is generated on the formed insulating film to lower the selectivity. These phenomena cause problems such as a decrease in yield when the selective growth technique of copper is used in a production site.
【０００６】[0006]
【課題を解決するための手段】本発明は、これらの課題
を鑑みてなされたもので、ビア底面に銅を露出した後、
化学気相成長装置内でアセチルアセトン誘導体のガスを
導入し、絶縁膜表面を不活性化した後に、水素を導入し
て銅の表面の自然酸化膜を還元するという一連の工程
を、銅の選択成長反応の前に行うことを特徴とする。SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has been made in consideration of the followings.
A series of steps of introducing a gas of an acetylacetone derivative in a chemical vapor deposition apparatus to inactivate the insulating film surface, and then introducing hydrogen to reduce the natural oxide film on the copper surface is performed by selective growth of copper. It is characterized in that it is performed before the reaction.
【０００７】[0007]
【作用】本発明を用いることで、選択性を充分に維持し
つつ、ビアの底面の自然酸化膜が除去された銅の上に銅
の選択成長を行うことができ、形状的、かつ電気的に制
御性の良いビアホール埋め込みを実現できる。According to the present invention, copper can be selectively grown on copper from which a native oxide film has been removed on the bottom surface of a via while maintaining sufficient selectivity. In addition, it is possible to realize via hole filling with good controllability.
【０００８】[0008]
【実施例】以下、実施例によって本発明を説明する。The present invention will be described below by way of examples.
【０００９】堆積装置としては特願平２−５６５８６号
において示したものと同じ銅ＣＶＤ装置を用いた。図１
に装置の概略を示す。反応室１０１は排気孔１０２を通
して図示しない排気系により排気可能である。試料基板
１０４を板ばね１０５で保持する基板ホルダ１０３が反
応室１０１内に設けられている。ヒータ１０６が基板ホ
ルダ１０３に内蔵され、基板１０４を所定の温度に加熱
できる。As the deposition apparatus, the same copper CVD apparatus as shown in Japanese Patent Application No. 2-56586 was used. FIG.
Figure 1 shows the outline of the device. The reaction chamber 101 can be exhausted by an exhaust system (not shown) through an exhaust hole 102. A substrate holder 103 for holding a sample substrate 104 with a leaf spring 105 is provided in the reaction chamber 101. A heater 106 is built in the substrate holder 103 and can heat the substrate 104 to a predetermined temperature.
【００１０】銅の有機錯体または有機金属化合物からな
る原料１０８を収納する原料容器１０７が反応室１０１
の外部に設置されている。反応室１０１内において基板
ホルダ１０３と対向するガス噴射板１０９がパイプ１１
０およびバルブ１１１を介して原料容器１０７に連結さ
れている。ガス噴射板１０９には多数の微細なガス噴射
孔１１２が設けられている。A raw material container 107 containing a raw material 108 made of an organic copper complex or an organic metal compound is provided in a reaction chamber 101.
It is installed outside. The gas injection plate 109 facing the substrate holder 103 in the reaction chamber 101
0 and a raw material container 107 via a valve 111. The gas injection plate 109 is provided with many fine gas injection holes 112.
【００１１】原料容器１０７，パイプ１１０およびバル
ブ１１１をヒータ１１３によって所定の温度に加熱する
ことができ、一方、ガス噴射板１０９を内蔵されている
ヒータ１１４によって所定の温度に加熱することができ
る。The raw material container 107, the pipe 110 and the valve 111 can be heated to a predetermined temperature by a heater 113, while the gas injection plate 109 can be heated to a predetermined temperature by a built-in heater 114.
【００１２】還元性のキャリアガスとして水素がマスフ
ローコントローラ１１７により、必要に応じて水蒸気が
マスフローコントローラ１１８により、また本発明の特
徴であるアセチルアセトン誘導体がマスフローコントロ
ーラ１１９で、それぞれ制御され、バルブ１２０により
パイプ１１５を通って原料容器１０７内に導入される
か、バルブ１２１，パイプ１２２を通して直接反応室に
送られる。Hydrogen as a reducing carrier gas is controlled by the mass flow controller 117, steam is controlled by the mass flow controller 118 if necessary, and the acetylacetone derivative, which is a feature of the present invention, is controlled by the mass flow controller 119. It is introduced into the raw material container 107 through 115 or sent directly to the reaction chamber through the valve 121 and the pipe 122.
【００１３】一連の堆積の前処理は、パイプ１２２を通
して導入されたガスにより行われ、堆積反応は、パイプ
１１５を通ったガスと原料容器内で加熱、蒸発した原料
ガスが反応室１０１に導入されて行われる。A series of pretreatments for deposition are performed by using a gas introduced through a pipe 122. In the deposition reaction, a gas passed through a pipe 115 and a source gas heated and evaporated in a source container are introduced into a reaction chamber 101. Done.
【００１４】出発原料としては、ビスヘキサフロロアセ
チルアセトナト銅等の銅のベータジケトナトが使用され
る。As a starting material, beta-diketonate of copper such as copper bishexafluoroacetylacetonate is used.
【００１５】なお、図中、１１６はシーリング用Ｏ−リ
ングである。In the figure, reference numeral 116 denotes an O-ring for sealing.
【００１６】（実施例１）本発明による多層配線ビア埋
め込みの工程を図２に示す。(Embodiment 1) FIG. 2 shows a process of embedding a multilayer wiring via according to the present invention.
【００１７】トランジスタ製造工程を終えた半導体基板
２０１上の絶縁膜２０２の上に密着性向上のための金属
（例えば、タングステン、窒化チタン、タンタル）２０
３，２０５でサンドイッチ構造になった銅２０４よりな
る第１層配線を形成した後、層間絶縁膜（例えばプラズ
マＣＶＤで堆積したシリコン酸化膜）２０６を堆積す
る。層間絶縁膜２０６を加工してビアホール２０７を開
孔し、銅を露出する（図２（ａ））。A metal (for example, tungsten, titanium nitride, tantalum) 20 for improving adhesion is formed on the insulating film 202 on the semiconductor substrate 201 after the transistor manufacturing process.
After forming a first layer wiring made of copper 204 having a sandwich structure at 3205, an interlayer insulating film (for example, a silicon oxide film deposited by plasma CVD) 206 is deposited. The interlayer insulating film 206 is processed to form a via hole 207 to expose copper (FIG. 2A).
【００１８】次に、上に説明したような銅の化学気相成
長装置に本試料を導入し、真空排気した後、アセチルア
セトン誘導体として例えばヘキサフロロアセチルアセト
ンを２０ｃｃ／ｍｉｎ導入し、排気量を調整すること
で、１０Ｐａから１０００Ｐａの圧力下で３０秒以上の
処理を行う。この時、試料の温度は、その後の銅の堆積
反応の温度である３００℃から４００℃程度で行うこと
がプロセスの時間を短縮する上で望ましい。Next, the sample is introduced into the above-described apparatus for chemical vapor deposition of copper, evacuated, and then, for example, hexafluoroacetylacetone is introduced as an acetylacetone derivative at a rate of 20 cc / min to adjust the exhaust amount. Thus, the processing is performed for 30 seconds or more under a pressure of 10 Pa to 1000 Pa. At this time, it is desirable to perform the sample at a temperature of about 300 ° C. to 400 ° C., which is the temperature of the subsequent copper deposition reaction, in order to shorten the process time.
【００１９】次に、アセチルアセトンガスの導入を停止
し、水素を１００ｃｃ／ｍｉｎ程度導入し、圧力５００
Ｐａから２０００Ｐａの範囲で１分から１０分の範囲で
銅の自然酸化膜の還元を行う。次に、すでに公知の銅の
選択ＣＶＤを行いビアホールを銅２０８で充填する（図
２（ｂ））。標準的な条件としては、原料温度を９０℃
に設定し、水素１００ｃｃ／ｍｉｎと水蒸気１０ｃｃ／
ｍｉｎと共に原料を反応室に導入し、反応室の圧力２０
００Ｐａ，基板温度３９０℃で銅を堆積する。Next, the introduction of acetylacetone gas was stopped, and hydrogen was introduced at about 100 cc / min.
The natural oxide film of copper is reduced in the range of Pa to 2000 Pa for 1 minute to 10 minutes. Next, a well-known selective CVD of copper is performed to fill the via hole with copper 208 (FIG. 2B). As a standard condition, the raw material temperature is 90 ° C.
Is set to 100 cc / min for hydrogen and 10 cc /
and the raw material is introduced into the reaction chamber together with the pressure of 20.
Copper is deposited at 00 Pa and a substrate temperature of 390 ° C.
【００２０】さらに、第１の配線と同様の構造の第２層
の金属配線２０９，２１０，２１１を形成する（図２
（ｃ））。Further, second-layer metal wirings 209, 210 and 211 having the same structure as the first wiring are formed (FIG. 2).
(C)).
【００２１】図３（ａ），（ｂ），（ｃ）に前処理無し
で選択成長を行った場合、水素処理のみの前処理を行っ
た場合、ヘキサフロロアセチルアセトン処理および水素
処理を行った場合の走査電子顕微鏡写真を比較する。本
発明による前処理を行った場合、前処理無しに比べて表
面形状が、水素処理をした時に比べて選択性の点で優れ
る。3 (a), 3 (b) and 3 (c) show a case where selective growth is performed without pretreatment, a case where pretreatment is performed only with hydrogen treatment, a case where hexafluoroacetylacetone treatment and hydrogen treatment are performed. Are compared. When the pretreatment according to the present invention is performed, the surface shape is superior in terms of selectivity as compared with the case where the hydrogen treatment is not performed, as compared with the case without the pretreatment.
【００２２】（実施例２）以上の表面処理において、表
面処理材料としてヘキサフロロアセチルアセトンの他
に、そのパーフロロアルキル基であるＣＦ3 のかわりに
Ｃ2 Ｆ5 等に置き換えたアセチルアセトン誘導体におい
ても、同様の効果を得られる。また、上記表面処理方法
は、ニッケル、コバルトのベータジケトナト化合物を水
素還元し、金属を堆積する際にも有効である。(Example 2) In the above surface treatment, in addition to hexafluoroacetylacetone as a surface treatment material, an acetylacetone derivative obtained by replacing perfluoroalkyl group CF 3 with C 2 F 5 or the like instead of CF 3 , Similar effects can be obtained. The above surface treatment method is also effective when hydrogen is reduced from a nickel or cobalt beta-diketonato compound to deposit a metal.
【００２３】[0023]
【発明の効果】以上のように、本発明を用いることによ
り、絶縁膜上の核発生による選択破れを防止しつつ、ビ
ア底部の自然酸化膜の除去が可能になり、銅の選択成長
のプロセスの信頼度を向上させ、ＬＳＩ生産ラインにお
ける技術的および経済的に顕著な進歩をもたらすことが
できる。As described above, by using the present invention, it is possible to remove a natural oxide film at the bottom of a via while preventing selective breakage due to generation of nuclei on an insulating film. , And can make significant technical and economic advances in LSI production lines.
【図１】本発明に用いた装置の模式的断面図である。FIG. 1 is a schematic sectional view of an apparatus used in the present invention.
【図２】本発明を適用したビアホール埋め込み法を説明
する工程図である。FIG. 2 is a process diagram illustrating a via hole filling method to which the present invention is applied.
【図３】本発明の処理法を入れた選択成長と従来法によ
る選択成長を比較した走査電子顕微鏡写真であり、
（ａ）は前処理無しで選択成長を行った場合、（ｂ）は
水素処理１０分のみの前処理を行った場合、（ｃ）はヘ
キサフロロアセチルアセトン処理および水素処理を行っ
た場合の走査電子顕微鏡写真である。FIG. 3 is a scanning electron micrograph comparing selective growth with a treatment method of the present invention and selective growth by a conventional method;
(A) is a case where selective growth is performed without pretreatment, (b) is a case where pretreatment is performed only for 10 minutes of hydrogen treatment, and (c) is a scanning electron beam where hexafluoroacetylacetone treatment and hydrogen treatment are performed. It is a microscope picture.
１０１ 反応室 １０２ 排気孔 １０３ 基板ホルダ １０４ 試料基板 １０５ 板ばね １０６ ヒータ １０７ 原料容器 １０８ 原料 １０９ ガス噴射板 １１０ パイプ １１１ バルブ １１２ ガス噴射孔 １１３ ヒータ １１４ ヒータ １１５ パイプ １１６ Ｏ−リング １１７ 水素マスフローコントローラ １１８ 水蒸気マスフローコントローラ １１９ アセチルアセトン誘導体マスフローコントロー
ラ １２０ バルブ １２１ バルブ １２２ パイプ ２０１ 半導体基板 ２０２ 絶縁膜 ２０３ 密着性向上のための金属 ２０４ 銅 ２０５ 密着性向上のための金属 ２０６ 層間絶縁膜 ２０７ ビアホール ２０８ 銅 ２０９ 金属配線 ２１０ 金属配線 ２１１ 金属配線101 Reaction chamber 102 Exhaust hole 103 Substrate holder 104 Sample substrate 105 Leaf spring 106 Heater 107 Raw material container 108 Raw material 109 Gas injection plate 110 Pipe 111 Valve 112 Gas injection hole 113 Heater 114 Heater 115 Pipe 116 O-ring 117 Hydrogen mass flow controller 118 Water vapor Mass Flow Controller 119 Acetylacetone Derivative Mass Flow Controller 120 Valve 121 Valve 122 Pipe 201 Semiconductor Substrate 202 Insulating Film 203 Metal for Improving Adhesion 204 Copper 205 Metal for Improving Adhesion 206 Interlayer Insulating Film 207 Via Hole 208 Copper 209 Metal Wiring 210 Metal Wiring 211 Metal wiring
フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 21/28 - 21/288 H01L 21/3205 - 21/3213 H01L 21/768 Continuation of the front page (58) Field surveyed (Int. Cl. 7 , DB name) H01L 21/28-21/288 H01L 21/3205-21/3213 H01L 21/768
Claims (2)
の配線形成工程において、第１層金属配線上の層間絶縁
膜にビアホールを開孔して第１層配線の銅を露出した試
料を、水酸基またはケトン基とフッ素化アルキル基を有
する気相の有機物にさらす第１の前処理工程と、水素ガ
スにより露出した銅の自然酸化膜を還元する第２の前処
理工程とを経た後、化学気相成長法による銅の選択成長
を行って前記ビアホールの埋め込みを行うことを特徴と
する半導体装置の製造方法。In a wiring formation step of a semiconductor device using copper as a wiring main material, a sample in which a via hole is opened in an interlayer insulating film on a first metal wiring and copper of the first wiring is exposed is subjected to a hydroxyl group. Alternatively, after passing through a first pretreatment step of exposing to a gaseous organic substance having a ketone group and a fluorinated alkyl group and a second pretreatment step of reducing a native oxide film of copper exposed by hydrogen gas, A method of manufacturing a semiconductor device, comprising burying the via hole by selectively growing copper by a phase growth method.
る気相の有機物としてフッ素を含むアセチルアセトン誘
導体を用いることを特徴とする請求項１に記載の半導体
装置の製造方法。2. The method for manufacturing a semiconductor device according to claim 1, wherein an acetylacetone derivative containing fluorine is used as the vapor-phase organic substance having a hydroxyl group and a fluorinated alkyl group.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP04188136A JP3072807B2 (en) | 1992-07-15 | 1992-07-15 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP04188136A JP3072807B2 (en) | 1992-07-15 | 1992-07-15 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0637038A JPH0637038A (en) | 1994-02-10 |
| JP3072807B2 true JP3072807B2 (en) | 2000-08-07 |
Family
ID=16218374
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP04188136A Expired - Lifetime JP3072807B2 (en) | 1992-07-15 | 1992-07-15 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3072807B2 (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07135188A (en) * | 1993-11-11 | 1995-05-23 | Toshiba Corp | Manufacture of semiconductor device |
| JP3340350B2 (en) * | 1997-04-18 | 2002-11-05 | 富士通株式会社 | Thin film multilayer substrate and electronic device |
| JPH11135506A (en) * | 1997-10-31 | 1999-05-21 | Nec Corp | Manufacture of semiconductor device |
| JP4554011B2 (en) | 1999-08-10 | 2010-09-29 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor integrated circuit device |
| JP2001291720A (en) | 2000-04-05 | 2001-10-19 | Hitachi Ltd | Semiconductor integrated circuit device and its manufacturing method |
| KR100371691B1 (en) * | 2000-08-16 | 2003-02-06 | 정동근 | manufacturing method of low-k plasma polymerized thin films and semiconductor devices using them |
| JP2002110679A (en) | 2000-09-29 | 2002-04-12 | Hitachi Ltd | Method for manufacturing semiconductor integrated circuit device |
| KR100376259B1 (en) * | 2000-12-27 | 2003-03-17 | 주식회사 하이닉스반도체 | Method of forming a copper wiring in a semiconductor device |
| JP2018532271A (en) * | 2015-10-15 | 2018-11-01 | 東京エレクトロン株式会社 | Selective bottom-up metal feature filling for interconnects |
-
1992
- 1992-07-15 JP JP04188136A patent/JP3072807B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0637038A (en) | 1994-02-10 |
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