JP3048236B2 - Electronic components - Google Patents

Electronic components

Info

Publication number
JP3048236B2
JP3048236B2 JP513490A JP513490A JP3048236B2 JP 3048236 B2 JP3048236 B2 JP 3048236B2 JP 513490 A JP513490 A JP 513490A JP 513490 A JP513490 A JP 513490A JP 3048236 B2 JP3048236 B2 JP 3048236B2
Authority
JP
Japan
Prior art keywords
solder
lead
solder barrier
package
lead portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP513490A
Other languages
Japanese (ja)
Other versions
JPH03209753A (en
Inventor
八郎 中逵
啓二 佐伯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP513490A priority Critical patent/JP3048236B2/en
Publication of JPH03209753A publication Critical patent/JPH03209753A/en
Application granted granted Critical
Publication of JP3048236B2 publication Critical patent/JP3048236B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明はラジオ受信機、テレビ受像機、ビデオテープ
レコーダー、通信機器、電子計算機等に使用されるICパ
ッケージその他の電子部品に関するものである。
Description: TECHNICAL FIELD The present invention relates to an IC package and other electronic components used for a radio receiver, a television receiver, a video tape recorder, a communication device, an electronic computer, and the like.

従来の技術 近年、ICパッケージその他の電子部品は、電子機器の
小型軽量化さらに高機能化に伴なって、高密度に実装さ
れる。又、QFP(4方向フラットパッケージIC)で代表
される電子部品のリード端子も多端子で狭ピッチ化され
てくるので、益々これらリード端子の半田付けが難しく
なってきており、半田付け不良の起りにくい信頼性の高
い実装方法が要求されてきた。
2. Description of the Related Art In recent years, IC packages and other electronic components have been mounted at a high density as electronic devices have become smaller, lighter and more sophisticated. In addition, the lead terminals of electronic components typified by QFP (four-way flat package IC) are becoming narrower in pitch with more terminals, so soldering of these lead terminals becomes more and more difficult, and poor soldering occurs. A difficult and highly reliable mounting method has been demanded.

以下、図面に従い一般的なICパッケージの構造および
その実装方法について説明する。
Hereinafter, the structure of a general IC package and its mounting method will be described with reference to the drawings.

第8図はICパッケージ1の構造を示すもので、11はリ
ードフレームで、主にFe-Niアロイで構成されており、
このリードフレーム11は回路基板とICチップを電気的に
接続する役目を果たしている。リードフレーム11とICチ
ップ12間は金やCuを主成分としたワイヤー13で接続され
ている。又、ICチップ12はレジン14により覆われてお
り、ICチップ12の表面やワイヤー13の接続部を保護する
作用を持っている。
FIG. 8 shows the structure of the IC package 1. Reference numeral 11 denotes a lead frame, which is mainly made of an Fe-Ni alloy.
The lead frame 11 serves to electrically connect the circuit board and the IC chip. The lead frame 11 and the IC chip 12 are connected by a wire 13 containing gold or Cu as a main component. Further, the IC chip 12 is covered with a resin 14 and has a function of protecting the surface of the IC chip 12 and the connection portion of the wire 13.

このようなICパッケージは、第7図に示すようにあら
かじめ用意された回路基板15の電極16上に半田17により
電気的に接合され実装される。実装方法の例を示すと、
先ず回路基板15の電極16に合わせてエッチングされたス
テンレス製のスクリーンを用いてクリーム半田17を印刷
する。ここで使用されるステンレススクリーンの厚さは
100μm〜300μm程度であって、印刷するクリーム半田
の厚みにより使い分けられている。ICパッケージ1は自
動装着機により位置決めされ、回路基板上15に塗布した
クリーム半田17上に装着される。この基板はその後リフ
ロー装置により、約250℃まで加熱され、クリーム半田
中の半田が溶融し冷却することによって再度固体化して
電極とICパッケージのリード部が電気的に接合される。
As shown in FIG. 7, such an IC package is mounted on the electrode 16 of the circuit board 15 prepared in advance by being electrically connected with the solder 17. An example of how to implement
First, the cream solder 17 is printed using a stainless steel screen etched according to the electrodes 16 of the circuit board 15. The thickness of the stainless steel screen used here is
The thickness is about 100 μm to 300 μm, and is properly used depending on the thickness of the cream solder to be printed. The IC package 1 is positioned by an automatic mounting machine and mounted on the cream solder 17 applied on the circuit board 15. The substrate is then heated to about 250 ° C. by a reflow device, and the solder in the cream solder is melted and cooled to solidify again, and the electrodes are electrically connected to the leads of the IC package.

発明が解決しようとする課題 しかし上記のような一連の半田付け工程において、最
も起り易い不良は半田ブリッジであって、これは半田の
表面張力により溶融時に近接したリード間が短絡し、そ
のまま冷却固化してしまうものである。その原因として
はクリーム半田の印刷不良、クリーム半田の塗布量が多
い場合ICパッケージの装着ズレ等が挙げられ、特に近年
の高機能のICパッケージにおいては0.5mm以下の狭ピッ
チのリードでとりわけ半田ブリッジの発生率が高く大き
な問題となる場合がある。第7図に示すようにICパッケ
ージ1と電極16が少しづつ離れて行くリード部18の折出
部に半田のたまりが発生するためと考えられる。
However, in the above-described series of soldering processes, the most frequent defect is a solder bridge, which short-circuits between adjacent leads at the time of melting due to the surface tension of the solder, and solidifies by cooling as it is. It will do. Causes include poor cream solder printing and misalignment of the IC package when the amount of applied cream solder is large.Especially in recent high-performance IC packages, leads with a narrow pitch of 0.5 mm or less are used, especially solder bridges. The occurrence rate is high and may cause a serious problem. As shown in FIG. 7, it is considered that the accumulation of solder occurs at the bent portion of the lead portion 18 where the IC package 1 and the electrode 16 gradually separate from each other.

本発明の目的は上記のような問題点を解消し、実装時
に半田のたまりが発生しないリード部を有するICパッケ
ージを提供しようとするものである。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and to provide an IC package having a lead portion that does not generate a pool of solder during mounting.

課題を解決するための手段 本発明は前記目的達成のため、第1発明では、回路基
板の電極上にリード部が電気的接合するように装着され
るICパッケージその他の電子部品であって、狭ピッチで
多数並列したリード部において、その端部から見て上方
に折れ曲がる部分から部品本体側のみに、半田付け不可
能で耐熱性の材料で作られた半田障壁部を設け、前記半
田障壁部を、前記電子部品の同一辺に存在する一端のリ
ード部から他端のリード部までの範囲内のみに連続的に
設けた電子部品とした。
Means for Solving the Problems In order to achieve the above object, according to a first aspect of the present invention, there is provided an IC package or other electronic component which is mounted so that a lead portion is electrically connected to an electrode of a circuit board. In the lead portions arranged in parallel at a large pitch, a solder barrier portion made of a heat-resistant material that cannot be soldered is provided only on the component body side from a portion bent upward when viewed from the end portion, and the solder barrier portion is provided. The electronic component is provided continuously only in the range from the lead portion at one end to the lead portion at the other end existing on the same side of the electronic component.

第2発明では、半田障壁部は、リード部の内面と外面
との少なくとも片方に設けた電子部品とした。
In the second invention, the solder barrier portion is an electronic component provided on at least one of the inner surface and the outer surface of the lead portion.

第3発明では半田障壁部は、部品本体のパッケージ材
質と同等の材質とし、リード部の内面のみに部品本体と
一体に設けた電子部品とした。
In the third invention, the solder barrier portion is made of a material equivalent to the package material of the component body, and is an electronic component provided integrally with the component body only on the inner surface of the lead portion.

作用 本願の第1発明によると、上記した構成により、回路
基板の電極上にリード部が電気的接合するように装着さ
れるチップ装着部品において、溶融した半田が、リード
部のその端部から見て上方に折れ曲がる部分まで、表面
張力によりリードに沿って延びようとするのを、前記リ
ード部の上方に折れ曲がる部分から部品本体側に設けた
半田障壁部が防ぎ、半田のたまりが発生しないようにす
る。しかも、隣接するリード間に連続して存在する半田
障壁部が、狭ピッチで隣合うリード間で溶融半田が短絡
するのを防御する。
According to the first aspect of the present invention, with the above-described configuration, in a chip mounting component mounted so that a lead portion is electrically connected to an electrode of a circuit board, molten solder is viewed from the end of the lead portion. The solder barrier portion provided on the component body side prevents the portion that bends upward from the lead portion from extending along the lead to the portion that bends upward by the surface tension so that the accumulation of solder does not occur. I do. In addition, the solder barrier portion continuously present between the adjacent leads prevents the molten solder from short-circuiting between the adjacent leads at a narrow pitch.

従って、0.5mm以下の狭ピッチのリード部でも半田ブ
リッジの発生率を大幅に低減でき、部品の高密度実装時
の半田付けを可能にする。しかも、この半田障壁部は、
前記リード部の上方に折れ曲がる部分から部品本体側の
みにしか設けていないため、リード部において回路基板
の電極部に接触する部分には半田障壁部は存在しないの
で、リード部と溶融半田とは十分になじみ確実に接合さ
れる。
Therefore, the occurrence rate of solder bridges can be significantly reduced even in a lead portion having a narrow pitch of 0.5 mm or less, and soldering can be performed during high-density mounting of components. Moreover, this solder barrier is
The lead portion is provided only on the component body side from the portion bent above the lead portion.Therefore, there is no solder barrier portion in the lead portion in contact with the electrode portion of the circuit board. It fits and is securely joined.

また、この半田障壁部は、同一辺のリード間のみを連
結する形としているので、半田溶融時に半田障壁部が熱
膨張した時、それに伴うリードの歪を1つの辺のみで吸
収でき、他の辺および部品全体へ影響させずに半田付け
強度を維持することができる。
Further, since the solder barrier portion is formed so as to connect only the leads on the same side, when the solder barrier portion thermally expands during the melting of the solder, the distortion of the lead caused by the thermal expansion can be absorbed by only one side. The soldering strength can be maintained without affecting the sides and the entire part.

更に、半田障壁部を、同一辺に存在する一端のリード
部から他端のリード部までの範囲内のみに連続的に設け
ているため、同一辺において両端にあるリード部から外
側へ半田障壁部がはみでることがない。これにより、部
品を基板上に実装した時の部品本体の角部近傍のスペー
スに余裕ができ、部品を個別に位置補正するためのICマ
ークを部品本体の角部近傍の基板上に設けることがで
き、高密度実装に適したICマークの配置を実現すること
ができる。
Further, since the solder barrier portion is continuously provided only within the range from the lead portion at one end to the lead portion at the other end existing on the same side, the solder barrier portion extends outward from the lead portions at both ends on the same side. It does not stick out. This allows extra space near the corners of the component body when the components are mounted on the board, and provides IC marks on the board near the corners of the component body for individual component position correction. As a result, the arrangement of IC marks suitable for high-density mounting can be realized.

また、本願の第2発明によると、上記した構成によ
り、半田障壁部がリード部の内面と外面の少なくとも片
方に設けられ、第3発明では、半田障壁部がリード部の
内面のみに部品本体と一体として設けられたため、半田
障壁部がリード部の並び方向に熱膨張することによりリ
ード部がリード部の並び方向に歪むのを防ぐことができ
る。また、上記のような、リードの歪を防げる半田障壁
部を部品本体と同時に樹脂形成することができ、製造効
率上大変有利である。
Further, according to the second invention of the present application, with the above configuration, the solder barrier portion is provided on at least one of the inner surface and the outer surface of the lead portion, and in the third invention, the solder barrier portion is provided only on the inner surface of the lead portion and the component main body. Since they are provided integrally, it is possible to prevent the lead portions from being distorted in the direction in which the lead portions are arranged due to the thermal expansion of the solder barrier portion in the direction in which the lead portions are arranged. Further, the solder barrier portion for preventing the distortion of the lead as described above can be formed with resin at the same time as the component body, which is very advantageous in terms of manufacturing efficiency.

実施例 以下、本発明の一実施例であるICパッケージを図面に
基いて説明する。
Hereinafter, an IC package according to an embodiment of the present invention will be described with reference to the drawings.

第1図はICパッケージ本体のリード部間の折曲部に半
田障壁部を設けたもので、1はICパッケージ本体、2は
リード部で、折曲部3を経て回路基板の電極へ端部が電
気的に接続されるようになっている。4は半田障壁部
で、半田不可能で且つ耐熱性のある材料で、前記リード
部間を連結する形で設けられている。
FIG. 1 shows an IC package body in which a solder barrier portion is provided at a bent portion between leads of the IC package body. 1 is an IC package body, 2 is a lead portion, and an end portion is connected to an electrode of a circuit board through a bent portion 3. Are electrically connected. Reference numeral 4 denotes a solder barrier, which is a material that cannot be soldered and has heat resistance, and is provided so as to connect the leads.

また、第2図はICパッケージ本体から折曲部にかけて
半田障壁部5を設けた場合である。いづれの方法におい
ても電子部品の同一辺のリード部2間を連結する形で半
田障壁部4、5を形成している。リード部2の端部で回
路基板6側の電極7との接合部8には半田障壁部を形成
していない。
FIG. 2 shows a case where a solder barrier portion 5 is provided from the IC package body to the bent portion. In either method, the solder barrier portions 4 and 5 are formed so as to connect the lead portions 2 on the same side of the electronic component. No solder barrier is formed at the end 8 of the lead 2 at the junction 8 with the electrode 7 on the circuit board 6 side.

第3図から第5図は半田障壁部を有するICパッケージ
の断面図で、第3図は半田障壁部4をリード部2の内面
に形成したもの、第4図はリード部2の外壁に半田障壁
部9を形成したものである。また、第5図はリード部2
の内面および外面に半田障壁部4、9を設けた複合型で
ある。
3 to 5 are cross-sectional views of an IC package having a solder barrier portion. FIG. 3 shows a solder barrier portion 4 formed on the inner surface of the lead portion 2, and FIG. The barrier portion 9 is formed. FIG. 5 shows the lead 2
Is a composite type in which solder barrier portions 4 and 9 are provided on the inner and outer surfaces.

第6図はICパッケージ本体1の部分と半田障壁部10と
を一体に形成した例である。上記半田障壁部4、5、
9、10はICパッケージ本体1のパッケージ材質と同等の
エポキシ樹脂やテフロン樹脂を用いICパッケージ本体1
の封止成形を行なう行程と同時に行なうことができる。
この場合封止モールド用金型と半田障壁部用金型は兼用
とし、ICパッケージはリード部を所定位置にフォーミン
グし、半田障壁部を同時にフォーミングするようにすれ
ばよい。
FIG. 6 shows an example in which the portion of the IC package body 1 and the solder barrier portion 10 are integrally formed. The solder barrier portions 4, 5,
9 and 10 are IC package bodies 1 using epoxy resin or Teflon resin equivalent to the package material of the IC package body 1.
Can be performed simultaneously with the step of performing sealing molding.
In this case, the mold for the sealing mold and the mold for the solder barrier portion may be shared, and the IC package may form the lead portion at a predetermined position and form the solder barrier portion at the same time.

発明の効果 本発明によると、回路基板の電極上にリード部が電気
的接合するように装着されるチップ装着部品において、
溶融した半田が、リード部のその端部から見て上方に折
れ曲がる部分まで、表面張力によりリードに沿って延び
ようとするのを、前記リード部の上方に折れ曲がる部分
から部品本体側に設けた半田障壁部が防ぎ、半田のたま
りが発生しないようにする。
Effects of the Invention According to the present invention, in a chip mounting component mounted so that a lead portion is electrically connected to an electrode of a circuit board,
The molten solder is intended to extend along the lead by surface tension up to a portion bent upward when viewed from the end of the lead portion. Barriers are prevented to prevent the accumulation of solder.

しかも、隣接するリード間に連続して存在する半田障
壁部が、狭ピッチで隣合うリード間で溶融半田が短絡す
るのを防御する。
In addition, the solder barrier portion continuously present between the adjacent leads prevents the molten solder from short-circuiting between the adjacent leads at a narrow pitch.

従って、0.5mm以下の狭ピッチのリード部でも半田ブ
リッジの発生率を大幅に低減でき、部品の高密度実装時
の半田付けを可能にする。しかも、この半田障壁部は、
前記リード部の上方に折れ曲がる部分から部品本体側の
みにしか設けていないため、リード部において回路基板
の電極部に接触する部分には半田障壁部は存在しないの
で、リード部と溶融半田とは十分になじみ確実に接合さ
れる。
Therefore, the occurrence rate of solder bridges can be significantly reduced even in a lead portion having a narrow pitch of 0.5 mm or less, and soldering can be performed during high-density mounting of components. Moreover, this solder barrier is
The lead portion is provided only on the component body side from the portion bent above the lead portion.Therefore, there is no solder barrier portion in the lead portion in contact with the electrode portion of the circuit board. It fits and is securely joined.

また、この半田障壁部は、同一辺のリード間のみを連
結する形としているので、半田溶融時に半田障壁部が熱
膨張した時、それに伴うリードの歪を1つの辺のみで吸
収でき、他の辺および部品全体へ影響させずに半田付け
強度を維持することができる。
Further, since the solder barrier portion is formed so as to connect only the leads on the same side, when the solder barrier portion thermally expands during the melting of the solder, the distortion of the lead caused by the thermal expansion can be absorbed by only one side. The soldering strength can be maintained without affecting the sides and the entire part.

更に、半田障壁部を、同一辺に存在する一端のリード
部から他端のリード部までの範囲内のみに連続的に設け
ているため、同一辺において両端にあるリード部から外
側へ半田障壁部がはみでることがない。これにより、部
品を基板上に実装した時の部品本体の角部近傍のスペー
スに余裕ができ、部品を個別に位置補正するためのICマ
ークを部品本体の角部近傍の基板上に設けることがで
き、高密度実装に適したICマークの配置を実現すること
ができる。
Further, since the solder barrier portion is continuously provided only within the range from the lead portion at one end to the lead portion at the other end existing on the same side, the solder barrier portion extends outward from the lead portions at both ends on the same side. It does not stick out. This allows extra space near the corners of the component body when the components are mounted on the board, and provides IC marks on the board near the corners of the component body for individual component position correction. As a result, the arrangement of IC marks suitable for high-density mounting can be realized.

また、半田障壁部がリード部の内面と外面との少なく
とも片方に設けられ、また、半田障壁部がリード部の内
面のみに部品本体と一体として設けられたため、半田障
壁部がリード部の並び方向に熱膨張することによりリー
ド部がリード部の並び方向に歪むのを防ぐことができ
る。また、上記のような、リードの歪を防げる半田障壁
部を部品本体と同時に樹脂形成することができ、製造効
率上大変有利である。
In addition, since the solder barrier portion is provided on at least one of the inner surface and the outer surface of the lead portion, and the solder barrier portion is provided only on the inner surface of the lead portion integrally with the component body, the solder barrier portion is arranged in the direction in which the lead portions are arranged. The lead portion can be prevented from being distorted in the direction in which the lead portions are arranged due to thermal expansion. Further, the solder barrier portion for preventing the distortion of the lead as described above can be formed with resin at the same time as the component body, which is very advantageous in terms of manufacturing efficiency.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の一実施例を示すICパッケージの斜視
図、第2図は同他実施例を示す斜視図、第3図は第1図
のICパッケージの要部断面図、第4図、第5図、第6図
はそれぞれ他実施例を示す要部断面図、第7図はICパッ
ケージの実装状態を示す要部断面図、第8図はICパッケ
ージの構成を示す一部切欠き斜視図である。 2……リード部、3……折曲部 4、5、9、10……半田障壁部
FIG. 1 is a perspective view of an IC package showing one embodiment of the present invention, FIG. 2 is a perspective view showing another embodiment of the present invention, FIG. 3 is a sectional view of an essential part of the IC package of FIG. 5 and 6 are cross-sectional views of main parts showing another embodiment, respectively, FIG. 7 is a cross-sectional view of main parts showing a mounted state of an IC package, and FIG. It is a perspective view. 2 ... lead part, 3 ... bend part 4, 5, 9, 10 ... solder barrier part

フロントページの続き (56)参考文献 特開 昭62−118555(JP,A) 特開 平1−19756(JP,A) 特開 平2−205063(JP,A) 特開 平3−53555(JP,A) 特開 昭63−136550(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 23/50 Continuation of the front page (56) References JP-A-62-118555 (JP, A) JP-A-1-19756 (JP, A) JP-A-2-205063 (JP, A) JP-A-3-53555 (JP, A) , A) JP-A-63-136550 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 23/50

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】回路基板の電極上にリード部が電気的接合
するように装着されるICパッケージその他の電子部品で
あって、狭ピッチで多数並列したリード部において、そ
の端部から見て上方に折れ曲がる部分から部品本体側の
みに、半田付け不可能で耐熱性の材料で作られた半田障
壁部を設け、前記半田障壁部を、前記電子部品の同一辺
に存在する一端のリード部から他端のリード部までの範
囲内のみに連続的に設けたことを特徴とする電子部品。
An IC package or other electronic component mounted on an electrode of a circuit board such that a lead portion is electrically connected to the electrode. A solder barrier portion made of a non-soldering and heat-resistant material is provided only on the component body side from the bent portion, and the solder barrier portion is separated from the lead portion at one end existing on the same side of the electronic component by another. An electronic component, wherein the electronic component is continuously provided only within a range up to an end lead portion.
【請求項2】半田障壁部は、リード部の内面と外面との
少なくとも片方に設けた特許請求の範囲第1項記載の電
子部品。
2. The electronic component according to claim 1, wherein the solder barrier portion is provided on at least one of an inner surface and an outer surface of the lead portion.
【請求項3】半田障壁部は、部品本体のパッケージ材質
と同等の材質とし、リード部の内面のみに部品本体と一
体に設けた特許請求の範囲第1項記載の電子部品。
3. The electronic component according to claim 1, wherein the solder barrier portion is made of a material equivalent to the package material of the component body, and is provided integrally with the component body only on the inner surface of the lead portion.
JP513490A 1990-01-11 1990-01-11 Electronic components Expired - Fee Related JP3048236B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP513490A JP3048236B2 (en) 1990-01-11 1990-01-11 Electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP513490A JP3048236B2 (en) 1990-01-11 1990-01-11 Electronic components

Publications (2)

Publication Number Publication Date
JPH03209753A JPH03209753A (en) 1991-09-12
JP3048236B2 true JP3048236B2 (en) 2000-06-05

Family

ID=11602841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP513490A Expired - Fee Related JP3048236B2 (en) 1990-01-11 1990-01-11 Electronic components

Country Status (1)

Country Link
JP (1) JP3048236B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5367124A (en) * 1993-06-28 1994-11-22 International Business Machines Corporation Compliant lead for surface mounting a chip package to a substrate
JP5237028B2 (en) * 2008-09-25 2013-07-17 光洋電子工業株式会社 Busbar joining structure and joining method

Also Published As

Publication number Publication date
JPH03209753A (en) 1991-09-12

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