JP3022049B2 - Mounting method of light emitting diode of chip component type - Google Patents
Mounting method of light emitting diode of chip component typeInfo
- Publication number
- JP3022049B2 JP3022049B2 JP11277493A JP11277493A JP3022049B2 JP 3022049 B2 JP3022049 B2 JP 3022049B2 JP 11277493 A JP11277493 A JP 11277493A JP 11277493 A JP11277493 A JP 11277493A JP 3022049 B2 JP3022049 B2 JP 3022049B2
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- emitting diode
- chip
- component type
- coating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、配線基板の表面にボン
ディングワイヤを介さずに極めて小型かつ薄型のチップ
部品型の発光ダイオードを実装できる実装方法に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting method capable of mounting an extremely small and thin chip component type light emitting diode on the surface of a wiring board without using a bonding wire.
【０００２】[0002]
【従来の技術】発光ダイオードは、表示パネルや液晶表
示装置のバックライト、携帯機器のインジケータ、照光
スイッチおよびＯＡ機器の光源等として用いられ、従
来、例えば図６に示すようなものが知られている。この
発光ダイオードは、隙間をあけて対向する１対のリード
端子の一方２６の先端に、発光ダイオード２１の下面の
電極２２を導電性ペースト２４で接着し、上面の電極２
３をボンディングワイヤとしての金線２５で他方のリー
ド端子２７の先端に接続するとともに、これと同じもの
を図６(Ａ)に示すように長手方向に並べて、これらを透
明の樹脂２８内にモールドしたものである。この例で
は、図中左側のリード端子２７が陰極,右側のリード端
子２６が陽極であり、製品の長さＬ,幅Ｗ,高さＨは、夫
々Ｌ＝2.9mm，Ｗ＝1.5mm，Ｈ＝1.1mmであり、発光ダイ
オード間の距離は、0.8mmである。そして、モールドで
作られた発光ダイオードは、図示しない配線基板上の配
線パターンに各リード端子２６,２７を載せ、両者をは
んだ付けして実装される。2. Description of the Related Art Light emitting diodes are used as backlights of display panels and liquid crystal display devices, indicators of portable equipment, illumination switches, light sources of OA equipment, and the like. I have. In this light emitting diode, the electrode 22 on the lower surface of the light emitting diode 21 is adhered to the tip of one end 26 of a pair of lead terminals facing each other with a gap with a conductive paste 24, and the electrode 2 on the upper surface is formed.
3 is connected to the tip of the other lead terminal 27 by a gold wire 25 as a bonding wire, and the same is arranged in the longitudinal direction as shown in FIG. It was done. In this example, the left lead terminal 27 is a cathode and the right lead terminal 26 is an anode. The length L, width W, and height H of the product are L = 2.9 mm, W = 1.5 mm, and H, respectively. = 1.1 mm, and the distance between the light emitting diodes is 0.8 mm. Then, the light emitting diode made by molding is mounted by mounting each lead terminal 26, 27 on a wiring pattern on a wiring board (not shown) and soldering them.
【０００３】[0003]
【発明が解決しようとする課題】ところが、上記従来の
発光ダイオードは、上方に凸をなすリード端子の一方２
６の先端に発光ダイオードチップ２１の下面電極２２を
接着し、上面電極２３を金線２５でリード端子の他方２
７にボンディングし、金線２５等を外力から保護すべく
樹脂２８内にモールドするものである為、チップ自体の
高さは、0.2〜0.3mmであるにすぎないのに、製品全体の
高さが、上述の如く1.1mmと３倍程度にもなり、配線基
板上にかなりのスペースを必要とする。また、構成部材
が多い為、材料費や加工費が嵩み、製品のコストアップ
を招くという問題がある。However, the above-mentioned conventional light emitting diode has one of two lead terminals projecting upward.
6, the lower electrode 22 of the light emitting diode chip 21 is adhered to the tip of the light emitting diode chip 21.
7 and molded in the resin 28 to protect the gold wire 25 and the like from external force, the height of the chip itself is only 0.2 to 0.3 mm, but the height of the entire product However, as described above, it is about three times as large as 1.1 mm, and a considerable space is required on the wiring board. Further, since there are many constituent members, there is a problem that the material cost and the processing cost are increased and the cost of the product is increased.
【０００４】そこで、本発明の目的は、発光ダイオード
チップ自体の構造を工夫することによって、極めて小型
かつ薄型のチップ部品型の発光ダイオードを、配線基板
の表面にボンディングワイヤを介さず,かつろう材を供
給することなく実装でき、コストダウンが図れるチップ
部品型の発光ダイオードの実装方法を提供することにあ
る。Accordingly, an object of the present invention is to improve the structure of the light emitting diode chip itself so that an extremely small and thin chip component type light emitting diode can be formed on the surface of the wiring board without using a bonding wire and with a brazing material. It is an object of the present invention to provide a mounting method of a chip component type light emitting diode which can be mounted without supplying the light emitting device and can reduce the cost.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するた
め、請求項１の発明は、配線基板の表面にチップ部品型
の発光ダイオードを実装する実装方法において、ＰＮ接
合面と平行をなしてチップの端面に設けられた正,負の
電極部の表面にろう材のコーティング層を有するチップ
部品型の発光ダイオードを、上記チップ端面のろう材コ
ーティング層が上記配線基板の配線パターンに載るよう
に配置し、加熱により上記ろう材コーティング層を溶融
して、溶融したろう材のみで上記チップ端面の電極部と
上記基板の配線パターンとを電気的に接続することを特
徴とする。According to a first aspect of the present invention, there is provided a mounting method of mounting a chip component type light emitting diode on a surface of a wiring board. A chip component type light emitting diode having a brazing material coating layer on the surfaces of the positive and negative electrodes provided on the end surfaces of the chip is arranged such that the brazing material coating layer on the chip end surface is placed on the wiring pattern of the wiring board. Then, the brazing material coating layer is melted by heating, and the electrode portion on the end face of the chip and the wiring pattern of the substrate are electrically connected only by the melted brazing material.
【０００６】また、請求項２の発明は、上記チップ端面
の正,負の電極部が、ＰＮ接合面と平行をなして互いに
対向するチップの両端面に設けられたことを特徴とす
る。According to a second aspect of the present invention, the positive and negative electrode portions on the end face of the chip are provided on both end faces of the chip in parallel with the PN junction surface and facing each other.
【０００７】[0007]
【作用】請求項１に記載の発光ダイオードの実装方法で
は、発光ダイオードのチップの端面の正,負の電極部
を、配線基板の配線パターンに載せ、両電極部の表面の
ろう材コーティング層を加熱により溶融して、溶融した
ろう材のみで上記電極部と配線パターンを電気的に接続
する。従って、発光ダイオードの寸法が、略チップ自体
の寸法まで小型化,薄型化できるとともに、ろう材を別
途供給する必要がないから、接続作業を容易,迅速,高精
度に行なうことができる。In the light emitting diode mounting method according to the first aspect, the positive and negative electrode portions on the end face of the chip of the light emitting diode are placed on the wiring pattern of the wiring board, and the brazing material coating layer on the surface of both electrode portions is formed. The electrode portion and the wiring pattern are electrically connected only by the molten brazing material, which is melted by heating. Therefore, the size of the light emitting diode can be reduced to a size substantially equal to that of the chip itself, and the thickness can be reduced. In addition, since it is not necessary to separately supply a brazing material, the connection operation can be performed easily, quickly, and with high accuracy.
【０００８】請求項２に記載の発光ダイオードの実装方
法では、正,負の電極部がチップの対向する両端面に設
けられているので、溶融したコーティング層であるろう
材によって、発光ダイオードが両端で配線基板の配線パ
ターンに接続されるから、配線基板への発光ダイオード
の固定を確実かつ強固に行なうことができる。In the method for mounting a light emitting diode according to the present invention, since the positive and negative electrode portions are provided on both end surfaces of the chip facing each other, the light emitting diode is mounted on both ends by a brazing material which is a molten coating layer. Thus, the light emitting diode can be securely and firmly fixed to the wiring board.
【０００９】[0009]
【実施例】以下、本発明を図示の実施例により詳細に説
明する。図１(Ａ)は、本発明の請求項２に記載のチップ
部品型発光ダイオードの実装方法の一例を示す斜視図で
ある。この発光ダイオードは、互いに接合されるＰ型層
１およびＮ型層２と、このＰ型,Ｎ型層１,２の端面にＰ
Ｎ接合面と平行に互いに対向して設けられたＰ型,Ｎ型
の電極部３,４と、この電極部３,４の表面に設けられた
ろう材としてのはんだのコーティング層５,６と、この
コーティング層５,６以外の４つの側面の表面に設けら
れた絶縁材料としての絶縁樹脂のコーティング層７(図
２(Ｃ),(Ｄ)参照)からなり、直方体状のチップを呈す
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments. FIG. 1A is a perspective view showing an example of a method for mounting a chip component type light emitting diode according to claim 2 of the present invention. This light emitting diode has a P-type layer 1 and an N-type layer 2 joined to each other, and a P-type layer and an N-type layer
P-type and N-type electrode portions 3 and 4 provided in parallel with the N junction surface and opposed to each other, and solder coating layers 5 and 6 as brazing materials provided on the surfaces of the electrode portions 3 and 4; It consists of a coating layer 7 (see FIGS. 2C and 2D) of an insulating resin as an insulating material provided on the surface of the four side surfaces other than the coating layers 5 and 6, and has a rectangular parallelepiped shape.
【００１０】上記構成の発光ダイオードは、配線基板上
に次のようにして実装される。即ち、図１(Ａ)に示すよ
うに、発光ダイオードのチップを横向きにして、両端の
はんだコーティングされた電極部３,４を、配線基板８
上の一方,他方の配線パターン９a,９bに垂直に載せ、絶
縁樹脂コーティングされた底部中央を接着剤１０で配線
基板８に仮止めする。次いで、この配線基板８を、はん
だの融点以上に加熱されたリフロー炉に入れると、図１
(Ｂ)に示すように、両端の電極部３,４のはんだ５,６が
溶融して両電極部３,４と配線パターン９a,９bとのはん
だ付けが夫々行なわれる。上記発光ダイオードは、図６
で述べた従来例のような配線基板から突出するリード端
子２６,２７,ボンディングワイヤ２５,モールド樹脂２
８がないので、その寸法を略素子チップ自体の寸法まで
減じて小型化,薄型化が図れるとともに、ボンディング
ワイヤが外力や熱応力で断線することもないうえ、実装
時にチップに加わる外力が、側面の絶縁樹脂のコーティ
ング層７で緩和されるので、実装された発光ダイオード
の信頼性が向上する。さらに、配線パターンへの接続作
業が容易,迅速,高精度に行なえるとともに、クリームは
んだのスクリーン印刷等によってはんだを供給する必要
がなく、部品点数の減少による材料費,加工費の低減と
相俟って、実装作業のコストダウンを図ることができ
る。The light emitting diode having the above structure is mounted on a wiring board as follows. That is, as shown in FIG. 1A, the light emitting diode chip is turned sideways, and the solder coated electrode portions 3 and 4 at both ends are connected to the wiring board 8.
It is placed vertically on the upper and lower wiring patterns 9a and 9b, and the center of the bottom coated with the insulating resin is temporarily fixed to the wiring substrate 8 with an adhesive 10. Next, when the wiring board 8 is put into a reflow furnace heated to a temperature equal to or higher than the melting point of the solder, FIG.
As shown in (B), the solders 5, 6 of the electrode portions 3, 4 at both ends are melted, and the soldering of the electrode portions 3, 4 and the wiring patterns 9a, 9b is performed respectively. The light emitting diode is shown in FIG.
Lead terminals 26, 27, bonding wires 25, molding resin 2 protruding from the wiring board as in the conventional example described in
8, the dimensions are reduced to substantially the dimensions of the element chip itself, so that the device can be reduced in size and thickness. In addition, the bonding wire does not break due to external force or thermal stress. This is alleviated by the insulating resin coating layer 7, so that the reliability of the mounted light emitting diode is improved. In addition, the connection work to the wiring pattern can be performed easily, quickly and with high precision, and there is no need to supply solder by screen printing of cream solder, etc., which reduces material and processing costs due to a reduction in the number of parts. Thus, the cost of the mounting operation can be reduced.
【００１１】図２は、上記発光ダイオードの製造方法の
一例を示している。上記発光ダイオードは、ウエハ１１
状態の発光ダイオードの表,裏面に形成されたＰ型,Ｎ型
の電極部３,４を、はんだで被覆してはんだコーティン
グ層５,６を設けた後、図２(Ａ)に示すように、Ｎ側の
はんだコーティング層６をシート１２上に載せて貼り付
ける。次に、図２(Ｂ)の如く、ウエハ１１を縦横にダイ
シングして各チップに分離し、さらに、図２(Ｃ)の如
く、各チップの上面をシート１３でマスキングし、各チ
ップの側面方向から保護用の絶縁樹脂を注入して硬化さ
せ、側面のコーティング層７を形成する。最後に、図２
(Ｄ)に示すように、上面のシートを除去すれば、各チッ
プが完成する。FIG. 2 shows an example of a method for manufacturing the light emitting diode. The light emitting diode is mounted on the wafer 11
After the P-type and N-type electrode portions 3 and 4 formed on the front and back surfaces of the light emitting diode in the state are covered with solder to provide solder coating layers 5 and 6, as shown in FIG. , N-side solder coating layer 6 is placed on sheet 12 and attached. Next, as shown in FIG. 2 (B), the wafer 11 is diced vertically and horizontally to separate each chip, and as shown in FIG. 2 (C), the upper surface of each chip is masked with a sheet 13 and the side of each chip is cut. An insulating resin for protection is injected from the direction and cured to form the coating layer 7 on the side surface. Finally, FIG.
As shown in (D), when the sheet on the upper surface is removed, each chip is completed.
【００１２】上述の製造方法では、Ｐ型,Ｎ型の電極部
３,４のはんだによるコーティングと、絶縁樹脂による
側面のコーティングとをウエハ１１の状態で一括して行
なえ、しかも、従来のワイヤボンディングや樹脂モール
ドが不要になるので、極めて小型かつ薄型のチップ部品
型の発光ダイオードを安価に製造することができる。な
お、上記実施例では、電極部３,４をコーティングする
ろう材を、はんだとしたが、これを比較的低融点の他の
ろう材にすることもできる。また、チップ側面のコーテ
ィング層７は、実施例の絶縁樹脂に限らず、絶縁材料で
あればセラミック,ガラス等でもよく、また、実施例の
ように４つの側面の総てでなく、配線基板８に対向する
１つの側面のみに設けてもよい。さらに、図２(Ｃ)の上
面のマスキングシート１３は、コーティング層７の絶縁
材料と反応しないレジスト膜であってもよく、また、マ
スキングシート１３を省略して、ダイシングでできた溝
に絶縁樹脂を滴下してチップ側面のコーティング層７を
形成することもできる。なお、上記実施例では、正,負
の電極部３,４が発光ダイオードのチップの両端にある
場合を述べたが、正,負の電極部は、これに限らず、請
求項１に記載のように例えばいずれか一方がチップの中
間段部の端面に設けられていてもよい。According to the above-described manufacturing method, the coating of the P-type and N-type electrode portions 3 and 4 with the solder and the coating of the side surfaces with the insulating resin can be performed collectively in the state of the wafer 11, and the conventional wire bonding is performed. Since no resin mold is required, an extremely small and thin light emitting diode of a chip component type can be manufactured at low cost. In the above-mentioned embodiment, the brazing material for coating the electrode portions 3 and 4 is solder, but it can be another brazing material having a relatively low melting point. The coating layer 7 on the side surface of the chip is not limited to the insulating resin of the embodiment, but may be ceramic, glass or the like as long as it is an insulating material. May be provided only on one side face facing the. Further, the masking sheet 13 on the upper surface of FIG. 2C may be a resist film that does not react with the insulating material of the coating layer 7. Alternatively, the masking sheet 13 may be omitted, and the insulating resin may be formed in the groove formed by dicing. To form the coating layer 7 on the side surface of the chip. In the above-described embodiment, the case where the positive and negative electrode portions 3 and 4 are provided at both ends of the chip of the light emitting diode has been described. However, the positive and negative electrode portions are not limited to this, and are described in claim 1. Thus, for example, either one may be provided on the end face of the intermediate step portion of the chip.
【００１３】図３(Ａ)は、チップ部品型の発光ダイオー
ドの他の例を示す斜視図である。この発光ダイオード
は、図１(Ａ)で述べたと同じチップ２つを、Ｎ型の電極
部４の表面に設けたはんだのコーティング層６同士で接
合して、ＰＮ接合面と直交する方向に伸びる長いチップ
としたものである。従って、図１(Ａ)で述べたと同じ部
材には、同一番号を付して説明を省略する。FIG. 3A is a perspective view showing another example of a chip component type light emitting diode. In this light emitting diode, the same two chips as described with reference to FIG. 1A are joined together by a solder coating layer 6 provided on the surface of the N-type electrode portion 4, and extend in a direction orthogonal to the PN junction surface. It is a long chip. Therefore, the same members as those described with reference to FIG.
【００１４】上記発光ダイオードは、図３(Ｂ)に示すよ
うに、チップを横向きにして、両端のはんだコーティン
グされた電極部３,３を、配線基板８上の一方,他方の配
線パターン９a,９bに、中央のはんだコーティングされ
た電極部４,４を、中間の配線パターン９cに夫々垂直に
載せられ、絶縁樹脂コーティングされた底部両側を接着
剤１０,１０で配線基板８に仮止めされる。次いで、こ
の配線基板８が、はんだの融点以上に加熱されたリフロ
ー炉に入れられると、図３(Ｂ)に示すように、両端の電
極部３,３のはんだ５,５および中央の電極部４,４間の
はんだ６が溶融して、これらの電極部と配線パターン９
a,９b,９cとがはんだ付けされる。上記発光ダイオード
も、図１で述べた実施例と同様、従来例の如きボンディ
ングワイヤ２５(図６参照)やモールド樹脂２８等がない
ので、その寸法を略素子チップ自体の寸法にまで減じて
小型化,薄型化が図れ、配線パターンへの接続作業が容
易,迅速,高精度にでき、部品点数の減少による材料費,
加工費の低減と相俟って、実装作業のコストダウンを図
ることができる。In the light emitting diode, as shown in FIG. 3B, the chip is turned sideways, and the solder-coated electrode portions 3, 3 at both ends are connected to one and the other wiring pattern 9a, 9b, the central solder-coated electrode portions 4, 4 are placed vertically on the intermediate wiring pattern 9c, respectively, and both sides of the bottom portion coated with insulating resin are temporarily fixed to the wiring substrate 8 with adhesives 10, 10. . Next, when the wiring board 8 is put into a reflow furnace heated to a temperature not lower than the melting point of the solder, as shown in FIG. The solder 6 between the electrodes 4 and 4 is melted and these electrode portions and the wiring pattern 9 are melted.
a, 9b, 9c are soldered. As in the embodiment described with reference to FIG. 1, the light emitting diode does not have the bonding wire 25 (see FIG. 6) and the molding resin 28 as in the conventional example, so that its size is reduced to substantially the size of the element chip itself, and the size is reduced. Thinner and thinner, the connection to the wiring pattern can be done easily, quickly, with high accuracy, and the material cost due to the reduced number of parts,
The cost of the mounting operation can be reduced together with the reduction of the processing cost.
【００１５】図４は、図３で述べた発光ダイオードの製
造方法を一例として示している。上記発光ダイオード
は、まず、ウエハの表,裏面にあたるＰ,Ｎ型の電極部
３,４を、夫々はんだで被覆してはんだコーティング層
５,６設けて２枚のウエハ１１,１１を製作した後、両ウ
エハをはんだコーティング層６,６で互いに重ね合わ
せ、リフロー炉内などで接合して一体のウエハ１４と
し、図４(Ａ)に示すように、Ｐ側のはんだコーティング
層５をシート１２上に載せて貼り付ける。次に、図３
(Ｂ)の如く、ウエハ１４を縦横にダイシングして各チッ
プに分離し、更に、図３(Ｃ)の如く、各チップの上面に
塗布によってレジスト層１５を形成し、各チップの側面
方向から保護用の絶縁樹脂を注入して硬化させ、側面の
コーティング層７を形成する。最後に、図３(Ｄ)に示す
ように、上面のレジスト層１５を除去すれば、各チップ
が完成する。なお、この発光ダイオードの回路図は、図
５(Ａ)に示すとおりであり、例えば一方を赤色,他方を
緑色のものとすれば、２色表示の発光ダイオードを構成
できる。FIG. 4 shows an example of a method for manufacturing the light emitting diode described with reference to FIG. In the light emitting diode, first, P and N type electrode portions 3 and 4 corresponding to the front and back surfaces of the wafer are respectively coated with solder to provide solder coating layers 5 and 6, and then two wafers 11 and 11 are manufactured. Then, the two wafers are superimposed on each other with solder coating layers 6 and 6 and joined together in a reflow furnace or the like to form an integrated wafer 14, and as shown in FIG. Put on and paste. Next, FIG.
As shown in FIG. 3B, the wafer 14 is diced vertically and horizontally to separate each chip. Further, as shown in FIG. 3C, a resist layer 15 is formed on the upper surface of each chip by coating, and from the side direction of each chip. An insulating resin for protection is injected and cured to form a coating layer 7 on the side surface. Finally, as shown in FIG. 3D, each chip is completed by removing the resist layer 15 on the upper surface. The circuit diagram of this light-emitting diode is as shown in FIG. 5A. For example, if one is red and the other is green, a two-color display light-emitting diode can be formed.
【００１６】上記製造方法では、２枚の発光ダイオード
ウエハの表,裏面の電極部のはんだによるコーティング
と、両ウエハの重ね接合と、ダイシングで分離された各
チップの側面の絶縁樹脂によるコーティングとを、ウエ
ハの状態で一括して行なえ、しかも、従来のワイヤボン
ディングや樹脂モールドが不要になり、中央の電極部
４,４を含む電極部の接合にはんだの供給がいらず、極
めて小型かつ薄型のチップ部品型の直列接続の発光ダイ
オードを安価に製造することができる。なお、上記２色
表示の発光ダイオードを例にとれば、その長さＬ,幅Ｗ,
高さＨは、Ｌ＝0.5mm,Ｗ＝0.3mm,Ｈ＝0.3mmとなって、
図６の従来例のもののＬ,Ｗ,Ｈと比して、いずれも略１
／３に短縮している。上記実施例では、中間の電極部
４,４間をろう材としてのはんだで接合したが、この電
極部４,４を配線パターン９cに接続する必要がない場合
は、上記電極部間を導電材料で接合してもよい。また、
図２の実施例で述べたと同様、両端の電極部をコーティ
ングするろう材を、はんだ以外の低融点ろう材とし、チ
ップ側面のコーティング層を、セラミック,ガラス等の
絶縁材料とし、１つの側面のみにコーティングするよう
にしてもよい。また、上面のレジスト層１５を、マスキ
ングシートに代えてもよく、これらを省略して、ダイシ
ング溝に絶縁材料を滴下してチップ側面をコーティング
することもできる。In the above manufacturing method, the coating of the electrodes on the front and back surfaces of the two light emitting diode wafers with solder, the superposition of the two wafers, and the coating of the side surfaces of the chips separated by dicing with the insulating resin are performed. It can be performed in a batch in the state of a wafer, and furthermore, the conventional wire bonding and resin molding become unnecessary, and no solder is supplied to the joining of the electrode parts including the central electrode parts 4 and 4, so that it is extremely small and thin. Chip-part series-connected light-emitting diodes can be manufactured at low cost. If the above-described two-color display light-emitting diode is taken as an example, its length L, width W,
The height H is L = 0.5mm, W = 0.3mm, H = 0.3mm,
In comparison with the L, W, and H of the conventional example shown in FIG.
/ 3. In the above embodiment, the intermediate electrode portions 4 and 4 were joined by solder as a brazing material. However, when it is not necessary to connect the electrode portions 4 and 4 to the wiring pattern 9c, a conductive material is used between the electrode portions. May be joined. Also,
As described in the embodiment of FIG. 2, the brazing material for coating the electrode portions at both ends is a low melting point brazing material other than solder, and the coating layer on the side surface of the chip is an insulating material such as ceramic or glass, and only one side surface is used. May be coated. Further, the resist layer 15 on the upper surface may be replaced with a masking sheet. These may be omitted, and an insulating material may be dropped on the dicing groove to coat the side surface of the chip.
【００１７】図５(Ｂ)〜(Ｅ)は、上述の製造方法で作ら
れる直列接続の発光ダイオードの種々の変形例を、回路
図で示している。これらの図で、各発光ダイオード素子
の接続点のうち、端子の表示があるものは、はんだなど
のろう材で接合されるが、それ以外のものは、導電材料
で接合すれば足りる。FIGS. 5B to 5E are circuit diagrams showing various modifications of the series-connected light emitting diodes produced by the above-described manufacturing method. In these figures, of the connection points of the respective light emitting diode elements, those with the terminal indication are joined by a brazing material such as solder, but the other points need only be joined by a conductive material.
【００１８】[0018]
【発明の効果】以上の説明で明らかなように、請求項１
のチップ部品型の発光ダイオードの実装方法は、ＰＮ接
合面と平行をなしてチップの端面に設けられた正,負の
電極部の表面にろう材のコーティング層を有するチップ
部品型の発光ダイオードを、上記チップ端面のろう材コ
ーティング層が上記配線基板の配線パターンに載るよう
に配置し、加熱により上記ろう材コーティング層を溶融
して、溶融したろう材のみで上記チップ端面の電極部と
上記基板の配線パターンとを電気的に接続するので、従
来のボンディングワイヤやモールド樹脂を用いないか
ら、寸法を素子チップ自体の寸法まで略減少して小型
化,薄型化が図れ、ボンディングワイヤの断線の虞もな
くて信頼性が向上し、配線基板のパターンへの接続作業
がはんだ等の供給なしで容易,迅速,高精度に行なえ、部
品点数の減少による材料費,加工費の低減と相俟って、
実装作業のコストダウンを図ることができる。As is apparent from the above description, claim 1
The mounting method of the chip component type light emitting diode is a chip component type light emitting diode having a brazing material coating layer on the surfaces of the positive and negative electrodes provided on the end surface of the chip in parallel with the PN junction surface. Disposing the brazing material coating layer on the chip end face on the wiring pattern of the wiring board, melting the brazing material coating layer by heating, and using only the melted brazing material, the electrode portion on the chip end face and the substrate Since it is electrically connected to the wiring pattern of the present invention, conventional bonding wires and molding resin are not used, so that the dimensions can be substantially reduced to the dimensions of the element chip itself, so that the size and thickness can be reduced. Reliability is improved, and the connection work to the wiring board pattern can be done easily, quickly and accurately without the supply of solder etc. , Coupled with the reduction of processing costs,
The cost of the mounting operation can be reduced.
【００１９】また、請求項２の発光ダイオードの実装方
法は、正,負の電極部がチップの対向する両端面に設け
られているので、溶融したコーティング層であるろう材
によって、発光ダイオードが両端で配線基板の配線パタ
ーンに接続されるから、配線基板への発光ダイオードの
固定を確実かつ強固に行なうことができる。In the method of mounting a light emitting diode according to the second aspect of the present invention, since the positive and negative electrode portions are provided on the opposite end surfaces of the chip, the light emitting diode is mounted on both ends by a brazing material which is a molten coating layer. Thus, the light emitting diode can be securely and firmly fixed to the wiring board.
【図１】 本発明の請求項２に記載の発光ダイオードの
実装方法の一例を示す斜視図である。FIG. 1 is a perspective view showing an example of a method for mounting a light emitting diode according to claim 2 of the present invention.
【図２】 図１の発光ダイオードの製造方法を示す図で
ある。FIG. 2 is a view illustrating a method of manufacturing the light emitting diode of FIG. 1;
【図３】 チップ部品型の発光ダイオードの他の例を示
す斜視図である。FIG. 3 is a perspective view showing another example of a chip component type light emitting diode.
【図４】 図３の発光ダイオードの製造方法を示す図で
ある。FIG. 4 is a view illustrating a method of manufacturing the light emitting diode of FIG. 3;
【図５】 図３の発光ダイオードの種々の変形例を示す
回路図である。FIG. 5 is a circuit diagram showing various modifications of the light emitting diode of FIG. 3;
【図６】 従来の発光ダイオードを示す平面図および正
面図である。FIG. 6 is a plan view and a front view showing a conventional light emitting diode.
１…Ｐ型層、２…Ｎ型層、３…Ｐ型電極部、４…Ｎ型電
極部、５,６…はんだのコーティング層、７…絶縁樹脂
のコーティング層、８…配線基板、９a,９b,９c…配線
パターン、１０…接着剤、１１,１４…ウエハ、１２,１
３…シート、１５…レジスト層。DESCRIPTION OF SYMBOLS 1 ... P type layer, 2 ... N type layer, 3 ... P type electrode part, 4 ... N type electrode part, 5,6 ... Coating layer of solder, 7 ... Coating layer of insulating resin, 8 ... Wiring board, 9a, 9b, 9c: wiring pattern, 10: adhesive, 11, 14: wafer, 12, 1
3 ... sheet, 15 ... resist layer.
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭57−49284（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 33/00 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-57-49284 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 33/00
Claims (2)
イオードを実装する実装方法において、 ＰＮ接合面と平行をなしてチップの端面に設けられた
正,負の電極部の表面にろう材のコーティング層を有す
るチップ部品型の発光ダイオードを、上記チップ端面の
ろう材コーティング層が上記配線基板の配線パターンに
載るように配置し、加熱により上記ろう材コーティング
層を溶融して、溶融したろう材のみで上記チップ端面の
電極部と上記基板の配線パターンとを電気的に接続する
ことを特徴とするチップ部品型の発光ダイオードの実装
方法。In a mounting method for mounting a chip component type light emitting diode on a surface of a wiring board, a brazing filler metal is provided on a surface of positive and negative electrode portions provided on an end surface of a chip in parallel with a PN junction surface. A chip component type light emitting diode having a coating layer is disposed such that the brazing material coating layer on the chip end surface is placed on the wiring pattern of the wiring board, and the brazing material coating layer is melted by heating, and the molten brazing material is melted. A method for mounting a light emitting diode of a chip component type, wherein an electrode portion on an end surface of the chip and a wiring pattern on the substrate are electrically connected only by using the light emitting diode.
Ｎ接合面と平行をなして互いに対向するチップの両端面
に設けられたことを特徴とする請求項１に記載のチップ
部品型の発光ダイオードの実装方法。2. The method according to claim 1, wherein the positive and negative electrode portions on the chip end face are P
2. The method for mounting a chip component type light emitting diode according to claim 1, wherein the light emitting diodes are mounted on both end faces of the chip which face each other in parallel with the N junction surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11277493A JP3022049B2 (en) | 1993-05-14 | 1993-05-14 | Mounting method of light emitting diode of chip component type |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11277493A JP3022049B2 (en) | 1993-05-14 | 1993-05-14 | Mounting method of light emitting diode of chip component type |
Related Child Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP34948098A Division JP3312120B2 (en) | 1998-12-09 | 1998-12-09 | Manufacturing method of light emitting diode of chip component type |
| JP34948198A Division JP3312121B2 (en) | 1998-12-09 | 1998-12-09 | Manufacturing method of light emitting diode of chip component type |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06326365A JPH06326365A (en) | 1994-11-25 |
| JP3022049B2 true JP3022049B2 (en) | 2000-03-15 |
Family
ID=14595176
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11277493A Expired - Fee Related JP3022049B2 (en) | 1993-05-14 | 1993-05-14 | Mounting method of light emitting diode of chip component type |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3022049B2 (en) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3158018B2 (en) * | 1995-07-17 | 2001-04-23 | シャープ株式会社 | Horizontal light emitting LED and method for manufacturing the same |
| JP3337405B2 (en) * | 1996-12-27 | 2002-10-21 | シャープ株式会社 | Light-emitting display element, method for connecting to light-emitting substrate, and method for manufacturing |
| JP2002324919A (en) | 2001-02-26 | 2002-11-08 | Sharp Corp | Light emitting diode and method of manufacturing the same |
| JP4155847B2 (en) * | 2003-03-12 | 2008-09-24 | 三洋電機株式会社 | Multilayer light emitting diode element |
| JP2004349331A (en) | 2003-05-20 | 2004-12-09 | Renesas Technology Corp | Power mosfet, application device thereof and method for manufacturing the same |
| JP4945167B2 (en) | 2006-05-12 | 2012-06-06 | スタンレー電気株式会社 | Manufacturing method of semiconductor light emitting device and mounting method of semiconductor light emitting device manufactured by the manufacturing method |
| JP6107024B2 (en) * | 2012-09-26 | 2017-04-05 | 日亜化学工業株式会社 | Light emitting device and manufacturing method thereof |
| KR102017554B1 (en) * | 2018-03-27 | 2019-09-03 | (주)라이타이저 | One chip type light emitting device and fabrication method of the same |
| KR102078643B1 (en) * | 2018-04-04 | 2020-04-07 | (주)라이타이저 | Display appartus using one chip type led and fabrication method of the same |
| EP3944308A1 (en) * | 2020-07-20 | 2022-01-26 | Nexperia B.V. | A semiconductor device and a method of manufacture |
| DE102020125892A1 (en) * | 2020-10-02 | 2022-04-07 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | OPTOELECTRONIC DEVICE AND METHOD OF PRODUCING OPTOELECTRONIC DEVICE |
-
1993
- 1993-05-14 JP JP11277493A patent/JP3022049B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH06326365A (en) | 1994-11-25 |
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