JP3019470B2 - Manufacturing method of printed wiring board - Google Patents
Manufacturing method of printed wiring boardInfo
- Publication number
- JP3019470B2 JP3019470B2 JP3138782A JP13878291A JP3019470B2 JP 3019470 B2 JP3019470 B2 JP 3019470B2 JP 3138782 A JP3138782 A JP 3138782A JP 13878291 A JP13878291 A JP 13878291A JP 3019470 B2 JP3019470 B2 JP 3019470B2
- Authority
- JP
- Japan
- Prior art keywords
- solder resist
- photosensitive
- ink
- wiring board
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Description
【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION
【０００１】[0001]
【産業上の利用分野】本発明は、各種電子機器等に使用
されるプリント配線板の製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board used for various electronic devices and the like.
【０００２】[0002]
【従来の技術】近年、各種電子機器等に数多く使用され
ているプリント配線板は、電子機器の小型・軽量化や多
機能化に伴い高密度配線・高精度化の傾向が著しく、ま
た、低コスト化を図るため、例えば６層の多層プリント
配線板を４層に、４層の多層プリント配線板を２層（両
面）に、さらに両面プリント配線板を片面にしようとす
る傾向が年々強まり、プリント配線板上に形成される導
体パターンの密度や電子部品が実装されるランドや部品
穴は細線・小径化され、はんだ付け不要部分などに形成
されるソルダレジストも同時に高精度な仕上がりが要求
されるようになり、その形成方法も従来のスクリーン法
から写真法へと変化しつつある。特に、スルーホールめ
っきが不要でしかも導体厚を薄くすることに有利なプリ
ント配線板の基本的な構成である片面プリント配線板は
低コストの実現を図る上で近年見直し、注目されてい
る。2. Description of the Related Art In recent years, printed wiring boards, which are widely used in various electronic devices, have a remarkable tendency for high-density wiring and high precision as electronic devices become smaller, lighter and more multifunctional. In order to reduce costs, for example, there is a growing tendency to use a multilayer printed wiring board having six layers as four layers, a multilayer printed wiring board having four layers as two layers (both sides), and a double-sided printed wiring board as one side. The density of the conductor pattern formed on the printed wiring board, the lands and component holes on which electronic components are mounted have been reduced in diameter and diameter, and the solder resist formed in areas that do not require soldering also requires high-precision finishing. As a result, the forming method is changing from a conventional screen method to a photographic method. In particular, a single-sided printed wiring board, which is a basic configuration of a printed wiring board which does not require through-hole plating and is advantageous in reducing the thickness of a conductor, has been recently reviewed and attracted attention for realizing low cost.
【０００３】以下に、従来の片面プリント配線板につい
て説明する。A conventional single-sided printed wiring board will be described below.
【０００４】図２は従来の片面プリント配線板のソルダ
レジスト形成の製造過程を示すものである。図２におい
て、１１は絶縁基板、１２は導体パターン、１３は多ピ
ンフラットパッケージ（以下、ＱＦＰと称する）などの
表面実装用のＩＣ端子用ランド、１４はコンデンサや抵
抗などのチップ部品の電極との接続用ランド、１５ａは
感光性ソルダレジストインキ、１５ｂはソルダレジス
ト、１６はソルダレジスト形成用マスクフィルム、１７
は露光用の紫外線である。FIG. 2 shows a conventional manufacturing process for forming a solder resist on a single-sided printed wiring board. In FIG. 2 , reference numeral 11 denotes an insulating substrate, 12 denotes a conductor pattern, 13 denotes a land for IC terminals for surface mounting such as a multi-pin flat package (hereinafter referred to as QFP), and 14 denotes a chip component electrode such as a capacitor or a resistor. 15a is a photosensitive solder resist ink, 15b is a solder resist, 16 is a mask film for forming a solder resist, 17
Is ultraviolet light for exposure.
【０００５】以上のように構成された片面プリント配線
板のソルダレジスト形成方法について、以下に説明す
る。A method of forming a solder resist for a single-sided printed wiring board configured as described above will be described below.
【０００６】まず、所定の大きさに切断された銅張積層
板（図示せず）に写真法などによりエッチングレジスト
を形成した後、塩化第２銅などの溶液を用いてエッチン
グを行い、導体パターン１２、ＱＦＰなどの表面実装用
のＩＣ端子用ランド１３、コンデンサや抵抗などのチッ
プ部品の電極との接続用ランド１４を形成し、エッチン
グレジストを剥離する。First, after an etching resist is formed on a copper-clad laminate (not shown) cut to a predetermined size by a photographic method or the like, etching is performed using a solution such as cupric chloride to form a conductor pattern. 12, lands 13 for IC terminals for surface mounting such as QFP, lands 14 for connection with electrodes of chip components such as capacitors and resistors, and the etching resist is peeled off.
【０００７】その後、図２（ａ）に示すように、絶縁基
板１１上に導体パターン１２などが形成された片面プリ
ント配線板に感光性ソルダレジストインキ１５ａを塗布
し、熱風などにより指触乾燥を行う。[0007] Thereafter, as shown in FIG. 2 (a), the photosensitive solder resist ink 15a on one side a printed wiring board such as a conductor pattern 12 is formed on the insulating substrate 11 by coating, hot air tack due Do.
【０００８】次に、図２（ｂ）に示すように、ソルダレ
ジスト形成用マスクフィルム１６を指触乾燥した感光性
ソルダレジストインキ１５ａ面に密着させ、紫外線１７
で露光した後、図２（ｃ）のように未露光部を所定の現
像液で現像・除去し、熱風などで再度重合・硬化し、ソ
ルダレジスト１５ｂを形成する。Next, as shown in FIG. 2 (b), a mask film 16 for forming a solder resist is brought into close contact with the surface of the photosensitive solder resist ink 15a which has been dried by touching.
In after exposure and developed, remove the unexposed portion with a predetermined developer as in FIG. 2 (c), again polymerized and cured in hot air, to form a solder resist 15b.
【０００９】[0009]
【発明が解決しようとする課題】しかしながら上記の従
来の構成では、リフローはんだ付け時のはんだブリッジ
の防止などの理由からＱＦＰなど狭ピッチのＩＣ端子用
ランド間にソルダレジストを形成する要望が高まってい
るにもかかわらず、端子用ランド間ピッチが５００μｍ
の場合、ソルダレジスト形成用マスクフィルムの位置合
わせずれなどを考慮すると、マスクフィルムに描画でき
るソルダレジスト・パターン幅は約１５０μｍとなり、
端子用ランド間ピッチが４００μｍの場合では約１００
μｍとなり、そしてこれらのマスクフィルムを用いて露
光を行い、現像した後では形成されたソルダレジストの
幅はさらに細る傾向にあるため、現像液のスプレー圧力
により剥離や脱落寸前の状態になり、プリント配線板の
搬送や部品実装時に端子用ランド間のソルダレジストが
脱落し、プリント配線板製造工程の歩留りを低下させ、
はんだ付け性を阻害させたり、電子機器内の精密部品の
機能に障害をもたらすなどの問題点を有している。However, in the above-mentioned conventional structure, there is an increasing demand for forming a solder resist between lands for IC terminals having a narrow pitch such as QFP due to prevention of a solder bridge at the time of reflow soldering. Despite the terminal land pitch is 500 μm
In the case of, considering the misalignment of the mask film for solder resist formation, the solder resist pattern width that can be drawn on the mask film is about 150 μm,
Approximately 100 when the terminal land pitch is 400 μm
μm, and after exposure using these mask films and development, the width of the formed solder resist tends to become narrower. Solder resist between the terminal lands drops when the wiring board is transported or components are mounted, lowering the yield of the printed wiring board manufacturing process.
There are problems such as impairing solderability and impairing the function of precision components in electronic equipment.
【００１０】このため、ソルダレジスト形成用マスクフ
ィルム・パターンの幅を２０μｍ程度大きくする方法な
どがとられているが、有機材料が主成分である絶縁基板
やマスクフィルムの温湿度変化などによる寸法挙動の影
響により、相互の位置合わせが困難となり、端子用ラン
ド間に形成すべきソルダレジストがランド上に形成さ
れ、同様に電子機器の製造工程でのはんだ付け性を阻害
させ、市場における電子機器の機能に障害をもたらすな
どの問題点をも有していた。For this reason, a method of increasing the width of a mask film pattern for forming a solder resist by about 20 μm has been adopted. However, the dimensional behavior of an insulating substrate or a mask film containing an organic material as a main component due to a change in temperature and humidity, etc. , The mutual alignment becomes difficult, the solder resist to be formed between the lands for the terminals is formed on the lands, and similarly, the solderability in the manufacturing process of the electronic device is hindered, and the electronic device It also had problems such as impairing the function.
【００１１】本発明は上記従来の問題点を解決するもの
で、高密度配線の片面プリント配線板のソルダレジスト
の位置ずれを解消し、製造工程の歩留りを向上させ、電
子機器の信頼性をも向上させる高品質なプリント配線板
の製造方法を提供することを目的とする。SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problems by eliminating the displacement of the solder resist of a single-sided printed wiring board for high-density wiring, improving the yield in the manufacturing process, and improving the reliability of electronic equipment. An object of the present invention is to provide a method of manufacturing a high-quality printed wiring board to be improved.
【００１２】[0012]
【課題を解決するための手段】この目的を達成するため
に本発明の製造方法は、ガラス布またはガラス不織布基
材のエポキシ樹脂積層板で構成される絶縁基板を用いた
片面プリント配線板の 導体パターン形成側に感光性ソル
ダレジストインキを塗布、乾燥する工程と、前記感光性
ソルダレジストインキ上の所望する部分に前記感光性ソ
ルダレジストインキの現像液にて溶解・除去の可能な非
感光性レジストを形成する工程と、前記感光性ソルダレ
ジストインキを非感光性レジストを介して露光する工程
と、前記絶縁基板を介して導体パターン形成側と反対側
から前記感光性ソルダレジストインキを露光する工程
と、前記感光性ソルダレジストインキの未露光部分と非
感光性のレジストを現像・除去する工程とを有するプリ
ント配線板の製造方法としたものである。 In order to achieve this object, the production method of the present invention uses a glass cloth or a glass nonwoven fabric.
Using an insulating substrate made of epoxy resin laminate
The photosensitive solder is on the conductor pattern forming side of the single-sided printed wiring board.
Applying and drying a resist ink;
A desired part on the solder resist ink is coated with the photosensitive solution.
Non-dissolvable / removable with a rude resist ink developer
A step of forming a photosensitive resist;
Step of exposing the dying ink through a non-photosensitive resist
And the side opposite to the conductor pattern forming side via the insulating substrate
Exposing the photosensitive solder resist ink from the
And the unexposed portion of the photosensitive solder resist ink
Developing and removing the photosensitive resist
This is a method for manufacturing a printed wiring board.
【００１３】[0013]
【作用】この構成によって、片面プリント配線板上の電
子部品が実装される所望の導体パターン上の感光性ソル
ダレジストインキは、遮光用レジストにより、導体パタ
ーン形成側から露光され、露光・重合部と未露光部とに
形成される。 According to this configuration, the photosensitive solder resist ink on the desired conductor pattern on which the electronic component on the single-sided printed wiring board is mounted is converted into the conductor pattern by the light-shielding resist.
Exposed from the pattern forming side, the exposed / overlaid area and the unexposed area
It is formed.
【００１４】さらに、絶縁基板を介して導体パターン形
成側の反対側より露光されるため、導体パターン上の未
露光感光性ソルダレジストインキは、露光用光線が導体
パターンにより遮閉されて未露光状態を維持し、所定の
現像液により溶解・除去、また同時に遮光用レジストも
溶解・除去することが可能となり、絶縁基板上のソルダ
レジストは遮光レジストの位置合わせ状態に関係なく形
成することができる。 Further, since the exposure is performed from the side opposite to the conductor pattern forming side via the insulating substrate, the unexposed photosensitive solder resist ink on the conductor pattern becomes unexposed when the exposure light is blocked by the conductor pattern. maintaining, dissolved and removed by a predetermined developer, also becomes possible to also dissolve and remove the light-shielding resist simultaneously, the solder on the insulating substrate
The resist is shaped regardless of the alignment of the light-shielding resist.
Can be achieved.
【００１５】[0015]
【実施例】以下本発明の一実施例について、図面を参照
しながら説明する。An embodiment of the present invention will be described below with reference to the drawings.
【００１６】（実施例） 図１（ａ）、図１（ｂ）、図１（ｃ）、図１（ｄ）、図
１（ｅ）は本発明の一実施例における片面プリント配線
板の製造過程を示すものである。図１において、２１は
絶縁基板、２２は導体パターン、２３はＱＦＰなどの表
面実装用のＩＣ端子用ランド、２４はコンデンサや抵抗
などのチップ部品の電極との接続用ランド、２５ａは感
光性ソルダレジストインキ、２５ｂはソルダレジスト、
２７は露光用の紫外線である。 (Embodiment) FIGS. 1 (a), 1 (b), 1 (c), 1 (d), and FIGS.
1 (e) shows a process for manufacturing a single-sided printed wiring board according to one embodiment of the present invention. In FIG. 1 , 21 is an insulating substrate, 22 is a conductor pattern, 23 is a land for IC terminal for surface mounting such as QFP, 24 is a land for connection with an electrode of a chip component such as a capacitor or a resistor, and 25a is a photosensitive solder. Resist ink, 25b is solder resist,
27 is an ultraviolet ray for exposure .
【００１７】以上のように構成された片面プリント配線
板のソルダレジスト形成方法について、以下に説明す
る。A method of forming a solder resist for a single-sided printed wiring board configured as described above will be described below.
【００１８】まず、図１（ａ）に示すように、片面プリ
ント配線板上に感光性ソルダレジストインキ２５ａを塗
布・指触乾燥を行い、次に、図１（ｂ）に示すように、
感光性ソルダレジストインキ２５ａの光重合波長域の紫
外線を遮光することができかつ感光性ソルダレジストイ
ンキ２５ａ用の現像液で溶解・除去可能な非感光型の遮
光用レジスト２８を、指触乾燥した感光性ソルダレジス
トインキ２５ａ上の所望する部位へスクリーン印刷法な
どの方法を用いて塗布・形成し、図１（ｃ）に示すよう
に、露光機などを用いて紫外線２７により光量約５００
〜７００mJ／cm2の範囲内で露光する。First, as shown in FIG. 1 (a), a photosensitive solder resist ink 25a is applied on a single-sided printed wiring board and dried by touch, and then, as shown in FIG. 1 (b),
A non-photosensitive light-shielding resist 28 that can shield ultraviolet rays in the photopolymerization wavelength region of the photosensitive solder resist ink 25a and can be dissolved and removed with a developer for the photosensitive solder resist ink 25a was touch-dried. the method applied and formed using such a photosensitive screen printing to a desired site on the solder resist ink 25a, as shown in FIG. 1 (c), the light quantity of about 500 by UV 27 by using an exposure machine
Exposure is performed within the range of ７００700 mJ / cm 2 .
【００１９】次に、図１（ｃ）に示すように、導体パタ
ーン２２形成側の反対側より、感光性ソルダレジストイ
ンキ２５ａの光重合に対応しかつガラス布またはガラス
不織布基材のエポキシ樹脂積層板で構成される絶縁基板
２１を透過可能な波長域を有する紫外線２７を光量１０
００〜２０００mJ／cm2の範囲内でＵＶコンベア炉など
を用いて照射する。Next, as shown in FIG. 1 (c), from the side opposite to the side on which the conductor pattern 22 is formed, an epoxy resin laminate of a glass cloth or a glass non-woven fabric base material corresponding to the photopolymerization of the photosensitive solder resist ink 25a. UV light 27 having a wavelength range capable of transmitting through the insulating substrate 21 composed of
Irradiation is performed in the range of 00 to 2000 mJ / cm 2 using a UV conveyor furnace or the like.
【００２０】その後、図１（ｄ）に示すように、炭酸ナ
トリウムを主成分とする現像液で未露光部を現像・除去
する。この際、同時にＱＦＰなどのＩＣ端子用ランド２
３、チップ部品の電極接続用ランド２４上の感光性ソル
ダレジストインキ２５ａおよび非感光型の遮光用レジス
ト２８は溶解・除去され、導体パターン２２上と絶縁基
板２１上の感光性ソルダレジストインキ２５ａは残存
し、図１（ｅ）に示すようにソルダレジスト２５ｂを形
成したプリント配線板を得ることができる。[0020] Thereafter, as shown in FIG. 1 (d), the unexposed portion is developed and removed with a developing solution mainly composed of sodium carbonate. At this time, the land 2 for IC terminals such as QFP
3. The photosensitive solder resist ink 25a on the electrode connection lands 24 of the chip component and the non-photosensitive light-shielding resist 28 are dissolved and removed, and the photosensitive solder resist ink 25a on the conductor pattern 22 and the insulating substrate 21 is removed. remaining, it is possible to obtain a printed wiring board to form a solder resist 25b as shown in FIG. 1 (e).
【００２１】従来の方法での形成されたソルダレジスト
は、位置ずれによるランドへの乗り上げやＱＦＰなどの
表面実装用ＩＣ端子ランド間でのソルダレジスト脱落な
どの不具合が数％のレベルで発生していたが、本発明の
実施例においてはそれらの発生は全く認めることはでき
なかった。In the solder resist formed by the conventional method, inconveniences such as climbing onto the land due to displacement and dropping of the solder resist between land terminals for surface mounting IC such as QFP occur at a level of several percent. However, in the Examples of the present invention, their occurrence could not be recognized at all.
【００２２】なお、本発明の実施例において、感光性ソ
ルダレジストインキ２５ａはアルカリ現像型としたが、
感光性ソルダレジストインキ２５ａは溶剤現像型として
もよいことは言うまでもない。In the embodiment of the present invention, the photosensitive solder resist ink 25a is of an alkali developing type.
It goes without saying that the photosensitive solder resist ink 25a may be of a solvent development type.
【００２３】[0023]
【発明の効果】以上のように本発明は、絶縁基板を介し
て導体パターン形成側の感光性ソルダレジストインキを
露光することにより、高密度配線された片面プリント配
線板のＱＦＰなどの表面実装用ＩＣの端子用ランド間の
ソルダレジストを従来の露光時におけるマスクフィルム
などの位置合わせ精度に依存することなく形成すること
ができ、形成されたソルダレジストの位置ずれによるラ
ンドへの乗り上げを解消すると同時に、ソルダレジスト
はランド間に隙間なく充填・形成され、後工程でのソル
ダレジスト脱落の防止が可能となり、これによりプリン
ト配線板製造工程の歩留まりを著しく向上させ、電子部
品実装工程での良好なはんだ付け性の確保など電子機器
の信頼性をも向上させることができる。さらに、従来の
マスクフィルムなどの位置合わせに要する時間を必要と
しないため、生産性を向上させることもできる優れたプ
リント配線板のソルダレジスト形成を実現できるもので
ある。As described above, the present invention provides a method for exposing a conductive solder resist ink on a conductive pattern forming side via an insulating substrate to a surface mounting such as QFP of a single-sided printed wiring board having a high-density wiring. Solder resist between IC terminal lands can be formed without depending on the positioning accuracy of the mask film etc. at the time of conventional exposure , eliminating run-up on the land due to misalignment of the formed solder resist and The solder resist is filled and formed without any gaps between the lands, and it is possible to prevent the solder resist from falling off in the subsequent process, thereby significantly improving the yield of the printed wiring board manufacturing process and improving the solderability in the electronic component mounting process. It is also possible to improve the reliability of the electronic device such as securing the attachment property. Further, since the time required for positioning a conventional mask film or the like is not required, an excellent solder resist for a printed wiring board which can improve the productivity can be realized.
【００２４】また、高感度感光性ソルダレジストインキ
やより薄い板厚の絶縁基板など紫外光の透過率を高める
手段を用いることで、さらにソルダレジスト形成時の高
速度露光や低露光量化を実現することも可能である。Further, by using means for increasing the transmittance of ultraviolet light, such as a high-sensitivity photosensitive solder resist ink or a thinner insulating substrate, it is possible to further achieve high-speed exposure and low exposure during solder resist formation. It is also possible.
【図１】（ａ）〜（ｅ）は本発明の一実施例における片
面プリント配線板の製造工程を示す断面図FIGS. 1A to 1E are cross-sectional views illustrating a process for manufacturing a single-sided printed wiring board according to an embodiment of the present invention.
【図２】（ａ）〜（ｃ）は従来の片面プリント配線板の
製造工程を示す断面図FIGS. 2A to 2C are cross-sectional views showing a process for manufacturing a conventional single-sided printed wiring board.
２１ 絶縁基板 ２２ 導体パターン ２３ ＱＦＰなどの表面実装用のＩＣ端子用ランド ２４ チップ部品の電極接続用ランド ２５ａ 感光性ソルダレジストインキ ２５ｂ 露光・現像後のソルダレジスト ２７ 紫外線 ２８ 非感光型の遮光用レジスト Reference Signs List 21 Insulating substrate 22 Conductor pattern 23 Land for IC terminal for surface mounting such as QFP 24 Land for connecting electrode of chip component 25a Photosensitive solder resist ink 25b Solder resist after exposure and development 27 Ultraviolet light 28 Non-photosensitive light-shielding resist
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H05K 3/28 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H05K 3/28
Claims (1)
キシ樹脂積層板で構成される絶縁基板を用いた片面プリSingle-sided pre-printing using an insulating substrate composed of xylene resin laminates
ント配線板の導体パターン形成側に感光性ソルダレジスSolder resist on the conductive pattern forming side of the printed circuit board
トインキを塗布、乾燥する工程と、前記感光性ソルダレApplying and drying the ink, and the photosensitive soldering step.
ジストインキ上の所望する部分に前記感光性ソルダレジApply the photosensitive solder resist to the desired area on the dist ink
ストインキの現像液にて溶解・除去の可能な非感光性レNon-photosensitive resin that can be dissolved and removed with a strike ink developer
ジストを形成する工程と、前記感光性ソルダレジストイForming a dist, and the photosensitive solder resist
ンキを非感光性レジストを介して露光する工程と、前記Exposing the ink through a non-photosensitive resist;
絶縁基板を介して導体パターン形成側と反対側から前記From the side opposite to the conductor pattern forming side via the insulating substrate
感光性ソルダレジストインキを露光する工程と、前記感Exposing the photosensitive solder resist ink to light;
光性ソルダレジストインキの未露光部分と非感光性のレThe unexposed part and the non-photosensitive resin
ジストを現像・除去する工程とを有するプリント配線板Printed wiring board having a step of developing and removing dist
の製造方法。Manufacturing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3138782A JP3019470B2 (en) | 1991-06-11 | 1991-06-11 | Manufacturing method of printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3138782A JP3019470B2 (en) | 1991-06-11 | 1991-06-11 | Manufacturing method of printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04364089A JPH04364089A (en) | 1992-12-16 |
| JP3019470B2 true JP3019470B2 (en) | 2000-03-13 |
Family
ID=15230081
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3138782A Expired - Fee Related JP3019470B2 (en) | 1991-06-11 | 1991-06-11 | Manufacturing method of printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3019470B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0738236A (en) * | 1993-07-19 | 1995-02-07 | Hitachi Aic Inc | Manufacture of printed wiring board |
-
1991
- 1991-06-11 JP JP3138782A patent/JP3019470B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04364089A (en) | 1992-12-16 |
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